Abstract: Embodiments relate to an image sensor. According to embodiments, an image sensor may include a metal interconnection, readout circuitry, a first substrate, a metal layer, and an image sensing device. The metal interconnection and the readout circuitry may be formed on and/or over the first substrate. The image sensing device may include a first conduction type conduction layer and a second conduction type conduction layer and may be electrically connected to the metal layer. According to embodiments, an electric field may not be generated on and/or over an Si surface. This may contribute to a reduction in a dark current of a 3D integrated CMOS image sensor.

Abstract: Embodiments relate to an image sensor and a method of forming an image sensor. According to embodiments, an image sensor may include a first substrate and a photodiode. A circuitry including a metal interconnection may be formed on and/or over the first substrate. The photodiode may be formed over a first substrate, and may contact the metal interconnection. The circuitry of the first substrate may include a first transistor, a second transistor, an electrical junction region, and a first conduction type region. The first and second transistors may be formed over the first substrate. According to embodiments, an electrical junction region may be formed between the first transistor and the second transistor. The first conduction type region may be formed at one side of the second transistor, and may be connected to the metal interconnection.

Abstract: A system and method for sensing image on CMOS. According to an embodiment, the present invention provide a CMOS image sensing pixel. The pixel includes an n-type substrate, which includes a first width and a first thickness. The pixel also includes a p-type epitaxy layer overlying the n-type substrate. The p-type epitaxy layer includes a second width and a second thickness. The second width is associated with one or more characteristics of a colored light. The pixel additionally includes an n-type layer overlying the p-type epitaxy layer. The n-type layer is associated with a third width and a third thickness. Additionally, the pixel includes an pn junction formed between the p-type epitaxy layer and the n-type layer. Moreover, the pixel includes a control circuit being coupled to the CMOS image sensing pixel.

Abstract: This invention provides a photo-FET, in which a FET part and photodiode part are stacked, and the FET part and photodiode part are optimized independently in design and operational bias conditions. The semiconductor layer serving as a photo-absorption layer (41) is formed on the cathode semiconductor layer (10) of a photodiode part (50). An electron barrier layer (40) with a wider bandgap semiconductor than a photo-absorption layer (41), which also serves as an anode layer of a photodiode part (50), is formed on a photo-absorption layer (41). The channel layer (15) which constitutes the channel regions of the FET part is formed with a narrower bandgap semiconductor than an electron barrier layer (40) on an electron barrier layer (40). The hole barrier layer (16) with a bandgap wider than the semiconductor which constitutes a channel layer (15) is formed on a channel layer (15). The source electrode (30) and drain electrode (32) which are separated each others, are formed on a hole barrier layer (16).

Abstract: A method and apparatus for operating an imager pixel that includes the act of applying a relatively small first polarity voltage and a plurality of pulses of a second polarity voltage on the gate of a transfer transistor during a charge integration period.

Abstract: The present invention provides a photosensitive resin composition for a pad protective layer that includes (A) an alkali soluble resin, (B) a reactive unsaturated compound, (C) a photoinitiator, and (D) a solvent. The (A) alkali soluble resin includes a copolymer including about 5 to about 50 wt % of a unit having the Chemical Formula 1, about 1 to about 25 wt % of a unit having the Chemical Formula 2, and about 45 to about 90 wt % of a unit having the Chemical Formula 3, and a method of making an image sensor using the photosensitive resin composition.

Abstract: A field effect transistor includes a first semiconductor layer made of a multilayer of a plurality of semiconductor films and a second semiconductor layer formed on the first semiconductor layer. A source electrode and a drain electrode are formed on the second semiconductor layer to be spaced from each other. An opening having an insulating film on its inner wall is formed in a portion of the second semiconductor layer sandwiched between the source electrode and the drain electrode so as to expose the first semiconductor layer therein. A gate electrode is formed in the opening to be in contact with the insulating film and the first semiconductor layer on the bottom of the opening.

Abstract: A semiconductor device includes a support substrate and a semiconductor layer formed on the underlying substrate. The support substrate has its metal part formed by plating and extending across its entire thickness, whilst it has the other region made of semiconductor part. In particular, the region of the support substrate lying immediately below an active region is the metal part formed by plating. The region of the support substrate lying immediately below the region other than the active region is an inactive region made of semiconductor. The semiconductor device thus suppresses warping of a substrate otherwise caused by stress in the metal part formed by plating, and heat evolved due to the current in operation of the semiconductor device may be dissipated over the shortest path through the metal part having a higher thermal conductivity.

Abstract: An integrated circuit including a memory cell includes a vertical bipolar select device including a base and an emitter. The memory cell includes a resistive memory element coupled to the emitter and a buried metallized word line contacting the base.

Abstract: A display device, comprising an insulating substrate; a data conductor formed on the insulating substrate and comprising a conductive film; a thin film transistor having at least one source electrode electrically connected with the conductive film, and a drain electrode formed along a circumference of the source electrode and spaced therefrom; and a pixel electrode which is electrically connected with the conductive film.

Abstract: A two-terminal mesa phototransistor and a method for making it are disclosed. The photo transistor has a mesa structure having a substantially planar semiconductor surface. In the mesa structure is a first semiconductor region of a first doping type, and a second semiconductor region of a second doping type opposite to that of the first semiconductor region, forming a first semiconductor junction with the first region. In addition, a third semiconductor region of the first doping type forms a second semiconductor junction with the second region. The structure also includes a dielectric layer. The second semiconductor region, first semiconductor junction, and second semiconductor junction each has an intersection with the substantially planar semiconductor surface. The dielectric covers, and is in physical contact with, all of the intersections.

Abstract: A solid-state imaging element includes a layered substrate made of silicon and composed of, for example, an N-type substrate, a P-type layer, and an N-type layer. In the layered substrate, an imaging region in which a plurality of pixels are arranged and a peripheral circuit region are formed. A recess reaching the reverse face of the P-type layer is formed in a reverse face portion of the layered substrate in the imaging region, and a reflective film is formed on at least the inner face of the recess. Light is reflected on the reverse face and the obverse face of the layered substrate.

Abstract: Provided are an optical receiver and a method of forming the same. The optical receiver includes a lens, a photo detector, and a hetero-junction bipolar transistor. The lens is attached to a backside of a substrate. The photo detector is disposed on a top surface of the substrate. The hetero-junction bipolar transistor is disposed on the top surface of the substrate. The lens condenses an incident optical signal to transmit the condensed optical signal to the photo detector.

Abstract: The present invention provides an electro-optical device capable of achieving an increased light emission efficiency and an enhanced visibility. An organic electroluminescents (EL) display device has a plurality of material layers including a luminescent layer. In a plurality of material layers layered in the direction of light emission from the luminescent layer, first and second insulating interlayers are disposed between a substrate, which is positioned at the outermost surface, and the luminescent layer. The first and second insulating interlayers have a refractive index lower than that of the substrate. Accordingly, by forming predetermined materials having a low refractive index, the resulting low refractive index layers have a low dielectric constant, and consequently, the capacity between wires can be reduced.

Abstract: An image pickup device is characterized by including a plurality of pixels having a plurality of photoelectric conversion units, convex interlayer lenses with respect to incident light, the convex interlayer lenses being arranged correspondingly to a photoelectric conversion devices and color filters being arranged for each color on the interlayer lenses correspondingly to the photoelectric conversion devices, wherein the color filter is formed to match the shape of the interlayer lens and the top surface thereof is substantially flat. This configuration reduces the amount of light which is incident on the gaps between adjacent microlenses and passes through the color filters at the boundary of pixels, decreasing color mixture of camera image.

Abstract: A solid-state image pickup element comprises: a semiconductor substrate; an imaging section comprising a photoelectric converting portion, formed on the semiconductor substrate; an intralayer lens formed in an upper layer of the imaging section; and a peripheral circuit section that processes an output of the imaging section, formed on the semiconductor substrate, wherein at least part of the intralayer lens is formed in a lower layer of a wiring portion in the peripheral circuit section.

Abstract: A photodetector including a photodiode formed in a semiconductor substrate and a waveguide element formed of a block of a high-index material extending above the photodiode in a thick layer of a dielectric superposed to the substrate, the thick layer being at least as a majority formed of silicon oxide and the block being formed of a polymer of the general formula R1R2R3SiOSiR1R2R3 where R1, R2, and R3 are any carbonaceous or metal substituents and where one of R1, R2, or R3 is a carbonaceous substituent having at least four carbon atoms and/or at least one oxygen atom.

Abstract: Diodes having p-type and n-type regions in contact, having at least one of either the p-type region or n-type region including a conjugated organic material doped with an immobile dopant, conjugated organic materials for incorporation into such diodes, and methods of manufacturing such diodes and materials are provided.

Abstract: A near-field terahertz wave detector comprises a semiconductor chip (12) whose longitudinal electrical resistance along its surface changes due to a near-field wave of a terahertz wave (1), an insulating film (18) which covers the surface of the semiconductor chip, and a conductive film (20) able to shield the terahertz wave by covering the surface of the insulating film. The conductive film (20) has an aperture (21) whose maximum size is one digit or more smaller than the wavelength of the terahertz wave. Further, a planar conductive probe (14) is provided between the conductive film (20) and the semiconductor chip (12). The conductive probe (14) is insulated from the conductive film (20) by the insulating film (18), and a tip (14a) of the conductive probe (14) is located inside the aperture (21).

Abstract: A source trench and a drain trench are asymmetrically formed in a top semiconductor layer comprising a first semiconductor in a semiconductor substrate. A second semiconductor material having a narrower band gap than the first semiconductor material is deposited in the source trench and the drain trench to form a source side narrow band gap region and a drain side narrow band gap region, respectively. A gate spacer is formed and source and drain regions are formed in the top semiconductor layer. A portion of the boundary between an extended source region and an extended body region is formed in the source side narrow band gap region. Due to the narrower band gap of the second semiconductor material compared to the band gap of the first semiconductor material, charge formed in the extended body region is discharged through the source and floating body effects are reduced or eliminated.

Abstract: A complementary metal-oxide-semiconductor (CMOS) optical sensor structure comprises a pixel containing a charge collection well of a same semiconductor material as a semiconductor layer in a semiconductor substrate and at least another pixel containing another charge collection well of a different semiconductor material than the material of the semiconductor layer. The charge collections wells have different band gaps, and consequently, generate charge carriers in response to light having different wavelengths. The CMOS sensor structure thus includes at least two pixels responding to light of different wavelengths, enabling wavelength-sensitive, or color-sensitive, capture of an optical data. Further, a design structure for the inventive complementary metal-oxide-semiconductor (CMOS) image sensor is also provided.

Abstract: A device and method for managing terahertz and/or microwave radiation are provided. The device can comprise one or more field effect transistors (FETs) that each include at least one channel contact to a central region of the device channel of the FET. The frequency of the radiation managed by the device can be tuned/adjusted by applying a bias voltage to the FET. The radiation can be impinged on the device, and can be detected by measuring a voltage that is induced by the radiation. Further, the device can generate terahertz and/or microwave radiation by, for example, inducing a voltage between two edge contacts on either side of the device channel and applying the voltage to the channel contact.

Abstract: It is an object of the present invention to provide a volatile semiconductor device into which data can be additionally written and which is easy to manufacture, and a method for manufacturing the same. It is a feature of the present invention that a semiconductor device includes an element formation layer including a first transistor and a second transistor which are provided over a substrate; a memory element provided over the element formation layer; and a sensor portion provided above the memory element, wherein the memory element has a layered structure including a first conductive layer, and an organic compound layer, and a second conductive layer, the first conductive layer is electrically connected to the first transistor, and the sensor portion is electrically connected to the second transistor.

Abstract: A CMOS image sensor and a method of fabricating the same are provided. The CMOS image sensor includes: an epitaxial layer of a first conductivity type, formed in a semiconductor substrate of the first conductivity type; a blue photodiode region of a second conductivity type, formed in the epitaxial layer at a first depth; a green photodiode region of the second conductivity type, spaced apart from the blue photodiode region and formed in the epitaxial layer at a second depth larger than the first depth; and a red photodiode region of the second conductivity type, spaced apart from the green photodiode region and formed in the epitaxial layer at a third depth larger than the second depth.

Abstract: A light detecting element 1 including an element formation layer 22 which contains a well region 31. A surface electrode 25 is formed on the layer 22 through an insulating layer 24. The region 31 contains an electron holding region 32. The region 32 contains a hole holding region 33. The layer 24 contains a control electrode 26 facing the region 33 through the layer 24. Electrons and holes are generated at the layer 22. There are two selected states. In one state, by controlling each electric potential applied to the electrodes 25, 26, electrons are gathered at the region 32, while holes are held at the region 33. In another state, recombination is stimulated between the electrons and the holes. After the recombination, the remaining electrons are picked out as received light output.

Abstract: An infrared solid-state image pickup apparatus includes an SOI substrate having a silicon oxide film layer and an SOI layer on a silicon substrate, a detecting portion which is provided with a PN junction diode formed on the SOI substrate and converts a temperature change generated by an incident infrared ray to an electric signal, and a support that holds the detecting portion with a space from the silicon substrate of the SOI substrate. An impurity in a semiconductor layer constituting the PN junction diode is distributed such that carriers flowing in the semiconductor layer are distributed in such an uneven manner as being much in a central portion of the semiconductor layer than in a peripheral portion thereof.

Abstract: Methods and structures for monolithically integrating monocrystalline silicon and monocrystalline non-silicon materials and devices are provided. In one structure, a monolithically integrated semiconductor device structure comprises a silicon substrate and a first monocrystalline semiconductor layer disposed over the silicon substrate, wherein the first monocrystalline semiconductor layer has a lattice constant different from a lattice constant of relaxed silicon. The structure further includes an insulating layer disposed over the first monocrystalline semiconductor layer in a first region and a monocrystalline silicon layer disposed over the insulating layer in the first region. The structure includes at least one silicon-based photodetector comprising an active region including at least a portion of the monocrystalline silicon layer.

Abstract: In an X-Y address type solid state image pickup device represented by a CMOS image sensor, a back side light reception type pixel structure is adopted in which a wiring layer is provided on one side of a silicon layer including photo-diodes formed therein, and visible light is taken in from the other side of the silicon layer, namely, from the side (back side) opposite to the wiring layer. Wiring can be made without taking a light-receiving surface into account, and the degree of freedom in wiring for the pixels is enhanced.

Abstract: CMOS image sensor having high sensitivity and low crosstalk, particularly at far-red to infrared wavelengths, and a method for fabricating a CMOS image sensor. A CMOS image sensor has a substrate, an epitaxial layer above the substrate, and a plurality of pixels extending into the epitaxial layer for receiving light. The image sensor also includes at least one of a horizontal barrier layer between the substrate and the epitaxial layer for preventing carriers generated in the substrate from moving to the epitaxial layer, and a plurality of lateral barrier layers between adjacent ones of the plurality of pixels for preventing lateral diffusion of electrons in the epitaxial layer.

Abstract: There is provided an image pickup device, including a photoelectric conversion element converting light into charges, a transfer gate for transferring the converted charges to a floating node, a source follower transistor for outputting a signal based on a voltage of the floating node to a signal line, and a clip circuit clipping the signal line at a first voltage and a second voltage.

Abstract: In an electronic device of the present invention a gate Schottky electrode is formed on an active layer constructed of a GaN layer and an AlGaN layer, and a source ohmic electrode and a drain ohmic electrode are further formed on both sides of the gate Schottky electrode on the active layer. A dielectric layer (TiO2 layer) of a stepwise laminate structure is formed on the AlGaN layer so that the electric field distribution between the gate Schottky electrode and the drain ohmic electrode is substantially uniformed. The dielectric constant of TiO2 of the dielectric layer is made higher than the dielectric constant of GaN and AlGaN of the active layer.

Abstract: A field effect transistor (FET) includes a first semiconductor layer and a second semiconductor layer, the second semiconductor layer being formed on the first semiconductor layer and having a band gap energy greater than that of the first semiconductor layer. The first and second semiconductor layers are made of a Group III-V compound semiconductor layer, formed on the first semiconductor layer are a gate electrode 36 and a source electrode 35, formed on the second semiconductor layer is a drain electrode 37, and the drain electrode and the gate electrode are formed respectively on opposing planes of a semiconductor structure which contains the first and second semiconductor layers. This arrangement enables a drain's breakdown voltage to be increased in the FET, because the gate electrode 36 and the drain electrode 37 are respectively disposed, in a spatial separation of each other, on different planes instead of the same plane of the semiconductor structure.

Abstract: An ultra high speed APD capable of realizing reduction in an operating voltage and quantum efficiency enhancement at the same time is provided. Under operating conditions APD, a doping concentration distribution of each light absorbing layer is determined so that a p-type light absorbing layer (16) maintains a p-type neutrality except a part thereof, and a low concentration light absorbing layer (15) is depleted. Moreover, a ratio between a layer thickness WAD of the p-type light absorbing layer (16) and a layer thickness WAD of the low concentration light absorbing layer (15) is determined so that WAD>0.3 ?m and a delay time of an element response accompanying a transit of carriers generated in the light absorbing layer by light absorption takes on a local minimum under a condition that a layer thickness WA (=WAN+WAD) of the light absorbing layer is constant.

Abstract: A CMOS image sensor and a method for manufacturing the same improves signal efficiency by reducing a dark signal, and includes a substrate having a first conductive type comprising an image area and a circuit area, a STI isolation layer in the substrate for electrical isolation within the circuit area, and a field oxide in the substrate for electrical isolation within the image area.

Abstract: In an ultraviolet light receiving element using a group III nitride semiconductor, the ultraviolet light receiving element having an enhanced light receiving sensitivity is provided. An electron is excited from a valence band to a conduction band 61 by means of a depleted layer generated by irradiating a light having energy larger than band gap energy of an undoped layer 44, and electron-hole pairs are generated. A band structure is varied by the generated electron-hole pairs, and thus a portion having an energy lower than that of a quasi-Fermi level 62 of an electron at a boundary between an undoped layer 43 and the undoped layer 44, so that a two-dimensional electron gas 63 is formed. Since the two-dimensional electron gas 63 mentioned above serves as a channel, a large current is flowed by applying a voltage between drain electrode 46-source electrode 7.

Abstract: A photosensor includes a plurality of photosensitive regions including a first photosensitive region connected to a first voltage reference, and at least one additional photosensitive region. A signal collector is connected to the first photosensitive region. At least one switching device is for switching the at least one additional photosensitive region between the first voltage reference and a second voltage reference that is less than the first voltage reference, and for reversibly connecting the at least one additional photosensitive region to the signal collector so that the photosensor is variably responsive to different light levels.

Abstract: An organic EL display unit is manufactured in an efficient manner. A light emission device (1000) is manufactured by bonding together a driving circuit substrate (100) formed with driving circuit constituted by thin film transistors 11, and a light emission substrate (300) comprising a successively laminated transparent electrode layer 31, bank layer 32 made from insulating material, positive hole injection layer 33, organic EL layer 34 and cathode layer 36.

Abstract: In an X-Y address type solid state image pickup device represented by a CMOS image sensor, a back side light reception type pixel structure is adopted in which a wiring layer is provided on one side of a silicon layer including photo-diodes formed therein, and visible light is taken in from the other side of the silicon layer, namely, from the side (back side) opposite to the wiring layer. Wiring can be made without taking a light-receiving surface into account, and the degree of freedom in wiring for the pixels is enhanced.

Abstract: A solid-state imaging device includes: a plurality of light-receiving parts arranged in an array in a substrate and performing photoelectric conversion on incident light; and a plurality of color separators each provided for adjacent four of the light-receiving parts arranged in two rows and two columns. In each of the color separators, absorption color filters and transmission color filters are combined.

Abstract: An amorphous-silicon thin film transistor and a shift register shift having the amorphous-silicon TFT include a first conductive region, a second conductive region and a third conductive region. The first conductive region is formed on a first plane spaced apart from a substrate by a first distance. The second conductive region is formed on a second plane spaced apart from the substrate by a second distance. The second conductive region includes a body conductive region and two hand conductive regions elongated from both ends of the body conductive region to form an LI-shape. The third conductive region is formed on the second plane. The third conductive region includes an elongated portion. The elongated portion is disposed between the two hand conductive regions of the second conductive region. The amorphous-silicon TFT and the shift register having the amorphous TFT reduce a parasitic capacitance between the gate electrode and drain electrode.

Abstract: Disclosed is a photoelectric surface including: a first group III nitride semiconductor layer that produces photoelectrons according to incidence of ultraviolet rays; and a second group III nitride semiconductor layer provided adjacent to the first group III nitride semiconductor layer and made of a thin-film crystal having c-axis orientation in a thickness direction, the second group III nitride semiconductor layer having an Al composition higher than that of the first group III nitride semiconductor layer.

Abstract: A sensor including an array of light sensitive pixels, each pixel including: at least one hetero-junction phototransistor having a floating base without contact, wherein each phototransistor is a mesa device having active layers exposed at side-walls of the mesa device; and at least one atomic layer deposited high-k dielectric material adjacent to and passivating at least the side-wall exposed active layers.

Abstract: A field effect transistor including an i-type first semiconductor layer and a second semiconductor layer formed on the first semiconductor layer and having a band gap energy higher in magnitude than that of the first semiconductor layer. The first semiconductor layer and second semiconductor layer are each made of a gallium nitride-based compound semiconductor layer. A gate electrode is formed on the second semiconductor layer and a second electrode is formed on the first semiconductor layer. Thus, the field effect transistor is constructed in such a manner as the first semiconductor layer and second semiconductor layer are interposed between the gate electrode and the second electrode. Thus field effect transistor is able to discharge the holes that are accumulated in the channel from the elemental structure and to improve the withstand voltage of the field effect transistor.

Abstract: A surface plasmon polaritron activated semiconductor device uses a surface plasmon wire that functions as an optical waveguide for fast communication of a signal and functions as a energy translator using a wire tip for translating the optical signal passing through the waveguide into plasmon-polaritron energy at a connection of the semiconductor device, such as a transistor, to activate the transistor for improved speed of communications and switching for preferred use in digital systems.

Abstract: A gate wiring electrode is formed into a ladder-like pattern. Moreover, between source electrodes and drain electrodes in the entire Switch MMIC, the gate wiring electrodes are disposed. Furthermore, at a cross part between the gate wiring electrode and the source electrode or the drain electrode, a nitride film having a large relative dielectric constant and a polyimide or a hollow part having a small relative dielectric constant are disposed. Accordingly, a capacitance at the cross part is reduced. Thus, a second harmonic wave level can be lowered. Moreover, a leak of a high-frequency signal between the drain electrode and the source electrode can be prevented. Thus, a third harmonic level can be lowered. Consequently, distortion characteristics of the Switch MMIC can be significantly improved.

Abstract: Subjected to obtain a crystalline TFT which simultaneously prevents increase of OFF current and deterioration of ON current. A gate electrode of a crystalline TFT is comprised of a first gate electrode and a second gate electrode formed in contact with the first gate electrode and a gate insulating film. LDD region is formed by using the first gate electrode as a mask, and a source region and a drain region are formed by using the second gate electrode as a mask. By removing a portion of the second gate electrode, a structure in which a region where LDD region and the second gate electrode overlap with a gate insulating film interposed therebetween, and a region where LDD region and the second gate electrode do not overlap, is obtained.

Abstract: An integrated circuit is provided with a photonic device and a spot-size converter waveguide device integrated on a common substrate. The spot-size converter waveguide device provides for transformation between a larger spot-size and a smaller spot-size corresponding to the photonic device. The spot-size converter waveguide device includes at least one of a bottom mirror and top mirror, which provide highly-reflective lower and upper cladding, respectively, for vertical confinement of light propagating through the waveguide device. The top mirror overlies opposing sidewalls of the spot-converter waveguide device, which provide highly-reflective sidewall cladding for lateral confinement of light propagating through the waveguide device. Advantageously, the highly-reflective lower cladding provided by the bottom mirror limits optical loss of the waveguide device. Similarly, the highly-reflective upper cladding and sidewall cladding provided by the top mirror limits optical loss of the waveguide device.

Abstract: A photo-FET based on a compound semiconductor including a channel layer formed on a substrate constituting a current path between source and drain electrodes, serving as part of a photodiode and a photosensitive region. A back-gate layer that serving as a substrate-side depletion layer formation layer is disposed between the substrate and the channel layer, and applies to the channel layer a back-gate bias by photogenerated carriers upon illumination. A barrier layer is disposed on the front side of the channel layer that causes one of the photogenerated carriers to run through the channel layer and other of the photogenerated carriers to sojourn or be blocked off. A front-side depletion layer formation layer is disposed on the front side of the channel layer brings the front-side depletion layer into contact with the substrate-side depletion layer without illumination to close the current path in the channel layer, bringing the photo-FET to an off-state.

Abstract: An image sensor including a substrate, at least one metal layer, and a plurality of pixels arranged in array. Each pixel includes a sense element disposed in the substrate and at least one metal interconnect segment disposed in the at least one metal layer. The array includes a pair of perpendicular axes extending from an optical center, wherein for a line of pixels extending perpendicularly from one of the axes to a peripheral edge of the array a spacing between the sense elements of consecutive pairs of pixels of the line is at least equal to a spacing between the associated at least one metal interconnect segments, and wherein for at least one consecutive pair of pixels of the line the spacing between the sense elements is greater by an incremental amount than the spacing between the corresponding at least one metal interconnect segments.

Abstract: A direct detector for terahertz radiation comprises a grating-gated field-effect transistor with one or more quantum wells that provide a two-dimensional electron gas in the channel region. The grating gate can be a split-grating gate having at least one finger that can be individually biased. Biasing an individual finger of the split-grating gate to near pinch-off greatly increases the detector's resonant response magnitude over prior QW FET detectors while maintaining frequency selectivity. The split-grating-gated QW FET shows a tunable resonant plasmon response to FIR radiation that makes possible an electrically sweepable spectrometer-on-a-chip with no moving mechanical optical parts. Further, the narrow spectral response and signal-to-noise are adequate for use of the split-grating-gated QW FET in a passive, multispectral terahertz imaging system. The detector can be operated in a photoconductive or a photovoltaic mode.