Sensor Element And Charge Transfer Device Are Of Different Materials Or On Different Substrates (e.g., "hybrid") Patents (Class 257/226)
  • Patent number: 7170117
    Abstract: Embodiments of the invention provide an image sensor having an improved dynamic range. A pixel cell comprises at least one transistor structure. The transistor structure comprises at least one semiconductor channel region, at least one gate for controlling the channel region, and first and second leads respectively coupled to a source region on one side of the at least one channel region and a drain region on an opposite side of the at least one channel region. The transistor structure has at least two threshold voltages associated with the at least one channel region, and an I-V characteristic of the transistor structure is determined at least in part by the threshold voltages.
    Type: Grant
    Filed: August 25, 2004
    Date of Patent: January 30, 2007
    Assignee: Micron Technology, Inc.
    Inventor: Chandra Mouli
  • Patent number: 7141833
    Abstract: Apart from a semiconductor substrate and a photosensitive region in the semiconductor substrate, which comprises a space charge zone region for generating a diffusion current portion and a diffusion region for generating a diffusion current portion, a photodiode includes an insulation means in the semiconductor substrate for at least partially confining the diffusion region against an adjacent surrounding region of the semiconductor substrate.
    Type: Grant
    Filed: November 19, 2004
    Date of Patent: November 28, 2006
    Assignee: Thomson Licensing SAS
    Inventors: Ingo Hehemann, Armin Kemna
  • Patent number: 7129531
    Abstract: A programmable resistance memory element comprising an adhesion layer between the programmable resistance material and at least one of the electrodes. Preferably, the adhesion layer is a titanium rich titanium nitride composition.
    Type: Grant
    Filed: May 21, 2003
    Date of Patent: October 31, 2006
    Assignee: Ovonyx, Inc.
    Inventors: Jeffrey P. Fournier, Sergey A. Kostylev
  • Patent number: 7105867
    Abstract: There is a demand of a solid-state imaging device capable of being driven at a high speed and in which the shading of sensitivity and illuminance defect can be prevented from being caused. A solid-state imaging device (20) comprises a light-receiving sensor section disposed on the surface layer portion of a substrate (21) for performing a photoelectric conversion, a charge transfer section for transferring a signal charge read out from the light-receiving sensor section, a transfer electrode (27) (28) made of polysilicon formed on a substrate (21) at its position approximately above the charge transfer section through an insulating film (26), and an interconnection made of polysilicon and interconnected to the transfer electrode (27) (28). At least one of the polysilicon transfer electrode (27)(28) and the interconnection is formed on a polysilicon layer (27a) (28a) by selectively depositing a high-melting point metal having a resistance value lower than that of polysilicon.
    Type: Grant
    Filed: March 8, 2005
    Date of Patent: September 12, 2006
    Assignee: Sony Corporation
    Inventors: Yasushi Maruyama, Hideshi Abe
  • Patent number: 7102185
    Abstract: An interline transfer type image sensing device that can be operated at high speed and with low image smear is described. The device incorporates a refractory metal layer which is used for both a light shield over the vertical charge transfer region and as a wiring layer for low resistance strapping of poly crystalline silicon (polysilicon) gate electrodes for the vertical charge transfer region. Plugs provided by a separate metallization layer connect the refractory light shield to the polysilicon gate electrode. These plugs allow high temperature processing after refractory light shield patterning for improved sensor performance without degradation of the polysilicon gate electrode or the refractory lightshield layer.
    Type: Grant
    Filed: June 21, 2004
    Date of Patent: September 5, 2006
    Assignee: Eastman Kodak Company
    Inventors: David N. Nichols, David L. Losee, Christopher Parks
  • Patent number: 7102680
    Abstract: The driving device of a solid-state imaging device comprises a driving unit for driving the solid-state imaging device in either an addition driving mode in which a plurality of pixels are added and read as a single pixel or a non-addition driving mode, and a substrate bias voltage supply for applying a bias voltage to the substrate of the solid-state imaging device according to the driving mode. The substrate bias voltage is set according to the number of pixels added in the addition driving mode so that the overflow level of the charge accumulating portion may be lower in the addition driving mode than in the normal driving mode. This suppresses the input of excess charges to the horizontal transfer path even in the addition driving mode, thereby preventing the generation of horizontal streak noise.
    Type: Grant
    Filed: March 9, 2001
    Date of Patent: September 5, 2006
    Assignee: Olympus Corporation
    Inventors: Keiichi Mori, Hideaki Yoshida
  • Patent number: 7087939
    Abstract: There is a demand of a solid-state imaging device capable of being driven at a high speed and in which the shading of sensitivity and illuminance defect can be prevented from being caused. A solid-state imaging device (20) includes a light-receiving sensor section disposed on the surface layer portion of a substrate (21) that performs a photoelectric conversion, a charge transfer section that transfers a signal charge read out from the light-receiving sensor section, a transfer electrode (27) (28) made of polysilicon formed on a substrate (21) at a position approximately above the charge transfer section through an insulating film (26), and an interconnection made of polysilicon and interconnected to the transfer electrode (27) (28). At least one of the polysilicon transfer electrode (27)(28) and the interconnection is formed on a polysilicon layer (27a) (28a) by selectively depositing a high-melting point metal having a resistance value lower than that of polysilicon.
    Type: Grant
    Filed: March 8, 2005
    Date of Patent: August 8, 2006
    Assignee: Sony Corporation
    Inventors: Yasushi Maruyama, Hideshi Abe
  • Patent number: 7081647
    Abstract: A microelectromechanical system includes a substrate, a transducer supported on the substrate and a conductor layer, which is also supported on the substrate and electrically connected to the transducer. The transducer includes a portion made of silicon or a silicon compound. The conductor layer is made of a refractory conductor, which includes, as its main ingredient, at least one element selected from the group consisting of copper, gold and silver. At least a portion of the conductor layer is located at an intermediate level between the silicon or silicon compound portion of the transducer and the substrate.
    Type: Grant
    Filed: September 16, 2004
    Date of Patent: July 25, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Yoshihiro Mushika
  • Patent number: 7079250
    Abstract: A plasmon resonance device 100 according to an example of a structure is characterized in that metallic particles 7 isolated from each other are formed in each of a plurality of pores 5 of anodic oxidized alumina 3. As a method of manufacturing the plasmon resonance device 100, a metal is coated on the anodic oxidized alumina 3 opening the pores 5 and a metal coated element provided on the opening surface of the pore in the anodic oxidized alumina 3 is removed. Consequently, metallic particles isolated from each other are formed in the respective independent pores. The plasmon resonance device 100 can be used as a sensor utilizing a localized plasmon resonance phenomenon.
    Type: Grant
    Filed: February 28, 2005
    Date of Patent: July 18, 2006
    Assignee: Fuji Photo Film Co., Ltd.
    Inventor: Atsushi Mukai
  • Patent number: 7046155
    Abstract: A fault detection system detecting malfunctions or deteriorations, which may result in an inverter fault, is provided. The system has a temperature sensor installed on a semiconductor module to monitor a temperature rise rate. It is judged that an abnormal condition has occurred if the thermal resistance is increased by the deterioration of a soldering layer of the semiconductor module or by drive circuit malfunctions and, as a result, the relation between an operation mode and the temperature rise rate falls outside a predetermined range.
    Type: Grant
    Filed: June 1, 2004
    Date of Patent: May 16, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Yutaka Sato, Masahiro Nagasu, Katsumi Ishikawa, Ryuichi Saito, Satoru Inarida
  • Patent number: 7023035
    Abstract: A thin film transistor (TFT) array substrate including a substrate, a plurality of scan lines, a plurality of data lines, a plurality of thin film transistors, a plurality of pixel electrodes and a repairing circuit is provided. The scan lines and the data lines are disposed over the substrate, therefore a plurality of pixel areas are defined. Each thin film transistor is disposed in each pixel area respectively and driven by the corresponding scan line and data line. Each pixel electrode is disposed in each pixel area respectively and electrically connected to the corresponding thin film transistor. A repairing method for TFT array substrate is also provided. The method includes connecting the repairing circuit and the defect scan line besides the break to repair and convert the line defect into two-point defect, single defect, or totally repair the line defect.
    Type: Grant
    Filed: June 23, 2004
    Date of Patent: April 4, 2006
    Assignee: Au Optronics Corporation
    Inventor: Han-Chung Lai
  • Patent number: 6982443
    Abstract: A plurality of apertures is formed in at least one first insulating layer disposed over a sensor formed in a semiconductor substrate. A second insulating layer is disposed over the at least one first insulating layer and the plurality of apertures in the at least one first insulating layer. The apertures form hollow regions in the at least one first insulating layer over the sensor, allowing more light or energy to pass through the at least one first insulating layer to the sensor, and increasing the sensitivity of the sensor.
    Type: Grant
    Filed: March 12, 2004
    Date of Patent: January 3, 2006
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu-Hsuan Hsu, Shou-Gwo Wuu, Ho-Ching Chien, Dun-Nian Yaung
  • Patent number: 6965134
    Abstract: An image pick-up unit includes an image pick-up device; and a plurality of optical filters which are cemented together in layers and positioned in front of the image pick-up device. At least two optical filters among the plurality of optical filters, which have different optical properties, are different in shape from each other.
    Type: Grant
    Filed: November 19, 2003
    Date of Patent: November 15, 2005
    Assignee: PENTAX Corporation
    Inventors: Makoto Mogamiya, Teruo Sakai
  • Patent number: 6956252
    Abstract: In preferred embodiments, a compact a hybrid integrated circuit device 1 can be provided. A conductive pattern 12 is formed on the top surface of a circuit substrate 10, on the top surface of which an insulating layer 11 has been provided. Conductive pattern 12 is formed over the entirety of the top surface of the circuit substrate. Specifically, conductive pattern 12 is also formed at parts within 2 mm from the peripheral ends of circuit substrate 10. Also, a heat sink 13A or other circuit element 13 with some height can be positioned near a peripheral end part of circuit substrate 10. By arranging hybrid integrated circuit device 1, the degree of integration of hybrid integrated circuit is improved. Thus, in a case where the same circuit as a prior-art example is formed, the size of the entire hybrid integrated circuit device can be made small.
    Type: Grant
    Filed: April 24, 2003
    Date of Patent: October 18, 2005
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Masahiko Mizutani, Sadamichi Takakusaki, Motoichi Nezu, Kazutoshi Motegi
  • Patent number: 6946717
    Abstract: A compound semiconductor device is comprising a compound semiconductor substrate (219) having a ground plane (205); an active element (201) disposed on the substrate; a passive element (211) disposed on the substrate and electrically coupled to the active element; and an insulating layer (202) adjacent the substrate and interposed between the passive device and ground surface such that there is no resistive ground path from the passive device to the ground surface.
    Type: Grant
    Filed: January 30, 2002
    Date of Patent: September 20, 2005
    Assignee: M/A-Com, Inc.
    Inventors: David Russell Hoag, Timothy Edward Boles, Daniel G. Curcio
  • Patent number: 6946695
    Abstract: The present invention provides a solid-state rotational rate sensor device formed by a thin-film for generating an electrical voltage output proportional to the rate of rotational motion. The precision thin-film piezoelectric elements are configured and arranged on a semi-rigid structure to detect rotation (such as pitch, roll, and yaw) while rejecting spurious noise created by vibration, thermal gradients, and electro-magnetic interference.
    Type: Grant
    Filed: August 7, 2003
    Date of Patent: September 20, 2005
    Assignee: Triad Sensors, Inc.
    Inventor: Peter J. Schiller
  • Patent number: 6943429
    Abstract: A marked wafer includes a front-side surface and a back-side surface. A vertical scribe line and a horizontal scribe line are on the front-side surface of the wafer. A back-side alignment mark is located at an intersection of the vertical scribe line and the horizontal scribe line. The back-side alignment mark extends from the front-side surface to the back-side surface of the wafer. The back-side alignment mark is used to aligning a saw, which singulates the wafer from the back-side surface.
    Type: Grant
    Filed: March 8, 2001
    Date of Patent: September 13, 2005
    Assignee: Amkor Technology, Inc.
    Inventors: Thomas P. Glenn, Roy Dale Hollaway, Steven Webster
  • Patent number: 6897498
    Abstract: A photodetector for use with relatively thin (i.e., sub-micron) silicon optical waveguides formed in a silicon-on-insulator (SOI) structure comprises a layer of poly-germanium disposed to couple at least a portion of the optical signal propagating along the silicon optical waveguide. Tight confinement of the optical signal within the waveguide structure allows for efficient evanescent coupling into the poly-germanium detector. The silicon optical waveguide may comprise any desired geometry, with the poly-germanium detector formed to either cover a portion of the waveguide, or be butt-coupled to an end portion of the waveguide. When covering a portion of the waveguide, poly-germanium detector may comprise a “wrap-around” geometry to cover the side and top surfaces of the optical waveguide, with electrical contacts formed at opposing ends of the detector.
    Type: Grant
    Filed: February 5, 2004
    Date of Patent: May 24, 2005
    Assignee: SiOptical, Inc.
    Inventors: Prakash Gothoskar, Margaret Ghiron, Vipulkumar Patel, Robert Keith Montgomery, Kalpendu Shastri, Soham Pathak, Katherine A. Yanushefski
  • Patent number: 6867443
    Abstract: A microfabricated probe array for nanolithography and process for designing and fabricating the probe array. The probe array consists of individual probes that can be moved independently using thermal bimetallic actuation or electrostatic actuation methods. The probe array can be used to produce traces of diffusively transferred chemicals on the substrate with sub-1 micrometer resolution, and can function as an arrayed scanning probe microscope for subsequent reading and variation of transferred patterns.
    Type: Grant
    Filed: August 25, 2003
    Date of Patent: March 15, 2005
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: Chang Liu, Ming Zhang, David Andrew Bullen
  • Patent number: 6855968
    Abstract: A photon detector capable of detecting gigahertz frequency optical signals utilizes a layer of photonic material that is formed below of the coil of an inductor. When a pulsed light source is applied to the layer of photonic material, the photonic material generates eddy currents that alter the magnetic flux of the inductor. The signals can then be detected by detecting the change in magnetic flux of the inductor.
    Type: Grant
    Filed: January 30, 2003
    Date of Patent: February 15, 2005
    Assignee: National Semiconductor Corporation
    Inventors: Peter J. Hopper, Philipp Lindorfer, Vladislav Vashchenko
  • Patent number: 6853005
    Abstract: A camera module for a mobile device is reduced in size and manufacturing cost. A filter material made of a multi-layer thin film is bonded to a surface of a lens which is bonded to a surface of an image sensor chip. The filter material is a filter to block radiation within a predetermined range of wave length in an incident radiation to the lens, for example, an IR filter to block infrared radiation. An iris material made of a film such as an acrylic film or a polyolefin film is bonded to the lens covered with the filter material.
    Type: Grant
    Filed: February 5, 2004
    Date of Patent: February 8, 2005
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Osamu Ikeda
  • Publication number: 20040262644
    Abstract: In order to prevent, when a chip component is brazed to pads of a conductive wiring layer, short-circuiting by a fused brazing material from short-circuiting between the pads, a hybrid semiconductor circuit comprises a chip component 43 with terminal electrodes 46 formed at both ends thereof, a first conductive wiring layer 37 on which a plurality of the pads 38 are provided to correspond to the terminal electrodes 46, and an overcoat resin 39 for covering the first conductive wiring layer 37 excluding the pads 38, and the terminal electrodes 46 of the chip component 43 is adhered to the pads 38 by a conductive adhesive 57, and an insulating adhesive 58 is provided between the pads 38.
    Type: Application
    Filed: March 29, 2004
    Publication date: December 30, 2004
    Inventors: Toshimichi Naruse, Nobuhisa Takakusaki, Hajime Kobayashi
  • Patent number: 6798033
    Abstract: An active pixel sensor for producing images from electron-hole producing radiation includes a crystalline semiconductor substrate having an array of electrically conductive diffusion regions, an interlayer dielectric (ILD) layer formed over the crystalline semiconductor substrate and comprising an array of contact electrodes, and an interconnect structure formed over the ILD layer, wherein the interconnect structure includes at least one layer comprising an array of conductive vias. An array of patterned metal pads is formed over the interconnect structure and are electrically connected to an array of charge collecting pixel electrodes. A radiation absorbing structure includes a photoconductive N-I-B-P photodiode layer formed over the interconnect structure, and a surface electrode layer establishes an electrical field across the radiation absorbing structure and between the surface electrode layer and each of the array of charge collecting pixel electrodes.
    Type: Grant
    Filed: August 27, 2002
    Date of Patent: September 28, 2004
    Assignee: e-Phocus, Inc.
    Inventors: Calvin Chao, Tzu-Chiang Hsieh, Michael Engelmann, Milam Pender
  • Patent number: 6794746
    Abstract: A manufacturing method of semiconductor devices, micromachines such as semiconductor device, narrow pitch connectors, electrostatic actuators or piezoelectric actuators, and ink jet heads, ink jet printers, liquid crystal panels, and electronic appliances, including them characterized in that short circuit due to dusts floating in the air will not take place. In a method where a silicon wafer (30) undergoes dicing to manufacture semiconductor devices (20), a groove (30a) covered by an insulating layer and spanning a dicing line is formed in the above described silicon wafer, and the silicon wafer undergoes dicing along the dicing line.
    Type: Grant
    Filed: April 25, 2003
    Date of Patent: September 21, 2004
    Assignee: Seiko Epson Corporation
    Inventor: Eiichi Sato
  • Patent number: 6753558
    Abstract: A solid state image sensor is constructed such that a plurality of linear image sensors are provided to have at least one row of photodiodes in each of the plurality of linear image sensors and a photodiode array is formed by arranging the plurality of linear image sensors side by side. A control gate electrode used to retrieve electric charges and a polysilicon electrode serving as a charge transfer electrode are provided between the pluraliielding conductive film is provided on the polysilicon electrode to partition the plurality of linear image sensors into individual linear image sensors. Accordingly, a light beam incident on a certain linear image sensor can be prevented from entering another linear image sensor adjacent to the certain linear image sensor, thereby reducing a difference between the amounts of signal charges outputted from different linear image sensors and suppressing smear.
    Type: Grant
    Filed: April 28, 2003
    Date of Patent: June 22, 2004
    Assignee: NEC Electronics Corporation
    Inventor: Fumiaki Futamura
  • Patent number: 6724060
    Abstract: An N-type impurity diffusion region is formed in an element forming region surrounded by a field insulating film. In a region between an end portion of the N-type impurity diffusion region and an end portion of the field oxide film, a P-type impurity diffusion region is formed so as to contain an interface level present portion under a bird's beak portion. Thus, a PN junction is formed in a position distant from the interface level present portion. Therefore, even if a voltage is applied to the PN junction, a depletion layer will not reach the interface level present portion. Consequently, a semiconductor device, which suppresses an occurrence of a leakage current along the lower surface of an element isolation insulating film caused by the interface level present portion undesirably included in the depletion layer, as well as a manufacturing method of the same can be obtained.
    Type: Grant
    Filed: October 24, 2002
    Date of Patent: April 20, 2004
    Assignee: Renesas Technology Corp.
    Inventor: Atsushi Maeda
  • Patent number: 6710376
    Abstract: This invention discloses the basic chip architecture and packing configuration required to build an all silicon opto-coupler in which a forward biased silicon PN junction diode is used as the LED. Construction of the LED and the detector are disclosed as well as the package chip configuration. Methods for isolating circuit structures from the LED are also disclosed so that CMOS and bipolar circuits can freely added to the transmitting chip as well as the receiving chip. Bi-directional data transmission and multi-channel operation is also shown.
    Type: Grant
    Filed: September 3, 2002
    Date of Patent: March 23, 2004
    Inventor: Eugene Robert Worley
  • Publication number: 20040026720
    Abstract: The present invention provides a solid-state rotational rate sensor device formed by a thin-film for generating an electrical voltage output proportional to the rate of rotational motion. The precision thin-film piezoelectric elements are configured and arranged on a semi-rigid structure to detect rotation (such as pitch, roll, and yaw) while rejecting spurious noise created by vibration, thermal gradients, and electromagnetic interference.
    Type: Application
    Filed: August 7, 2003
    Publication date: February 12, 2004
    Inventor: Peter J. Schiller
  • Patent number: 6670657
    Abstract: An integrated circuit is provided that includes a substrate incorporating a semiconductor photodiode device having a p-n junction. The photodiode device includes at least one capacitive trench buried in the substrate and connected in parallel with the junction. In a preferred embodiment, the substrate is formed from silicon, and the capacitive trench includes an internal doped silicon region partially enveloped by an insulating wall that laterally separates the internal region from the substrate. Also provided is a method for fabricating an integrated circuit including a substrate that incorporates a semiconductor photodiode device having a p-n junction.
    Type: Grant
    Filed: January 11, 2002
    Date of Patent: December 30, 2003
    Assignee: STMicroelectronics S.A.
    Inventors: Olivier Menut, Yvon Gris
  • Publication number: 20030230771
    Abstract: A pixel of a semiconductor-based image detector includes a photodetector, at least one switching device serially connected to the photodetector and a bypass device interposed between the photodetector and a power supply voltage. Accordingly, even though excess charges may be generated in the photodetector, the excess charges flow into the power supply through the bypass device. Blooming can thereby be reduced or suppressed.
    Type: Application
    Filed: May 21, 2003
    Publication date: December 18, 2003
    Inventor: Seok-Ha Lee
  • Publication number: 20030205739
    Abstract: In one aspect, the invention provides semiconductor sensor which includes a first single crystal silicon wafer layer. A single crystal silicon structure is formed in the first wafer layer. The structure includes two oppositely disposed substantially vertical major surfaces and two oppositely disposed generally horizontal minor surfaces. The aspect ratio of major surface to minor surface is at least 5:1. A carrier which includes a recessed region is secured to the first wafer layer such that said structure is suspended opposite the recessed region.
    Type: Application
    Filed: August 11, 2001
    Publication date: November 6, 2003
    Inventors: Kurt E. Petersen, Nadim Maluf, Wendell McCulley, John Logan, Erno Klaasen, Jan Mark Noworolski
  • Patent number: 6603144
    Abstract: P-type ion implantation is done in N well 15, so as to form a charge drain control layer 17 and form a photodiode N well 16 and OFD drain 5, the result being that, even if there is variation in the potential of the photodiode N well 16 making up the photodiode, because the variation in the potential of the charge drain control layer 17 is in the same direction as the potential of the photodiode N well 16, so that variation does not occur in the maximum amount of electrical charge that can be accumulated, the result being that there is no variation in the signal in the saturation condition.
    Type: Grant
    Filed: December 8, 2000
    Date of Patent: August 5, 2003
    Assignee: NEC Electronics Corporation
    Inventor: Shiro Tsunai
  • Patent number: 6590238
    Abstract: A charge-coupled device includes a plurality of cells for forming the charge-coupled device, each of the cells capable of retaining charge a transfer mechanism within the charge-coupled device for moving charge through the plurality of cells, an output region for receiving charge moved through the plurality of cells under control of the transfer mechanism; a floating diffusion to receive charge moved across the output region; a reset gate to remove charge from the floating diffusion and reset the floating diffusion to a reference voltage level; and a capacitance control gate adjacent to the floating diffusion for canceling capacitance coupling of the reset gate. A capacitance control gate covers a portion of the floating diffusion. The capacitance control gate voltage is adjusted to alter the capacitance of the floating diffusion. The capacitance control gate is clocked opposite that of the reset gate to cancel the capacitive effects of the reset gate.
    Type: Grant
    Filed: February 12, 2002
    Date of Patent: July 8, 2003
    Assignee: Eastman Kodak Company
    Inventor: Christopher Parks
  • Patent number: 6576938
    Abstract: An image input device or a solid-state image sensing device using a CCD linear sensor includes a main sensor array and a sub sensor array. A transfer register for the sub sensor array is provided with charge sweep means for sweeping away unnecessary charges. Thus, only signals in the main sensor array are selectively read out without being affected by signals in the sub sensor array.
    Type: Grant
    Filed: November 3, 2000
    Date of Patent: June 10, 2003
    Assignee: Sony Corporation
    Inventors: Masahide Hirama, Katsunori Noguchi, Satoshi Yoshihara, Nishio Yoshihiro
  • Patent number: 6570196
    Abstract: The present invention relates to bioelectronic devices comprising lipid vesicles which are in contact with a chip, particularly with at least one gate of a field effect transistor. The vesicles/bilayers may comprise effector molecules in their membrane and thus are suitable as bioelectronic sensors. The chip may also have a capacitive stimulating spot, with which the electrical or functional state of the membrane or its incorporated molecules may be affected.
    Type: Grant
    Filed: March 22, 2000
    Date of Patent: May 27, 2003
    Assignee: Max-Plank-Gesellschaft zur Forderung der Wissenschaften
    Inventors: Peter Fromherz, Volker Kiessling, Karsten Kottig, Günther Zeck
  • Patent number: 6534822
    Abstract: A field effect transistor (FET) is formed on a silicon on insulator (SOI) substrate in the thin silicon layer above the insulating buried oxide layer. The channel region is lightly doped with an impurity to increase free carrier conductivity. The source region and the drain region are heavily doped with the impurity. A gate and a back gate are positioned along the side of the channel region and extending from the source region and each are fabricated of a metal with an energy gap greater than silicon to form Schottky junctions with the channel region.
    Type: Grant
    Filed: July 17, 2001
    Date of Patent: March 18, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Qi Xiang, Matthew S. Buynoski
  • Patent number: 6534794
    Abstract: A semiconductor light-emitting unit includes: a semiconductor laser diode; a photodetector functioning as a sub-mount for mounting the diode thereon; and a heating member, incorporated with the photodetector, for heating the diode. If the ambient temperature of the diode falls within a range where kinks are possibly caused in the low-temperature I-L characteristic of the diode, then current is supplied to the heating member, thereby heating the diode. The heating member may be either a doped region defined within a semiconductor substrate or a doped polysilicon film formed on the substrate. Also, the heating member is preferably located under the laser diode with a heat-dissipating layer and an insulating layer interposed therebetween. The semiconductor light-emitting unit with this structure can effectively eliminate kinks from the low-temperature I-L characteristic of the semiconductor laser diode.
    Type: Grant
    Filed: August 4, 2000
    Date of Patent: March 18, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hideyuki Nakanishi, Yoshiaki Komma, Yasuyuki Kochi, Akio Yoshikawa
  • Patent number: 6492668
    Abstract: A solid imaging device includes a semiconductor substrate, a photodiode including a first diffusion layer formed on the substrate; and a MOS transistor including a second diffusion layer (FD region) and a third diffusion layer formed on the principal surface as source/drain regions. The FD region serves to perform a function of converting a signal charge, which is determined by the photodiode, into a signal voltage. An N+ diffusion layer having an impurity implanted at a high concentration is formed in the third diffusion layer in addition to an N− diffusion layer having an impurity implanted at a low concentration, whereas only an N− diffusion layer is formed in the FD region. An upper side of the FD region is covered with an oxide film serving as an implantation shielding layer for shielding against ion implantation.
    Type: Grant
    Filed: May 11, 2001
    Date of Patent: December 10, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Atsushi Maeda
  • Publication number: 20020158275
    Abstract: A semiconductor device for controlling entry to and exit from a power down mode (DPD) of a semiconductor memory, comprising a plurality of voltage generators for providing operating voltages to the semiconductor memory; a DPD controller for detecting a DPD condition and for generating a DPD signal to control the application of the operating voltages to the semiconductor memory; and circuitry for controlling the timing of turning on/off the plurality of voltage generators upon entry/exit of DPD mode to reduce surge current through the semiconductor memory to less than maximum current level.
    Type: Application
    Filed: October 17, 2001
    Publication date: October 31, 2002
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jong-hyun Choi, Jei-hwan Yoo, Jong-eon Lee, Hyun-soon Jang
  • Patent number: 6465821
    Abstract: A CCD area sensor has an effective pixel region for detecting optical information of a subject and an ineffective pixel region for detecting optical black. On a light-receiving region in the ineffective pixel region, a light shielding film is provided with an opening portion. This enables hydrogen ions to be sufficiently diffused from a passivation film made of a P—SiN film toward a silicon substrate in a hydrogen annealing process even though the light shielding film is made of a material such as a high-melting point metal of TiW that is hard for hydrogen ions to penetrate. As a result, interface state densities in a light-receiving region and a transfer channel region are reduced, and a dark-time output voltage of the ineffective pixel region is reduced to be equivalent to that of the effective pixel region. Thus, no difference occurs between the effective pixel region and the ineffective pixel region in terms of the black level.
    Type: Grant
    Filed: February 16, 2001
    Date of Patent: October 15, 2002
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshio Yoshida, Yoshinori Kamada
  • Patent number: 6459107
    Abstract: A photodetector includes a substrate and an optical absorption layer provided on the substrate, wherein the optical absorption layer is formed of a mixed crystal of Si, Ge and C.
    Type: Grant
    Filed: February 27, 2001
    Date of Patent: October 1, 2002
    Assignee: Fujitsu Limited
    Inventors: Yoshihiro Sugiyama, Yoshiki Sakuma
  • Publication number: 20020079518
    Abstract: A solid imaging device includes a semiconductor substrate, a photodiode including a first diffusion layer formed on the substrate; and a MOS transistor including a second diffusion layer (FD region) and a third diffusion layer formed on the principal surface as source/drain regions. The FD region serves to perform a function of converting a signal charge, which is determined by the photodiode, into a signal voltage. An N+ diffusion layer having an impurity implanted at a high concentration is formed in the third diffusion layer in addition to an N− diffusion layer having an impurity implanted at a low concentration, whereas only an N− diffusion layer is formed in the FD region. An upper side of the FD region is covered with an oxide film serving as an implantation shielding layer for shielding against ion implantation.
    Type: Application
    Filed: May 11, 2001
    Publication date: June 27, 2002
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Atsushi Maeda
  • Patent number: 6384460
    Abstract: A self-aligned metal electrode sensor structure. The self-aligned metal electrode sensor structure includes a substrate which includes electronic circuitry. An interconnect structure is formed adjacent to the substrate. The interconnect structure includes conductive interconnect vias which pass through the interconnect structure. A sensor is formed adjacent to the interconnect structure. The sensor includes a pixel metallization section and a doped layer electrode. The pixel metallization section is electrically connected to the interconnect via. The pixel metallization section includes an outer surface which is substantially planar. The doped layer electrode includes an inner surface adjacent to the outer surface of the pixel metallization section. The entire inner surface of the doped layer electrode is substantially planar. A transparent conductive layer is formed adjacent to the sensor. The interconnect via and the transparent conductive layer electrically connect the electronic circuitry to the sensor.
    Type: Grant
    Filed: June 7, 1999
    Date of Patent: May 7, 2002
    Assignee: Agilent Technologies, Inc.
    Inventors: Jeremy A. Theil, Min Cao
  • Patent number: 6355939
    Abstract: An infrared detector array includes a plurality of detector pixel structures, each having a plurality of coplanar sections responsive to different bands of infrared radiations. Each section of a pixel structure comprises a plurality of elongate quantum well infrared radiation absorbing photoconductor (QWIP) elements. The group of QWIP elements are spaced such that they comprise a diffraction grating for the received infrared radiation. Top and bottom longitudinal contacts are provided on opposite surfaces of the QWIP elongate elements to provide current flow transverse to the axis of the element to provide the required bias voltage. An infrared radiation reflector is provided to form an optical cavity for receiving infrared radiation. A plurality of detector pixel structures are combined to form a focal plane array. Each pixel structure section produces a signal that is transmitted through a conductive bump to a terminal of a read out integrated circuit.
    Type: Grant
    Filed: November 3, 1998
    Date of Patent: March 12, 2002
    Assignee: Lockheed Martin Corporation
    Inventor: Mark A. Dodd
  • Publication number: 20020011611
    Abstract: A CMOS image sensor structure that includes a substrate, a sensing layer and a dopant layer. The substrate is formed using a first conductive type material. The sensing region is buried within the substrate. The sensing layer is a second type conductive material layer. The dopant layer is formed above the sensing layer. The dopant layer is a first type conductive material layer.
    Type: Application
    Filed: September 25, 2001
    Publication date: January 31, 2002
    Inventors: Sen-Huang Huang, San-Wen Chiou, Sheng-Yang Huang
  • Publication number: 20020009901
    Abstract: A correction electron optical system (3) has substrates in which apertures for constituting electron lenses are formed. Valves (14) whose opening degrees can be adjusted are used to relax the pressure difference between the upper and lower surfaces of each substrate caused when supply/exhaust pumps (51-56) adjust the internal pressure of a main body cover (80). The opening degrees are controlled based on outputs from differential pressure sensors (13). The pressure sensors (13) can be replaced with photosensors.
    Type: Application
    Filed: April 26, 2001
    Publication date: January 24, 2002
    Inventors: Hiroshi Maehara, Haruhito Ono, Yasuhiro Shimada, Takayuki Yagi
  • Publication number: 20020000582
    Abstract: When a tuning mode signal VTUNE is activated, control clock signal TCLK is output, and counter counts up tuning signals TSIG1 to TSIG4. Tuning circuits render conductive the terminals of respective transistors, and reference potential Vref lowers in accordance with the reduction in the resistance value. When reference potential Vref attains equal to the external reference potential Ext.Vref, differential amplifier circuit stops output of the control clock signal TCLK. In accordance with the plurality of the determined tuning signals TSIG1 to TSIG4, fuse elements inside the tuning circuits are programmed.
    Type: Application
    Filed: January 21, 2000
    Publication date: January 3, 2002
    Inventors: Mako Kobayashi, Fukashi Morishita
  • Publication number: 20010035540
    Abstract: A photodetector includes a substrate and an optical absorption layer provided on the substrate, wherein the optical absorption layer is formed of a mixed crystal of Si, Ge and C.
    Type: Application
    Filed: February 27, 2001
    Publication date: November 1, 2001
    Applicant: FUJITSU LIMITED, Kawasaki, Japan
    Inventors: Yoshihiro Sugiyama, Yoshiki Sakuma
  • Publication number: 20010032988
    Abstract: A CCD area sensor has an effective pixel region for detecting optical information of a subject and an ineffective pixel region for detecting optical black. On a light-receiving region in the ineffective pixel region, a light shielding film is provided with an opening portion. This enables hydrogen ions to be sufficiently diffused from a passivation film made of a P-SiN film toward a silicon substrate in a hydrogen annealing process even though the light shielding film is made of a material such as a high-melting point metal of TiW that is hard for hydrogen ions to penetrate. As a result, interface state densities in a light-receiving region and a transfer channel region are reduced, and a dark-time output voltage of the ineffective pixel region is reduced to be equivalent to that of the effective pixel region. Thus, no difference occurs between the effective pixel region and the ineffective pixel region in terms of the black level.
    Type: Application
    Filed: February 16, 2001
    Publication date: October 25, 2001
    Inventors: Toshio Yoshida, Yoshinori Kamada
  • Patent number: 6255676
    Abstract: A CCD assembly comprising: a semiconductor chip having a first face surface; an active light sensitive region located on the first face surface; an inactive region located on the first face surface next adjacent the active region; and a nonreflective coating applied over at least a portion of the inactive region.
    Type: Grant
    Filed: June 30, 1999
    Date of Patent: July 3, 2001
    Assignee: Hewlett Packard Company
    Inventor: Michael J Steinle