Microwave Integrated Circuit (e.g., Microstrip Type) Patents (Class 257/275)
  • Patent number: 5886372
    Abstract: It is an object of the present invention to provide a semiconductor device that is able to have the same Vp in all FETs formed on one chip.A semiconductor device of the present invention comprises a semiconductor substrate having a first region and a second region on a main surface; a first field effect transistor formed on the first region of the main surface, the first field effect transistor having first gates arranged in a plurality of rows and having a first total gate width, the first gates respectively establishing a first gate length and a first gate width; and a second field effect transistor formed on the second region of the main surface, the second field effect transistor having second gates arranged a plurality of rows and having a second total gate width smaller than the first total gate width, the second gates respectively establishing a second gate length substantially the same as the first gate length and a second gate width substantially the same as the first gate width.
    Type: Grant
    Filed: July 7, 1997
    Date of Patent: March 23, 1999
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Seiji Kai, Yoshihiro Yamamoto, Masaaki Itoh, Koutarou Tanaka
  • Patent number: 5883407
    Abstract: A semiconductor device includes a semiconductor substrate having an active region and first and second external regions located on opposite sides of the active region. The active region has a multi-finger pattern including gate electrodes, source electrodes, and drain electrodes. Each of the gate electrodes is interposed between one of the source electrodes and one of the drain electrodes. Mutually spaced gate pads are disposed on the first external region and each of the gate pads is connected to the gate electrodes. Mutually spaced drain pads are disposed on the second external region, and each of the drain pads is connected to the drain electrodes. Mutually spaced and grounded source pads are disposed on the first and second external regions, and each of the source pads is electrically connected to the source electrodes.
    Type: Grant
    Filed: June 11, 1997
    Date of Patent: March 16, 1999
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tetsuo Kunii, Naohito Yoshida
  • Patent number: 5869903
    Abstract: A semiconductor device includes a circuit substrate having a first surface on which a high-frequency circuit is located; a first metal layer disposed on a second surface of the circuit substrate; bump wirings on the first surface of the circuit substrate and electrically connected to the high-frequency circuit; a metal wall disposed on the first surface of the circuit substrate surrounding the high-frequency circuit; a wiring substrate having one surface on which substrate wirings corresponding to the bump wirings are located, the wiring substrate being disposed on the circuit substrate so that the substrate wirings are electrically connected to the bump wirings, and in contact with the metal wall, sealing a region including the high-frequency circuit; and a second metal layer disposed on a second surface of the wiring substrate. An electromagnetic shielding effect sufficient for use in a high-frequency circuit is obtained and fabricating cost is considerably reduced.
    Type: Grant
    Filed: January 31, 1997
    Date of Patent: February 9, 1999
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Mitsunori Nakatani, Hirofumi Nakano
  • Patent number: 5861644
    Abstract: A method of improving the performance of a traveling wave field-effect transistor operated at frequencies in the microwave range or above the microwave range comprising the steps of forming a depletion region beneath a gate electrode wherein, in a plane transverse to the direction of signal propagation, a depletion region edge has a first end portion located between the gate electrode and a drain electrode and a second end portion located between the gate electrode and a source electrode; and separating the depletion region edge from the drain electrode. Further improvements in the operation of the TWFET include adjusting the first end portion of the depletion region edge to be closer to the gate electrode relative to the distance between the second end portion of the depletion region edge and the gate electrode, controlling an effective conductivity of a semiconductor of the traveling-wave field effect transistor, and setting the length of the gate electode at about one micron.
    Type: Grant
    Filed: May 5, 1997
    Date of Patent: January 19, 1999
    Inventor: Alison Schary
  • Patent number: 5856713
    Abstract: A multiple terminal selector switch for use with millimeter-wave signals has a layout of components enabling the switch to be constructed on a monolithic microwave integrated circuit (MMIC) chip while maintaining adequately low cross talk among ports of the switch to retain isolation among its ports. The circuitry includes a transmission line having multiple taps spaced apart by an integral number of half wavelengths of the signal, wherein the taps connect to separate ports via arms of the circuit. Each arm has an electronically switchable element for producing open or short circuits for connection and disconnection of a switch port from the transmission line. One primary tap of the transmission line is unswitched and connects with a further port from which, or to which, signals of the other ports are selectively switched.
    Type: Grant
    Filed: October 24, 1997
    Date of Patent: January 5, 1999
    Assignee: Raytheon Company
    Inventors: Steven E. Huettner, William F. Miccioli
  • Patent number: 5856687
    Abstract: A semiconductor device includes a square pellet, a gate electrode pad, a drain electrode pad, a pair of source electrode pads, and a source electrode path. The pellet has first and second diagonal lines. The gate electrode pad is arranged on one of two corners located on the first diagonal line on the pellet. The drain electrode pad is arranged on the other of the two corners located on the first diagonal line on the pellet. The pair of source electrode pads are arranged on two corners located on the second diagonal line on the pellet. The source electrode path connects the source electrode pads to each other.
    Type: Grant
    Filed: July 7, 1997
    Date of Patent: January 5, 1999
    Assignee: NEC Corporation
    Inventor: Tomoaki Kimura
  • Patent number: 5838031
    Abstract: 4-terminal HEMT-HBT composite devices, based upon monolithically integrated HEMT-HBT technology and configured in various topologies, are useful in a wide range of applications which currently utilize discrete MMICs. In particular, the 4-terminal topologies are easily configured as 3-terminal composite devices useful in various 2-port and 3-port MMIC circuit applications, such as low noise-high linearity amplifiers as well as mixers, which provide the benefits of a reduction in size, as well as corresponding cost while providing better performance than utilizing either HEMT or HBT devices individually.
    Type: Grant
    Filed: March 5, 1996
    Date of Patent: November 17, 1998
    Assignee: TRW Inc.
    Inventors: Kevin Wesley Kobayashi, Dwight Christopher Streit, Aaron Kenji Oki, Donald Katsu Umemto
  • Patent number: 5831303
    Abstract: The object of the invention is a field-effect transistor comprising a drain (D) and a source (S) and a gate (G) with a determined width (W) and length (L), equipped with means (G1-G2) for generating a voltage distribution on the gate in direction of its width. The gate comprises a first end in direction of its width and a second end essentially opposite to the first end, and that a first gate contact (G1) is arranged at the first end for providing a first voltage (V.sub.G1) to the first end, and a second gate contact (G2) is arranged at the second end for providing a second voltage (V.sub.G2) to the second end, for generating a voltage distribution on the gate in direction of its width with the help of a difference voltage (V.sub.G1 -V.sub.G2) between the first (G1) and the second (G2) gate contact. On the basis of the first (V.sub.G1) and second (V.sub.
    Type: Grant
    Filed: July 10, 1996
    Date of Patent: November 3, 1998
    Assignee: Nokia Mobile Phones, Ltd.
    Inventor: Juha Rapeli
  • Patent number: 5786722
    Abstract: An integrated CMOS diode with an injection ring that enables construction of an integrated CMOS RF switch. Construction techniques of using a diffused n-well resistor, parasitic capacitance and construction of the diode underneath a bonding input pad contribute to performance of the switch as well as saving space needed to construct the switch.
    Type: Grant
    Filed: November 12, 1996
    Date of Patent: July 28, 1998
    Assignee: Xerox Corporation
    Inventors: Steven A. Buhler, Jaime Lerma, Mohammad M. Mojarradi
  • Patent number: 5783847
    Abstract: A dual-mode microwave/millimeter wave integrated circuit package with low cost, high operating frequency, quick cooling, and high reliability is disclosed. More particularly, the package structure of the invention supports both microstrip and coplanar waveguide operation modes, which cannot be accomplished by any prior microwave integrated circuit package structures.
    Type: Grant
    Filed: August 18, 1997
    Date of Patent: July 21, 1998
    Assignee: Ching-Kuang Tzuang
    Inventor: Ching-Kuang Tzuang
  • Patent number: 5773887
    Abstract: A high frequency semiconductor component (10) includes a first substrate (12) having a first surface (13) opposite a second surface (14), a first electrically conductive layer (16) supported by the first surface (13) of the first substrate (12), a second electrically conductive layer (17) supported by the second surface (14) of the first substrate (12) wherein the second electrically conductive layer (17) is electrically coupled to the first electrically conductive layer (16), a second substrate (19) having a first surface (20) and a second surface (21), a third electrically conductive layer (22) supported by the first surface (20) of the second substrate (19), and an electrically insulating layer (23) between the second and third electrically conductive layers (17, 22) wherein the second and third electrically conductive layers (17, 22) are electrically coupled together through the electrically insulating layer (23).
    Type: Grant
    Filed: June 20, 1997
    Date of Patent: June 30, 1998
    Assignee: Motorola, Inc.
    Inventors: Anthony M. Pavio, William M. Vassar
  • Patent number: 5757041
    Abstract: A footprint for adaptable MMIC arrays is disclosed in which the size, number and location of the array components is optimized for the fabrication by depositing a personalizing metal interconnecting layer on the array, of essentially any MMIC circuit from a single footprint layout.
    Type: Grant
    Filed: September 11, 1996
    Date of Patent: May 26, 1998
    Assignee: Northrop Grumman Corporation
    Inventors: Sanjay B. Moghe, Gregory R. Dietz, Howard N. Fudem
  • Patent number: 5731607
    Abstract: In a semiconductor integrated circuit device, particularly in a switch circuit, a first and a second FETs are connected in series with respect to the signal path, and a third FET is connected between the node of these first and second FETs and the ground region. Thereby, low insertion loss, high isolation, and miniaturization of the entire circuit can be realized simultaneously.
    Type: Grant
    Filed: April 17, 1996
    Date of Patent: March 24, 1998
    Assignee: Sony Corporation
    Inventor: Kazumasa Kohama
  • Patent number: 5693595
    Abstract: A termination for a high-temperature superconductive thin-film microwave device formed on the obverse side of a substrate with the reverse side of the substrate having a ground plane. The termination can include a thin-film resistor being integral with an operative component, with the substrate being a preselected dielectric substrate. The resistor can have an epitaxially-formed layer of molybdenum metal of a first preselected thickness on the obverse side, and an epitaxially-formed layer of titanium metal of a second preselected thickness thereon. The termination includes a epitaxially-formed thin-film capacitor integral with the resistor. The capacitor can have a layer of titanium metal formed on a portion of the obverse side with a layer of gold metal formed thereon. The substrate can be lanthanum aluminate, and the high-temperature superconductive film can be a yttrium-barium-copper-oxide film. The ground plane can be made of a high-temperature superconductive film and annealed gold.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: December 2, 1997
    Assignee: Northrop Grumman Corporation
    Inventors: Salvador H. Talisa, Daniel L. Meier
  • Patent number: 5689138
    Abstract: A semiconductor device for microwave frequencies with a substrate which is provided at a first side with a semiconductor element, a passive element, and a pattern of conductive elements, while the opposed, second side is provided with a metallization which is connected to the elements present on the first side through windows formed in the substrate. The substrate consists of a silicon layer which is present on a layer of insulating material, the semiconductor element being formed in the silicon layer, and the metallization being provided on that side of the layer of insulating material which is remote from the silicon layer. The silicon layer may here have a very small thickness of, for example, 0.1 to 0.2 .mu.m. In such a thin silicon layer, bipolar and field effect transistors capable of processing signals of microwave frequencies can be formed. Since the silicon layer is thin, the influence of the conductivity of silicon on passive elements is small.
    Type: Grant
    Filed: October 26, 1995
    Date of Patent: November 18, 1997
    Assignee: U.S. Philips Corporation
    Inventors: Ronald Dekker, Henricus G. R. Maas, Wilhelmus T. A. J. Van Den Einden
  • Patent number: 5679979
    Abstract: A package (1) for diodes (6) is constructed with a substrate (2) of alumina, a common area (5) on which diodes (6) are mounted, bond wires (8) extending from respective diodes to connect with respective conducting output areas (9) respective vias (13) connecting the common area (5) and the output areas (9) to respective surface mount pads (14, 18) on a bottom surface of the substrate (2), heat spreading areas (19) on the top surface of the substrate (2), and multiple conducting vias (13) connecting each of the heat spreading areas (19) to a heat conducting, surface mount, ground pad (20) on the bottom surface of the substrate (2).
    Type: Grant
    Filed: May 21, 1996
    Date of Patent: October 21, 1997
    Inventor: Christopher Dirk Weingand
  • Patent number: 5633517
    Abstract: A semiconductor device has a multi-stage power amplifier, which is composed of a plurality of transistors each having an input terminal and an output terminal. The transistors are disposed on a chip in such a way that the input terminals and output terminals of the respective transistors are arranged in directions so as to alternate from one another. A ground metallization layer is formed on a back and a side surface and on an outside perimeter section of a front surface of the chip and a ground terminal of each transistor is connected to the ground metallization layer. Each of the transistors comprises a gate pad, a source pad, a drain pad and an active region which are formed on a semi-insulating GaAs substrate. The gate pad, the source pad and the drain pad are in contact respectively with a gate electrode, a source electrode and a drain electrode formed in the active region.
    Type: Grant
    Filed: December 12, 1995
    Date of Patent: May 27, 1997
    Assignee: NEC Corporation
    Inventor: Yasuo Saitoh
  • Patent number: 5627389
    Abstract: A method of improving the performance of a traveling wave field-effect transistor operated at frequencies in the microwave range or above the microwave range comprising the steps of forming a depletion region beneath a gate electrode wherein, in a plane transverse to the direction of signal propagation, a depletion region edge has a first end portion located between the gate electrode and a drain electrode and a second end portion located between the gate electrode and a source electrode; and separating the depletion region edge from the drain electrode. Further improvements in the operation of the TWFET include adjusting the first end portion of the depletion region edge to be closer to the gate electrode relative to the distance between the second end portion of the depletion region edge and the gate electrode, controlling an effective conductivity of a semiconductor of the traveling-wave field effect transistor, and setting the length of the gate electrode at substantially 1.0 micron.
    Type: Grant
    Filed: July 15, 1994
    Date of Patent: May 6, 1997
    Inventor: Alison Schary
  • Patent number: 5614743
    Abstract: MMIC elements are formed on the surface of a GaAs semiconductor substrate. Rectangular U grooves having V-shaped bottoms are formed on the bottom surface of the substrate up to the surface of the substrate under the electrode and ground terminals of the MMIC elements. MIM capacitors and coils are formed on the side walls of the grooves and the bottom surface of the substrate and are connected to the electrode and ground terminals. This arrangement provides the MIM capacitors with large capacitance and the coils with large inductance without increasing chip size.
    Type: Grant
    Filed: July 21, 1995
    Date of Patent: March 25, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Masao Mochizuki
  • Patent number: 5612556
    Abstract: A monolithic integrated circuit capable of operation in the microwave range which is fabricated using silicon technology wherein transmission line interconnects are fabricated along with active devices on the same substrate. The transmission line is provided using polycrystalline silicon since it can have much higher resistivity than single crystal silicon. Accordingly, a circuit is provided wherein active devices are provided in single crystal silicon and interconnects are formed overlying polycrystalline silicon to provide transmission line interconnects between devices and obtain the desired high frequency response.
    Type: Grant
    Filed: April 25, 1995
    Date of Patent: March 18, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: Satwinder Malhi, Chi-Cheong Shen, Oh-Kyong Kwon
  • Patent number: 5608263
    Abstract: A micromachined self-packaged circuit provides at least partial shielding of a circuit element. Preferably, all the elements comprising a circuit are completely shielded between a first wafer of semi-conductor material having a recess and receiving a metallized layer therebeneath and a second wafer of semi-conductor material having a groove in a bottom face against which is received a metallized layer. The first wafer metallized face is then adhesively bonded to the second wafer on a surface opposite the metallized layer to which a circuit is affixed. The second wafer metallized face and metallized grooves cooperate with the first wafer metallized face to provide a shielded circuit cavity therebetween. Alternatively, the first or second wafer can be used alone to partially shield a circuit element.
    Type: Grant
    Filed: September 6, 1994
    Date of Patent: March 4, 1997
    Assignee: The Regents of the University of Michigan
    Inventors: Rhonda F. Drayton, Linda P. B. Katehi
  • Patent number: 5559349
    Abstract: A silicon microwave monolothic integrated circuit device and method of fabricating having a high resistivity silicon substrate with a masking layer of low temperature silicon oxide, silicon nitride and polysilicon sublayers on a first area, and an epitaxial layer over the surface of the silicon substrate in a second area. The active devices are formed over the second area and the passive devices are formed over the first area.
    Type: Grant
    Filed: March 7, 1995
    Date of Patent: September 24, 1996
    Assignee: Northrop Grumman Corporation
    Inventors: James R. Cricchi, Paul A. Potyraj, Mike L. Salib
  • Patent number: 5554865
    Abstract: A T/R switch/LNA for a radar's active array antenna includes dissimilar semiconductor devices in a monolithic microwave integrated circuit (MMIC). The devices are selected to best meet the functional requirements of the T/R switch/LNA. In particular, the LNA is realized with a HEMT and the T/R switch is realized with HBTs. The dissimilar devices are adapted from first and second heterostructures that are arranged to be coplanar and separated by an isolation layer.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: September 10, 1996
    Assignee: Hughes Aircraft Company
    Inventor: Lawrence E. Larson
  • Patent number: 5539228
    Abstract: A monolithic-microwave-integrated-circuit (MMIC) metal-semiconductor-field-effect (MESFET) transistor (40) or other type of field-effect transistor has a double-recessed channel region (32,42) with a gate recess (42) formed in a channel recess (32). The channel recess (32) is offset toward the drain (16) as far as possible without shorting the channel recess (32) to the drain (16) to increase the transistor breakdown voltage. The gate recess (42) is offset toward the source (14) as far as possible without causing the gate-source capacitance to increase, thereby reducing the transistor source resistance.
    Type: Grant
    Filed: February 7, 1995
    Date of Patent: July 23, 1996
    Assignee: Hughes Aircraft Company
    Inventor: Tom Y. Chi
  • Patent number: 5536971
    Abstract: A semiconductor device operating at a high frequency, includes: a semiconductor layer; a first electrode for being applied with a voltage to control a current flowing in the semiconductor layer; a second electrode and a third electrode electrically connected to the semiconductor layer, at least one of the second and third electrodes being elongated above the first electrode to form a hollow around the first electrode by surrounding the first electrode with the second and third electrodes and the semiconductor layer; a passivation film formed over the second and third electrodes; and wherein the first electrode is directly in contact with an atmosphere in the hollow.
    Type: Grant
    Filed: October 27, 1993
    Date of Patent: July 16, 1996
    Assignee: Matsushita Electronics Corporation
    Inventors: Yoshiro Oishi, Daisuke Ueda
  • Patent number: 5525819
    Abstract: A Concentric MESFET (CMESFET) is a small-signal traveling-wave transistor having a grounded source electrode which concentrically surrounds and shields the gate and drain electrodes from electromagnetic fields generated by other nearby circuit elements. S-parameters for the transistor are computed to obtain gain curves for design configurations. For a gate length of 2 um, maximum gain occurs with a gate width of 3.0 mm. The CMESFET has calculated bandwidth of 17 GHz for a 2 um gate length and a gate width of 300 m. Coupling capacitance between device electrodes and a nearby transmission line are calculated and used to verify improved source electrode shielding isolation of the device from interference and crosstalk originating in surrounding circuits.
    Type: Grant
    Filed: July 6, 1994
    Date of Patent: June 11, 1996
    Assignee: The Aerospace Corporation
    Inventor: Allyson D. Yarbrough
  • Patent number: 5519233
    Abstract: A microchip capacitor used as a circuit element in internal impedance matching circuits of microwave transistors is disclosed. A thin film resistor is used to make interconnection between two first metallized patterns in a paired electrode structure, and a pair of microstrip lines are used to make interconnection between the two first metallized patterns and the second metallized pattern. The thin film resistor and the microstrip lines form a Wilkinson type synthetic circuit wherein a signal flowing in the thin film resistor and a signal flowing in the microstrip lines cancel each other. An isolation between the first and second metallized patterns is improved.
    Type: Grant
    Filed: June 3, 1994
    Date of Patent: May 21, 1996
    Assignee: NEC Corporation
    Inventor: Tomoyoshi Fukasawa
  • Patent number: 5500543
    Abstract: A sensor (10, 40) for measuring the ratio of fluids or other materials in mixture (12) utilizes a coplanar resonator. The resonator has an outer conductor or conductor plane (17, 41) that is on a semiconductor substrate (11). The conductor plane (17, 41) has an opening (18, 48) that exposes a portion of the surface of the substrate. An inner conductor or sensing element (19, 42) is formed on the exposed surface within the opening (18, 48) so that the conductor plane (17, 41) and the sensing element (19, 42) are coplanar. The sensing element (19, 42) is coupled to an input (22) of a transistor (21) to form an oscillator. The oscillator frequency varies as the ratio of materials in the mixture (12) varies.
    Type: Grant
    Filed: April 4, 1994
    Date of Patent: March 19, 1996
    Assignee: Motorola
    Inventors: Michael Dydyk, John S. Escher
  • Patent number: 5459343
    Abstract: A semiconductor device which includes a channel region of predetermined conductivity type having a pair of opposing surfaces (11 or 33) , a control element of opposite conductivity type disposed on one of the opposing surfaces (13 or 31) and a pair of spaced apart electrodes (17, 19 or 35, 37) disposed over the other of the opposing surfaces. The control element and channel region form a pn junction therebetween. An electrically insulating layer (15) can be disposed between the spaced apart electrodes (17, 19) and the channel region (11) in a high frequency embodiment.
    Type: Grant
    Filed: March 4, 1994
    Date of Patent: October 17, 1995
    Assignee: Texas Instruments Incorporated
    Inventors: David J. Seymour, Frank J. Morris
  • Patent number: 5438212
    Abstract: A semiconductor device includes a heat generating element disposed on a front surface of a semiconductor substrate and a cavity disposed within the semiconductor substrate opposite the heat generating element. In this structure, heat generated by the heat generating element is conducted through the substrate to the cavity, whereby the thermal conductivity of the device is improved. In a method for producing the semiconductor device, portions of the substrate at opposite sides of the heat generating element are selectively etched in a direction perpendicular to the front surface to form first holes (first etching process). Thereafter, the substrate is selectively etched from the front surface to form second holes beneath the respective first holes (second etching process). During the second etching process, the second holes are connected to each other, resulting in the cavity for heat radiation.
    Type: Grant
    Filed: February 24, 1994
    Date of Patent: August 1, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Kazuhiro Okaniwa
  • Patent number: 5426319
    Abstract: A semiconductor device includes a silicon substrate on which a circuit having a predetermined function is formed and a high frequency circuit chip which is mounted on the silicon substrate and operates at high frequencies, and operates with functions of the silicon substrate and the high frequency circuit chip, wherein a thin film tape having a microstrip structure including an insulating film, a signal line on a surface of the insulating film and a grounding layer on a rear surface of the insulating film, is disposed on the silicon substrate, whereby the silicon substrate is electrically connected to the high frequency circuit chip. As a result, a conventional silicon substrate is employed and a production cost is reduced.
    Type: Grant
    Filed: April 30, 1993
    Date of Patent: June 20, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Yoshihiro Notani
  • Patent number: 5412235
    Abstract: In a semiconductor integrated circuit, an amplifier FET and a gate bias FET, having the same structure as the amplifier FET and a total gate width smaller than that of the amplifier FET, are disposed close to each other. The gate bias FET is a constituent of a gate bias circuit for the amplifier FET, and the current determined by the drain current of the gate bias FET, first and second resistors respectively connected to drain and source of the gate bias FET, and a diode connected in series to the first resistor is applied to the amplifier FET as a gate bias voltage. In this structure, if the DC characteristic of the amplifier FET varies from chip to chip, the DC characteristic of the gate bias FET formed in the vicinity of and simultaneously with the amplifier FET also varies.
    Type: Grant
    Filed: January 27, 1994
    Date of Patent: May 2, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yasuharu Nakajima, Hiroto Matsubayashi
  • Patent number: 5404581
    Abstract: On a main plane of a semi-insulation GaAs substrate, a microwave.millimeter wave active circuit is provided, and, on a back surface thereof, a microstrip antenna is provided. On the other hand, a signal processing circuit of a large integration scale is provided on a main plane of a silicon substrate. The microwave.millimeter wave transmitting and receiving module is composed of the semi-insulation GaAs substrate and the silicon substrate which are in contact on the main planes with each other.
    Type: Grant
    Filed: July 23, 1992
    Date of Patent: April 4, 1995
    Assignee: NEC Corporation
    Inventor: Kazuhiko Honjo
  • Patent number: 5386130
    Abstract: Semiconductor device including a distributed-type monolithic integrated circuit on a substrate, operating in the high frequency and/or microwave range, this distributed circuit having a plurality of coupled stages each having at least a transistor with a first electrode being AC connected to ground. The first electrode is connected to ground by two branches, a first branch being connected directly to a first ground stub and a second branch being connected to a second ground stub through a resistor.
    Type: Grant
    Filed: November 2, 1993
    Date of Patent: January 31, 1995
    Assignee: U.S. Philips Corporation
    Inventors: Patrice Gamand, Christian Caux
  • Patent number: 5384486
    Abstract: An integrated circuit device has a substrate, a plurality of circuit elements or units arranged on the substrate and having terminals, a plurality of signal lines connected between the terminals of the circuit elements or units, or between the terminals and external connection terminals, and an alternating current ground line provided close to the signal lines to determine a transmission characteristic of the signal lines, the alternating current ground line including a high-potential direct current power source line and a low-potential direct current power source line, the high-potential direct current power source line and the low-potential direct current power source line being vertically separated by a dielectric layer.
    Type: Grant
    Filed: February 26, 1993
    Date of Patent: January 24, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Mitsuo Konno
  • Patent number: 5345194
    Abstract: A FET comprising two or more gate pads or terminals, and a reflection type oscillator including the above-mentioned FET. In this oscillator, a dielectric resonator is connected through a coupling line to the first gate pad of the FET and an output terminal is connected to the second pad. When the drain pad of the FET is connected to ground, and a suitable value of capacitive reactance is added to the source pad, then a negative resistance -R appears on the first gate pad, and thus oscillation occurs at a resonance frequency fo of the dielectric resonator. If the load resistance value viewed from the second gate pad is set to R, the maximum oscillation output occurs.
    Type: Grant
    Filed: July 14, 1992
    Date of Patent: September 6, 1994
    Assignee: NEC Corporation
    Inventor: Isamu Nagasako
  • Patent number: 5334871
    Abstract: A field effect transistor signal switching device includes a semiconductor substrate including an active region; an input electrode disposed on the substrate and including a source electrode disposed on the active region and a source pad; first and second output electrodes respectively including first and second drain electrodes disposed on the active region; and first and second control electrodes disposed on the substrate for controlling the selective transmission of an input signal applied to the input electrode to the first and second output electrodes, the first and second control electrodes respectively including first and second gate electrodes disposed on the active region between the source electrode and the first and second drain electrodes, respectively, first and second gate pads, and first and second connecting portions disposed on the substrate respectively electrically connecting the first and second gate electrodes to the first and second gate pads.
    Type: Grant
    Filed: July 9, 1993
    Date of Patent: August 2, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Naoto Andoh
  • Patent number: 5309006
    Abstract: An FET crossbar switch device is implemented by using a split gate electrode and a shared source and drain pad to implement source and drain electrodes on an integrated circuit substrate. First and second inputs to the device are associated with first and second transmission lines, each of which is directly connected to a first and second source electrode areas. Disposed between the source electrode areas are respective drain electrode sections, each of which is coupled to an associated output transmission line. The input and output transmission lines are fabricated directly on the integrated circuit substrate. Gate fingers or electrodes are directed between respective drain electrodes and adjacent source electrodes. By properly biasing the gate electrodes, one can direct the first input to the first output with the second input directed to the second output. In a second state the first input can be connected to the second output with the second input disconnected or connected to the first output.
    Type: Grant
    Filed: November 5, 1991
    Date of Patent: May 3, 1994
    Assignee: ITT Corporation
    Inventors: David A. Willems, Victor E. Steel
  • Patent number: 5287072
    Abstract: A semiconductor device comprises a plurality of gate electrodes, drain electrodes, and source electrodes axi-symmetrically formed on opposite sides of a gate pad and drain pad. Two source pads are arranged at ends of these electrodes, to which the source electrodes are connected, so that a gate width can be shortened. Therefore, an output power, gain, etc., can be increased, and the high-frequency characteristics can be improved. Further, when arranging a plurality of semiconductor devices in parallel, the semiconductor chip can be formed in the shape of a square, i.e., the aspect ratio thereof can be reduced, and therefore, cracks in the semiconductor chip (semiconductor device) can be avoided.
    Type: Grant
    Filed: January 6, 1992
    Date of Patent: February 15, 1994
    Assignees: Fujitsu Limited, Fujitsu Yamanashi Electronics Limited
    Inventors: Masakazu Kojima, Yoshio Aoki, Seigo Sano
  • Patent number: 5276345
    Abstract: The lift-off technique for transferring a preprocessed GaAs circuit to a quartz carrier is used to integrate GaAs active devices with distributed quartz microwave circuit elements (e.g., microstrip circuitry) in a single integrated circuit package. The present invention is therefore useful in making a variety of extremely rugged, low loss millimeter and submillimeter wave integrated circuits. By restricting the GaAs layer to a thin membrane and by impurity-doping the GaAs layer only in the regions of the active devices, the advantages of the quartz substrate in the presence of millimeter wave or submillimeter wave radiation are essentially retained.
    Type: Grant
    Filed: October 30, 1992
    Date of Patent: January 4, 1994
    Assignee: California Institute of Technology
    Inventors: Peter H. Siegel, Imran Mehdi, Barbara Wilson
  • Patent number: 5274256
    Abstract: In a dual gate FET of this invention, the number of points for supplying a signal to a first gate electrode and the number of points for supplying a signal to a second gate electrode are set to be optimal values so that a noise index is minimized. A difference in the electrical length between each signal supply point of each of the first and second gate electrodes and the corresponding gate input terminal has a negligible magnitude with respect to one quarter of the wavelength of an input signal applied to the corresponding gate input terminal. The dual gate FET has a low-noise arrangement, and a microwave can be applied to either one of the first and second gate electrodes, thereby obtaining, e.g., a low-noise mixer. In this case, a separator required upon use of a single gate FET can be omitted, thereby easily arranging a monolithic IC.
    Type: Grant
    Filed: September 10, 1992
    Date of Patent: December 28, 1993
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Nobuo Shiga
  • Patent number: 5256996
    Abstract: An integrated coplanar strip nonlinear transmission line comprising a substrate of gallium arsenide upon which a heavily doped buried layer and a lightly doped surface layer of epitaxially grown gallium arsenide are grown. Two parallel conductors are integThis work was funded by the United States Government's Office of Naval Research under contract No. N99914-85-K-0381. The United States Government has a paid up license in this technology.
    Type: Grant
    Filed: July 6, 1992
    Date of Patent: October 26, 1993
    Assignee: The Board of Trustees of the Leland Stanford, Junior University
    Inventors: Robert A. Marsland, Mark J. W. Rodwell, David M. Bloom
  • Patent number: 5163169
    Abstract: A frequency divider circuit including a field effect transistor on a semi-insulating substrate including applying a voltage higher than the lowest of the power supply voltages of the frequency divider circuit to the semi-insulating substrate.
    Type: Grant
    Filed: December 22, 1989
    Date of Patent: November 10, 1992
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kousei Maemura, Teruyuki Shimura, Hiroaki Seki