Light Responsive Or Combined With Light Responsive Device Patents (Class 257/290)
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Patent number: 8659061Abstract: In one embodiment, a solid-state image capturing element of an embodiment has: a semiconductor substrate; a photodiode formed on the semiconductor substrate; a capacitor formed on the semiconductor substrate and including a first electrode layer, an insulating layer, and a second electrode layer which are stacked in sequence; a transistor formed on the semiconductor substrate and including a floating gate and a control gate; and a first electrode portion electrically connecting the second electrode layer and an n-type diffusion layer or a p-type diffusion layer constituting the photodiode. Further, the first electrode layer of the capacitor is constituted by the floating gate of the transistor, and the second electrode layer of the capacitor and the control gate of the transistor are discontinuous.Type: GrantFiled: September 12, 2012Date of Patent: February 25, 2014Assignee: Kabushiki Kaisha ToshibaInventor: Keisuke Nakatsuka
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Publication number: 20140043497Abstract: There is provided an apparatus including an image sensor of a back-illuminated type using a complementary metal oxide semiconductor (CMOS), including a light receiving unit, formed in a semiconductor substrate, which receives incident light, an anti-reflection film formed on a back-surface side of the semiconductor substrate in which the light receiving unit is formed, and a silicon oxide film, formed on a back-surface side of the anti-reflection film, which has a refractive index lower than a silicon nitride film and has a higher density in a back-surface side than in a front-surface side thereof.Type: ApplicationFiled: August 5, 2013Publication date: February 13, 2014Applicant: Sony CorporationInventors: Takamasa Tanikuni, Shinpei Yamaguchi, Shuji Manda
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Patent number: 8644759Abstract: Offset voltages developed on floating nodes on inputs to high-performance amplifiers that are DC isolated from the data signals input to amplifiers are cancelled by connecting a highly resistive element between the input node and a predetermined potential, particularly useful in proximity communication systems in which two chips are connected through capacitive or inductive coupling circuits formed jointly in the two chips. The resistive element may be an off MOS transistor connected between the node and a desired bias voltage or a MOS transistor with its gate and drain connected to the potential. Multiple bias voltages may be distributed to all receivers and locally selected by a multiplexer for application to one or two input nodes of the receiver. The receiver output can also serve as a predetermined potential when the resistive element has a long time constant compared to the data rate or the resistive element is non-linear.Type: GrantFiled: January 6, 2009Date of Patent: February 4, 2014Assignee: Oracle America, Inc.Inventors: Justin M. Schauer, Robert David Hopkins, Robert J. Drost
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Publication number: 20140027826Abstract: A method of forming an integrated photonic semiconductor structure having a photodetector device and a CMOS device may include depositing a dielectric stack over the photodetector device such that the dielectric stack encapsulates the photodetector. An opening is etched into the dielectric stack down to an upper surface of a region of an active area of the photodetector. A first metal layer is deposited directly onto the upper surface of the region of the active area via the opening such that the first metal layer may cover the region of the active area. Within the same mask level, a plurality of contacts including a second metal layer are located on the first metal layer and on the CMOS device. The first metal layer isolates the active area from the occurrence of metal intermixing between the second metal layer and the active area of the photodetector.Type: ApplicationFiled: July 30, 2012Publication date: January 30, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Solomon Assefa, Jeffrey P. Gambino, Steven M. Shank
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Patent number: 8638382Abstract: A solid-state imaging device with a layout in which one sharing unit includes an array of photodiodes of 2 pixels by 4×n pixels (where, n is a positive integer), respectively, in horizontal and vertical directions.Type: GrantFiled: September 11, 2012Date of Patent: January 28, 2014Assignee: Sony CorporationInventors: Kazuichiro Itonaga, Shizunori Matsumoto
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Publication number: 20140021518Abstract: A display device includes: a first substrate; a photo transistor on the first substrate; and a switching transistor connected to the photo transistor. The photo transistor includes a light blocking film on the first substrate, a first gate electrode on the light blocking film and in contact with the light blocking film, a first semiconductor layer on the first gate electrode and overlapping the light blocking film, and a first source electrode and a first drain electrode on the first semiconductor layer. The switching transistor includes a second gate electrode on the first substrate, a second semiconductor layer on the second gate electrode and overlapping the second gate electrode, and a second source electrode and a second drain electrode on the second semiconductor layer. The first semiconductor layer and the second semiconductor layer are at a same layer of the display device, and each includes crystalline silicon germanium.Type: ApplicationFiled: December 18, 2012Publication date: January 23, 2014Applicants: SAMSUNG DISPLAY CO., LTD., ULSAN COLLEGE INDUSTRY COOPERATION, INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITYInventors: Sang Youn HAN, Cheol Kyu KIM, Jun Ho SONG, Sung Hoon YANG, Kyung Tea PARK, Seung Mi SEO, Suk Won JUNG, Do Young KIM, Sun Jo KIM, Hyung Jun KIM
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Publication number: 20140015023Abstract: Embodiments of the invention relate to substrates comprising a base wafer, an insulating layer and a top semiconductor layer, wherein the insulating layer comprises at least a zone wherein a density of charges is in absolute value higher than 1010 charges/cm2. The invention also relates to processes for making such substrates.Type: ApplicationFiled: September 16, 2013Publication date: January 16, 2014Applicant: SoitecInventors: Frederic Allibert, Gweltaz Gaudin, Fabrice Lallement, Didier Landru, Karine Landry, Carlos Mazure, Mohamad A. Shaheen
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Patent number: 8629484Abstract: Disclosed herein is a solid-state imaging device including: a semiconductor region of a second conductivity type which is formed on a face side of a semiconductor substrate; a photoelectric conversion element which has an impurity region of a first conductivity type and which is operable to generate electric charge according to the amount of incident light and to accumulate the electric charge in the inside thereof; an electric-charge holding region which has an impurity region of the first conductivity type and in which the electric charge generated through photoelectric conversion by the photoelectric conversion element is held until read out; an intermediate transfer path through which only the electric charge generated by the photoelectric conversion element during an exposure period and being in excess of a predetermined electric charge amount is transferred into the electric-charge holding region; and an impurity layer.Type: GrantFiled: March 22, 2011Date of Patent: January 14, 2014Assignee: Sony CorporationInventors: Hiroyuki Ohri, Takashi Machida, Takahiro Kawamura, Yasunori Sogoh
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Patent number: 8629441Abstract: The semiconductor device includes a driver circuit including a first thin film transistor and a pixel including a second thin film transistor over one substrate. The first thin film transistor includes a first gate electrode layer, a gate insulating layer, a first oxide semiconductor layer, a first oxide conductive layer, a second oxide conductive layer, an oxide insulating layer which is in contact with part of the first oxide semiconductor layer and which is in contact with peripheries and side surfaces of the first and second oxide conductive layers, a first source electrode layer, and a first drain electrode layer. The second thin film transistor includes a second gate electrode layer, a second oxide semiconductor layer, and a second source electrode layer and a second drain electrode layer each formed using a light-transmitting material.Type: GrantFiled: August 2, 2010Date of Patent: January 14, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Junichiro Sakata, Miyuki Hosoba, Tatsuya Takahashi
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Publication number: 20140008707Abstract: A high sensitivity image sensor including a pixel, the pixel including a single electron field effect transistor (SEFET), the SEFET including a first conductive type well in a second conductive type substrate, second conductive type source and drain regions in the well and a first conductive type gate region in the well between the source and the drain regions.Type: ApplicationFiled: September 10, 2013Publication date: January 9, 2014Inventors: Eric R. FOSSUM, Dae-Kil CHA, Young-Gu JIN, Yoon-Dong PARK, Soo-Jung HWANG
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Publication number: 20140001521Abstract: An optoelectronic device for detecting electromagnetic radiation and including: a body of semiconductor material delimited by a main surface and including a first region and a second region that form a junction; and a recess formed in the body, which extends from the main surface and is delimited at least by a first wall, the first wall being arranged transverse to the main surface. The junction faces the first wall.Type: ApplicationFiled: July 2, 2013Publication date: January 2, 2014Inventor: Alberto Pagani
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Publication number: 20130341690Abstract: The present invention provides an ultra-violet light sensing device. The ultra-violet light sensing device includes a first conductivity type substrate, a second conductivity type region, and a first conductivity type high density region. The first conductivity type substrate includes a light incident surface. The second conductivity type region is disposed in the first conductivity type substrate and adjacent to the light incident surface. The first conductivity type high density region is disposed under the second conductivity type region. The present invention also provides another ultra-violet light sensing device, which further includes a first conductivity type high density shallow region which is sandwiched between the light incident surface and the second conductivity type region. Manufacturing methods for these ultra-violet light sensing devices are also disclosed in the present invention.Type: ApplicationFiled: May 31, 2013Publication date: December 26, 2013Applicant: PIXART IMAGING INCORPORATION, R.O.C.Inventors: Han-Chi Liu, Huan-Kun Pan, Eiichi Okamoto
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Patent number: 8614412Abstract: A solid-state image device is provided which includes: a photoelectric conversion portion which obtains a signal charge by photoelectric conversion of incident light; a pixel transistor portion which outputs a signal charge generated by the photoelectric conversion portion; a peripheral circuit portion which is provided at the periphery of a pixel portion including the photoelectric conversion portion and the pixel transistor portion and which has an NMOS transistor and a PMOS transistor; a first stress liner film which has a compressive stress and which is provided on the PMOS transistor; and a second stress liner film which has a tensile stress and which is provided on the NMOS transistor. In the solid-state image device described above, the photoelectric conversion portion, the pixel transistor portion, and the peripheral circuit portion are provided in and/or on a semiconductor substrate.Type: GrantFiled: December 17, 2012Date of Patent: December 24, 2013Assignee: Sony CorporationInventor: Yasushi Tateshita
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Patent number: 8610127Abstract: A thin film transistor array substrate is disclosed. The thin film transistor array substrate includes: gate lines and data lines formed to cross each other in the center of a gate insulation film on a substrate and to define pixel regions; a thin film transistor formed at each intersection of the gate and data lines; a passivation film formed on the thin film transistors; a pixel electrode formed on each of the pixel regions and connected to the thin film transistor through the passivation film; a gate pad connected to each of the gate lines through a gate linker; and a data pad connected to each of the data lines through a data linker. The data pad is formed of a gate pattern, and the data line is formed of a data pattern. The data linker is configured to connect the data pad formed of the gate pattern with the data line formed of the data pattern using a connection wiring.Type: GrantFiled: January 3, 2013Date of Patent: December 17, 2013Assignee: LG Display Co., Ltd.Inventors: Chung Wan Oh, Jae Chang Kwon, Yu Ri Shim, Chang Yeop Shin, Dong Eok Kim
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Patent number: 8604581Abstract: A solid-state image pickup device has a photoelectric conversion element that converts light incident from a first surface of a substrate into a signal charge and accumulates the signal charge, a transistor that is formed on a second surface side opposite to the first surface of the substrate and reads out the signal charge accumulated by the photoelectric conversion element, a supporting substrate stuck to the second surface of the substrate, and an antireflection coating formed on the first surface of the substrate, wherein the first surface of the substrate includes a curved surface or an inclined surface forming a prescribed angle to the second surface.Type: GrantFiled: September 16, 2008Date of Patent: December 10, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Risako Ueno, Hideyuki Funaki, Yoshinori Iida, Hiroto Honda
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Publication number: 20130320418Abstract: A device includes a semiconductor substrate, a well region in the semiconductor substrate, and a Metal-Oxide-Semiconductor (MOS) device. The MOS device includes a gate dielectric overlapping the well region, a gate electrode over the gate dielectric, and a source/drain region in the well region. The source/drain region and the well region are of opposite conductivity types. An edge of the first source drain region facing away from the gate electrode is in contact with the well region to form a junction isolation.Type: ApplicationFiled: August 17, 2012Publication date: December 5, 2013Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chien-Hsien Tseng, Shou-Gwo Wuu, Chia-Chan Chen, Kuo-Yu Wu, Dao-Hong Yang, Ming-Hao Chung
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Publication number: 20130320419Abstract: A method includes performing a first epitaxy to grow a first epitaxy layer of a first conductivity type, and performing a second epitaxy to grow a second epitaxy layer of a second conductivity type opposite the first conductivity type over the first epitaxy layer. The first and the second epitaxy layers form a diode. The method further includes forming a gate dielectric over the first epitaxy layer, forming a gate electrode over the gate dielectric, and implanting a top portion of the first epitaxy layer and the second epitaxy layer to form a source/drain region adjacent to the gate dielectric.Type: ApplicationFiled: September 14, 2012Publication date: December 5, 2013Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Shiu-Ko JangJian, Min Hao Hong, Kei-Wei Chen, Chih-Cherng Jeng
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Patent number: 8598638Abstract: A solid-state image capturing element according to the present invention includes a one conductivity type semiconductor substrate; an opposite conductivity type well region formed on the one conductivity type semiconductor substrate; a photodiode section formed on the opposite conductivity type well region, constituted of a plurality of one conductivity type regions with successively different impurity concentrations for complete electric charge transferring; a one conductive drain region capable of reading out signal charges from the photodiode section; and a transfer gate formed above a substrate between the one conductivity drain region and the photodiode section.Type: GrantFiled: March 16, 2010Date of Patent: December 3, 2013Assignee: Sharp Kabushiki KaishaInventor: Nagai Kenichi
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Patent number: 8598639Abstract: A silicon photodiode with symmetry layout and deep well bias in CMOS technology is provided. The silicon photodiode includes a substrate, a deep well, and a PN diode structure. The deep well is disposed on the substrate, where an extra bias is applied to the deep well. The region surrounded by the deep well forms the main body of the silicon photodiode. The PN diode structure is located in the region surrounded by the deep well, where the silicon photodiode has a symmetry layout. The deep well is adopted when fabricating the silicon photodiode, and the extra bias is applied to the deep well to eliminate the interference and effect of the substrate absorbing light, and further greatly improve speed and bandwidth. Furthermore, the silicon photodiode has a symmetry layout, so that uniform electric field distribution is achieved, and the interference of the substrate noise is also reduced.Type: GrantFiled: March 2, 2011Date of Patent: December 3, 2013Assignee: National Central UniversityInventors: Yue-Ming Hsin, Fang-Ping Chou, Ching-Wen Wang, Guan-Yu Chen
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Patent number: 8592812Abstract: Provided is a device for analyzing at least one of a generated amount of positive charges, a generated amount of negative charges, and a generated amount of ultraviolet (UV) light. The device includes a substrate on which at least one of a first device configured to detect a variation in threshold voltage relative to the generated amount of positive charges, a second device configured to detect a variation in threshold voltage relative to the generated amount of negative charges, and a third device configured to detect a variation in threshold voltage relative to the generated amount of UV light is formed.Type: GrantFiled: June 18, 2010Date of Patent: November 26, 2013Assignee: Samsung Electronics Co., Ltd.Inventor: Ken Tokashiki
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Patent number: 8587008Abstract: A light-emitting device includes a substrate, a plurality of light-emitting elements mounted on one surface of the substrate, a first glass film provided to one surface of the substrate and having a plurality of apertures that form a light-reflecting frame surrounding the perimeter of each the light-emitting elements, and a second glass film provided to the other surface of the substrate. A coefficient of thermal expansion of the second glass film is greater than that of the substrate when a coefficient of thermal expansion of the first glass film is greater than that of the substrate, and a coefficient of thermal expansion of the second glass film is less than that of the substrate when a coefficient of thermal expansion of the first glass film is less than that of the substrate.Type: GrantFiled: October 14, 2011Date of Patent: November 19, 2013Assignees: Stanley Electric Co., Ltd., Nippon Carbide Industries Co., Inc.Inventors: Dai Aoki, Makoto Ida, Shigehiro Kawaura
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Patent number: 8581254Abstract: The present approach involves a radiation detector module with increased quantum efficiency and methods of fabricating the radiation detector module. The module includes a scintillator substrate and a photodetector fabricated on the scintillator substrate. The photodetector includes an anode, active organic elements, and a cathode. The module also includes a pixel element array disposed over the photodetector. During imaging, radiation attenuated by an object to be imaged may propagate through the pixel element array and through the layers of the photodetector to be absorbed by the scintillator which in response emits optical photons. The photodetector may absorb the photons and generate charge with improved quantum efficiency, as the photons may not be obscured by the cathode or other layers of the module. Further, the module may include reflective materials in the cathode and at the pixel element array to direct optical photons towards the active organic elements.Type: GrantFiled: September 30, 2011Date of Patent: November 12, 2013Assignee: General Electric CompanyInventors: Aaron Judy Couture, Steven Jude Duclos, Joseph John Shiang, Gautam Parthasarathy
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Patent number: 8569766Abstract: Disclosed is an organic light-emitting display device including a transparent substrate which includes a display portion and a pad portion formed in a region around the display portion, a first semiconductor layer formed on the display portion, a second semiconductor layer formed on the pad portion, and a transparent electrode formed on each of the first the second semiconductor layers, where the first and second semiconductor layers include the same material.Type: GrantFiled: July 7, 2011Date of Patent: October 29, 2013Assignee: Samsung Display Co., Ltd.Inventors: Sun Park, Chun-Gi You, June-Woo Lee
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Patent number: 8570455Abstract: A semiconductor device includes a supporting substrate; a semiconductor film on the supporting substrate; a gate insulating film on the semiconductor film; a gate electrode on the gate insulating film; and a source region and a drain region formed by introducing impurity elements to the semiconductor film. The thickness of the semiconductor film is within the range of 20 nm to 40 nm. Low-concentration regions are provided between the source region and a channel forming region, and between the drain region and the channel forming region, respectively. The low-concentration regions each have an impurity concentration smaller than that of the source region and that of the drain region, and the impurity concentration in a lower surface side region on the side of the supporting substrate is smaller than that of an upper surface side region on the opposite side.Type: GrantFiled: March 30, 2009Date of Patent: October 29, 2013Assignee: NLT Technologies, Ltd.Inventors: Shigeru Mori, Isao Shouji, Hiroshi Tanabe
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Patent number: 8564032Abstract: A photodetector device includes: a first semiconductor region of a first conductivity type electrically connected to a first external electrode: a second semiconductor region of a second conductivity type formed on the first semiconductor region; a third semiconductor region of the first conductivity type formed on the second semiconductor region; and a plurality of fourth semiconductor regions of the second conductivity type formed on the second semiconductor region, each of the plurality of fourth semiconductor regions being surrounded by the third semiconductor region, including a second conductivity type impurity having a concentration higher than a concentration of the second semiconductor region, and electrically connected to a second external electrode.Type: GrantFiled: March 28, 2011Date of Patent: October 22, 2013Assignee: Seiko Epson CorporationInventor: Noriyuki Nakamura
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Patent number: 8563978Abstract: A display device includes a substrate, a first conductive film pattern including a gate electrode and a first capacitor electrode on the substrate, a gate insulating layer pattern on the first conductive film pattern, a polycrystalline silicon film pattern including an active layer and a second capacitor electrode on the gate insulating layer pattern, an interlayer insulating layer on the polycrystalline silicon film pattern, a plurality of first contact holes through the gate insulating layer pattern and the interlayer insulating layer to expose a portion of the first conductive film pattern, a plurality of second contact holes through the interlayer insulating layer to expose a portion of the polycrystalline silicon film pattern, and a second conductive film pattern including a source electrode, a drain electrode, and a pixel electrode on the interlayer insulating layer.Type: GrantFiled: April 12, 2011Date of Patent: October 22, 2013Assignee: Samsung Display Co., Ltd.Inventors: Min-Chul Shin, Jong-Moo Huh, Bong-Ju Kim, Yun-Gyu Lee
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Patent number: 8564035Abstract: To fabricate an active matrix type display device integrated with an image sensor at a low cost and without complicating process, the image sensor includes a thin film transistor is in a pixel of a plurality of pixels, an insulating layer is over the thin film transistor, a plurality of first electrodes, which is a shielding layer, is over the insulating layer, a photoelectric conversion layer including a semiconductor film is over the plurality of the first electrodes, and a second electrode over the photoelectric conversion layer. The thin film transistor can include polycrystal silicon. The semiconductor film can include amorphous silicon.Type: GrantFiled: September 3, 2010Date of Patent: October 22, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hongyong Zhang, Masayuki Sakakura, Yurika Satou
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Publication number: 20130270618Abstract: A touch panel and fabricating method thereof are provided. The patterned transparent conductive layer, disposed on the substrate, includes first electrodes. The photo-sensing layers are disposed on the first electrodes. The first patterned conductive layer includes gate electrodes, scan lines and second electrodes. The gate electrodes and the scan lines are disposed on the substrate. The second electrodes are disposed on the photo-sensing layers. The first electrodes, the photo-sensing layers and the second electrodes constitute photo-sensors. The second patterned conductive layer includes source electrodes and drain electrodes, wherein the gate electrodes, the channel layers, the source electrodes and the drain electrodes constitute read-out transistors and each of the read-out transistors is electrically connected to the corresponding photo-sensor respectively.Type: ApplicationFiled: March 15, 2013Publication date: October 17, 2013Applicant: Au Optronics CorporationInventors: Chi-Wen Fan, Tien-Hao Chang, Zao-Shi Zheng, Chun Chang, Wei-Peng Weng, An-Thung Cho, Jiun-Jye Chang
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Patent number: 8558291Abstract: An apparatus for annealing a substrate includes a substrate stage having a substrate mounting portion configured to mount the substrate; a heat source having a plurality of heaters disposed under the substrate mounting portion, the heaters individually preheating a plurality areas defined laterally in the substrate through a bottom surface of the substrate; and a light source facing a top surface of the substrate, configured to irradiate a pulsed light at a pulse width of about 0.1 ms to about 100 ms on the entire top surface of the substrate.Type: GrantFiled: November 4, 2011Date of Patent: October 15, 2013Assignee: Kabushiki Kaisha ToshibaInventor: Takayuki Ito
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Publication number: 20130264618Abstract: A method for manufacturing a backside-illuminated image sensor includes (1) forming an isolation film on the front side of a semiconductor substrate with a buried insulating layer formed therein to define an active region; (2) forming a light-receiving element in the active region of the semiconductor substrate; and (3) forming an inter-layer dielectric layer on the front side of the semiconductor substrate on which the light-receiving element is formed. The method may include forming a super contact hole to pass through the inter-layer dielectric layer and the buried insulating layer in a pad region defined on the front side of the semiconductor substrate reaching the semiconductor substrate. The method may include forming a barrier layer of a metal oxide film containing transition metal at the bottom and sidewall of the super contact hole. The method may include filling a conductive material in the super contact hole, in which the barrier layer is formed, to form a super contact.Type: ApplicationFiled: February 6, 2013Publication date: October 10, 2013Applicant: Dongbu HiTek Co., Ltd.Inventors: Chung Kyung JUNG, Sungwook Joo
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Patent number: 8552479Abstract: In one embodiment, a detector includes an AlxIn(1-x)Sb absorber layer, and an AlyIn(1-y)Sb passivation layer disposed above the AlxIn(1-x)Sb absorber layer, wherein x<y. The detector further includes a junction formed in a region of the AlxIn(1-x)Sb absorber layer, and a metal contact disposed above the junction and through the AlyIn(1-y)Sb passivation layer.Type: GrantFiled: March 12, 2010Date of Patent: October 8, 2013Assignee: Flir Systems, Inc.Inventors: Richard E. Bornfreund, Jeffrey B. Barton
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Patent number: 8552470Abstract: A photovoltaic cell is provided as a composite unit together with elements of an integrated circuit on a common substrate. In a described embodiment, connections are established between a multiple photovoltaic cell portion and a circuitry portion of an integrated structure to enable self-powering of the circuitry portion by the multiple photovoltaic cell portion.Type: GrantFiled: August 29, 2011Date of Patent: October 8, 2013Assignee: Texas Instruments IncorporatedInventors: Yuanning Chen, Thomas Patrick Conroy, Jeffrey DeBord, Nagarajan Sridhar
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Patent number: 8552480Abstract: In one embodiment, a detector includes an AlzIn(1-x)Sb passivation/etch stop layer, an AlxIn(1-x)Sb absorber layer disposed above the Alzn(1-z)Sb passivation/etch stop layer, and an AlyIn(1-y)Sb passivation layer disposed above the AlxIn(1-x)Sb absorber layer, wherein x<z and x<y. The detector further includes a junction formed in a region of the AlxIn(1?x)Sb absorber layer, and a metal contact disposed above the junction and through the AlyIn(1-y)Sb passivation layer.Type: GrantFiled: July 30, 2010Date of Patent: October 8, 2013Assignee: Flir Systems, Inc.Inventors: Richard E. Bornfreund, Jeffrey B. Barton
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Patent number: 8552481Abstract: An object of the present invention is to prevent a sensitivity difference between pixels. There are disposed plural unit cells each including plural photodiodes 101A and 101B, plural transfer MOSFETs 102A and 102B arranged corresponding to the plural photodiodes, respectively, and a common MOSFET 104 which amplifies and outputs signals read from the plural photodiodes. Each pair within the unit cell, composed of the photodiode and the transfer MOSFET provided corresponding to the photodiode, has translational symmetry with respect to one another. Within the unit cell, there are included a reset MOSFET and selecting MOSFET.Type: GrantFiled: November 17, 2009Date of Patent: October 8, 2013Assignee: Canon Kabushiki KaishaInventors: Hiroki Hiyama, Masanori Ogura, Seiichiro Sakai
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Patent number: 8546174Abstract: In a method for manufacturing a semiconductor device according to an embodiment, an epitaxial semiconductor layer is epitaxially grown on a semiconductor substrate, a photoelectric converting portion is formed on the epitaxial semiconductor layer, a wiring layer is formed on the epitaxial semiconductor layer after forming the photoelectric converting portion, a support substrate is bonded onto the wiring layer, and the semiconductor substrate is etched from an opposite surface side to a side for the bonding after the bonding. In the method for manufacturing a semiconductor device, an amorphous Si layer is formed on the opposite surface side of the epitaxial semiconductor layer after the etching and an antireflection film and a color filter are formed on the amorphous Si layer in sequence.Type: GrantFiled: January 31, 2012Date of Patent: October 1, 2013Assignee: Kabushiki Kaisha ToshibaInventor: Tadashi Iijima
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Patent number: 8546901Abstract: A high sensitivity image sensor including a pixel, the pixel including a single electron field effect transistor (SEFET), the SEFET including a first conductive type well in a second conductive type substrate, second conductive type source and drain regions in the well and a first conductive type gate region in the well between the source and the drain regions.Type: GrantFiled: April 12, 2010Date of Patent: October 1, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Eric R. Fossum, Dae-Kil Cha, Young-Gu Jin, Yoon-Dong Park, Soo-Jung Hwang
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Patent number: 8547465Abstract: An imaging device module includes an imaging device including a light incident plane on which light is incident, and a reverse face disposed on an opposite side of the light incident plane; and a thermal conductive sheet provided on the reverse face for dissipating heat generated from the imaging device. The thermal conductive sheet contains a plate-like boron nitride particle, and the thermal conductive sheet has a thermal conductivity in a direction perpendicular to the thickness direction of 4 W/m·K or more.Type: GrantFiled: January 28, 2011Date of Patent: October 1, 2013Assignee: Nitto Denko CorporationInventors: Seiji Izutani, Hisae Uchiyama, Takahiro Fukuoka, Kazutaka Hara
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Publication number: 20130248954Abstract: Unit pixels included in an image sensor are provided. The unit pixel including a photoelectric conversion region in a semiconductor substrate, the photoelectric conversion region configured to generate photo-charges corresponding to incident light; a transfer gate on a first surface of the semiconductor substrate, the transfer gate configured to transmit the photo-charges from the photoelectric conversion region to a floating diffusion region in the semiconductor substrate; and a suppression gate on the first surface of the semiconductor substrate, the suppression gate configured to correspond to the photoelectric conversion region, the suppression gate including polysilicon and a negative voltage applied to the suppression gate to reduce dark currents is generated adjacent to the first surface of the semiconductor substrate.Type: ApplicationFiled: February 12, 2013Publication date: September 26, 2013Applicant: Samsung Electronics Co., Ltd.Inventor: Jung-Chak Ahn
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Publication number: 20130250274Abstract: A distance measurement device with high detection accuracy. The distance measurement device includes a photosensor including a light-receiving element, a first transistor, and a second transistor; a wiring; a signal line; and a power supply line. The wiring is electrically connected to one electrode of the light-receiving element. The signal line is electrically connected to a gate electrode of the first transistor. The power supply line is electrically connected to one of a source electrode and a drain electrode of the second transistor. One of a source electrode and a drain electrode of the first transistor is electrically connected to a gate electrode of the second transistor. The other of the source electrode and the drain electrode of the first transistor is electrically connected to the other electrode of the light-receiving element and the other of the source electrode and the drain electrode of the second transistor.Type: ApplicationFiled: March 12, 2013Publication date: September 26, 2013Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
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Publication number: 20130248886Abstract: In one embodiment, a semiconductor device includes a semiconductor substrate having first and second main surfaces, and including a first semiconductor layer of a first conductivity type in the substrate, a second semiconductor layer of a second conductivity type on a surface of the first semiconductor layer on a first main surface side, a third semiconductor layer of the first conductivity type on a surface of the second semiconductor layer, and a fourth semiconductor layer of the second conductivity type on a surface of the first semiconductor layer on a second main surface side. The device further includes a control electrode and a first main electrode on the first main surface side of the substrate, and a second main electrode and a junction termination portion on the second main surface side of the substrate, the junction termination portion having an annular planar shape surrounding the fourth semiconductor layer.Type: ApplicationFiled: January 30, 2013Publication date: September 26, 2013Applicant: Kabushiki Kaisha ToshibaInventor: Mitsuhiko KITAGAWA
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Patent number: 8535975Abstract: An organic light emitting diode (OLED) display and a method for manufacturing the same are provided. The OLED display includes a substrate, an active layer and a capacitor lower electrode positioned on the substrate, a gate insulating layer positioned on the active layer and the capacitor lower electrode, a gate electrode positioned on the gate insulating layer at a location corresponding to the active layer, a capacitor upper electrode positioned on the gate insulating layer at a location corresponding to the capacitor lower electrode, a first electrode positioned to be separated from the gate electrode and the capacitor upper electrode, an interlayer insulating layer positioned on the gate electrode, the capacitor upper electrode, and the first electrode, a source electrode and a drain electrode positioned on the interlayer insulating layer, and a bank layer positioned on the source and drain electrodes.Type: GrantFiled: September 19, 2011Date of Patent: September 17, 2013Assignee: LG Display Co., Ltd.Inventors: Hyunho Kim, Seokwoo Lee, Heedong Choi, Sangjin Lee, Seongmoh Seo
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Publication number: 20130234219Abstract: Disclosed herein is a transistor including: a semiconductor layer; a first gate insulation film and a first interlayer insulation film which are provided on a specific surface side of the semiconductor layer; a first gate electrode provided at a location between the first gate insulation film and the first interlayer insulation film; an insulation film provided on the other surface side of the semiconductor layer; source and drain electrodes provided by being electrically connected to the semiconductor layer; and a shield electrode layer provided in such a way that at least portions of the shield electrode layer face edges of the first gate electrode, wherein at least one of the first gate insulation film, the first interlayer insulation film and the insulation film include a silicon-oxide film.Type: ApplicationFiled: May 3, 2013Publication date: September 12, 2013Applicant: Sony CorporationInventors: Yasuhiro Yamada, Ryoichi Ito, Tsutomu Tanaka, Makoto Takatoku, Michiru Senda
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Patent number: 8530945Abstract: A solid-state image pickup element includes: a photoelectric conversion region formed in a semiconductor substrate; an electric charge holding region formed in the semiconductor substrate for holding electric charges accumulated in the photoelectric conversion region until the electric charges are read out; a transfer gate formed on the semiconductor substrate for transferring electric charges generated by photoelectric conversion in the photoelectric conversion region to the electric charge holding region, and a light blocking film formed on an upper surface of the transfer gate. In this case, a portion between the semiconductor substrate and the light blocking film is thinly formed as a light made incident to the photoelectric conversion region has a longer wavelength in a wavelength region.Type: GrantFiled: March 17, 2011Date of Patent: September 10, 2013Assignee: Sony CorporationInventors: Taketo Fukuro, Jun Okuno
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Patent number: 8530946Abstract: A photodetector device includes: a first semiconductor region of a first conductivity type electrically connected to a first external electrode: a second semiconductor region of a second conductivity type formed on the first semiconductor region; a third semiconductor region of the first conductivity type formed on the second semiconductor region; and a plurality of fourth semiconductor regions of the second conductivity type formed on the second semiconductor region, each of the plurality of fourth semiconductor regions being surrounded by the third semiconductor region, including a second conductivity type impurity having a concentration higher than a concentration of the second semiconductor region, and electrically connected to a second external electrode.Type: GrantFiled: March 28, 2011Date of Patent: September 10, 2013Assignee: Seiko Epson CorporationInventor: Noriyuki Nakamura
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Patent number: 8525165Abstract: To provide a semiconductor device in which a defect or fault is not generated and a manufacturing method thereof even if a ZnO semiconductor film is used and a ZnO film to which an n-type or p-type impurity is added is used for a source electrode and a drain electrode. The semiconductor device includes a gate insulating film formed by using a silicon oxide film or a silicon oxynitride film over a gate electrode, an Al film or an Al alloy film over the gate insulating film, a ZnO film to which an n-type or p-type impurity is added over the Al film or the Al alloy film, and a ZnO semiconductor film over the ZnO film to which an n-type or p-type impurity is added and the gate insulating film.Type: GrantFiled: April 3, 2009Date of Patent: September 3, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Kengo Akimoto
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Patent number: 8519397Abstract: A photoelectric conversion element including a first gate electrode, a first gate insulating layer, a crystalline semiconductor layer, an amorphous semiconductor layer, an impurity semiconductor layer, a source electrode and a drain electrode in contact with the impurity semiconductor layer, a second gate insulating layer covering a region between the source electrode and the drain electrode, and a second gate electrode over the second gate insulating layer. In the photoelectric conversion element, a light-receiving portion is provided in the region between the source electrode and the drain electrode, the first gate electrode includes a light-shielding material and overlaps with the entire surface of the crystalline semiconductor layer and the amorphous semiconductor layer, the second gate electrode includes a light-transmitting material and overlaps with the light-receiving portion, and the first gate electrode is electrically connected to the source electrode or the drain electrode is provided.Type: GrantFiled: December 6, 2011Date of Patent: August 27, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Tsudoi Nagi, Koji Dairiki
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Patent number: 8519455Abstract: A light signal transfer device comprises a substrate having a gate dielectric layer; a source and drain doped regions formed in the substrate; a gate formed on the gate dielectric layer; a carbon nano-tube material formed under the gate dielectric layer to act a channel; and a photo-diode doped region formed adjacent to one of the source and drain doped regions, wherein the areas of the channel and the photo-diode doped region are fixed, the carbon nano-tube material reducing area of the channel and increase photo reception area for the photo-diode doped region to improve performance of the light signal transfer device.Type: GrantFiled: March 14, 2012Date of Patent: August 27, 2013Inventor: Kuo-Ching Chiang
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Publication number: 20130207168Abstract: A semiconductor device contains a photodiode formed in a substrate of the semiconductor device. At a top surface of the substrate, over the photodiode, a surface grating of periodic field oxide in a periodic configuration and/or gate structures in a periodic configuration is formed. The field oxide may be formed using an STI process or a LOCOS process. A semiconductor device with a surface grating including both field oxide and gate structures has the gate structures over the semiconductor substrate, between the field oxide. The surface grating has a pitch length up to 3 microns. The surface grating covers at least half of the photodiode.Type: ApplicationFiled: February 15, 2013Publication date: August 15, 2013Applicant: TEXAS INSTRUMENTS INCORPORATEDInventor: Texas Instruments Incorporated
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Patent number: 8507961Abstract: A solid-state imaging device has improved operating characteristics including a greater withstand voltage and a decrease in the operational noise for the transistors of the device. The solid-state imaging device includes at least a photoelectric converting portion and a plurality of field effect transistors, preferably a thickness of a gate insulating film for the readout and amplifier transistors are different than gate thicknesses of other transistors.Type: GrantFiled: March 2, 2006Date of Patent: August 13, 2013Assignee: Sony CorporationInventors: Noriko Takagi, Hiroyuki Mori
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Patent number: RE44482Abstract: A lock in pinned photodiode photodetector includes a plurality of output ports which are sequentially enabled. Each time when the output port is enabled is considered to be a different bin of time. A specified pattern is sent, and the output bins are investigated to look for that pattern. The time when the pattern is received indicates the time of flight A CMOS active pixel image sensor includes a plurality of pinned photodiode photodetectors that use a common output transistor. In one configuration, the charge from two or more pinned photodiodes may be binned together and applied to the gate of an output transistor.Type: GrantFiled: January 5, 2012Date of Patent: September 10, 2013Assignee: Round Rock Research, LLCInventors: Vladimir Berezin, Alexander I. Krymski, Eric R. Fossum