Abstract: According to the present invention, a highly sensitive photo-sensing element and a sensor driver circuit are prepared by planer process on an insulating substrate by using only polycrystalline material. Both the photo-sensing element and the sensor driver circuit are made of polycrystalline silicon film. As the photo-sensing element, a photo transistor is formed by using TFT, which comprises a first electrode 11 prepared on an insulating substrate 10, a photoelectric conversion region 14 and a second electrode 12, and a third electrode 13 disposed above the photoelectric conversion region 14. An impurity layer positioned closer to an intrinsic layer (density of active impurities is 1017 cm?3 or lower) is provided on the regions 15 and 16 on both sides under the third electrode 13 or on one of the regions 15 or 16 on one side.

Abstract: A thin-film transistor manufactured on a transparent substrate has a structure of a top gate type crystalline silicon thin-film transistor in which a light blocking film, a base layer, a crystalline silicon film, a gate insulating film, and a gate electrode film arranged not to overlap at least a channel region are sequentially formed on the transparent substrate. The channel region has channel length L, LDD regions having LDD length d on both sides of the channel region, a source region, and a drain region are formed in the crystalline silicon film. The light blocking film is divided across the channel region. Interval x between the divided light blocking films is equal to or larger than channel length L and equal to or smaller than a sum of channel length L and a double of LDD length d (L+2d), allowing low the manufacturing cost and suppressed photo leak current.

Abstract: An image sensor includes a first region of a substrate having photoelectric conversion elements formed therein, and includes a second region of the substrate outside of the first region. The image sensor includes a plurality of lenses, a plurality of embossing structures, and a protective layer. The lenses are formed over the first region. The embossing structures are formed over the second region, and the embossing structures are separated from each-other. The protective layer is formed over the lenses and the embossing structures that prevent crack propagation.

Abstract: A photo detector comprising a first doped impurity region (adapted to receive a first voltage) disposed in or on a substrate; a body region, juxtaposed the first doped impurity region; a gate (adapted to receive a second voltage) spaced from a first portion of the body region; a light absorbing region, juxtaposed a second portion of the body region, includes a material which, in response to light incident thereon, generates carrier pairs including a first and second type carriers; a contact region (adapted to receive a third voltage) juxtaposed the light absorbing region; wherein, in response to incident light, the gate attracts first type carriers of the carrier pairs to the first portion of the body region which causes second carriers from the first doped impurity region to flow to the contact region, and the contact region attracts second type carriers.

Abstract: Two charge quantities (Q1,Q2) are output from respective pixels P (m,n) of the back-illuminated distance measuring sensor 1 as signals d?(m,n) having the distance information. Since the respective pixels P (m,n) output signals d?(m,n) responsive to the distance to an object H as micro distance measuring sensors, a distance image of the object can be obtained as an aggregate of distance information to respective points on the object H if reflection light from the object H is imaged on the pickup area 1B. If carriers generated at a deep portion in the semiconductor in response to incidence of near-infrared light for projection are led in a potential well provided in the vicinity of the carrier-generated position opposed to the light incident surface side, high-speed and accurate distance measurement is enabled.

Abstract: Two charge quantities (Q1,Q2) are output from respective pixels P (m,n) of the back-illuminated distance measuring sensor 1 as signals d?(m,n) having the distance information. Since the respective pixels P (m,n) output signals d?(m,n) responsive to the distance to an object H as micro distance measuring sensors, a distance image of the object can be obtained as an aggregate of distance information to respective points on the object H if reflection light from the object H is imaged on the pickup area 1B. If carriers generated at a deep portion in the semiconductor in response to incidence of near-infrared light for projection are led in a potential well provided in the vicinity of the carrier-generated position opposed to the light incident surface side, high-speed and accurate distance measurement is enabled.

Abstract: In one an embodiment, there is provided an assembly comprising at least one detector. Each of the at least one detector includes a substrate having a doped region of a first conduction type, a layer of dopant material of a second conduction type located on the substrate, a diffusion layer formed within the substrate and in contact with the layer of dopant material and the doped region of the substrate, wherein a doping profile, which is representative of a doping material concentration of the diffusion layer, increases from the doped region of the substrate to the layer of dopant material, a first electrode connected to the layer of dopant material, and a second electrode connected to the substrate. The diffusion layer is arranged to form a radiation sensitive surface.

Abstract: Disclosed herein is a photoelectric conversion element including: a first semiconductor layer of a first conductivity type provided above a substrate; a second semiconductor layer of a second conductivity type provided in a higher layer than the first semiconductor layer; a third semiconductor layer of a third conductivity type provided between the first and second semiconductor layers and lower in electrical conductivity than the first and second semiconductor layers; and a light-shielding layer provided between the substrate and first semiconductor layer.

Abstract: A photovoltaic device includes lateral P-I-N light-sensitive diodes respectively formed in portions of a planar semiconductor material (e.g., polycrystalline or crystalline silicon) layer that is entirely disposed on an insulating material (e.g., SiO2) layer utilizing, e.g., STI or SOI techniques. Each light-sensitive diode includes parallel elongated doped regions respectively formed by P+ and N+ dopant extending entirely through the semiconductor layer material and separated by an intervening elongated intrinsic (native) region. The light-sensitive diodes are connected in series by patterned conductive (e.g., metal film) structures. Optional bypass diodes are formed next to each lateral P-I-N light-sensitive diodes. Optional trenches are defined between adjacent light-sensitive diodes.

Abstract: The present invention is for a fast optic nonvolatile memory cell (FONM) that operates with a speed >1000000 times faster than the commercially available FLASH memory. The information (or charges) can be entered into the FONM cell by switching on a built-in laser or LED (Light Emitting Diode). Excited by the lights, and driven by electric fields, the regions of low carrier lifetimes thermally generate excess electrons or positive charges to fill the storage gaps or interfaces. To detect the stored information, two BJTs (Bipolar Junction Transistors) are arranged in a mirrored configuration—with alternative regions of high or low carrier lifetimes and bandgap energies. By comparing the BJT “fly-back” characteristics a voltage difference can be detected as a signal of whether the information is stored or not stored.

Abstract: A solid-state imaging device includes: a semiconductor substrate having a plurality of vertical transfer channel regions and a plurality of photoelectric conversion regions arranged in a matrix; a plurality of vertical transfer electrodes, each constructed of a gate electrode and a first metal light-shielding film, formed via a gate insulating film; a transparent insulating film formed in gaps existing between the vertical transfer electrodes above the vertical transfer channel regions; and a second metal light-shielding film formed via a first interlayer insulating film to cover at least the vertical transfer channel regions.

Abstract: A solid-state imaging device includes a layout in which one sharing unit includes an array of photodiodes of 2 pixels by 4×n pixels (where, n is a positive integer), respectively, in horizontal and vertical directions.

Abstract: A pixel is provided, comprising at least one transistor, the pixel being arranged for cycling the at least one transistor between two or more bias states, e.g. inversion and accumulation, during a readout phase. Due to the cycling between the at least two bias states, the correlation over time of the 1/f noise of the readout signals is broken, thus taking multiple samples and applying an operator onto the samples can reduce the effect of the 1/f noise to arbitrary low levels.

Abstract: An object of the present invention is to provide a photoelectric conversion device, wherein improvement of charge transfer properties when charge is output from a charge storage region and suppression of dark current generation during charge storage are compatible with each other. This object is achieved by forming a depletion voltage of a charge storage region in the range from zero to one half of a power source voltage (V), forming a gate voltage of a transfer MOS transistor during a charge transfer period in the range from one half of the power source voltage to the power source voltage (V) and forming a gate voltage of the transfer MOS transistor during a charge storage period in the range from minus one half of the power source voltage to zero (V).

Abstract: A complementary metal oxide semiconductor (CMOS) image sensing device includes a semiconductor substrate; a photodiode defined on the substrate; a gate dielectric layer provided over the photodiode and the substrate; a polysilicon interconnect contacting a given area of the photodiode via an opening in the gate dielectric layer; a reset transistor coupled to the photodiode; a source follower transistor coupled to the photodiode; and a select transistor coupled to the source follower transistor. The given area of the photodiode defines a node that is coupled to the reset transistor and source follower transistor.

Abstract: A photosensor element (6a) is provided with a gate electrode (11da) disposed on an insulating substrate (10), a gate insulating film (12) disposed so as to cover the gate electrode (11da), a semiconductor layer (15db) disposed on the gate insulating film (12) so as to overlap the gate electrode (11da), and a source electrode (16da) and a drain electrode (16db) provided on the semiconductor layer (15db) so as to overlap the gate electrode (11da) and so as to face each other. The photosensor element (6a) has the semiconductor layer (15db) provided with an intrinsic semiconductor layer (13db) in which a channel region (C) is defined and an extrinsic semiconductor layer (14db) that is laminated on the intrinsic semiconductor layer (13db) such that the channel region (C) is exposed. The extrinsic semiconductor layer (14db) protrudes from the drain electrode (16db) on the side close to the channel region (C).

Abstract: A global shutter pixel cell includes a serially connected anti-blooming (AB) transistor, storage gate (SG) transistor and transfer (TX) transistor. The serially connected transistors are coupled between a voltage supply and a floating diffusion (FD) region. A terminal of a photodiode (PD) is connected between respective terminals of the AB and the SG transistors; and a terminal of a storage node (SN) diode is connected between respective terminals of the SG and the TX transistors. A portion of the PD region is extended under the SN region, so that the PD region shields the SN region from stray photons. Furthermore, a metallic layer, disposed above the SN region, is extended downwardly toward the SN region, so that the metallic layer shields the SN region from stray photons. Moreover, a top surface of the metallic layer is coated with an anti-reflective layer.

Abstract: A two-dimensional, temporally modulated electromagnetic wavefield, preferably in the ultraviolet, visible or infrared spectral range, can be locally detected and demodulated with one or more sensing elements. Each sensing element consists of a resistive, transparent electrode (E) on top of an insulated layer (O) that is produced over a semiconducting substrate whose surface is electrically kept in depletion. The electrode (E) is connected with two or more contacts (C1; C2) to a number of clock voltages that are operated synchronously with the frequency of the modulated wavefield. In the electrode and in the semiconducting substrate lateral electric fields are created that separate and transport photogenerated charge pairs in the semiconductor to respective diffusions (D1; D2) close to the contacts (C1; C2).

Abstract: A solid state imaging device with an easy structure in which have the high sensitivity which reaches the wide wavelength region from visible light to near infrared light wavelength region, and dark current is reduced, and a fabrication method for the same, are provided. A solid state imaging device and a fabrication method for the same, the solid state imaging device comprising: a circuit unit formed on a substrate; and a photoelectric conversion unit including a lower electrode layer placed on the circuit unit, a compound semiconductor thin film of chalcopyrite structure which is placed on the lower electrode layer and functions as an optical absorption layer, and an optical transparent electrode layer placed on the compound semiconductor thin film, wherein the lower electrode layer, the compound semiconductor thin film, and the optical transparent electrode layer are laminated one after another on the circuit unit.

Abstract: A solid-state imaging device is provided. The solid-state imaging device includes a pixel section, a peripheral circuit section, a silicide blocking layer formed in the pixel section except for part or whole of an area above an isolation portion in the pixel section, and a metal-silicided transistor formed in the peripheral circuit section.

Abstract: An image sensor that includes a plurality of pixels disposed on a substrate, each pixel includes at least one photosensitive region that collects charges in response to incident light; a charge-to-voltage conversion node for sensing the charge from the at least one photosensitive region and convening the charge to a voltage; an amplifier transistor having a source connected to an output node, having a gate connected to the charge-to-voltage conversion node and having a drain connected to at least a portion of a power supply node; and a reset transistor connecting the output node and the charge-to-voltage conversion node.

Abstract: Multi-layer antireflection coatings, devices including multi-layer antireflection coatings and methods of forming the same are disclosed. A block copolymer is applied to a substrate and self-assembled into parallel lamellae above a substrate. The block copolymer may optionally be allowed to self-assemble into a multitude of domains oriented either substantially parallel or substantially perpendicular to an underlying substrate.

Abstract: An anti-resonant reflecting optical waveguide structure for reducing optical crosstalk in an image sensor and method of forming the same. The method includes forming a trench within a plurality of material layers and over a photo-conversion device. The trench is vertically aligned with the photo-conversion device and is filled with materials of varying refractive indices to form an anti-resonant reflecting optical waveguide structure. The anti-resonant reflecting optical waveguide structure has a core and at least two cladding structures. The cladding structure in contact with the core has a refractive index that is higher than the refractive index of the core and the refractive index of the other cladding structure. The cladding structures act as Fabry-Perot cavities for light propagating in the transverse direction, such that light entering the anti-resonant reflecting optical waveguide structure remains confined to the core.

Abstract: Techniques and apparatus for using single photon avalanche diode (SPAD) devices in various applications.

Abstract: The present invention belongs to the technical field of optical interconnection and relates to a photo detector, in particular to a photo detector consisting of tunneling field-effect transistors.

Abstract: A photoelectric conversion element includes a light receiving layer that is formed of microcrystal semiconductor, a first semiconductor layer of a first conductive type that is formed on one face side of the light receiving layer, and a first intermediate layer that is interposed between the first semiconductor layer and the light receiving layer and is formed of amorphous semiconductor.

Abstract: An organic light emitting display device. The organic light emitting display device includes a substrate having a pixel region in which pixels are formed and a non-pixel region in which a light sensor is formed, an insulating film formed on the substrate, a first electrode formed on the insulating film and formed of a reflective material reflecting light, the first electrode being formed on the entire surface of the insulating film except for a region between the pixels and a region over the light sensor, a pixel defining film exposing a region of the first electrode and formed on the insulating film, an organic light emitting layer formed on the exposed region of the first electrode, and a second electrode formed on the organic light emitting layer. The first electrode is formed to have a greater area than that of the organic light emitting layer.

Abstract: A semiconductor range-finding element encompasses a semiconductor region (1), a light receiving surface-buried region (11a), a first charge-accumulation region (12a), a first charge read-out region (13), a first potential control means (31), a second potential control means (32), a first exhausting-drain region (14) and a third potential control means (33). The signal charges dependent on a delay time of the reflected light are repeatedly transferred from the light receiving surface-buried region (11a) to the first charge-accumulation region (12a) so as to be accumulated as a first signal charge in the first charge-accumulation region (12a) in a first repetition period, all of the signal charges generated by the reflected light are repeatedly transferred from the light receiving surface-buried region (11a) to the first charge-accumulation region (12a) so as to be accumulated as a second signal charge in the first charge-accumulation region (12a) in a second repetition period.

Abstract: To provide a semiconductor device which can detect low illuminance. A photoelectric conversion element, a diode-connected first transistor, and a second transistor are included. A gate of the first transistor is electrically connected to a gate of the second transistor. One of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the second transistor through the photoelectric conversion element. The other of the source and the drain of the first transistor is electrically connected to the other of the source and the drain of the second transistor. By using transistors which have different threshold voltages for the first transistor and the second transistor, a semiconductor device which can perform detecting of low illuminance can be obtained.

Abstract: To provide a semiconductor device and a driving method of the same that is capable of enlarging a signal amplitude value as well as increasing a range in which a linear input/output relationship operates while preventing a signal writing-in time from becoming long. The semiconductor device having an amplifying transistor and a biasing transistor and the driving method thereof, wherein an electric discharging transistor is provided and pre-discharge is performed.

Abstract: A nitride semiconductor light-emitting device includes a substrate (101) made of silicon, a mask film (102) made of silicon oxide, formed on a principal surface of the substrate (101), and having at least one opening (102a), a seed layer (104) made of GaN selectively formed on the substrate (101) in the opening (102a), an LEG layer (105) formed on a side surface of the seed layer (104), and an n-type GaN layer (106), an active layer (107), and a p-type GaN layer (108) which are formed on the LEG layer (105). The LEG layer (105) is formed by crystal growth using an organic nitrogen material as a nitrogen source.

Abstract: An optical sensor circuit (20) includes a transistor (20c) and a transistor (20d). The transistor (20c) is connected in series with the transistor (20d). The transistor (20d) is configured to receive light. A black matrix is provided so as to face the transistor (20c). A voltage generated at a connecting point (i.e., node (netB)) of the transistor (20d) and the transistor (20c) varies depending on intensity of light received via the transistor (20d).

Abstract: A first thin film diode (100A) has a first semiconductor layer (10A) and a first light blocking layer (12A) disposed on the substrate side of the first semiconductor layer. A second thin film diode (100B) has a second semiconductor layer (10B) and a second light blocking layer (12B) disposed on the substrate side of the second semiconductor layer. An insulating film (14) is formed between the first semiconductor layer (10A) and the first light blocking layer (12A) and between the second semiconductor layer (10B) and the second light blocking layer (12B). A thickness D1 of a portion of the insulating film (14) positioned between the first semiconductor layer (10A) and the first light blocking layer (12A) is different from a thickness D2 of a portion of the insulating film (14) positioned between the second semiconductor layer (10B) and the second light blocking layer (12B).

Abstract: An image sensor pixel and a driving method thereof are provided. The image sensor pixel comprises a photodiode, a sensing capacitor, a static transistor and a dynamic transistor. A first terminal of the photodiode is coupled to a bias line. A control terminal of the static transistor is coupled to a static gate line, and a first terminal of the static transistor is coupled to a first terminal of the sensing capacitor and a second terminal of the photodiode. A control terminal of the dynamic transistor is coupled to a dynamic gate line, and a first terminal of the dynamic transistor is coupled to a second terminal of the sensing capacitor.

Abstract: An image or light sensor chip package includes an image or light sensor chip having a non-photosensitive area and a photosensitive area surrounded by the non-photosensitive area. In the photosensitive area, there are light sensors, a layer of optical or color filter array over the light sensors and microlenses over the layer of optical or color filter array. In the non-photosensitive area, there are an adhesive polymer layer and multiple metal structures having a portion in the adhesive polymer layer. A transparent substrate is formed on a top surface of the adhesive polymer layer and over the microlenses. The image or light sensor chip package also includes wirebonded wires or a flexible substrate bonded with the metal structures of the image or light sensor chip.

Abstract: In one aspect, a method includes forming a pit in a top surface of a substrate by removing a portion of the substrate and growing a semiconductor material with a bottom surface on the pit, the semiconductor material different than the material of the substrate. The pit has a base recessed in the top surface of the substrate. In another aspect, a structure includes a substrate having a top surface, the substrate including at least one pit having a base lower than the top surface of the substrate, and a semiconductor material having a bottom surface formed on the base of the pit.

Abstract: With an improved light use efficiency, the light detection sensitivity of a thin film diode is increased even if the semiconductor layer of the thin film diode has a small thickness. On one side of a substrate (101), a thin film diode (130) including a first semiconductor layer (131) that has at least an n-type region (131n) and a p-type region (131p) is provided. A light-shielding layer (160) is disposed between the substrate and the first semiconductor layer. The surface of the light-shielding layer facing the first semiconductor layer has depressions and protrusions formed thereon. The surface of the first semiconductor layer facing the light-shielding layer is flatter than the surface of the light-shielding layer on which the depressions and protrusions are formed. The light that falls on the light-shielding layer is diffusely reflected and enters the first semiconductor layer.

Abstract: A thin film transistor array panel according to an embodiment of the present invention includes: a gate electrode; a semiconductor layer; a gate insulating layer disposed between the gate electrode and the semiconductor layer; a source electrode connected to the semiconductor layer; and a drain electrode connected to the semiconductor layer, spaced apart from the source electrode, and including two branches overlapping the gate electrode, wherein the two branches of the drain electrode are spaced apart from each other and lie on a straight line or on two parallel straight lines.

Abstract: A light-emitting element includes a semiconductor laminated structure including a first semiconductor layer, a light-emitting layer and a second semiconductor layer, an insulation layer provided on the semiconductor laminated structure, a first wiring including a first vertical conducting portion and a first planar conducting portion and being electrically connected to the first semiconductor layer, the first vertical conducting portion extending inside the insulation layer, the light-emitting layer and the second semiconductor layer in a vertical direction and the first planar conducting portion extending inside the insulation layer in a planar direction, and a second wiring including a second vertical conducting portion and a second planar conducting portion and being electrically connected to the second semiconductor layer, the second vertical conducting portion extending inside the insulation layer in a vertical direction and the second planar conducting portion extending inside the insulation layer in a

Abstract: A light signal transfer device comprises a substrate having a gate dielectric layer; a source and drain doped regions formed in the substrate; a gate formed on the gate dielectric layer; a carbon nano-tube material formed under the gate dielectric layer to act a channel; and a photo-diode doped region formed adjacent to one of the source and drain doped regions, wherein the areas of the channel and the photo-diode doped region are fixed, the carbon nano-tube material reducing area of the channel and increase photo reception area for the photo-diode doped region to improve performance of the light signal transfer device.

Abstract: A solid-state imaging device includes a light-receiving portion, which serves as a pixel, and a waveguide, which is disposed at a location in accordance with the light-receiving portion and which includes a clad layer and a core layer embedded having a refractive index distribution in the wave-guiding direction.

Abstract: Provided is a pixel of a multi-stacked complementary metal-oxide semiconductor (CMOS) image sensor and a method of manufacturing the image sensor including a light-receiving unit that may include first through third photodiode layers that are sequentially stacked, an integrated circuit (IC) that is formed below the light-receiving unit, electrode layers that are formed on and below each of the first through third photodiode layers, and a contact plug that connects the electrode layer formed below each of the first through third photodiode layers with a transistor of the IC.

Abstract: There is provided a photoelectric conversion apparatus which is characterized by comprising a plurality of photoelectric conversion regions of a first conductivity type, and a plurality of semiconductor regions of a second conductivity type opposite to the first conductivity type; and in that the plurality of photoelectric conversion regions of the first conductivity type and the plurality of semiconductor regions are alternately arranged, and a voltage controlling unit is further provided to change a width of a depletion layer formed in a semiconductor substrate by controlling a voltage to be applied to the semiconductor region of the second conductivity type provided between the plurality of photoelectric conversion regions of the first conductivity type.

Abstract: A silicon photon detector device and methodology are provided for detecting incident photons in a partially depleted floating body SOI field-effect transistor (310) which traps charges created by visible and mid infrared light in a floating body region (304) when the silicon photon detector is configured in a detect mode, and then measures or reads the resulting enhanced drain current with a current detector in a read mode.

Abstract: A window opening in a semiconductor component is produced on the basis of a gate structure which serves as an efficient etch resist layer in order to reliably etch an insulation layer stack without exposing the photosensitive semiconductor area. The polysilicon in the gate structure is then removed on the basis of an established gate etching process, with the gate insulation layer preserving the integrity of the photosensitive semiconductor material.

Abstract: A CMOS active pixel sensor (APS) cell structure includes at least one transfer gate device and method of operation. A first transfer gate device comprises a diodic or split transfer gate conductor structure having a first doped region of first conductivity type material and a second doped region of a second conductivity type material. A photosensing device is formed adjacent the first doped region for collecting charge carriers in response to light incident thereto, and, a diffusion region of a second conductivity type material is formed at or below the substrate surface adjacent the second doped region of the transfer gate device for receiving charges transferred from the photosensing device while preventing spillback of charges to the photosensing device upon timed voltage bias to the diodic or split transfer gate conductor structure.

Abstract: Pixel sensor cells, methods of fabricating pixel sensor cells, and design structures for a pixel sensor cell. A transistor in the pixel sensor cell has a gate structure that includes a gate dielectric with a thick region and a thin region. A gate electrode of the gate structure is formed on the thick region of the gate dielectric and the thin region of the gate dielectric. The thick region of the gate dielectric and the thin region of the gate dielectric provide the transistor with an asymmetric threshold voltage.

Abstract: Provided are an image sensor and a method for manufacturing the same. According to an embodiment, a semiconductor substrate is provided comprising a readout circuit. An interconnection electrically connected to the readout circuit and an interlayer dielectric are disposed over the semiconductor substrate. An image sensing unit is disposed over the interlayer dielectric and comprises a first doping layer and a second doping layer stacked therein. A first via hole is formed, exposing the interconnection through the image sensing unit. A fourth metal contact is formed in the first via hole to electrically connect the interconnection and the first doping layer. A fifth metal contact is formed over the fourth metal contact, the fifth metal contact being electrically insulated from the fourth metal contact and electrically connected to the second doping layer.

Abstract: A silicon photodiode with symmetry layout and deep well bias in CMOS technology is provided. The silicon photodiode includes a substrate, a deep well, and a PN diode structure. The deep well is disposed on the substrate, where an extra bias is applied to the deep well. The region surrounded by the deep well forms the main body of the silicon photodiode. The PN diode structure is located in the region surrounded by the deep well, where the silicon photodiode has a symmetry layout. The deep well is adopted when fabricating the silicon photodiode, and the extra bias is applied to the deep well to eliminate the interference and effect of the substrate absorbing light, and further greatly improve speed and bandwidth. Furthermore, the silicon photodiode has a symmetry layout, so that uniform electric field distribution is achieved, and the interference of the substrate noise is also reduced.

Abstract: Optical structures having an array of protuberances between two layers having different refractive indices are provided. The array of protuberances has vertical and lateral dimensions less than the wavelength range of lights detectable by a photodiode of a CMOS image sensor. The array of protuberances provides high transmission of light with little reflection. The array of protuberances may be provided over a photodiode, in a back-end-of-line interconnect structure, over a lens for a photodiode, on a backside of a photodiode, or on a window of a chip package.