With Shield, Filter, Or Lens Patents (Class 257/294)
  • Patent number: 8922690
    Abstract: An image sensor including a pixel unit, the pixel unit including a photodiode, a first color filter and a second color filter each disposed in a different position on a plane above the photodiode, and a first on-chip lens disposed over the first color filter and a second on-chip lens disposed over the second color filter.
    Type: Grant
    Filed: August 16, 2012
    Date of Patent: December 30, 2014
    Assignee: Sony Corporation
    Inventor: Masashi Nakata
  • Patent number: 8922691
    Abstract: A solid-state imaging device includes a photodetector which is formed on a substrate and is configured to generate signal charge by photoelectric conversion, a floating diffusion configured to receive the signal charge generated by the photodetector, a plurality of MOS transistors including a transfer transistor that transfers the signal charge to the floating diffusion and an amplification transistor that outputs an pixel signal corresponding to a potential of the floating diffusion, a multi-wiring layer which is formed in a layer higher than the substrate and is composed of a plurality of wiring layers electrically connected to the MOS transistors via contact portions, and a light-shielding film that is constituted by a bottom wiring layer disposed in a layer higher than the substrate and lower than the multi-wiring layer.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: December 30, 2014
    Assignee: Sony Corporation
    Inventor: Tadayuki Taura
  • Patent number: 8921905
    Abstract: In a solid-state imaging device, N regions serving as photoelectric conversion diodes are formed on outer peripheries of P regions in upper portions of island-shaped semiconductors formed on a substrate, and P+ regions connected to a pixel selection line conductive layer are formed on top layer portions of upper ends of the island-shaped semiconductors so as to adjoin the N regions and the P regions. In the P+ regions, a first P+ region has a thickness less than a second P+ region, and the second P+ region has a thickness less than a third P+ region.
    Type: Grant
    Filed: October 14, 2013
    Date of Patent: December 30, 2014
    Assignee: Unisantis Electronics Singapore Pte. Ltd.
    Inventors: Fujio Masuoka, Nozomu Harada
  • Patent number: 8916917
    Abstract: According to one embodiment, a solid-state imaging device includes a first element formation region surrounded by an element isolation region in a semiconductor substrate having a first and a second surface, an upper element isolation layer on the first surface in the element formation region, a lower element isolation layer between the second surface and the upper element isolation layer, a first photodiode in the element formation region, a floating diffusion in the element formation region, and a first transistor disposed between the first photodiode and the floating diffusion. A side surface of the lower element isolation layer protrudes closer to the transistor than a side surface of the upper element isolation layer.
    Type: Grant
    Filed: February 3, 2012
    Date of Patent: December 23, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shogo Furuya, Hirofumi Yamashita, Tetsuya Yamaguchi
  • Patent number: 8911668
    Abstract: A Lab On a Chip (LOC) has a Sample Preparation Module (SPM) coupled to a sample inlet, a microchannel coupled to the SPM, and an optic module optically proximate to the microchannel. The optic module holds multiple lenses, each of which has a different effective focal length, such that all fields of focus within the microchannel are covered as objects suspended within the liquid sample pass through the microchannel.
    Type: Grant
    Filed: June 27, 2013
    Date of Patent: December 16, 2014
    Assignee: International Business Machines Corporation
    Inventors: Timothy Durniak, Robert R. Friedlander, James R. Kraemer
  • Patent number: 8901685
    Abstract: Magnetic materials and uses thereof are provided. In one aspect, a magnetic film is provided. The magnetic film comprises superparamagnetic particles on at least one surface thereof. The magnetic film may be patterned and may comprise a ferromagnetic material. The superparamagnetic particles may be coated with a non-magnetic polymer and/or embedded in a non-magnetic host material. The magnetic film may have increased damping and/or decreased coercivity.
    Type: Grant
    Filed: April 20, 2007
    Date of Patent: December 2, 2014
    Assignee: International Business Machines Corporation
    Inventors: Snorri Thorgeir Ingvarsson, Philip Louis Trouilloud, Shouheng Sun, Roger Hilsen Koch, David William Abraham
  • Patent number: 8902348
    Abstract: A solid-state image capture device including: at least one photoelectric converter at an image capture surface of a substrate; at least one on-chip lens at the image capture surface of the substrate and above a light-receiving surface of the photoelectric converter; and an antireflection layer on an upper surface of the on-chip lens. The antireflection layer contains a binder resin having a lower refractive index than that of the on-chip lens and low-refractive-index particles having a lower refractive index than that of the binder resin.
    Type: Grant
    Filed: December 14, 2012
    Date of Patent: December 2, 2014
    Assignee: Sony Corporation
    Inventors: Akiko Ogino, Yukihiro Sayama, Takayuki Shoya, Masaya Shimoji, Yoshikazu Tanaka
  • Publication number: 20140347539
    Abstract: A solid-state imaging device in which a pixel circuit formed on the first surface side of a semiconductor substrate is shared by a plurality of light reception regions and second surface side of the semiconductor substrate is the light incident side of the light reception regions. The second surface side regions of the light reception regions are arranged at approximately even intervals and the first surface side regions of the light reception regions e are arranged at uneven intervals. Respective second surface side regions and first surface side regions are joined in the semiconductor substrate so that the light reception regions extend from the second surface side to the first surface side of the semiconductor substrate.
    Type: Application
    Filed: August 6, 2014
    Publication date: November 27, 2014
    Applicant: Sony Corporation
    Inventor: Keiji Mabuchi
  • Patent number: 8896039
    Abstract: A method for manufacturing a solid-state imaging device includes: forming pixels that receive incident light in a pixel array area of a substrate; forming pad electrodes in a peripheral area located around the pixel array area of the substrate; forming a carbon-based inorganic film on an upper surface of each of the pad electrodes including a connection surface electrically connected to an external component; forming a coated film that covers upper surfaces of the carbon-based inorganic films; and forming an opening above the connection surface of each of the pad electrodes to expose the connection surface.
    Type: Grant
    Filed: August 14, 2013
    Date of Patent: November 25, 2014
    Assignee: Sony Corporation
    Inventor: Hiroshi Horikoshi
  • Patent number: 8896037
    Abstract: A solid-state imaging device including: a semiconductor layer; a charge accumulation region configured to be formed inside the semiconductor layer and serve as part of a photodiode; and a reflective surface configured to be disposed inside or under the charge accumulation region and be so formed as to reflect light that has passed through the charge accumulation region and direct the light toward a center part of the charge accumulation region.
    Type: Grant
    Filed: October 14, 2011
    Date of Patent: November 25, 2014
    Assignee: Sony Corporation
    Inventors: Harumi Ikeda, Masashi Nakazawa
  • Patent number: 8895346
    Abstract: A solid-state imaging device includes: a pixel section including, in a semiconductor substrate, plural photoelectric conversion sections that photoelectrically convert incident light to generate signal charges; metal wirings formed, on a first insulating film formed on the semiconductor substrate, above regions among the photoelectric conversion sections and above the periphery of the pixel section; a second insulating film formed on the first insulating film to cover the metal wirings; a first light shielding film formed on the second insulating film and having an opening above the pixel section; and a second light shielding film formed above the metal wirings above the pixel section and having thickness smaller than that of the first light shielding film.
    Type: Grant
    Filed: July 5, 2012
    Date of Patent: November 25, 2014
    Assignee: Sony Corporation
    Inventor: Masaaki Takizawa
  • Publication number: 20140339615
    Abstract: A back surface illuminated image sensor is provided. The back surface illuminated image sensor includes: a first passivation layer disposed on the photodiode array; an oxide grid disposed on the first passivation layer and forming a plurality of holes exposing the first passivation layer; a color filter array including a plurality of color filters filled into the holes, wherein the oxide grid has a refractive index smaller than that of plurality of color filters; and a metal grid aligned to the oxide grid, wherein the metal grid has an extinction coefficient greater than zero.
    Type: Application
    Filed: May 16, 2013
    Publication date: November 20, 2014
    Applicant: ViaEra Technologies Company Limited
    Inventors: Wei-Ko WANG, Chi-Han LIN, Zong-Ru TU, Yu-Kun HSIAO, Chih-Kung CHANG
  • Patent number: 8890221
    Abstract: A backside illuminated image sensor with an array of image sensor pixels is provided. Each image pixel may include a photodiode and associated pixel circuits formed in a front surface of a semiconductor substrate. Silicon inner microlenses may be formed on a back surface of the semiconductor substrate. In particular, positive inner microlenses may be formed over the photodiodes, whereas negative inner microlenses may be formed over the associated pixel circuits. Buried light shielding structures may be formed over the negative inner microlenses to prevent pixel circuitry that is formed in the substrate between two neighboring photodiodes from being exposed to incoming light. The buried light shielding structures may be lined with absorptive antireflective coating material to prevent light from being reflected off the surface of the buried light shielding structures.
    Type: Grant
    Filed: September 19, 2013
    Date of Patent: November 18, 2014
    Assignee: Aptina Imaging Corporation
    Inventors: Victor Lenchenkov, Xianmin Yi
  • Patent number: 8884347
    Abstract: The present disclosure provides a method of manufacturing a photoelectric conversion device, including, a first step of forming a plurality of photoelectric conversion regions on a surface on one side of a semiconductor wafer, a second step of preparing a light-blocking wafer having insertion openings, a third step of bonding the one-side surface of the semiconductor wafer and a surface on the opposite side to a surface on the one side of the light-blocking wafer to each other to form a bonded wafer body, and a fourth step of dividing the bonded wafer body in peripheries of the photoelectric conversion regions, to obtain bonded-body chips each having the photoelectric conversion region.
    Type: Grant
    Filed: June 13, 2011
    Date of Patent: November 11, 2014
    Assignee: Sony Corporation
    Inventor: Yasuhide Nihei
  • Patent number: 8884348
    Abstract: According to one embodiment, a solid-state imaging device includes an area and color filters. The area includes pixels. Each of the pixels includes a first photodiode, a first read transistor, a second photodiode, a second read transistor, a floating diffusion, a reset transistor, and an amplifying transistor. The first photodiode performs photoelectric conversion. The first read transistor reads a signal charge. The second photodiode has a photosensitivity lower than the first photodiode. The second read transistor reads a signal charge. The floating diffusion stores the signal charges. The reset transistor resets a potential of the floating diffusion. The amplifying transistor amplifies the potential of the floating diffusion. The color filters include a first and a second filters. The relationship QSAT1>QSAT2 is satisfied. When a saturation level of the first filter is denoted by QSAT1 and a saturation level of the second filter is denoted by QSAT2.
    Type: Grant
    Filed: November 27, 2013
    Date of Patent: November 11, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Nagataka Tanaka
  • Patent number: 8878264
    Abstract: A global shutter pixel cell includes a serially connected anti-blooming (AB) transistor, storage gate (SG) transistor and transfer (TX) transistor. The serially connected transistors are coupled between a voltage supply and a floating diffusion (FD) region. A terminal of a photodiode (PD) is connected between respective terminals of the AB and the SG transistors; and a terminal of a storage node (SN) diode is connected between respective terminals of the SG and the TX transistors. A portion of the PD region is extended under the SN region, so that the PD region shields the SN region from stray photons. Furthermore, a metallic layer, disposed above the SN region, is extended downwardly toward the SN region, so that the metallic layer shields the SN region from stray photons. Moreover, a top surface of the metallic layer is coated with an anti-reflective layer.
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: November 4, 2014
    Assignee: Aptina Imaging Corporation
    Inventors: Sergey Velichko, Jingyi Bai
  • Patent number: 8878265
    Abstract: According to one embodiment, a solid-state imaging device includes a first element formation region surrounded by an element isolation region in a semiconductor substrate having a first and a second surface, an upper element isolation layer on the first surface in the element formation region, a lower element isolation layer between the second surface and the upper element isolation layer, a first photodiode in the element formation region, a floating diffusion in the element formation region, and a first transistor disposed between the first photodiode and the floating diffusion. A side surface of the lower element isolation layer protrudes closer to the transistor than a side surface of the upper element isolation layer.
    Type: Grant
    Filed: February 3, 2012
    Date of Patent: November 4, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shogo Furuya, Hirofumi Yamashita, Tetsuya Yamaguchi
  • Patent number: 8866249
    Abstract: A photoelectric conversion device is provided which is capable of improving the light condensation efficiency without substantially decreasing the sensitivity. The photoelectric conversion device has a first pattern provided above an element isolation region formed between adjacent two photoelectric conversion elements, a second pattern provided above the element isolation region and above the first pattern, and microlenses provided above the photoelectric conversion elements with the first and the second patterns provided therebetween. The photoelectric conversion device further has convex-shaped interlayer lenses in optical paths between the photoelectric conversion elements and the microlenses, the peak of each convex shape projecting in the direction from the electro-optical element to the microlens.
    Type: Grant
    Filed: October 9, 2013
    Date of Patent: October 21, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventor: Sakae Hashimoto
  • Patent number: 8866205
    Abstract: A photoelectric conversion device is disclosed. The photoelectric conversion device includes a semiconductor substrate having a plurality of photoelectric converters, a multilayer wiring structure arranged on the semiconductor substrate, and a planarized layer arranged on the multilayer wiring structure. The multilayer wiring structure includes a first wiring layer, an interlayer insulation film arranged to cover the first wiring layer, and a second wiring layer serving as a top wiring layer arranged on the interlayer insulation film. The planarized layer covers the interlayer insulation film and the second wiring layer. The second wiring layer is thinner than the first wiring layer.
    Type: Grant
    Filed: August 24, 2007
    Date of Patent: October 21, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yasushi Nakata, Shigeru Nishimura, Ryuichi Mishima
  • Patent number: 8860102
    Abstract: A solid-state imaging device has, in a semiconductor substrate, plural PDs arranged two-dimensionally and signal reading circuits which are formed as MOS transistors and read out signals corresponding to charges generated in the respective PDs. Microlenses for focusing light beams are formed over the respective PDs. An interlayer insulating film in which interconnections are buried is formed as an insulating layer between the semiconductor substrate and the microlenses. Closed-wall-shaped structures are formed in the interlayer insulating film so as to surround parts of focusing optical paths of the microlenses, respectively. The structures are made of a nonconductive material that is different in refractive index from a material of what is formed around them.
    Type: Grant
    Filed: March 26, 2014
    Date of Patent: October 14, 2014
    Assignee: FUJIFILM Corporation
    Inventor: Shunsuke Tanaka
  • Patent number: 8853758
    Abstract: There is provided a solid-state imaging device including plural pixel regions, each including a pixel having a photoelectric conversion unit, a color filter, and a microlens that condenses the incident light to the photoelectric conversion unit; a first light shielding portion that has a first end face at the side of the microlens, and a second end face opposite to the first end face, and that is formed at each side portion of each pixel region of the plurality of the pixel regions; and a second light shielding portion that has a first end face at the side of the microlens, and a second end face opposite to the first end face, and that is formed at each corner portion of the pixel region, in which a distance from a surface of the pixel to the first end face is short compared to the first light shielding portion.
    Type: Grant
    Filed: March 6, 2012
    Date of Patent: October 7, 2014
    Assignee: Sony Corporation
    Inventor: Yoichi Ootsuka
  • Patent number: 8853754
    Abstract: An image or light sensor chip package includes an image or light sensor chip having a non-photosensitive area and a photosensitive area surrounded by the non-photosensitive area. In the photosensitive area, there are light sensors, a layer of optical or color filter array over the light sensors and microlenses over the layer of optical or color filter array. In the non-photosensitive area, there are an adhesive polymer layer and multiple metal structures having a portion in the adhesive polymer layer. A transparent substrate is formed on a top surface of the adhesive polymer layer and over the microlenses. The image or light sensor chip package also includes wirebonded wires or a flexible substrate bonded with the metal structures of the image or light sensor chip.
    Type: Grant
    Filed: May 18, 2012
    Date of Patent: October 7, 2014
    Assignee: Qualcomm Incorporated
    Inventors: Mou-Shiung Lin, Jin-Yuan Lee
  • Patent number: 8847297
    Abstract: Image sensor, fabricating method thereof, and device comprising the image sensor are provided, which comprises a substrate in which a photoelectric transformation device is formed, an interconnection structure formed on the substrate and including multiple intermetal dielectric layers and multiple metal interconnections placed in the multiple intermetal dielectric layers, the interconnection structure defining a cavity aligned corresponding to the photoelectric transformation device, a moisture absorption barrier layer conformally formed on a top of the interconnection structure and in the cavity; and a light guide unit formed on the moisture absorption barrier layer and including light transmittance material filling the cavity, wherein the moisture absorption barrier layer is formed with a uniform thickness on both sides and a bottom of the cavity and on a top surface of the multiple intermetal dielectric layer.
    Type: Grant
    Filed: December 23, 2010
    Date of Patent: September 30, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hong-Ki Kim, Ho-Kyu Kang, June-Taeg Lee, Jae-Hee Choi
  • Patent number: 8847346
    Abstract: A photoelectric conversion portion, a charge holding portion, a transfer portion, and a sense node are formed in a P-type well. The charge holding portion is configured to include an N-type semiconductor region, which is a first semiconductor region holding charges in a portion different from the photoelectric conversion portion. A P-type semiconductor region having a higher concentration than the P-type well is disposed under the N-type semiconductor region.
    Type: Grant
    Filed: October 6, 2010
    Date of Patent: September 30, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yusuke Onuki, Yuichiro Yamashita, Masahiro Kobayashi
  • Patent number: 8847345
    Abstract: An optical element includes a plurality of optical filters having different characteristics. The element includes a first optical filter including a first metal-structure group including first metal structures periodically arranged in an in-plane direction of a substrate surface and a second optical filter including a second metal-structure group including second metal structures periodically arranged in the in-plane direction, the second metal-structure group exhibiting a plasmon resonance condition different from that of the first metal-structure group. The optical distance between the first metal structures adjacent to each other is in a range of 0.75 to 1.25 times the optical distance between the second metal structures adjacent to each other.
    Type: Grant
    Filed: December 16, 2009
    Date of Patent: September 30, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventor: Yoichiro Handa
  • Publication number: 20140267851
    Abstract: Novel imaging arrangements are detailed. One comprises an optical array sensor with plural photo-electron generating regions dispersed at two or more layers in the structure. Two of these photo-electron generating regions are vertically separated by at least 10 microns—making the sensor useful for sensing objects at focal distances ranging from less than ten inches, out to infinity. The photosites may be spectrally selective. One such arrangement includes a top CMOS sensor array that passes 25% or more of the visible incident light into the structure. A second CMOS sensor array can be provided at a bottom of the structure, for receiving light that was not transduced to photo-electrons elsewhere in the sensor. Another arrangement involves movement of a camera sensor, in a repetitive tracking/pop-back motion, to reduce motion blur in individual frames of a video sequence. A great number of other arrangements are also detailed.
    Type: Application
    Filed: April 10, 2014
    Publication date: September 18, 2014
    Applicant: Digimarc Corporation
    Inventor: Geoffrey B. Rhoads
  • Patent number: 8829579
    Abstract: A solid-state imaging device includes photoelectric conversion elements on an imaging surface of a substrate, receiving light incident on a light receiving surface and performing photoelectric conversion to produce a signal charge. Electrodes are interposed between the photoelectric conversion elements and light blocking portions are provided above the electrodes and interposed between the photoelectric conversion elements. The light blocking portions include an electrode light blocking portion formed to cover the corresponding electrode, and a pixel isolation and light blocking portion protruding convexly from the upper surface of the electrode light blocking portion. The photoelectric conversion elements are arranged at first pitches on the imaging surface. The electrode light blocking portions and the pixel isolation and light blocking portions are arranged at second and third pitches on the imaging surface.
    Type: Grant
    Filed: August 16, 2013
    Date of Patent: September 9, 2014
    Assignee: Sony Corporation
    Inventor: Yoshiaki Masuda
  • Publication number: 20140246714
    Abstract: An image sensor and method of manufacturing the same are provided. The image sensor can include a pixel array region having an active pixel area and a dark pixel area surrounding the active pixel area. A dark shield can be formed in the dark pixel area to inhibit light. Dark pixels can be provided under the dark shield. The dark shield can include a thin film including silicon chromium (SiCr).
    Type: Application
    Filed: March 14, 2013
    Publication date: September 4, 2014
    Applicant: DONGBU HITEK CO., LTD.
    Inventor: Chang Eun LEE
  • Patent number: 8823125
    Abstract: A solid-state image pickup device includes a photoelectric conversion portion, a charge holding portion configured to include a first-conductivity-type first semiconductor region, and a transfer portion configured to include a transfer gate electrode that controls a potential between the charge holding portion and a sense node. The charge holding portion includes a control electrode. A second-conductivity-type second semiconductor region is disposed on a surface of a semiconductor region between the control electrode and the transfer gate electrode. A first-conductivity-type third semiconductor region is disposed under the second semiconductor region. The third semiconductor region is disposed at a deeper position than the first semiconductor region.
    Type: Grant
    Filed: October 6, 2010
    Date of Patent: September 2, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yusuke Onuki, Yuichiro Yamashita, Masahiro Kobayashi
  • Publication number: 20140239362
    Abstract: An image sensor includes a substrate having a first surface opposing a second surface and a plurality of pixel regions. A photoelectric converter is included in each of the pixel regions, and a gate electrode is formed on the photoelectric converter. Also, a pixel isolation region isolates adjacent pixel regions. The pixel isolation region includes a first isolation layer coupled to a channel stop region. The channel stop region may include an impurity-doped region.
    Type: Application
    Filed: February 18, 2014
    Publication date: August 28, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: June-mo KOO, Sang-Hoon KIM, Seung-Hun Shin, Jongcheol SHIN
  • Patent number: 8816414
    Abstract: The present invention provides a module structure comprising a substrate with a partial pierced region. A main chip has a sensing area. At least one component is included, wherein the main chip, the at least one component and the substrate are located at the same level. A holder is disposed on the substrate. A transparent material is disposed on the holder, substantially aligning to the sensing area. A lens holder is disposed on the holder, and a lens is configured on the lens holder, substantially aligning to the transparent material and the sensing area.
    Type: Grant
    Filed: November 5, 2012
    Date of Patent: August 26, 2014
    Assignee: LarView Technologies Corporation
    Inventor: Shin-Dar Jan
  • Patent number: 8816405
    Abstract: An elevated photosensor for image sensors and methods of forming the photosensor. The photosensor may have light sensors having indentation features including, but not limited to, v-shaped, u-shaped, or other shaped features. Light sensors having such an indentation feature can redirect incident light that is not absorbed by one portion of the photosensor to another portion of the photosensor for additional absorption. In addition, the elevated photosensors reduce the size of the pixel cells while reducing leakage, image lag, and barrier problems.
    Type: Grant
    Filed: April 12, 2011
    Date of Patent: August 26, 2014
    Assignee: Micron Technology, Inc.
    Inventor: Salman Akram
  • Patent number: 8817152
    Abstract: Disclosed is a solid-state imaging device which includes an imaging region including pixels arranged two-dimensionally, each of the pixels including a photoelectric conversion element and a plurality of pixel transistors for reading out signals outputted from the photoelectric conversion element, and wirings formed on stacked layers for driving each of the pixels. A shading part between the pixels is formed by combining first and second wirings selected from the wirings.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: August 26, 2014
    Assignee: Sony Corporation
    Inventors: Takashi Abe, Ryoji Suzuki
  • Patent number: 8817167
    Abstract: An imaging device includes an image sensor that includes a first group of pixels and a second group of pixels disposed on a semiconductor die. The first group of pixels are arranged to capture a first image and the second group of pixels are arranged to capture a second image. The imaging device also includes a first lens configured to focus image light from a first focus distance onto the first group of pixels. The imaging device further includes a second lens configured to focus the image light from a second focus distance onto the second group of pixels and not the first group of pixels. The first lens is positioned to focus the image light from the first focus distance onto the first group of pixels and not the second group of pixels. The first focus distance is different than the second focus distance.
    Type: Grant
    Filed: July 13, 2012
    Date of Patent: August 26, 2014
    Assignee: Google Inc.
    Inventor: Xiaoyu Miao
  • Publication number: 20140232918
    Abstract: A solid-state imaging device having a backside illuminated structure, includes: a pixel region in which pixels each having a photoelectric conversion portion and a plurality of pixel transistors are arranged in a two-dimensional matrix; an element isolation region isolating the pixels which is provided in the pixel region and which includes a semiconductor layer provided in a trench by an epitaxial growth; and a light receiving surface at a rear surface side of a semiconductor substrate which is opposite to a multilayer wiring layer.
    Type: Application
    Filed: April 23, 2014
    Publication date: August 21, 2014
    Applicant: SONY CORPORATION
    Inventor: Takekazu Shinohara
  • Patent number: 8803209
    Abstract: A photodetector device includes: a first semiconductor region of a first conductivity type electrically connected to a first external electrode: a second semiconductor region of a second conductivity type formed on the first semiconductor region; a third semiconductor region of the first conductivity type formed on the second semiconductor region; and a plurality of fourth semiconductor regions of the second conductivity type formed on the second semiconductor region, each of the plurality of fourth semiconductor regions being surrounded by the third semiconductor region, including a second conductivity type impurity having a concentration higher than a concentration of the second semiconductor region, and electrically connected to a second external electrode.
    Type: Grant
    Filed: August 7, 2013
    Date of Patent: August 12, 2014
    Assignee: Seiko Epson Corporation
    Inventor: Noriyuki Nakamura
  • Patent number: 8803271
    Abstract: A device includes a semiconductor substrate having a front side and a backside. A photo-sensitive device is disposed on the front side of the semiconductor substrate. A dielectric layer is disposed on the backside of the semiconductor substrate, wherein the dielectric layer is over a back surface of the semiconductor substrate. A metal shield is over the dielectric layer and overlapping the photo-sensitive device. A metal plug penetrates through the dielectric layer, wherein the metal plug electrically couples the metal shield to the semiconductor substrate.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: August 12, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Zhe-Ju Liu, Chih-Cherng Jeng, Kuo-Cheng Lee, Szu-Hung Yang, Po-Zen Chen, Chi-Chin Hsu
  • Publication number: 20140217486
    Abstract: There is provided a back-illuminated type solid-state image pickup unit, in which a pad wiring line is provided on a light reception surface, capable of improving light reception characteristics in a photoelectric conversion section by thinning an insulating film in the back-illuminated type solid-state image pickup unit. A solid-state image pickup unit according to the present technology to accomplish such a purpose includes a sensor substrate having a pixel region in which photoelectric conversion sections are formed in an array, and a drive circuit is provided on a surface opposed to a light reception surface for the photoelectric conversion sections of the sensor substrate. Moreover, a through hole via reaching the drive circuit from the light reception surface of the sensor substrate is provided in a peripheral region located outside the pixel region. Further, a pad wiring line directly laminated on the through hole via is provided on the light reception surface in the peripheral region.
    Type: Application
    Filed: September 27, 2012
    Publication date: August 7, 2014
    Applicant: Sony Corporation
    Inventor: Kentaro Akiyama
  • Patent number: 8796709
    Abstract: A housing for radiation-emitting or radiation-receiving optoelectronic components such as LEDs and a method for producing the housing are provided. The housing has a base part and a head part that are joined by a glass layer. The top face of the base part defines an assembly region for an optoelectronic functional element and is also a heat sink for the optoelectronic functional element. The head part extends at least in sections over the peripheral extent of the assembly region, and above the assembly region it forms a passage area for the radiation emitted from or to be received by the optoelectronic functional element.
    Type: Grant
    Filed: April 29, 2009
    Date of Patent: August 5, 2014
    Assignee: Schott AG
    Inventors: Matthias Rindt, Josef Kiermeier, Thomas Zetterer, Robert Hettler, Shaifullah Bin Mohamed Kamari, Lea-Li Chew, Rohit Bhosale
  • Patent number: 8786745
    Abstract: In a pixel 11, a floating semiconductor region FD accumulates a charge from a photoelectric transducer PD. A first charge transfer path CTP1 extends from the photoelectric transducer PD to the floating semiconductor region FD through the storage diode SD. A second charge transfer path CTP2 extends from the photoelectric transducer PD to the floating semiconductor region. An output unit AMP provides a signal corresponding to a potential in the floating semiconductor region FD. The first charge transfer path CTP includes a first shutter switch TR(GS1) for controlling a transfer of the charge from the photoelectric transducer PD, the storage diode SD for accumulating the charge from the photoelectric transducer PD, and a transfer switch TR(TF1) for controlling a transfer of the charge from the storage diode SD to the floating semiconductor region PD, while the second charge transfer path CTP includes a shutter switch TR(GS2) for controlling a transfer of the charge from the photoelectric transducer PD.
    Type: Grant
    Filed: January 28, 2011
    Date of Patent: July 22, 2014
    Assignee: National University Corporation Shizuoka University
    Inventors: Shoji Kawahito, Keita Yasutomi
  • Patent number: 8785994
    Abstract: An X-ray detector including: a substrate that is divided into a light detection area and a non-detection area and includes a plurality of pixels; a photodiode disposed on the light detection area; a thin film transistor that is disposed on the non-detection area and is electrically connected to a lower portion of the photodiode; a plurality of wires that are electrically connected to the thin film transistor and are positioned on the non-detection area; at least one insulating layer disposed so as to cover at least the thin film transistor and the plurality of wires; a scintillator layer disposed on the at least one insulating layer over an entire surface of the substrate; and a shielding part disposed between the at least one insulating layer and the scintillator layer to shield the non-detection area.
    Type: Grant
    Filed: November 19, 2012
    Date of Patent: July 22, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventor: Dong-Hyuk Kim
  • Patent number: 8785991
    Abstract: A solid state imaging device includes a photoelectric conversion portion in which the shape of potential is provided such that charge is mainly accumulated in a vertical direction.
    Type: Grant
    Filed: May 28, 2009
    Date of Patent: July 22, 2014
    Assignee: Sony Corporation
    Inventor: Keiji Mabuchi
  • Publication number: 20140198240
    Abstract: The advent of electronic-based imaging generally followed the four generalized ‘eras’ identified in FIG. 16 The trend is clearly toward higher and higher levels of integration for the act of “taking pictures.” FIG. 17 is a humble graphic attempt to summarize certain aspect of the present technology, and how a synthesis of these additional technical capabilities can represent a next era quite nicely. To the extent a great deal of past photography and filming has involved the mastery of technical limitations and turning limitations into art, a new challenge should develop where everyone has their own pocket Hasselblad/Steadicam, and exploration of new subject matter becomes the game.
    Type: Application
    Filed: March 15, 2013
    Publication date: July 17, 2014
    Inventor: Geoffrey B. Rhoads
  • Patent number: 8779484
    Abstract: An image sensor includes a plurality of color filters and an anti-reflective layer. The color filters are located on a substrate. The anti-reflective layer is located between the substrate and the color filters, and parts of the anti-reflective layer corresponding to at least two of the color filters have different thicknesses. Moreover, an image sensing process including the following steps is also provided. An anti-reflective layer is formed on a substrate. A plurality of color filters is formed on the anti-reflective layer, wherein parts of the anti-reflective layer right below at least two of the color filters have different thicknesses.
    Type: Grant
    Filed: November 29, 2012
    Date of Patent: July 15, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Xu Yang Shen, Seng Wah Liau, Yuheng Liu, Qin Li, Kiet Houng Chow
  • Patent number: 8779483
    Abstract: Electronic devices may be provided with imaging modules that include plasmonic light collectors. Plasmonic light collectors may be configured to exploit an interaction between incoming light and plasmons in the plasmonic light collector to alter the path of the incoming light. Plasmonic light collectors may include one or more spectrally tuned plasmonic image pixels configured to preferentially trap light of a given frequency. Spectrally tuned plasmonic image pixels may include plasmonic structures formed form a patterned metal layer over doped silicon layers. Doped silicon layers may be interposed between plasmonic structures and a reflective layer. Plasmonic image pixels may be used to absorb and detect as much as, or more than, ninety percent of incident light at wavelengths ranging from the infrared to the ultraviolet. Plasmonic image pixels that capture light of different colors may be arranged in patterned arrays to form imager modules or imaging spectrometers for optofluidic microscopes.
    Type: Grant
    Filed: February 2, 2012
    Date of Patent: July 15, 2014
    Assignee: Aptina Imaging Corporation
    Inventors: Kenneth Edward Salsman, Ulrich Boettiger, Dmitry Bakin, Curtis W. Stith
  • Patent number: 8772844
    Abstract: Capacitance between a detection capacitor and a reset transistor is the largest among the capacitances between the detection capacitor and transistors placed around the detection capacitor. In order to reduce this capacitance, it is effective to reduce the channel width of the reset transistor. It is possible to reduce the effective channel width by distributing, in the vicinity of the channel of the reset transistor and the boundary line between an active region and an element isolation region, ions which enhance the generation of carriers of an opposite polarity to the channel.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: July 8, 2014
    Assignee: Wi Lan, Inc.
    Inventors: Motonari Katsuno, Ryouhei Miyagawa, Masayuki Matsunaga
  • Patent number: 8766340
    Abstract: A solid-state imaging apparatus and a manufacturing method of a solid-state imaging apparatus are provided. Metal wirings 102 and 103 are formed in an effective pixel region A and out-of effective pixel region B of a semiconductor substrate 100, and an etch stop layer 118 is formed over the metal wirings 102 and 103. Moreover, an insulating film 119 is formed on the etch stop layer 118, and another metal wiring 104 is formed on the insulating film 119 in the out-of effective pixel region B. Next, the insulating film 119 in the effective pixel region A is removed by using the etch stop layer 118, and interlayer lenses 105 are formed in the step in the effective pixel region A where the insulating film 119 is removed.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: July 1, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventor: Takehiro Toyoda
  • Patent number: 8766385
    Abstract: Filtering matrix structure comprising at least three color filters and a plurality of near Infrared filters, each one of the color filters and the near Infrared filters having an optimum transmission frequency, wherein the filtering matrix structure is made of n metal layers (m1, m2, m3) and n substantially transparent layers (d1, d2, d3) which alternate between a first metal layer (m1) and an nth substantially transparent layer (d3), each of the n metal layers (m1, m2, m3) having a constant thickness and at least one substantially transparent layer having a variable thickness which sets the optimum transmission frequency of each color filter and each near Infrared filter, n being an integer larger than or equal to 2. Application to 3D mapping and imaging.
    Type: Grant
    Filed: September 13, 2011
    Date of Patent: July 1, 2014
    Assignee: Commissariat a l'Energie Atomique et aux Energies Alternatives
    Inventors: Pierre Gidon, Gilles Grand, Laurent Frey, Pascale Parrein
  • Patent number: 8754458
    Abstract: A solid-state imaging device includes an element forming region on the surface of a substrate, element isolating parts that isolate pixels, each of which is formed with a trench and a buried film, an opto-electric conversion element, and a buried-channel MOS transistor. The buried-channel MOS transistor includes a source region and a drain region, formed in the element forming region, that have a conductivity type opposite to that of the element forming region, a channel region having first and second impurity diffusion regions, which have a conductivity type opposite to that of the element forming region, and a gate electrode. Each first impurity diffusion region is formed between the source region and drain region on a side adjacent to one element isolating part. The second impurity diffusion region is formed across the region between the source region and drain region.
    Type: Grant
    Filed: August 16, 2012
    Date of Patent: June 17, 2014
    Assignee: Sony Corporation
    Inventor: Naoki Saka
  • Patent number: 8749006
    Abstract: An improved image sensor, e.g., CCD, CID, CMOS. The image sensor includes a substrate, e.g., silicon wafer. The sensor also includes a plurality of photo diode regions, where each of the photo diode regions is spatially disposed on the substrate. The sensor has an interlayer dielectric layer overlying the plurality of photo diode regions and a shielding layer formed overlying the interlayer dielectric layer. A silicon dioxide bearing material is overlying the shielding layer. A plurality of lens structures are formed on the silicon dioxide bearing material. The sensor also has a color filter layer overlying the lens structures and a plurality of second lens structures overlying the color filter layer according to a preferred embodiment.
    Type: Grant
    Filed: December 7, 2007
    Date of Patent: June 10, 2014
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventors: Herb Huang, Mieno Fumitake