Abstract: A method for providing a magnetic junction usable in a magnetic device and the magnetic junction are described. A free layer and nonmagnetic spacer layer are provided. The free layer and nonmagnetic spacer layer are annealed at an anneal temperature of at least three hundred fifty degrees Celsius. A pinned layer is provided after the annealing step. The nonmagnetic spacer layer is between the pinned layer and the free layer. The magnetic junction is configured such that the free layer is switchable between a plurality of stable magnetic states when a write current is passed through the magnetic junction.

Abstract: In one embodiment of the invention, there is provided a method for manufacturing a magnetic memory device, comprising: depositing a carbon layer comprising amorphous carbon on a substrate; annealing the carbon layer to activate dopants contained therein; and selectively etching portions of the carbon layer to forms lines of spaced apart carbon conductors.

Abstract: Embodiments relate to IC current sensors fabricated using thin-wafer manufacturing technologies. Such technologies can include processing in which dicing before grinding (DBG) is utilized, which can improve reliability and minimize stress effects. While embodiments utilize face-up mounting, face-down mounting is made possible in other embodiments by via through-contacts. IC current sensor embodiments can present many advantages while minimizing drawbacks often associated with conventional IC current sensors.

Abstract: According to one embodiment, a magnetoresistive element includes a storage layer having a perpendicular and variable magnetization, a reference layer having a perpendicular and invariable magnetization, a shift adjustment layer having a perpendicular and invariable magnetization in a direction opposite to a magnetization of the reference layer, a first nonmagnetic layer between the storage layer and the reference layer, and a second nonmagnetic layer between the reference layer and the shift adjustment layer. A switching magnetic field of the reference layer is equal to or smaller than a switching magnetic field of the storage layer, and a magnetic relaxation constant of the reference layer is larger than a magnetic relaxation constant of the storage layer.

Abstract: A magneto-resistive device having a large output signal as well as a high signal-to-noise ratio is described along with a process for forming it. This improved performance was accomplished by expanding the free layer into a multilayer laminate comprising at least three ferromagnetic layers separated from one another by antiparallel coupling layers. The ferromagnetic layer closest to the transition layer must include CoFeB while the furthermost layer is required to have low Hc as well as a low and negative lambda value. One possibility for the central ferromagnetic layer is NiFe but this is not mandatory.

Abstract: A spin-wave waveguide includes a ferromagnetic thin film resembling a wire in shape. A part of the ferromagnetic thin film, large in film thickness, is formed at one end of the ferromagnetic thin film, and a part of the ferromagnetic thin film, small in film thickness, and a part of the ferromagnetic thin film, large in film thickness, are alternately formed on the same plane, for at least not less than one cycle. A part of the ferromagnetic thin film, large in film thickness, is formed at the other end of the ferromagnetic thin film, wherein an insulating film, and an electrode film are stacked in this order on the ferromagnetic thin film in the part of the ferromagnetic thin film, large in film thickness.

Abstract: In one aspect, a vertical Hall effect sensor includes a semiconductor wafer having a first conductivity type and a plurality of semiconductive electrodes disposed on the semiconductor wafer. The plurality of semiconductive electrodes have the first conductivity type and include a source electrode, a first sensing electrode and a second sensing electrode, arranged such that the source electrode is between the first sensing electrode and the sensing electrode and a first drain electrode and a second drain electrode, arranged such that the first sensing electrode, second sensing electrode, and source electrode are between the first drain electrode and the second drain electrode. The vertical Hall effect sensor also includes a plurality of semiconductor fingers disposed on the semiconductor wafer and interdigitated with the plurality of semiconductive electrodes, the semiconductor fingers having a second conductivity type.

Abstract: Provided is a magnetic tunneling junction device including a first structure including a magnetic layer; a second structure including at least two extrinsic perpendicular magnetization structures, each including a magnetic layer and; a perpendicular magnetization inducing layer on the magnetic layer; and a tunnel barrier between the first and second structures.

Abstract: A current sensor device for sensing a measuring current includes a semiconductor chip having a magnetic field sensitive element. The current sensor device further includes an encapsulant embedding the semiconductor chip. A conductor configured to carry the measuring current is electrically insulated from the magnetic field sensitive element. A redistribution structure includes a first metal layer having a first structured portion which forms part of the conductor.

Abstract: A magnetic field sensor having a support with a top side and a bottom side, whereby a Hall plate is provided on the top side of the support and the Hall plate comprises a carbon-containing layer.

Abstract: According to one embodiment, a method for manufacturing a nonvolatile memory device including a plurality of memory cells is disclosed. Each of the plurality of memory cells includes a base layer including a first electrode, a magnetic tunnel junction device provided on the base layer, and a second electrode provided on the magnetic tunnel junction device. The magnetic tunnel junction device includes a first magnetic layer, a tunneling barrier layer provided on the first magnetic layer, and a second magnetic layer provided on the tunneling barrier layer. The method can include etching a portion of the second magnetic layer and a portion of the first magnetic layer by irradiating gas clusters onto a portion of a surface of the second magnetic layer or a portion of a surface of the first magnetic layer.

Abstract: A semiconductor magnetic field sensor comprising a semiconductor well on top of a substrate layer is disclosed. The semiconductor well includes a first current collecting region and a second current collecting region and a current emitting region placed between the first current collecting region and the second current collecting region. The semiconductor well also includes a first MOS structure, having a first gate terminal, located between the first current collecting region and the current emitting region and a second MOS structure, having a second gate terminal, located between the current emitting region and the second current collecting region. In operation, the first gate terminal and the second gate terminal are biased for increasing a deflection length of a first current and of a second current. The deflection length is perpendicular to a plane defined by a surface of the semiconductor magnetic field sensor and parallel to a magnetic field.

Abstract: A vertical Hall Effect sensor is provided having a high degree of symmetry between its bias modes, can be adapted to exhibit a small pre-spinning systematic offset, and complies with the minimal spacing requirements allowed by the manufacturing technology (e.g., CMOS) between the inner contacts. These characteristics enable the vertical Hall Effect sensor to have optimal performance with regard to offset and sensitivity.

Abstract: A method of forming a line of magnetic tunnel junctions includes forming magnetic recording material over a substrate, non-magnetic material over the recording material, and magnetic reference material over the non-magnetic material. The substrate has alternating outer regions of reactant source material and insulator material along at least one cross-section. The reference material is patterned into a longitudinally elongated line passing over the alternating outer regions. The recording material is subjected to a set of temperature and pressure conditions to react with the reactant of the reactant source material to form regions of the dielectric material which longitudinally alternate with the recording material along the line and to form magnetic tunnel junctions along the line which individually comprise the recording material, the non-magnetic material, and the reference material that are longitudinally between the dielectric material regions.

Abstract: The present disclosure relates to a magnetic tunnel junction (MTJ) device and its fabricating method. Through forming MTJ through a damascene process, device damage due to the etching process and may be avoided. In some embodiments, a spacer is formed between a first portion and a second portion of the MTJ to prevent the tunnel insulating layer of the MTJ from being damaged in subsequent processes, greatly increasing product yield thereby. In other embodiments, signal quality may be improved and magnetic flux leakage may be reduced through the improved cup-shaped MTJ structure of this invention.

Abstract: A semiconductor chip package and a method to manufacture a semiconductor chip package are disclosed. An embodiment of the present invention comprises a substrate and a semiconductor chip disposed on the substrate and laterally surrounded by a packaging material. The package further comprises a current rail adjacent the semiconductor chip, the current rail isolated from the semiconductor chip by an isolation layer, a first external pad, and a via contact contacting the current rail with the first external pad.

Abstract: The disclosed technology provides an electronic device and a fabrication method thereof, in which an etching margin in formation of a variable resistance element is secured and process difficulty is reduced. An electronic device according to an implementation includes a semiconductor memory, the semiconductor memory including: a variable resistance element including a stack of a first magnetic layer, a tunnel barrier layer and a second magnetic layer; a contact plug coupling a top of the variable resistance element and including a magnetism correcting layer; and a conductive line coupled to the variable resistance element through the contact plug including the magnetism correcting layer.

Abstract: A tunneling magneto-resistor reference unit for sensing a magnetic field includes a first MTJ (magnetic tunneling junction) device and a second MTJ device connected in parallel. The first MTJ device has a first pinned layer having a first pinned magnetization at a pinned direction, and a first free layer having a first free magnetization parallel to the pinned direction in a zero magnetic field. The second MTJ device has a second pinned layer having a second pinned magnetization at the pinned direction, and a second free layer having a second free magnetization anti-parallel to the pinned direction in a zero magnetic field. Major axes of the first and second MTJ devices have an angle of 45 degrees to a direction of an external magnetic field when sensed.

Abstract: An integrated circuit can have a first substrate supporting a magnetic field sensing element and a second substrate supporting another magnetic field sensing element. The first and second substrates can be arranged in a variety of configurations. Another integrated circuit can have a first magnetic field sensing element and second different magnetic field sensing element disposed on surfaces thereof.

Abstract: A method and system for providing a magnetic junction usable in a magnetic device are described. The magnetic includes a pinned layer, a nonmagnetic spacer layer, a free layer, and package structure(s). The pinned layer has a pinned layer perimeter and a top surface. The nonmagnetic spacer layer is on at least part of the top surface and between the pinned and free layers. The free layer has a free layer perimeter. The package structure(s) are ferromagnetic and encircles at least one of the free layer and the pinned layer. The package structure(s) are ferromagnetically coupled with the pinned layer. The magnetic junction is configured such that the free layer is switchable between stable magnetic states when a write current is passed through the magnetic junction.

Abstract: A planarization process may planarize a media disk that has data trenches between data features and larger servo trenches between servo features. A filler material layer is deposited on the media disk and provides step coverage of the trenches. The filler material has data recesses over the data trenches and servo recesses over the servo trenches that must be removed to produce a planar media surface. A first planarization process is used to remove the data recesses and a second planarization process is used to remove the servo recesses.

Abstract: According to one embodiment, a semiconductor storage device is disclosed. The device includes first magnetic layer, second magnetic layer, first nonmagnetic layer between them. The first magnetic layer includes a structure in which first magnetic material film, second magnetic material film, and nonmagnetic material film between the first and second magnetic material films are stacked. The first magnetic material film is nearest to the first nonmagnetic layer in the first magnetic layer. The nonmagnetic material film includes at least one of Ta, Zr, Nb, Mo, Ru, Ti, V, Cr, W, Hf. The second magnetic material film includes stacked materials, including first magnetic material nearest to the first nonmagnetic layer among the stacked materials, and second magnetic material which is same magnetic material as the first magnetic material and has smaller thickness than the first magnetic material.

Abstract: Orthogonal spin-torque bit cells whose spin torques from a perpendicular polarizer and an in-plane magnetized reference layer are constructively or destructively combined. An orthogonal spin-torque bit cell includes a perpendicular magnetized polarizing layer configured to provide a first spin-torque; an in-plane magnetized free layer and a reference layer configured to provide a second spin-torque. The first spin-torque and the second spin-torque combine and the combined first spin-torque and second spin-torque influences the magnetic state of the in-plane magnetized free layer. The in-plane magnetized free layer and the reference layer form a magnetic tunnel junction. The first spin-torque and second spin-torque can combine constructively to lower a switching current, increase a switching speed, and/or torque decrease an operating energy of the orthogonal spin-torque bit cell.

Abstract: A magnetic random access memory which is a memory cell array including a magnetoresistive effect element having a fixed layer whose magnetization direction is fixed, a recording layer whose magnetization direction is reversible, and a non-magnetic layer provided between the fixed layer and the recording layer, wherein all conductive layers in the memory cell array arranged below the magnetoresistive effect element are formed of materials each containing an element selected from a group including W, Mo, Ta, Ti, Zr, Nb, Cr, Hf, V, Co, and Ni.

Abstract: A method and system for a device with a magnetic sensor element and magnetic storage elements is disclosed. The device includes an integrated circuit substrate. At least a magnetic sensor with a magnetic sensor element with a permanent magnet is disposed over the integrated circuit substrate. A plurality of magnetic storage elements, each with at least one permanent magnet is disposed over the integrated circuit substrate.

Abstract: The present invention discloses a single-chip referenced full-bridge magnetoresistive magnetic-field sensor. The single-chip sensor is a Wheatstone bridge arrangement of magnetoresistive sensing elements and reference elements. The sensing elements and reference elements are formed from either magnetic tunnel junctions or giant magnetoresistive materials. The sensitivity of the reference and sensor elements is controlled through one or a combination of magnetic bias, exchange bias, shielding, or shape anisotropy. Moreover, the bridge output is tuned by setting the ratio of the reference and sensor arm resistance values to a predetermined ratio that optimizes the bridge output for offset and symmetry. The single-chip referenced-bridge magnetic field sensor of the present invention exhibits excellent temperature stability, low offset voltage, and excellent voltage symmetry.

Abstract: An apparatus including a die; a carrier coupled to the die; and at least one capacitor positioned in or on the carrier, the at least one capacitor including a first electrode, a second electrode and a dielectric material; and a magnet positioned such that a magnetic field at least partially actuates the second electrode toward the first electrode. A method including disposing a die, a first electrode of a capacitor and a magnet on a sacrificial substrate; forming a dielectric layer on the first electrode; patterning a conductive material coupled to the first electrode; patterning a second electrode on the dielectric layer; and removing the sacrificial substrate. A method including exposing a suspended first electrode of a capacitor in a package to a magnetic field; driving a current in a first direction through the first electrode; and establishing a voltage difference between the first electrode and a second electrode.

Abstract: A magnetic field sensor includes a circular vertical Hall (CVH) sensing element and at least one planar Hall element. The CVH sensing element has contacts arranged over a common implant region in a substrate. In some embodiments, the at least one planar Hall element is formed as a circular planar Hall (CPH) sensing element also having contacts disposed over the common implant region. A CPH sensing element and a method of fabricating the CPH sensing element are separately described.

Abstract: A method is described for manufacturing a magnetic sensor module (100, 200, 300, 400) having magnetic sensor elements (130, 330, 430) monolithically integrated at a semiconductor chip (110) which comprises an integrated circuit.

Abstract: Provided are magnetic memory devices with a perpendicular magnetic tunnel junction. The device includes a magnetic tunnel junction including a free layer structure, a pinned layer structure, and a tunnel barrier therebetween. The pinned layer structure may include a first magnetic layer having an intrinsic perpendicular magnetization property, a second magnetic layer having an intrinsic in-plane magnetization property, and an exchange coupling layer interposed between the first and second magnetic layers. The exchange coupling layer may have a thickness maximizing an antiferromagnetic exchange coupling between the first and second magnetic layers, and the second magnetic layer may exhibit a perpendicular magnetization direction, due at least in part to the antiferromagnetic exchange coupling with the first magnetic layer.

Abstract: A current sensor packaged in an integrated circuit package to include a magnetic field sensing circuit, a current conductor and an insulator that meets the safety isolation requirements for reinforced insulation under the UL 60950-1 Standard is presented. The insulator is provided as an insulation structure having at least two layers of thin sheet material. The insulation structure is dimensioned so that plastic material forming a molded plastic body of the package provides a reinforced insulation. According to one embodiment, the insulation structure has two layers of insulating tape. Each insulating tape layer includes a polyimide film and adhesive. The insulation structure and the molded plastic body can be constructed to achieve at least a 500 VRMS working voltage rating.

Abstract: A stretchable electronic circuit that includes a stretchable base substrate having a plurality of stretchable conductors formed onto a surface thereof, with both the stretchable base substrate and conductors being bendable together about two orthogonal axes. The stretchable circuit also includes a stretchable sensor layer attached to the base substrate with a cavity formed therein which has a contact point exposing one of the plurality of stretchable conductors. The stretchable electronic circuit further includes a surface mount device (SMD) package with a conductor contact protrusion installed into the cavity, and wherein a substantially constant electrical connection is established between the conductor contact protrusion and the stretchable conductor at the contact point by tensile forces interacting between the stretchable base substrate and the stretchable sensor layer.

Abstract: An integrated magnetoresistive sensor (20; 30; 40) of an AMR (Anisotropic Magneto Resistance) type, formed by a magnetoresistive strip (24) of ferromagnetic material and having an elongated shape with a preferential magnetization direction (EA). A set/reset coil (22) has a stretch (34a, 34b), which extends over and transversely to the magnetoresistive strip. A concentrating region (23), also of ferromagnetic material, extends over the stretch of the set/reset coil so as to form a magnetic circuit for the field generated by the set/reset coil during steps of refresh and maintenance of magnetization of the magnetoresistive coil.

Abstract: A magnetic device includes a substrate, a sensing block and a repair layer. The substrate has a registration layer and a barrier layer disposed on the registration layer. The sensing block is patterned to distribute on the barrier layer. The repair layer is disposed substantially on the barrier layer, wherein the barrier layer is configured to have a tunneling effect when a bias voltage exists between the sensing block and the registration layer.

Abstract: A mounting structure for mounting a chip type electric element on a flexible board includes: the flexible board having a first land, on which a first lead terminal of another electric element is soldered; and the chip type electric element having a long side. A whole of the long side of the chip type electric element faces a long side of the first land. A length of the long side of the first land is defined as IA, and a distance between one long side of the first land and one long side of the chip type electric element is defined as IB, the one long side of the first land facing the chip type electric element but opposite to the one long side of the chip type electric element. The length of IA is equal to or larger than the distance of IB.

Abstract: A method for forming MRAM (magnetoresistive random access memory) devices is provided. A bottom electrode assembly is formed. A magnetic junction assembly is formed, comprising, depositing a magnetic junction assembly layer over the bottom electrode assembly, forming a patterned mask over the magnetic junction assembly layer, etching the magnetic junction assembly layer to form the magnetic junction assembly with gaps, gap filling the magnetic junction assembly, and planarizing the magnetic junction assembly. A top electrode assembly is formed.

Abstract: Apparatus and associated methods may relate to Magneto-Resistive Sensing Devices (MRSDs). In accordance with an exemplary embodiment, an MRSD comprises an underlying semiconductor device and a magneto-resistive sensor. In some exemplary embodiments, the semiconductor device is processed through most of a standard process flow. After the standard process flow, in various embodiments, a planarization step may be performed to create a more planar top surface. In some embodiments, the magneto-resistive material, which may be made from a Nickel-Iron alloy, called Permalloy, is deposited on the planar surface. A layer of interconnect metallization also may reside in this top region. The magneto-resistive material may contact the topmost layer of metallization of the semiconductor device via contact openings in the planarized surface. In some embodiments, the magneto-resistive material may similarly contact the topmost layer of metallization through these contact openings.

Abstract: A magnetic memory element includes: a first magnetization free layer configured to be composed of ferromagnetic material with perpendicular magnetic anisotropy; a reference layer configured to be provided near the first magnetization free layer; a non-magnetic layer configured to be provided adjacent to the reference layer; and a step formation layer configured to be provided under the first magnetization free layer. The first magnetization free layer includes: a first magnetization fixed region of which magnetization is fixed, a second magnetization fixed region of which magnetization is fixed, and a magnetization free region configured to be connected with the first magnetization fixed region and the second magnetization fixed region. The first magnetization free layer has at least one of a step, a groove and a protrusion inside.

Abstract: An angle sensor for determining an angle between a sensor system and a magnetic field has a magnet which generates the magnetic field and is adjustable in different rotational positions relative to the sensor system with regard to a rotation axis. The sensor system has a first magnetic field sensor for detecting a first magnetic field component oriented transversely to the rotation axis and a second magnetic field sensor for detecting a second magnetic field component, which is situated transversely to a plane extending from the rotation axis and the first magnetic field component. A third magnetic field sensor of the sensor system detects a third magnetic field component, which is oriented in the direction of the rotation axis. The sensor system is positioned relative to the magnet in such a way that the third magnetic field component is largely independent of the rotational position.

Abstract: Methods and apparatus for a sensor are disclosed. An oxide layer is formed on a substrate, followed by a spacer layer and a buffer layer. A photoresist layer is formed on the buffer layer over a pixel region, with an opening exposing a first part of the buffer layer. A first etching is performed to remove the first part of the buffer layer to expose a first part of the spacer layer. A second etching is performed to remove the first part of the spacer layer, the remaining buffer layer, and partially remove a second part of the spacer layer so that the result spacer layer will have an end with a shape substantially similar to a triangle, a height of the end is in a substantially same range as a length of the end.

Abstract: A power module includes a first substrate having a metallized side, a second substrate spaced apart from the first substrate and having a metallized side facing the metallized side of the first substrate, and a semiconductor die interposed between the first and second substrates. The semiconductor die has a first side connected to the metallized side of the first substrate and an opposing second side connected to the metallized side of the second substrate. The power module further includes a sensor connected to the metallized side of the first substrate and galvanically isolated from the metallized side of the second substrate. The sensor is aligned with a first metal region of the metallized side of the second substrate so that the sensor can measure a magnetic field generated by the first metal region.

Abstract: One embodiment of a nonvolatile memory cell comprises a substrate having a surface, a bidirectional current switch comprising a first electrode, a second electrode, and a semiconductor layer disposed between the first and second electrodes, and a magnetoresistive element having a direct contact with the bidirectional current switch and comprising a free ferromagnetic layer having a reversible magnetization direction, a pinned ferromagnetic layer having a fixed magnetization direction, and a tunnel barrier layer disposed between the free and pinned ferromagnetic layers, wherein the magnetization direction of the free ferromagnetic layer is reversed by a bidirectional spin polarized current running through the magnetoresitive element in a direction perpendicular to the substrate surface, and wherein a magnitude of the spin polarized current is controlled by the bidirectional current switch. Other embodiments are described and shown.

Abstract: A multi-chip push-pull magnetoresistive bridge sensor utilizing magnetic tunnel junctions is disclosed. The magnetoresistive bridge sensor is composed of a two or more magnetic tunnel junction sensor chips placed in a semiconductor package. For each sensing axis parallel to the surface of the semiconductor package, the sensor chips are aligned with their reference directions in opposition to each other. The sensor chips are then interconnected as a push-pull half-bridge or Wheatstone bridge using wire bonding. The chips are wire-bonded to any of various standard semiconductor lead frames and packaged in inexpensive standard semiconductor packages.

Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure comprises a first doped region, a second doped region, a doped strip and a top doped region. The first doped region has a first type conductivity. The second doped region is formed in the first doped region and has a second type conductivity opposite to the first type conductivity. The doped strip is formed in the first doped region and has the second type conductivity. The top doped region is formed in the doped strip and has the first type conductivity. The top doped region has a first sidewall and a second sidewall opposite to the first sidewall. The doped strip is extended beyond the first sidewall or the second sidewall.

Abstract: A spin Hall effect magnetoresistive memory comprises apparatus of a three terminal magnetoresistive memory cell having an MTJ stack, a functional magnetic layer having a magnetization anti-parallel or parallel coupled with a recording layer magnetization in the MTJ stack, and a SHE-metal base layer. The control circuitry coupled through the bit line and the two select transistors to selected ones of the plurality of magnetoresistive memory elements to supply a reading current across the magnetoresistive element stack and two bottom electrodes and to supply a bi-directional spin Hall effect recording current, and accordingly to directly switch the magnetization of the functional magnetic coupling layer and indirectly switching the magnetization of the recording layer through the coupling between the functional magnetic coupling layer and the recording layer.

Abstract: A memory device may comprise a magnetic tunnel junction (MTJ) stack, a bottom electrode (BE) layer, and a contact layer. The MTJ stack may include a free layer, a barrier, and a pinned layer. The BE layer may be coupled to the MTJ stack, and encapsulated in a planarized layer. The BE layer may also have a substantial common axis with the MTJ stack. The contact layer may be embedded in the BE layer, and form an interface between the BE layer and the MTJ stack.

Abstract: A semiconductor device includes a magnetic tunnel junction (MTJ) storage element configured to be disposed in a common interlayer metal dielectric (IMD) layer with a logic element. Cap layers separate the common IMD layer from a top and bottom IMD layer. Top and bottom electrodes are coupled to the MTJ storage element. Metal connections to the electrodes are formed in the top and bottom IMD layers respectively through vias in the separating cap layers. Alternatively, the separating cap layers are recessed and the bottom electrodes are embedded, such that direct contact to metal connections in the bottom IMD layer is established. Metal connections to the top electrode in the common IMD layer are enabled by isolating the metal connections from the MTJ storage elements with metal islands and isolating caps.

Abstract: Structures include a tunneling device disposed over first and second lattice-mismatched semiconductor materials. Process embodiments include forming tunneling devices over lattice-mismatched materials.

Abstract: The present disclosure relates to a magnetic tunnel junction (MTJ) device and its fabricating method. Through forming MTJ through a damascene process, device damage due to the etching process and may be avoided. In some embodiments, a spacer is formed between a first portion and a second portion of the MTJ to prevent the tunnel insulating layer of the MTJ from being damaged in subsequent processes, greatly increasing product yield thereby. In other embodiments, signal quality may be improved and magnetic flux leakage may be reduced through the improved cup-shaped MTJ structure of this invention.

Abstract: A spin-current switchable magnetic memory element includes a plurality of magnetic layers including a perpendicular magnetic anisotropy component, at least one of the plurality of magnetic layers including an alloy of a rare-earth metal and a transition metal, and at least one barrier layer formed adjacent to at least one of the plurality of magnetic layers.