Abstract: An exemplary implementation of the present disclosure includes a testable semiconductor package that includes an active die having interface contacts and dedicated testing contacts. An interposer is situated adjacent a bottom surface of the active die, the interposer providing electrical connections between the interface contacts and a bottom surface of the testable semiconductor package. At least one conductive medium provides electrical connection between at least one of the dedicated testing contacts and a top surface of the testable semiconductor package. The at least one conductive medium can be coupled to a package-top testing connection, which may include a solder ball.

Abstract: Techniques for covering open-cavity integrated-circuit packages in a batch process are disclosed. In an example method, a plurality of open-cavity packages are molded on a single batch leadframe or substrate, each open-cavity package comprising a floor and a plurality of walls arranged around the floor to form a cavity, each of said the walls having a bottom end adjoining said floor and having a top side opposite the bottom end. At least one semiconductor device is attached to the floor and within the cavity of each of the open-cavity packages, and a single flexible membrane is affixed to the top sides of the walls of the plurality of open-cavity packages, so as to substantially cover all of the cavities. The flexible membrane is then severed, between the packages.

Abstract: A semiconductor light receiving device includes a substrate having an incident surface receiving light incident on the semiconductor light receiving device and a principal surface opposite to the incident surface; a first semiconductor layer disposed on the principal surface of the substrate, the first semiconductor layer defining one of a cathode region and an anode region; a light absorbing region disposed on the first semiconductor layer; and a second semiconductor layer disposed on the light absorbing region, the second semiconductor layer defining the other of the cathode region and the anode region and forming a junction with the light absorbing region. The light absorbing region includes a semiconductor layer having a conductivity type opposite to the conductivity type of the first semiconductor layer. The semiconductor layer of the light absorbing region forms a p-n junction with the first semiconductor layer.

Abstract: A camera module includes a lens assembly, an image sensor, and a hybrid lens holder. The image sensor is aligned with the lens assembly to capture images of light incident through the lens assembly on a light sensitive surface of the image sensor. The hybrid lens holder holds the lens assembly a fixed offset from the image sensor. The hybrid lens holder includes a barrel section in which the lens assembly is held as a vertical stack rising above the image sensor and a flange section that rests on the image sensor to maintain the fixed offset from the image sensor. The discrete lens elements are held in place by direct contact with an inner side of the barrel section. The barrel section and the flange section are a single, contiguous housing structure.

Abstract: An image pickup apparatus which is capable of fixing an image pickup device compactly and with high strength. A wiring substrate has an image pickup device mounted thereon. A fixing member is fixed on the image pickup device. The fixing member is provided with an abutment surface that comes into abutment with the image pickup device, an opening from which a light-incident surface of the image pickup device is exposed, and a wall portion that faces a side surface of the image pickup device. An adhesive is filled in a space formed between the side surface of the image pickup device and the wall portion.

Abstract: In one embodiment, a semiconductor device includes first and second semiconductor layers of a first conductivity type above a substrate via a first film, a first electrode above the second semiconductor layer, and a second electrode disposed on a side of the first electrode or an opposite side of the first electrode with respect to the second semiconductor layer. The device further includes a first pad layer connected to the first electrode, a second pad layer connected to the second electrode and including a first upper portion contacting the second electrode, a second upper portion disposed at a level between upper and lower portions of the substrate, and a third upper portion opposed to the lower portion of the substrate, and a third semiconductor layer of a second conductivity type between the second upper portion of the second pad layer and a lower portion of the first film.

Abstract: An electronic device includes a base body, which has a top side and also an underside lying opposite the top side. The base body has connection locations at its underside. An electronic component is arranged at the base body at the top side of the base body. The base body has at least one side area having at least one point of inspection having a first region and second region. The second region is embodied as an indentation in the first region. The first and the second region contain different materials.

Abstract: An optical system has a first relief-type diffraction grating fiducial, or alignment mark, on a transparent surface of a first optical wafer or plate, the grating arranged to deflect light away from an optical path and appear black. The first wafer may have lenses. The first fiducial is aligned to another fiducial on a second wafer having further optical devices as part of system assembly; or the fiducials are aligned to alignment marks or fiducials on an underlying photosensor. Once the optical devices are aligned and the wafers bonded, they are diced to provide aligned optical structures for a completed camera system. Alternatively, an optical wafer is made by aligning a second relief-type diffraction grating fiducial on a first master to a first relief-type diffraction grating fiducial on an optical wafer preform, pressing the first master into a blob to form optical shapes and adhere the blob to the optical wafer preform.

Abstract: An optical sensor element is mounted in a package which includes a glass substrate having a cavity, and a glass lid substrate bonded to the other substrate to close the cavity. The glass substrate with the cavity has metalized wiring patterns on front and rear surfaces thereof, and a through hole filled with metal to form a through-electrode interconnecting the wiring patterns on the front and rear surfaces. A metalized wiring pattern on the rear surface of the glass lid substrate is electrically connected to the wiring pattern on the front surface of the other substrate with an adhesive containing conductive particles. The glass lid substrate is made either of glass having a filter function or glass having a light shielding property with an opening therethrough filled with glass having a filter function.

Abstract: A photo-conductive switch package module having a photo-conductive substrate or wafer with opposing electrode-interface surfaces metalized with first metallic layers formed thereon, and encapsulated with a dielectric encapsulation material such as for example epoxy. The first metallic layers are exposed through the encapsulation via encapsulation concavities which have a known contour profile, such as a Rogowski edge profile. Second metallic layers are then formed to line the concavities and come in contact with the first metal layer, to form profiled and metalized encapsulation concavities which mitigate enhancement points at the edges of electrodes matingly seated in the concavities. One or more optical waveguides may also be bonded to the substrate for coupling light into the photo-conductive wafer, with the encapsulation also encapsulating the waveguides.

Abstract: An image sensor package and image sensor chip capable of being slenderized while enhancing the reliability with respect to physical impact are provided. The image sensor package includes an image sensor chip provided with a pixel domain at a central portion of an upper surface thereof, a substrate disposed at an upper side of the image sensor chip so as to be flip-chip bonded with respect to the image sensor chip, provided with a hole formed at a position corresponding to the pixel domain, and formed of organic material, a printed circuit board at which the substrate provided with the image sensor chip bonded thereto is mounted, and a solder ball configured to electrically connect the substrate to the printed circuit board.

Abstract: The photodiode has a p-type doped region (2) and an n-type doped region (3) in a semiconductor body (1), and a pn junction (4) between the p-type doped region and the n-type doped region. The semiconductor body has a cavity (5) such that the pn junction (4) has a distance (d) of at most 30 ?m from the bottom of the cavity (7).

Abstract: A device includes an image sensing element. The device also includes a Silicon Dioxide (SiO2) layer, located over the image sensing element, exhibiting a first index of refraction. The device further includes a first lens, located over the SiO2 layer, exhibiting a second index of refraction greater than the first index of refraction. The device still further includes a color filter located over the first lens and a second lens located over the color filter.

Abstract: An optical communication module includes an optical semiconductor element. The element includes an optical functional region having a light receiving function or a light emitting function, a first transmission layer transmissive to light emitted from the optical functional region or light received by the optical functional region, and a wiring layer stacked on the first transmission layer and constituting a conduction path to the optical functional region. The communication module also includes a second transmission layer transmissive to the light and disposed to cover the optical semiconductor element, and a first resin member stacked on the second transmission layer. The communication module is formed with a fixing hole for fixing an optical fiber. The fixing hole includes a bottom face provided by the second transmission layer, and an opening formed in an outer surface of the first resin member.

Abstract: A multi-chip package may include an image sensor chip, an image signal processor (ISP) chip, a cover glass, and a package substrate. The ISP chip may be placed on the substrate. The image sensor chip may be placed over the ISP chip. An adhesive film may be formed between the ISP and image sensor chips. A cover glass may be suspended above the image sensor chip. The ISP chip and the image sensor chip may be wire bonded to the substrate. The multi-chip package may be hermetically sealed using a liquid compound or a dam structure. During normal operation, the ISP chip sends control signals to the image sensor chip via a first set of wire bond members and conductive traces in the substrate while the image sensor chip sends output signals to the ISP chip via a second set of wire bond terminals and conductive traces in the substrate.

Abstract: A light-transmissive member has a first principal face, a second principal face, and side faces. The first principal face has a first portion including a center of the first principal face and a second portion between the first portion and the side face sides. The member includes a plurality of altered portions formed between the first principal face and the second principal face so that the plurality of altered portions do not appear on the first principal face, the second principal face, and the side faces. Orthogonal projections of the plurality of altered portions onto the first principal face are included in the second portion.

Abstract: Provided is a method of fabricating a backside illuminated image sensor that includes providing a device substrate having a frontside and a backside, where pixels are formed at the frontside and an interconnect structure is formed over pixels, forming a re-distribution layer (RDL) over the interconnect structure, bonding a first glass substrate to the RDL, thinning and processing the device substrate from the backside, bonding a second glass substrate to the backside, removing the first glass substrate, and reusing the first glass substrate for fabricating another backside-illuminated image sensor.

Abstract: A method for manufacturing a solid-state imaging device. A solid-state image sensor is mounted on the semiconductor package support and electrically connected to first terminals and second terminals by bonding wires. The second terminals to which the bonding wires are connected are sealed with a sealing member. The optically-transparent member is thereafter disposed on the support member and the sealing member. The sealing member is cured to fix the optically transparent member.

Abstract: A protected organic light emitting diode includes an organic light emitting diode structure formed on a substrate, a hermetic barrier layer formed over at least part of the organic light emitting diode structure, and a light extraction layer. The barrier layer may include a glass material such as a tin fluorophosphate glass, a tungsten-doped tin fluorophosphate glass, a chalcogenide glass, a tellurite glass, a borate glass or a phosphate glass. The light extraction layer, which may be formed over the barrier layer, includes a high refractive index matrix material and at least one of scattering particles dispersed throughout the matrix material and a roughened surface.

Abstract: A method for forming an image sensor device is provided. First, a lens is provided and a first sacrificial element is formed thereon. An electromagnetic interference layer is formed on the lens and the first sacrificial element, and the first sacrificial element and electromagnetic interference layer thereon are removed to form an electromagnetic interference pattern having an opening exposing a selected portion of the lens. A second sacrificial element is formed in the opening to cover a center region of the selected portion of the lens. A peripheral region of the selected portion of the lens remains exposed. A light-shielding layer is formed on the electromagnetic interference pattern, second sacrificial element, and peripheral region of the selected portion of the lens. The second sacrificial element and light-shielding pattern are removed to expose the center region of the selected portion of the lens as a light transmitting region.

Abstract: An encapsulating sheet includes a transparent layer in which a concave portion that is dented from the surface inwardly is formed and a phosphor encapsulating layer which fills the concave portion. The transparent layer is formed from a transparent composition containing a first silicone resin composition and the phosphor encapsulating layer is formed from a phosphor encapsulating composition containing a phosphor and a second silicone resin composition.

Abstract: An image sensor assembly includes an image sensor die attached adjacent to a cavity and a lower surface in a preformed package having substantially vertical surfaces extending from the lower surface to an upper surface of the package. The image sensor die provides the light receiving surface for capturing the image. A light absorbing layer is applied to a cover such that the light absorbing layer prevents light from falling on the substantially vertical surfaces of the preformed package without preventing the passage of light that falls on the light receiving surface of the image sensor die. The light absorbing layer includes openings that provide a line-of-sight view of two opposing corners of at least one of the light receiving surface and the image sensor die to facilitate placing the cover over the upper surface of the package in registry with the image sensor die.

Abstract: An image sensor packaging structure with a low transmittance encapsulant is provided. The image sensor packaging structure includes a substrate, a chip, a transparent lid, and the low transmittance encapsulant. The chip is combined with the substrate. The transparent lid is adhered to the chip and cover above a sensitization area of the chip to form an air cavity. The low transmittance encapsulant is formed on the substrate and encapsulates the chip and the transparent lid so as to accomplish the package of the image sensor packaging structure. Due to the feature of prohibiting from light passing through the low transmittance encapsulant, the arrangement of the low transmittance encapsulant can avoid the light from outside interfere the image sensing effect of the image sensor. Therefore, the quality of the image sensing can be ensured.

Abstract: Prepared is an n? type semiconductor substrate 1 having a first principal surface 1a and a second principal surface 1b opposed to each other, and having a p+ type semiconductor region 3 formed on the first principal surface 1a side. At least a region opposed to the p+ type semiconductor region 3 in the second principal surface 1b of the n? type semiconductor substrate 1 is irradiated with a pulsed laser beam to form an irregular asperity 10. After formation of the irregular asperity 10, an accumulation layer 11 with an impurity concentration higher than that of the n? type semiconductor substrate 1 is formed on the second principal surface 1b side of the n type semiconductor substrate 1. After formation of the accumulation layer 11, the n? type semiconductor substrate 1 is subjected to a thermal treatment.

Abstract: Embodiments of the present disclosure are directed to optical packages having a package body that includes a light protection coating on at least one surface of a transparent material. The light protection coating includes one or more openings to allow light to be transmitted to the optical device within the package body. In one embodiment, the light protection coating and the openings allow substantially perpendicular radiation to be directed to the optical device within the package body. In one exemplary embodiment the light protection coating is located on an outer surface of the transparent material. In another embodiment, the light protection coating is located on an inner surface of the transparent material inside of the package body.

Abstract: A packaged sensor assembly and method of forming that includes a first substrate having opposing first and second surfaces and a plurality of conductive elements each extending between the first and second surfaces. A second substrate comprises opposing front and back surfaces, one or more detectors formed on or in the front surface, and a plurality of contact pads formed at the front surface which are electrically coupled to the one or more detectors. A third substrate is mounted to the front surface to define a cavity between the third substrate and the front surface, wherein the third substrate includes a first opening extending from the cavity through the third substrate. The back surface is mounted to the first surface. A plurality of wires each extend between and electrically connecting one of the contact pads and one of the conductive elements.

Abstract: This invention describes a hermetically sealed package which can be implanted in the body. The package comprise of stacked substrates where surface of one substrate hosts biosensors which are exposed to body fluids to monitor concentrations of substances selected from analytes, metabolites, and proteins, and body physiological parameters. The structure protects from body fluids devices that interface with the biosensor electrodes for electronic data processing, powering, and wireless communication. Biosensor electrodes are electrically connected to various electronic, optoelectronic, MEM devices using novel partial silicon vias (PSVs) that prevents leakage of body fluids. Various devices are located on different substrates which are stacked to save surface area. One of the substrate forms the cover plate which permits light for powering as well as sending receiving coded data including the analyte levels.

Abstract: A photoelectric conversion device includes a semiconductor substrate, an insulating layer provided on the semiconductor substrate, an electrode provided on the insulating layer, a photoelectric conversion film provided on the electrode for converting received light to charges, a line connected between the electrode and the semiconductor substrate, a first planar electrode provided in the insulating layer and connected to the electrode, and a second planar electrode provided in the insulating layer between the first planar electrode and the semiconductor substrate.

Abstract: A light transmitting optical fiber shines light at a side edge portion of a hemispherical lens. The light is transmitted along the periphery of the lens to a second side edge portion located opposite the first side edge portion. A light sensitive component detects light at the second edge portion which light resulted from the light transmitted at the first side edge portion. The intensity of light detected at the second side edge portion is indicative of the fluid to which the lens is exposed, and can be evaluated and signaled by a microprocessor.

Abstract: A photovoltaic device includes one or more layers of a photovoltaic stack formed on a substrate by employing a high deposition rate plasma enhanced chemical vapor deposition (HDR PECVD) process. Contacts are formed on the photovoltaic stack to provide a photovoltaic cell. Reduced defect zones are disposed adjacent to contact regions in portions of the photovoltaic cell and are formed by an anneal configured to improve overall performance.

Abstract: It is aimed to provide a photoelectric conversion device having high reliability by reducing cracks occurring in a photoelectric conversion layer. Included is a laminate in which a substrate, a pair of electrodes located on the substrate with a gap therebetween, and a photoelectric conversion layer located in the gap and on the pair of electrodes are laminated, wherein each of the pair of electrodes includes a linear portion extending along the gap and a first projecting portion including a curved tip surface projecting from the linear portion toward the gap, the linear portion and the first projecting portion being alternately arranged along the gap.

Abstract: An embodiment of the invention provides a chip package, which includes: a semiconductor substrate having a device region; a package layer disposed on the semiconductor substrate; a spacing layer disposed between the semiconductor substrate and the package layer and surrounding the device region; and an auxiliary pattern having a hollow pattern formed in the spacing layer, a material pattern located between the spacing layer and the device region, or combinations thereof.

Abstract: A light emitting device package according to embodiments comprises: a package body; a lead frame on the package body; a light emitting device supported by the package body and electrically connected with the lead frame; a filling material surrounding the light emitting device; and a phosphor layer comprising phosphors on the filling material.

Abstract: A wafer-level camera sensor package includes a semiconductor substrate with an optical sensor on a front surface. Through-silicon-vias (TSV) extend through the substrate and provide I/O contact with the sensor from the back side of the substrate. A glass cover is positioned over the front surface, and the cover and substrate are embedded in a molding compound layer (MCL), the front surface of the MCL lying coplanar with the front of the cover, and the back surface lying coplanar with the back of the substrate. Surface-mount devices, electromagnetic shielding, and through-wafer-connectors can be embedded in the MCL. A redistribution layer on the back surface of the MCL includes bottom contact pads for mounting the package, and conductive traces interconnecting the contact pads, TSVs, surface-mount devices, shielding, and through-wafer-connectors. Anisotropic conductive adhesive is positioned on the front of the MCL for physically and electrically attaching a lens array.

Abstract: A substrate section that is at least partially fabricated to include contact elements and materials. The substrate section includes doped regions that have a heavily doped N-type region and a heavily doped P-type region adjacent to one another. An exterior surface of the substrate has a topography that includes a light-transparent region in which light, from a light source, is able to reach a surface of the substrate. An application of light onto the light transparent region is sufficient to cause a voltage potential to form across a junction of the heavily doped regions. The substrate section may further comprise one or more electrical contacts, positioned on the substrate section to conduct current, resulting from the voltage potential created with application of light onto the light transparent region, to a circuit on the semiconductor substrate.

Abstract: The present invention provides a chip module structure for particles protection. The structure includes a substrate. A chip is configured on the substrate, with a sensing area. A holder is disposed on the substrate, wherein the holder has a first rib. A transparent material is disposed on the holder, substantially aligning to the sensing area. A lens holder is disposed on the holder, and a lens is configured on the lens holder, substantially aligning to the transparent material and the sensing area. The lens has a second rib, wherein the second rib is disposed corresponding to the first rib for blocking particles entering into the chip module structure.

Abstract: A semiconductor device includes a carrier and semiconductor die having an optically active region. The semiconductor die is mounted to the carrier to form a separation between the carrier and the semiconductor die. The semiconductor device further includes a passivation layer disposed over a surface of the semiconductor die and a glass layer disposed over a surface of the passivation layer. The passivation layer has a clear portion for passage of light to the optically active region of the semiconductor die. The semiconductor device further includes an encapsulant disposed over the carrier within the separation to form an expansion region around a periphery of the semiconductor die, a first via penetrating the expansion region, glass layer, and passivation layer, a second via penetrating the glass layer and passivation layer to expose a contact pad on the semiconductor die, and a conductive material filling the first and second vias.

Abstract: A photoelectric conversion device is provided which is capable of improving the light condensation efficiency without substantially decreasing the sensitivity. The photoelectric conversion device has a first pattern provided above an element isolation region formed between adjacent two photoelectric conversion elements, a second pattern provided above the element isolation region and above the first pattern, and microlenses provided above the photoelectric conversion elements with the first and the second patterns provided therebetween. The photoelectric conversion device further has convex-shaped interlayer lenses in optical paths between the photoelectric conversion elements and the microlenses, the peak of each convex shape projecting in the direction from the electro-optical element to the microlens.

Abstract: The present invention provides a holder on chip module structure including a substrate. A chip is configured on the substrate, with a sensing area. A holder is disposed on the substrate, wherein a portion of the holder is directly contacted to the chip to reduce the tilt between the chip and the holder. A transparent material is disposed on the holder, substantially aligning to the sensing area. A lens holder is disposed on the holder, and a lens is configured on the lens holder, substantially aligning to the transparent material and the sensing area.

Abstract: A package is made of a transparent substrate having an interferometric modulator and a back plate. A non-hermetic seal joins the back plate to the substrate to form a package, and a desiccant resides inside the package. A method of packaging an interferometric modulator includes providing a transparent substrate and manufacturing an interferometric modulator array on a backside of the substrate. A back plate includes a curved portion relative to the substrate. The curved portion is substantially throughout the back plate. The back plate is sealed to the backside of the substrate with a back seal in ambient conditions, thereby forming a package.

Abstract: A semiconductor package includes a substrate, an image sensor chip mounted on the substrate, a holder disposed on the substrate and surrounding the image sensor chip, and the holder has an inner surface facing the image sensor chip and an outer surface opposite to the inner surface. The semiconductor package further includes a transparent cover combined with the holder, and the transparent cover is spaced apart from and faces the substrate. The holder includes: a hole penetrating the holder from the inner surface to the outer surface. In addition, the semiconductor package further includes a first stopper disposed in the hole and a second stopper disposed at a position corresponding to the hole on the outer surface of the holder.

Abstract: Certain example embodiments relate to techniques for creating improved photovoltaic (PV) modules. In certain example embodiments and first and second glass substrate are provided. A PV array is provided between the first and second glass substrates. The first and second substrates are laminated together with the PV array between the glass substrates. In certain example embodiments the PV module is dimensioned to be similar to an existing roof system (e.g., a sunroof) in a vehicle. In certain example embodiments, holes are provided in a PV module sandwiched between two substrates, the holes being shaped and arranged within the PV module so as to allow light transmission into the vehicle at desired level while still being substantially filled by the laminate or adhesive material used to secure the PV module to the two surrounding substrates.

Abstract: A semiconductor package includes a wiring board, an electronic component mounted on the wiring board, and an enclosing frame arranged on an upper surface of the electronic component. The enclosing frame includes a basal portion, which has the form of a closed frame and extends along the upper surface of the electronic component, and an adhesion portion, which is wider than the basal portion and is arranged on the upper surface of the basal portion. A cap is adhered to an upper surface of the adhesion portion. A molding resin contacts a lower surface of the adhesion portion and seals the electronic component and the wiring board that are exposed from the enclosing frame.

Abstract: An optoelectronic semiconductor chip includes a semiconductor layer stack consisting of a nitride compound semiconductor material on a carrier substrate, wherein the carrier substrate includes a surface containing silicon. The semiconductor layer stack includes a recess extending from a back of the semiconductor layer stack through an active layer to a layer of a first conductivity type. The layer of the first conductivity type connects electrically to a first electrical connection layer which covers at least a portion of the back through the recess. The layer of a second conductivity type connects electrically to a second electrical connection layer arranged at the back.

Abstract: A wafer-level bonding method for fabricating wafer level camera lenses is disclosed. The method includes: providing a lens wafer including lenses arranged in an array and a sensor wafer including sensors arranged in an array; measuring and analyzing an FFL of each lens to obtain a corresponding FFL compensation value for each lens; forming a thin transparent film (TTF) on each sensor of the sensor wafer, and the thickness of TTF is determined by the FFL compensation value of the corresponding lens; aligning and bonding the lens wafer with the sensor wafer having TTFs formed thereon. Since the focal length of each lens is adjusted to compensate the FFL of the lens by adding a TTF of transparent optical material with an index of refraction that is similar to the index of refraction of the sensor cover glass, the FFL variation of each camera lens can be reduced.

Abstract: An implantable, miniaturized platform and a method for fabricating the platform is provided, where the e platform includes a top cover plate and a bottom substrate, top cover plate including an epitaxial, Si-encased substrate and is configured to include monolithically grown devices and device contact pads, the Si-encased substrate cover plate including a gold perimeter fence deposited on its Si covered outer rim and wherein the bottom substrate is constructed of Si and includes a plurality of partial-Si-vias (PSVs), electronic integrated circuits, device pads, pad interconnects and a gold perimeter fence, wherein the device pads are aligned with a respective device contact pad on the top cover plate and includes gold bumps having a predetermined height, the top cover plate and the bottom substrate being flip-chip bonded to provide a perimeter seal and to ensure electrical connectivity between the plurality of internal devices and at least one external component.

Abstract: A self-powered circuit package includes a substrate and an integrated circuit (IC). The IC is mounted on a surface of the substrate. An electrical interconnector electrically couples the IC to the substrate. A solar cell is provided having opposing first and second main surfaces. A portion of the first main surface of the solar cell is configured to receive light from an external source. The solar cell converts energy of the received light into electrical power. The solar cell is disposed above the IC and electrically connected to the IC by way of the substrate to supply the generated power to the IC. A clear mold compound encapsulates a surface of the substrate, the IC, the electrical interconnector, and the solar cell.

Abstract: An electronic switching component (1) with gallium arsenide-based field effect transistors has its own housing (2) with at least one transparent section (3). An electronic microwave circuit (10) has at least one electronic switching component (1) with gallium arsenide-based field effect transistors and its own housing (2) with at least one transparent section (3). The at least one electronic switching component (1) can be illuminated by means of at least one light source (6, 11).

Abstract: A semiconductor device manufacturing method is disclosed. The method includes etching a silicon on insulator (SOI) from its surface (i.e., semiconductor substrate layer) to form a first trench and a second trench. The first trench extends through the SOI substrate and reaches an electrode pad. The second trench terminates in the semiconductor substrate layer. The manufacturing method also includes forming an insulation film that covers the surface of the semiconductor substrate layer as well as the side walls and bottoms of the first and second trenches. The manufacturing method also includes removing the insulation film from the bottoms of the first and second trenches to expose the electrode pad from the first trench bottom and to expose the semiconductor substrate layer from the second trench bottom.

Abstract: A semiconductor chip is specified that has a contact layer that is not optimum for many common applications. For example, the contact layer is too thin to tolerate an operating current intended for the semiconductor chip without considerable degradation. Also specified is an optoelectronic component in which the semiconductor chip can be integrated so that the suboptimal quality of the contact layer is compensated for. In the component the semiconductor chip is applied to a carrier body so that the contact layer is arranged on a side of the semiconductor body that is remote from the carrier body. The semiconductor chip and the carrier body are at least partly covered with an electrically isolating layer, and an electrical conductor applied to the isolating layer extends laterally away from the semiconductor body and contacts at least a partial surface of the contact layer. In addition, an advantageous process for producing the component is specified.