With Window Means Patents (Class 257/434)
  • Patent number: 8778704
    Abstract: A self-powered integrated circuit (IC) device includes a lead frame and a solar cell having first and second main surfaces. The solar cell is mounted on a surface of the lead frame. An IC chip is also provided. A first electrical interconnector electrically couples the IC chip to the lead frame and a second electrical interconnector electrically couples the solar cell to the IC chip. A portion of the first main surface of the solar cell is configured to receive light from an external source. The solar cell converts energy of the received light into electrical power that is supplied to the IC chip. A mold compound encapsulates the IC chip, the first and second electrical interconnectors, and at least a portion of the solar cell.
    Type: Grant
    Filed: March 24, 2013
    Date of Patent: July 15, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Teck Beng Lau, Wai Yew Lo, Chin Teck Siong
  • Patent number: 8779567
    Abstract: In a semiconductor device including a semiconductor element and a wiring substrate on which the semiconductor element is mounted. The wiring substrate includes an insulating substrate and conductive wiring formed in the insulating substrate and electrically connected to the semiconductor element. The conductive wiring includes an underlying layer formed on the insulating substrate, a main conductive layer formed on the underlying layer, and an electrode layer covering side surfaces of the underlying layer and side surfaces and an upper surface of the main conductive layer. The underlying layer includes an adhesion layer being formed in contact with the insulating substrate and containing an alloy of Ti.
    Type: Grant
    Filed: May 23, 2013
    Date of Patent: July 15, 2014
    Assignee: Nichia Corporation
    Inventors: Takuya Noichi, Yuichi Okada
  • Patent number: 8772819
    Abstract: A multi-layer array type LED device is provided, which includes a substrate, an encapsulation body, two lead frames, a plurality of LED dices, and a set of optical lens. The outer circumferential edge and the upper and lower periphery of the substrate are completely encapsulated by the encapsulation body so that the multi-layer array type LED device can be tightly packaged. In the present invention, a fluorescent layer is disposed between an optical grease layer and a silica gel protection layer, and thereby the fluorescent layer is protected, and is capable of preventing moisture from permeating therein. On the other hand, in the present invention, the reflection coefficient of the optical grease layer is at least larger than a certain value so that the probability of the light emitted out of the optical chamber can be increased.
    Type: Grant
    Filed: January 19, 2012
    Date of Patent: July 8, 2014
    Assignee: Gem Weltronics TWN Corporation
    Inventors: Jon-Fwu Hwu, Yung-Fu Wu, Kui-Chiang Liu
  • Patent number: 8759988
    Abstract: A method for producing semiconductor components and a component obtainable by such a method is disclosed. The method comprises the following steps: fixing a conductive film on a carrier; adhesively bonding semiconductor chips onto the conductive film using an adhesive layer, wherein active surfaces of the semiconductor chips, the active surfaces having connection contacts, are situated on that side of the chips which faces the film; overmolding the chips adhesively bonded onto the conductive film with a molding compound; and releasing the conductive film with the overmolded chips from the carrier. In this case, the adhesive layer is structured in such a way that at least connection contacts of the semiconductor chips are free of the adhesive layer and are kept free of the molding compound.
    Type: Grant
    Filed: May 27, 2011
    Date of Patent: June 24, 2014
    Assignee: Robert Bosch GmbH
    Inventors: Mathias Bruendel, Frieder Haag, Ulrike Scholz
  • Patent number: 8754434
    Abstract: A protected organic light emitting diode includes an organic light emitting diode structure formed on a substrate, a hermetic barrier layer formed over at least part of the organic light emitting diode structure, and a light extraction layer. The barrier layer may include a glass material such as a tin fluorophosphate glass, a tungsten-doped tin fluorophosphate glass, a chalcogenide glass, a tellurite glass, a borate glass or a phosphate glass. The light extraction layer, which may be formed over the barrier layer, includes a high refractive index matrix material and at least one of scattering particles dispersed throughout the matrix material and a roughened surface.
    Type: Grant
    Filed: January 28, 2013
    Date of Patent: June 17, 2014
    Assignee: Corning Incorporated
    Inventors: Jacques Gollier, Glenn Eric Kohnke, Mark Alejandro Quesada, James Andrew West
  • Patent number: 8754494
    Abstract: According to one embodiment, a solid-state image sensing device includes a semiconductor substrate on which a plurality of pixels are arranged, a transparent substrate including a first through via provided in an opening formed in advance to extend through, an adhesive including a second through via connected to the first through via and configured to bond the semiconductor substrate and the transparent substrate while exposing the pixels, and an imaging lens unit arranged on the transparent substrate.
    Type: Grant
    Filed: September 16, 2011
    Date of Patent: June 17, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Atsuko Kawasaki, Kenichiro Hagiwara, Hirokazu Sekine
  • Publication number: 20140159185
    Abstract: An image sensor package including a PCB including bonding areas, an image sensor including bonding pads on edge portions thereof on the PCB, bonding wires connecting the bonding pads with the bonding areas, an insulating adhesion film attaching the bonding wires to the bonding pads on the edge portions of the image sensor, a heat spread pattern spaced apart from the bonding wires and the image sensor on the insulating adhesion film, a supporting holder spaced apart from the edge portions of the image sensor, encloses the image sensor, contacts a top surface of the heat spread pattern and the PCB, and includes a supporting portion at an upper portion thereof, and a transparent cover covering the image sensor on the supporting portion of the supporting holder and spaced apart from the top surface of the image sensor is provided.
    Type: Application
    Filed: December 6, 2013
    Publication date: June 12, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Hee-Jung HWANG
  • Patent number: 8749009
    Abstract: Active or functional additives are embedded into surfaces of host materials for use as components in a variety of electronic or optoelectronic devices, including solar devices, smart windows, displays, and so forth. Resulting surface-embedded device components provide improved performance, as well as cost benefits arising from their compositions and manufacturing processes.
    Type: Grant
    Filed: August 8, 2011
    Date of Patent: June 10, 2014
    Assignee: Innova Dynamics, Inc.
    Inventors: Michael Eugene Young, Arjun Daniel Srinivas, Matthew R. Robinson, Alexander Chow Mittal
  • Patent number: 8749025
    Abstract: A semiconductor chip is specified that has a contact layer that is not optimum for many common applications. For example, the contact layer is too thin to tolerate an operating current intended for the semiconductor chip without considerable degradation. Also specified is an optoelectronic component in which the semiconductor chip can be integrated so that the suboptimal quality of the contact layer is compensated for. In the component the semiconductor chip is applied to a carrier body so that the contact layer is arranged on a side of the semiconductor body that is remote from the carrier body. The semiconductor chip and the carrier body are at least partly covered with an electrically isolating layer, and an electrical conductor applied to the isolating layer extends laterally away from the semiconductor body and contacts at least a partial surface of the contact layer. In addition, an advantageous process for producing the component is specified.
    Type: Grant
    Filed: September 24, 2008
    Date of Patent: June 10, 2014
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Elmar Baur, Walter Wegleiter
  • Patent number: 8742560
    Abstract: Optical structures having an array of protuberances between two layers having different refractive indices are provided. The array of protuberances has vertical and lateral dimensions less than the wavelength range of lights detectable by a photodiode of a CMOS image sensor. The array of protuberances provides high transmission of light with little reflection. The array of protuberances may be provided over a photodiode, in a back-end-of-line interconnect structure, over a lens for a photodiode, on a backside of a photodiode, or on a window of a chip package.
    Type: Grant
    Filed: February 22, 2013
    Date of Patent: June 3, 2014
    Assignee: International Business Machines Corporation
    Inventors: James W. Adkisson, John J. Ellis-Monaghan, Jeffrey P. Gambino, Charles F. Musante
  • Patent number: 8742559
    Abstract: To suppress the reduction in reliability of a resin-sealed semiconductor device. A first cap (member) and a second cap (member) with a cavity (space formation portion) are superimposed and bonded together to form a sealed space. A semiconductor including a sensor chip (semiconductor chip) and wires inside the space is manufactured in the following way. In a sealing step of sealing a joint part between the caps, a sealing member is formed of resin such that an entirety of an upper surface of the second cap and an entirety of a lower surface of the first cap are respectively exposed. Thus, in the sealing step, the pressure acting in the direction of crushing the second cap can be decreased.
    Type: Grant
    Filed: March 14, 2012
    Date of Patent: June 3, 2014
    Assignee: Renesas Electronics Corporation
    Inventor: Noriyuki Takahashi
  • Patent number: 8735210
    Abstract: A method for forming a photovoltaic device includes depositing one or more layers of a photovoltaic stack on a substrate by employing a high deposition rate plasma enhanced chemical vapor deposition (HDR PECVD) process. Contacts are formed on the photovoltaic stack to provide a photovoltaic cell. Annealing is performed on the photovoltaic cell at a temperature and duration configured to improve overall performance.
    Type: Grant
    Filed: June 28, 2012
    Date of Patent: May 27, 2014
    Assignee: International Business Machines Corporation
    Inventors: Keith E. Fogel, Augustin J. Hong, Jeehwan Kim, Devendra K. Sadana
  • Patent number: 8723283
    Abstract: An optical module includes a stem, an optical element, data signal lead pins, a printed circuit board, and a post portion. The optical element is mounted on one surface of the stem. The data signal lead pins are connected to the optical element, and protrudes through the other surface of the stem. The printed circuit board has one surface on which data signal transmission lines for contact with the data signal lead pins are formed and the other surface on a part of which a stiffener is formed to protrude. The post portion protrudes from the other surface of the stem, supports the printed circuit board while in close contact with the stiffener such that the data signal lead pins can contact the data signal transmission lines while being disposed linearly above the data signal transmission lines, and includes a coupling portion to be coupled with the stiffener.
    Type: Grant
    Filed: January 30, 2012
    Date of Patent: May 13, 2014
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sae-Kyoung Kang, Joon-Ki Lee, Joon-Young Huh
  • Patent number: 8716824
    Abstract: An optical article and method of making the same are provided. The optical article has optical multi-aperture operation. The optical article has one or more electrically conductive and selectively passivated patterns.
    Type: Grant
    Filed: January 28, 2009
    Date of Patent: May 6, 2014
    Assignee: Rohm and Haas Electronic Materials LLC
    Inventors: Jitendra S. Goela, Michael A. Pickering, Neil D. Brown, Angelo Chirafisi, Mark Lefebvre, Jamie L. Triba
  • Patent number: 8698064
    Abstract: A solid-state imaging device according to the present invention includes pixels which are arranged two-dimensionally and each of which includes: a light absorbing layer that converts light into signal charges; a signal read circuit to read out the signal charges, the signal read circuit being formed on a side opposite to a light incident plane side of the light absorbing layer; a metal layer that is formed on the light incident plane side of the light absorbing layer, the metal layer having an aperture to transmit, into the light absorbing layer, light of a wavelength range depending on a shape of the aperture, a driving circuit that applies a voltage to the metal layer to generate, in the light absorbing layer, a potential gradient to collect the signal charges.
    Type: Grant
    Filed: November 20, 2012
    Date of Patent: April 15, 2014
    Assignee: Panasonic Corporation
    Inventors: Yusuke Otake, Yutaka Hirose, Mitsuyoshi Mori, Toru Okino, Yoshihisa Kato
  • Patent number: 8686428
    Abstract: A device with an external surface, the device including: a substrate including first mono-crystal transistors; a second layer including second mono-crystal transistors, the second mono-crystal transistors overlaying the first mono-crystal transistors; and a plurality of thermal conduction paths from a plurality of the second layer locations to the external surface, wherein at least one of the thermal conduction paths includes an electrically nonconductive contact.
    Type: Grant
    Filed: November 16, 2012
    Date of Patent: April 1, 2014
    Assignee: Monolithic 3D Inc.
    Inventors: Deepak Sekar, Zvi Or-Bach, Brian Cronquist
  • Patent number: 8686401
    Abstract: Provided is a compact ultraviolet irradiation apparatus which is capable of emitting ultraviolet radiation with high efficiency. This ultraviolet irradiation apparatus includes, in a vessel, a semiconductor multi-layered film element and an electron beam irradiation source for irradiating the semiconductor multi-layered film element with an electron beam, the vessel being hermetically sealed to have a negative internal pressure and having an ultraviolet transmitting window. Furthermore, the semiconductor multi-layered film element includes an active layer having a single quantum well structure or a multi quantum well structure of InxAlyGa1-x-yN (0?x<1, 0<y?1, x+y?1), and the active layer of the semiconductor multi-layered film element is irradiated with an electron beam from the electron beam irradiation source. This allows the semiconductor multi-layered film element to emit ultraviolet radiation out of the vessel through the ultraviolet transmitting window.
    Type: Grant
    Filed: May 30, 2011
    Date of Patent: April 1, 2014
    Assignees: Kyoto University, Ushio Denki Kabushiki Kaisha
    Inventors: Yoichi Kawakami, Mitsuru Funato, Takao Oto, Ryan Ganipan Banal, Masanori Yamaguchi, Ken Kataoka, Hiroshige Hata
  • Patent number: 8686526
    Abstract: The invention is directed to providing a semiconductor device receiving a blue-violet laser, of which the reliability and yield are enhanced. A device element converting a blue-violet laser into an electric signal is formed on a front surface of a semiconductor substrate. An optically transparent substrate is attached to the front surface of the semiconductor substrate with an adhesive layer being interposed therebetween. The adhesive layer contains transparent silicone. Since the front surface of the device element is covered by the optically transparent substrate, foreign substances are prevented from adhering to the front surface of the device element. Furthermore, the adhesive layer is covered by the optically transparent substrate. This prevents the adhesive layer from being exposed to outside air, thereby preventing the degradation of the adhesive layer 6 due to a blue-violet laser.
    Type: Grant
    Filed: November 19, 2007
    Date of Patent: April 1, 2014
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Katsuhiko Kitagawa, Hiroyuki Shinogi, Shinzo Ishibe, Hiroshi Yamada
  • Patent number: 8680636
    Abstract: A solid-state imaging apparatus is provided. A solid-state imaging device chip is enclosed in a package having an optically transparent member. An adhesive layer is formed on an internal surface of the package, and a penetration hole is formed in a bottom part of the package to communicate with an open space in the package.
    Type: Grant
    Filed: March 19, 2008
    Date of Patent: March 25, 2014
    Assignee: Sony Corporation
    Inventors: Atsushi Yajima, Tokiko Katayama
  • Patent number: 8669631
    Abstract: A solid state imaging device according to one embodiment of the present invention includes a substrate with a solid state imaging element, a first impurity layer, a plurality of external electrodes, and a translucent substrate. The first impurity layer is formed on a back surface side of the substrate, and forms a pn junction with the substrate. The plurality of external electrodes is formed on the back surface of the substrate and is electrically connected to the solid state imaging element. The translucent substrate is fixed to the substrate.
    Type: Grant
    Filed: March 16, 2011
    Date of Patent: March 11, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yoshiteru Koseki
  • Patent number: 8653728
    Abstract: A photoluminescent device includes a substantially cylindrical housing having an optically transparent upper surface, the housing defining an interior cavity, a phosphorescent material being disposed within the interior cavity proximate the optically transparent upper surface, whereby the housing of the device has an elongate body portion configured for insertion into a bore or hole in a substrate with the optically transparent upper surface positioned proximate to the surface of the substrate.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: February 18, 2014
    Inventor: John L. Simme
  • Patent number: 8637949
    Abstract: A method includes forming a wafer assembly of a semiconductor wafer and a light transmissible optical wafer which are fixed to each other, cutting the wafer assembly at a spacer unit to individually divide the wafer assembly into a plurality of camera modules each comprising a sensor chip and a lens chip bonded to each other by a spacer, forming a light shieldable mask film to determine a lens aperture of each of plural lens units on the light transmissible optical wafer; forming a groove in the light transmissible optical wafer that reaches the spacer unit and filling the groove with a light shieldable resin to form a light shieldable resin layer; and cutting the light shieldable resin layer at a width less than the groove to individually divide the camera modules in each of which the light shieldable resin layer is provided at a side of the lens chip.
    Type: Grant
    Filed: November 10, 2009
    Date of Patent: January 28, 2014
    Assignee: Lapis Semiconductor Co., Ltd.
    Inventor: Masahiro Uekawa
  • Patent number: 8633051
    Abstract: An object is to prevent a reduction of definition (or resolution) (a peripheral blur) caused when reflected light enters a photoelectric conversion element arranged at a periphery of a photoelectric conversion element arranged at a predetermined address. A semiconductor device is manufactured through the steps of: forming a structure having a first light-transmitting substrate, a plurality of photoelectric conversion elements over the first light-transmitting substrate, a second light-transmitting substrate provided so as to face the plurality of photoelectric conversion elements, a sealant arranged so as to bond the first light-transmitting substrate and the second light-transmitting substrate and surround the plurality of photoelectric conversion elements; and thinning the first light-transmitting substrate by wet etching.
    Type: Grant
    Filed: August 19, 2010
    Date of Patent: January 21, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshiyuki Kurokawa, Takayuki Ikeda, Munehiro Kozuma, Hikaru Tamura, Kazuko Yamawaki, Takashi Hamada, Shunpei Yamazaki
  • Patent number: 8624383
    Abstract: The invention provides an integrated circuit package and method of fabrication thereof. The integrated circuit package comprises an integrated circuit chip having a photosensitive device thereon; a bonding pad formed on an upper surface of the integrated circuit chip and electrically connected to the photosensitive device; a barrier formed between the bonding pad and the photosensitive device; and a conductive layer formed on a sidewall of the integrated circuit chip and electrically connected to the bonding pad. The barrier layer blocks overflow of the adhesive layer into a region, on which the photosensitive device is formed, to improve yield for fabricating the integrated circuit package.
    Type: Grant
    Filed: July 14, 2010
    Date of Patent: January 7, 2014
    Inventors: Yu-Lin Yen, Chen-Mei Fan
  • Patent number: 8624344
    Abstract: A solid state imaging device according to an embodiment includes a light sensing part which conducts photoelectric conversion on incident light. The solid state imaging device includes a ferroelectric layer including an organic compound on a surface of the light sensing part on which light is incident. The solid state imaging device includes a transparent electrode formed on the ferroelectric layer.
    Type: Grant
    Filed: January 31, 2011
    Date of Patent: January 7, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yusuke Arayashiki, Kazuaki Nakajima
  • Patent number: 8624371
    Abstract: Packaging assemblies for optically interactive devices and methods of forming the packaging assemblies in an efficient manner that eliminates or reduces the occurrence of process contaminants. In a first embodiment, a transparent cover is attached to a wafer of semiconductor material containing a plurality of optically interactive devices. The wafer is singulated, and the optically interactive devices are mounted on an interposer and electrically connected with wire bonds. In a second embodiment, the optically interactive devices are electrically connected to the interposer with back side conductive elements. In a third embodiment, the optically interactive devices are mounted to the interposer prior to attaching a transparent cover. A layer of encapsulant material is formed over the interposer, and the interposer and encapsulant material are cut to provide individual packaging assemblies. In a fourth embodiment, the optically interactive devices are mounted in a preformed leadless chip carrier.
    Type: Grant
    Filed: April 19, 2013
    Date of Patent: January 7, 2014
    Assignee: Round Rock Research, LLC
    Inventors: Todd O. Bolken, Chad A. Cobbley
  • Publication number: 20130334644
    Abstract: A substrate section that is at least partially fabricated to include contact elements and materials. The substrate section includes doped regions that have a heavily doped N-type region and a heavily doped P-type region adjacent to one another. An exterior surface of the substrate has a topography that includes a light-transparent region in which light, from a light source, is able to reach a surface of the substrate. An application of light onto the light transparent region is sufficient to cause a voltage potential to form across a junction of the heavily doped regions. The substrate section may further comprise one or more electrical contacts, positioned on the substrate section to conduct current, resulting from the voltage potential created with application of light onto the light transparent region, to a circuit on the semiconductor substrate.
    Type: Application
    Filed: February 28, 2013
    Publication date: December 19, 2013
    Applicant: TAU-METRIX, INC.
    Inventors: Gary Steinbrueck, James S. Vickers, Mario M. Pelella, Majid Aghababazadeh, Nader Pakdaman
  • Patent number: 8610255
    Abstract: A light emitting device package according to embodiments comprises: a package body; a lead frame on the package body; a light emitting device supported by the package body and electrically connected with the lead frame; a filling material surrounding the light emitting device; and a phosphor layer comprising phosphors on the filling material.
    Type: Grant
    Filed: July 4, 2008
    Date of Patent: December 17, 2013
    Assignee: LG Innotek Co., Ltd.
    Inventors: Yu Ho Won, Geun Ho Kim
  • Patent number: 8604599
    Abstract: A semiconductor housing is provided that includes a metal support and a semiconductor body, a bottom side thereof being connected to the metal support. The semiconductor body has metal surfaces that are connected to pins by bond wires and a plastic compound, which completely surrounds the bond wires and partially surrounds the semiconductor body. The plastic compound has an opening on the top side of the semiconductor body, and a barrier is formed on the top side of the semiconductor body. The barrier has a top area and a base area spaced from the edges of the semiconductor body and an internal clearance of the barrier determines a size of the opening. Whereby, a portion of the plastic compound has a height greater than the barrier, and a fixing layer is formed between the base area of the barrier and the top side of the semiconductor body.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: December 10, 2013
    Assignee: Micronas GmbH
    Inventors: Tobias Kolleth, Pascal Stumpf, Christian Joos
  • Publication number: 20130320476
    Abstract: An implantable, miniaturized platform and a method for fabricating the platform is provided, where the e platform includes a top cover plate and a bottom substrate, top cover plate including an epitaxial, Si-encased substrate and is configured to include monolithically grown devices and device contact pads, the Si-encased substrate cover plate including a gold perimeter fence deposited on its Si covered outer rim and wherein the bottom substrate is constructed of Si and includes a plurality of partial-Si-vias (PSVs), electronic integrated circuits, device pads, pad interconnects and a gold perimeter fence, wherein the device pads are aligned with a respective device contact pad on the top cover plate and includes gold bumps having a predetermined height, the top cover plate and the bottom substrate being flip-chip bonded to provide a perimeter seal and to ensure electrical connectivity between the plurality of internal devices and at least one external component.
    Type: Application
    Filed: March 4, 2013
    Publication date: December 5, 2013
    Applicant: Optoelectronics Systems Consulting, Inc.
    Inventor: Optoelectronics Systems Consulting, Inc.
  • Publication number: 20130313672
    Abstract: A window structure includes a window, a design layer structure on the window, a light shield layer on the design layer structure, and a light absorption layer. The design layer structure includes a first hole exposing a portion of the window. The light shield layer includes a second hole in fluid communication with the first hole. The light absorption layer covers at least a portion of the design layer structure exposed by the first and second holes, and includes a third hole exposing a portion of the window. By including the light absorption layer of a gray or black color to cover exposed portions of the design layer structure, a vignette about an image caused by the design layer structure is prevented.
    Type: Application
    Filed: March 12, 2013
    Publication date: November 28, 2013
    Inventor: Myung-An Min
  • Patent number: 8592932
    Abstract: Apparatus and methods are provided for high density packaging of semiconductor chips using silicon space transformer chip level package structures, which allow high density chip interconnection and/or integration of multiple chips or chip stacks high I/O interconnection and heterogeneous chip or function integration.
    Type: Grant
    Filed: March 26, 2012
    Date of Patent: November 26, 2013
    Assignee: International Business Machines Corporation
    Inventors: Paul S. Andry, John M. Cotte, John U. Knickerbocker, Cornelia K. Tsang
  • Patent number: 8592855
    Abstract: Disclosed is a light emitting device package. The light emitting device package includes a substrate comprising a recess, a light emitting chip on the substrate and a first conductive layer electrically connected to the light emitting chip. And the first conductive layer includes at least one metal layer electrically connected to the light emitting chip on an outer circumference of the substrate.
    Type: Grant
    Filed: January 10, 2012
    Date of Patent: November 26, 2013
    Assignee: LG Innotek Co., Ltd.
    Inventors: Geun Ho Kim, Yu Ho Won
  • Patent number: 8587012
    Abstract: The present disclosure provides a light emitting diode (LED) package, which includes a first substrate with electrodes disposed on a top thereof and a second substrate with an LED chip disposed on a top thereof. The LED chip is connected with the electrodes via wires. A first package layer is disposed on the top of the first substrate to cover the wires and electrodes. A fluorescent layer is disposed on the top of the second substrate to cover the LED chip. The present disclosure also provides a mold and a method of manufacturing the LED package.
    Type: Grant
    Filed: November 6, 2012
    Date of Patent: November 19, 2013
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Shiun-Wei Chan, Chih-Hsun Ke
  • Patent number: 8587107
    Abstract: A hermetically sealed integrated circuit package that includes a cavity housing a semiconductor die, whereby the cavity is pressurized during assembly and when formed. The invention prevents the stress on a package created when the package is subject to high temperatures at atmospheric pressure and then cooled from reducing the performance of the die at high voltages. By packaging a die at a high pressure, such as up to 50 PSIG, in an atmosphere with an inert gas, and providing a large pressure in the completed package, the dies are significantly less likely to arc at higher voltages, allowing the realization of single die packages operable up to at least 1200 volts. Moreover, the present invention is configured to employ brazed elements compatible with Silicon Carbide dies which can be processed at higher temperatures.
    Type: Grant
    Filed: February 9, 2010
    Date of Patent: November 19, 2013
    Assignee: Microsemi Corporation
    Inventor: Tracy Autry
  • Publication number: 20130285185
    Abstract: An image sensor package and image sensor chip capable of being slenderized while enhancing the reliability with respect to physical impact are provided. The image sensor package includes an image sensor chip provided with a pixel domain at a central portion of an upper surface thereof, a substrate disposed at an upper side of the image sensor chip so as to be flip-chip bonded with respect to the image sensor chip, provided with a hole formed at a position corresponding to the pixel domain, and formed of organic material, a printed circuit board at which the substrate provided with the image sensor chip bonded thereto is mounted, and a solder ball configured to electrically connect the substrate to the printed circuit board.
    Type: Application
    Filed: April 25, 2013
    Publication date: October 31, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Tae Sang PARK, Hyo Young Shin
  • Publication number: 20130277788
    Abstract: There is provided an imaging unit including a light-transmissive member through which photographing light brought in via an optical system is transmitted, an image sensor that is disposed facing the light-transmissive member and on which photographing light that has been transmitted through the light-transmissive member is incident so as to convert the incident photographing light into electrical signals, and a holding member that has a disposition hole and holds the light-transmissive member. The light-transmissive member has an outer circumferential face to which an adhesive is applied so as to be attached to and held by the holding member in a state of being disposed in the disposition hole, and the adhesive has light absorptivity and a refractive index that is substantially identical to a refractive index of the light-transmissive member.
    Type: Application
    Filed: March 7, 2013
    Publication date: October 24, 2013
    Applicant: Sony Corporation
    Inventor: Yasuhide Nihei
  • Patent number: 8564011
    Abstract: The present invention discloses a light-emitting diode (LED) package structure, which includes a housing, a first electrode plate, a second electrode plate, a light-emitting diode, and a voltage regulation diode. The housing has a top surface forming a cavity, and the cavity contains therein a wall that divides the cavity into a light emission section and a voltage regulation section. By separately arranging the light-emitting diode and the voltage regulation diode in two different sections of the light emission section and the voltage regulation section, the present invention prevents the voltage regulation diode from affecting light flux of the light-emitting diode by absorbing light, thereby enhancing overall lighting performance of the LED package structure.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: October 22, 2013
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd.
    Inventors: Kuangyao Chang, Weiwei Zheng
  • Patent number: 8558938
    Abstract: Disclosed is a camera module and a manufacturing method thereof, wherein the camera module includes a PCB (Printed Circuit Board) mounted with an image sensor, a holder fixed at the PCB, with one side formed with an optical transmission hole and the other side being opened, one or more lenses to be inserted into the holder, and a fixture ring to be inserted into the holder and fixed at an image sensor for fixing one or more lenses, whereby occurrence of defect caused by introduction of foreign objects during assembly of camera module can be minimized, and structure of camera module can be simplified to facilitate the assembling process and to reduce the assembling time.
    Type: Grant
    Filed: September 28, 2010
    Date of Patent: October 15, 2013
    Assignee: LG Innotek Co., Ltd.
    Inventor: Younback Jung
  • Patent number: 8541809
    Abstract: A light-emitting surface element includes a connection device, a light-generating element having at least two electrical connections electrically conductively connected to assigned connection lines on the connection device, and at least one planar light-guiding element formed by injection-molding in a manner at least partly embedding an arrangement composed of connection device and light-generating element in the planar light-guiding element.
    Type: Grant
    Filed: September 26, 2008
    Date of Patent: September 24, 2013
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Jorg E. Sorg, Stefan Gruber
  • Patent number: 8541857
    Abstract: Backside illumination CMOS image sensors having convex light-receiving faces and methods of manufacturing the same. A backside illumination CMOS image sensor includes a metal layer, an insulating layer and a photodiode. The insulating layer is on the metal layer. The photodiode is on the insulating layer, and a top face of the photodiode, which receives light, is curved. A method of manufacturing a backside illumination CMOS image sensor including a photodiode having a convex surface includes forming an island smaller than the photodiode on a portion of a light-receiving face of the photodiode, and annealing the island to form the photodiode having the convex light-receiving face.
    Type: Grant
    Filed: January 4, 2011
    Date of Patent: September 24, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-chak Ahn, Kyung-ho Lee
  • Patent number: 8541859
    Abstract: A semiconductor light receiving element includes a first semiconductor layer having a first conduction type, a second semiconductor layer that is provided on the first semiconductor layer and has a light receiving area, the second semiconductor layer having a second conduction type opposite to the first conduction type, an insulation film provided on the second semiconductor layer, and an electrode provided on the insulation film, the insulation film having a plurality of windows in an area in which the electrode overlaps the plurality of windows, the electrode being electrically connected to the second semiconductor layer via the plurality of windows.
    Type: Grant
    Filed: November 30, 2011
    Date of Patent: September 24, 2013
    Assignee: Sumitomo Electric Device Innovations, Inc.
    Inventor: Yuji Koyama
  • Patent number: 8536672
    Abstract: An image sensor package includes an image sensor die having an active side and a backside, wherein an image sensor device region and a bond pad are provided on the active side. A through-silicon-via (TSV) structure extending through the thickness of the image sensor die is provided to electrically connect the bond pad. A multi-layer re-distributed interconnection structure is provided on the backside of the image sensor die. A solder mask or passivation layer covers the multi-layer re-distributed interconnection structure.
    Type: Grant
    Filed: March 18, 2011
    Date of Patent: September 17, 2013
    Assignee: Xintec, Inc.
    Inventors: Shu-Ming Chang, Tien-Hao Huang
  • Publication number: 20130234275
    Abstract: Packaging assemblies for optically interactive devices and methods of forming the packaging assemblies in an efficient manner that eliminates or reduces the occurrence of process contaminants. In a first embodiment, a transparent cover is attached to a wafer of semiconductor material containing a plurality of optically interactive devices. The wafer is singulated, and the optically interactive devices are mounted on an interposer and electrically connected with wire bonds. In a second embodiment, the optically interactive devices are electrically connected to the interposer with back side conductive elements. In a third embodiment, the optically interactive devices are mounted to the interposer prior to attaching a transparent cover. A layer of encapsulant material is formed over the interposer, and the interposer and encapsulant material are cut to provide individual packaging assemblies. In a fourth embodiment, the optically interactive devices are mounted in a preformed leadless chip carrier.
    Type: Application
    Filed: April 19, 2013
    Publication date: September 12, 2013
    Applicant: ROUND ROCK RESEARCH, LLC
    Inventors: Todd O. Bolken, Chad A. Cobbley
  • Patent number: 8530925
    Abstract: Provided are a light emitting device package and a lighting system including the same. The light emitting device package includes: a body, a plurality of electrode layers, a light emitting device, and a molding member. The body includes a plurality of pits. The electrode layers include first protrusions disposed in the pits, and second protrusions protruding in a direction opposite to the first protrusions. The light emitting device is disposed on at least one of the plurality of electrode layers. The molding member is disposed on the light emitting device.
    Type: Grant
    Filed: March 1, 2011
    Date of Patent: September 10, 2013
    Assignee: LG Innotek Co., Ltd.
    Inventor: Hye Young Kim
  • Patent number: 8530812
    Abstract: Disclosed is a solid-state image pickup apparatus including a photoelectric converter formed on a substrate, a wiring portion formed above the photoelectric converter and constituted of multilayer wirings, and an insulating portion in which the multilayer wirings of the wiring portion are embedded, the insulating portion having a refractive index larger than a silicon oxide.
    Type: Grant
    Filed: January 28, 2010
    Date of Patent: September 10, 2013
    Assignee: Sony Corporation
    Inventor: Koji Kikuchi
  • Patent number: 8525323
    Abstract: The present invention is: a package main body section having a hollow section; and an electronic device provided in the hollow section in the package main body section, in the package main body section, there being formed a through hole, through which the hollow section communicates with outside of the package main body section, and in the through hole, there being provided a sealing section in which a vicinity of the through hole is partly heated and a constituent material of the package main body section is melted to thereby block the through hole.
    Type: Grant
    Filed: January 28, 2009
    Date of Patent: September 3, 2013
    Assignee: NEC Corporation
    Inventors: Takao Yamazaki, Masahiko Sano, Seiji Kurashina, Yoshimichi Sogawa
  • Patent number: 8525285
    Abstract: A semiconductor device having a substrate including a photodiode; a resin layer formed on an upper surface of the substrate, the resin layer not covering a light receiving region of the photodiode, the resin layer including at least one groove surrounding the light receiving region; and a molding resin portion formed by mold-sealing the photodiode with the resin layer thereon so as not to cover the light receiving region.
    Type: Grant
    Filed: February 29, 2012
    Date of Patent: September 3, 2013
    Assignee: Sony Corporation
    Inventors: Shuji Yoneda, Masato Oishi, Tamotsu Shinohara, Shinji Watanabe, Koji Miyata, Seiji Fukae, Kenji Yamauchi, Yoichi Goto, Masakazu Baba
  • Publication number: 20130221470
    Abstract: A multi-chip package may include an image sensor chip, an image signal processor (ISP) chip, a cover glass, and a package substrate. The ISP chip may be placed on the substrate. The image sensor chip may be placed over the ISP chip. An adhesive film may be formed between the ISP and image sensor chips. A cover glass may be suspended above the image sensor chip. The ISP chip and the image sensor chip may be wire bonded to the substrate. The multi-chip package may be hermetically sealed using a liquid compound or a dam structure. During normal operation, the ISP chip sends control signals to the image sensor chip via a first set of wire bond members and conductive traces in the substrate while the image sensor chip sends output signals to the ISP chip via a second set of wire bond terminals and conductive traces in the substrate.
    Type: Application
    Filed: July 23, 2012
    Publication date: August 29, 2013
    Inventors: Larry D. Kinsman, Chi-Yao Kuo
  • Publication number: 20130214323
    Abstract: A method of producing an optoelectronic semiconductor component includes providing a carrier having a top side, an underside situated opposite the top side, and a plurality of connection areas arranged at the top side alongside one another in a lateral direction; applying a plurality of optoelectronic components arranged at a distance from one another in a lateral direction at the top side, the components having a contact area facing away from the carrier; applying protective elements to the contact and connection areas; applying an electrically insulating layer to exposed locations of the carrier, contact areas and protective elements; producing openings in the insulating layer by removing protective elements; and arranging an electrically conductive material on the insulating layer and in the openings, wherein the electrically conductive material connects a contact area to an assigned connection area.
    Type: Application
    Filed: August 12, 2011
    Publication date: August 22, 2013
    Applicant: OSRAM Opto Semiconductors GmbH
    Inventors: Karl Weidner, Hans Wulkesch, Axel Kaltenbacher, Walter Wegleiter, Johann Ramchen