Containing Dopant Adapted For Photoionization Patents (Class 257/439)
  • Patent number: 12009439
    Abstract: In an embodiment a photodiode includes a semiconductor body having a light entrance side and a back side opposite the light entrance side, a first electrode at the light entrance side atop a first doped area of a first conductivity type, a second electrode at the light entrance side atop a second doped area of a second conductivity type, the second doped area being configured to absorb radiation, a gate region at the light entrance side at least between the first electrode and the second electrode, the gate region being connected to a gate electrode, a base electrode at the semiconductor body, the base electrode being configured to receive a current flow from the first electrode, the current flow being indicative of a radiant flux of the radiation onto the second doped area and a radiation shield covering and shielding the first doped area from the radiation to be detected.
    Type: Grant
    Filed: April 24, 2020
    Date of Patent: June 11, 2024
    Assignee: ams-OSRAM International GmbH
    Inventors: Massimo Cataldo Mazzillo, Tim Boescke
  • Patent number: 10884555
    Abstract: Provided is a conductive pattern having at least one unit conductive pattern forming one touch pixel according to an aspect of the present invention. The at least one unit conductive pattern includes a plurality of nanostructures each having opposite ends. A ratio of nanostructures, both opposite ends of which are in contact with edges of the at least one unit conductive pattern to all nanostructures included in the at least one unit conductive pattern is 70% or more.
    Type: Grant
    Filed: February 5, 2016
    Date of Patent: January 5, 2021
    Assignee: DONGWOO FINE-CHEM CO., LTD.
    Inventors: Byung Hoon Song, Dong Ki Keum, Dae Chul Park, Sun Young Song, Hwansil Jang
  • Patent number: 10871644
    Abstract: Phosphor elements comprising phosphors in a host material having a phosphorescence-emitting surface with surface nanostructures are disclosed. Phosphor wheels having such phosphor elements, methods of making such phosphor elements, and methods of using such phosphor elements are also disclosed.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: December 22, 2020
    Assignee: Materion Corporation
    Inventors: Robert Sprague, Michael P. Newell
  • Patent number: 10680125
    Abstract: An apparatus includes a nanocrystal. The nanocrystal includes a core including FeS2; and a coating including a ligand component capable of chemically interacting with both an iron atom and a sulfur atom on a surface of the core.
    Type: Grant
    Filed: November 15, 2012
    Date of Patent: June 9, 2020
    Assignee: NUtech Ventures
    Inventors: Jinsong Huang, Baodong Mao, Christopher Exstrom
  • Patent number: 10163983
    Abstract: A resistance-switchable material containing: an insulating support; and a complementary resistance switchable filler dispersed in the insulating support, wherein the complementary resistance switchable filler has a core-shell structure containing: a wire-type conductive core containing a conductive material; and an insulating shell formed on the surface of the core and containing an insulating material. Because a first resistive layer, a conductive layer and a second resistive layer are formed as one layer and bipolar conductive filaments are formed on the substantially different resistive layers, the memory can exhibit complementary resistive switching characteristics. In addition, the complementary resistance switchable memory of the present disclosure can be prepared through a simplified process at low cost by introducing a simple process of coating a paste in which a complementary resistance switchable filler and a supporting material are mixed.
    Type: Grant
    Filed: November 20, 2017
    Date of Patent: December 25, 2018
    Assignee: Korea Institute of Science and Technology
    Inventors: Sang-Soo Lee, Jong Hyuk Park, Jeong Gon Son, Young Jin Kim, Minsung Kim, Heesuk Kim
  • Patent number: 9818766
    Abstract: A thin film transistor includes a substrate, a semiconductor layer on the substrate, a first insulating layer covering the substrate and the semiconductor layer, a first gate electrode on the first insulating layer and overlapping the semiconductor layer, a second insulating layer covering the first gate electrode and the first insulating layer, a second gate electrode on the second insulating layer and overlapping the semiconductor layer and the first gate electrode, a third insulating layer covering the second gate electrode, a first contact hole defined in the first insulating layer, the second insulating layer and the third insulating layer, and through which a portion of the semiconductor layer is exposed, and a source electrode and a drain electrode connected to the semiconductor layer through the first contact hole.
    Type: Grant
    Filed: October 16, 2013
    Date of Patent: November 14, 2017
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jung-Bae Kim, Bo-Yong Chung, Hai-Jung In, Dong-Gyu Kim
  • Patent number: 9806209
    Abstract: A passivated iron disulfide (FeS2) surface encapsulated by an epitaxial zinc sulfide (ZnS) capping layer or matrix is provided. Also disclosed are methods for passivating the surface of crystalline iron disulfide by encapsulating it with an epitaxial zinc sulfide capping layer or matrix. Additionally disclosed is a photovoltaic (PV) device incorporating FeS2 encapsulated by ZnS.
    Type: Grant
    Filed: June 7, 2017
    Date of Patent: October 31, 2017
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Jesse A. Frantz, Jason D. Myers, Colin C. Baker, Jasbinder S. Sanghera, Steven C. Erwin
  • Patent number: 9806208
    Abstract: A method for passivating the surface of crystalline iron disulfide (FeS2) by encapsulating it within an epitaxial zinc sulfide (ZnS) matrix. Also disclosed is the related product comprising FeS2 encapsulated by a ZnS matrix in which the sulfur atoms at the FeS2 surfaces are passivated. Additionally disclosed is a photovoltaic (PV) device incorporating FeS2 encapsulated by a ZnS matrix.
    Type: Grant
    Filed: June 7, 2017
    Date of Patent: October 31, 2017
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Jesse A. Frantz, Jason D. Myers, Colin C. Baker, Jasbinder S. Sanghera, Steven C. Erwin
  • Patent number: 9705012
    Abstract: A method for passivating the surface of crystalline iron disulfide (FeS2) by encapsulating it in crystalline zinc sulfide (ZnS). Also disclosed is the related product comprising FeS2 encapsulated by ZnS in which the sulfur atoms at the FeS2 surfaces are passivated. Additionally disclosed is a photovoltaic (PV) device incorporating FeS2 encapsulated by ZnS.
    Type: Grant
    Filed: March 18, 2015
    Date of Patent: July 11, 2017
    Assignee: The United States of America, as Represented by the Secretary of the Navy
    Inventors: Jesse A. Frantz, Jason D. Myers, Colin C. Baker, Jasbinder S. Sanghera, Steven C. Erwin
  • Patent number: 8871619
    Abstract: Solar cells and other semiconductor devices are fabricated more efficiently and for less cost using an implanted doping fabrication system. A system for implanting a semiconductor substrate includes an ion source (such as a single-species delivery module), an accelerator to generate from the ion source an ion beam having an energy of no more than 150 kV, and a beam director to expose the substrate to the beam. In one embodiment, the ion source is single-species delivery module that includes a single-gas delivery element and a single-ion source. Alternatively, the ion source is a plasma source used to generate a plasma beam. The system is used to fabricate solar cells having lightly doped photo-receptive regions and more highly doped grid lines. This structure reduces the formation of “dead layers” and improves the contact resistance, thereby increasing the efficiency of a solar cell.
    Type: Grant
    Filed: June 11, 2009
    Date of Patent: October 28, 2014
    Assignee: Intevac, Inc.
    Inventors: Babak Adibi, Edward S. Murrer
  • Patent number: 8859310
    Abstract: Methods of fabricating optoelectronic devices, such as photovoltaic cells and light-emitting devices. In one embodiment, such a method includes providing a substrate, applying a monolayer of semiconductor particles to the substrate, and encasing the monolayer with one or more coatings so as to form an encased-particle layer. At some point during the method, the substrate is removed so as to expose the reverse side of the encased-particle layer and further processing is performed on the reverse side. When a device made using such a method has been completed and installed into an electrical circuit the semiconductor particles actively participate in the photoelectric effect or generation of light, depending on the type of device.
    Type: Grant
    Filed: June 10, 2011
    Date of Patent: October 14, 2014
    Assignee: Versatilis LLC
    Inventor: Ajaykumar R. Jain
  • Patent number: 8779543
    Abstract: A semiconductor device that may include an avalanche photodiode (APD), the APD may include: a first doped region of a first polarity; a buried guard ring of a second polarity, the second polarity is opposite to the first polarity, the buried guard ring is spaced apart from the first doped region and is positioned below the first doped region; a well of the second polarity, wherein the well interfaces the first doped region to form a p-n junction; and a second doped region of the second polarity, the second doped region is spaced apart from the first doped region.
    Type: Grant
    Filed: September 16, 2012
    Date of Patent: July 15, 2014
    Assignee: Technion Research and Development Foundation Ltd.
    Inventors: Yael Nemirovsky, Vitali Savuskan, Sharon Bar-Lev Shefi, Igor Brouk, Gil Visokolov, Amos Fenigstein, Tomer Leitner
  • Patent number: 8766385
    Abstract: Filtering matrix structure comprising at least three color filters and a plurality of near Infrared filters, each one of the color filters and the near Infrared filters having an optimum transmission frequency, wherein the filtering matrix structure is made of n metal layers (m1, m2, m3) and n substantially transparent layers (d1, d2, d3) which alternate between a first metal layer (m1) and an nth substantially transparent layer (d3), each of the n metal layers (m1, m2, m3) having a constant thickness and at least one substantially transparent layer having a variable thickness which sets the optimum transmission frequency of each color filter and each near Infrared filter, n being an integer larger than or equal to 2. Application to 3D mapping and imaging.
    Type: Grant
    Filed: September 13, 2011
    Date of Patent: July 1, 2014
    Assignee: Commissariat a l'Energie Atomique et aux Energies Alternatives
    Inventors: Pierre Gidon, Gilles Grand, Laurent Frey, Pascale Parrein
  • Patent number: 8765515
    Abstract: A solid state imaging device including: a plurality of sensor sections formed in a semiconductor substrate in order to convert incident light into an electric signal; a peripheral circuit section formed in the semiconductor substrate so as to be positioned beside the sensor sections; and a layer having negative fixed electric charges that is formed on a light incidence side of the sensor sections in order to form a hole accumulation layer on light receiving surfaces of the sensor sections.
    Type: Grant
    Filed: October 19, 2012
    Date of Patent: July 1, 2014
    Assignee: Sony Corporation
    Inventor: Yuko Ohgishi
  • Patent number: 8749009
    Abstract: Active or functional additives are embedded into surfaces of host materials for use as components in a variety of electronic or optoelectronic devices, including solar devices, smart windows, displays, and so forth. Resulting surface-embedded device components provide improved performance, as well as cost benefits arising from their compositions and manufacturing processes.
    Type: Grant
    Filed: August 8, 2011
    Date of Patent: June 10, 2014
    Assignee: Innova Dynamics, Inc.
    Inventors: Michael Eugene Young, Arjun Daniel Srinivas, Matthew R. Robinson, Alexander Chow Mittal
  • Patent number: 8742543
    Abstract: The invention is directed to an avalanche photodiode containing a substrate and semiconductor layers with various electro-physical properties having common interfaces both between themselves and with the substrate. The avalanche photodiode may be characterized by the presence in the device of at least one matrix consisting of separate solid-state areas with enhanced conductivity surrounded by semiconductor material with the same type of conductivity. The solid-state areas are located between two additional semiconductor layers, which have higher conductivity in comparison to the semiconductor layers with which they have common interfaces. The solid-state areas are generally made of the same material as the semiconductor layers surrounding them but with conductivity type that is opposite with respect to them. The solid-state areas may be made of a semiconductor with a narrow forbidden zone with respect to the semiconductor layers with which they have common interfaces.
    Type: Grant
    Filed: February 20, 2008
    Date of Patent: June 3, 2014
    Inventors: Ziraddin Yagub-Ogly Sadygov, Abdelmounairne Faouzi Zerrouk
  • Patent number: 8729597
    Abstract: Provided is a method for controlling a device using a doped carbon-nanostructure, and a device including the doped carbon-nanostructure, in which the method for controlling the device selectively controls the mobility of electrons or holes using N-type or P-type doped carbon-nanostructure; the N-type or P-type impurities-doped carbon-nanostructure can selectively control the transport of electrons or holes according to a doped material; and also since the doped carbon-nanostructure limits the transport of charge that is the opposite charge to the transport facilitating charge, it can improve the efficiency of device by adding to a functional layer of device or using as a separate layer in the electrons or holes-only transporting device.
    Type: Grant
    Filed: November 16, 2011
    Date of Patent: May 20, 2014
    Assignee: Korea Advanced Institute of Science and Technology
    Inventors: Sang Ouk Kim, Ji Sun Park, Ju Min Lee, Myoung Hoon Song
  • Patent number: 8722442
    Abstract: Provided is a transparent graphene film which is prepared by maintaining the primary reduced state of a graphene oxide thin film via chemical reduction, reducing the graphene oxide thin film with chemical vapor deposition, and doping nitrogen, thereby enhancing the conductivity and enabling the control of work function and a manufacturing method thereof. According to the present disclosure, a flexible, transparent, electrical conductivity-enhanced, and work function controllable graphene film can be large area processed and produced in large quantities so that can be applied in real industrial processes by forming a graphene oxide thin film on a substrate, performing the primary chemical reduction using a reducing agent, and performing further the secondary thermal reduction and nitrogen doping by injecting hydrogen and ammonia gas through chemical vapor deposition equipment.
    Type: Grant
    Filed: November 16, 2011
    Date of Patent: May 13, 2014
    Assignee: Korea Advanced Institute of Science and Technology
    Inventors: Sang Ouk Kim, Jin Ok Hwang, Duck Hyun Lee
  • Patent number: 8709958
    Abstract: An embodiment of the invention provides a solid-state image pickup element, including: a semiconductor layer having a photodiode, photoelectric conversion being carried out in the photodiode; a silicon oxide film formed on the semiconductor layer in a region having at least the photodiode by using plasma; and a film formed on the silicon oxide film and having negative fixed charges.
    Type: Grant
    Filed: June 11, 2012
    Date of Patent: April 29, 2014
    Assignee: Sony Corporation
    Inventors: Itaru Oshiyama, Susumu Hiyama
  • Patent number: 8587080
    Abstract: The invention relates to an optical filtering structure consisting of a set of at least two elementary optical filters (R, V, B), an elementary optical filter being centered on an optimum transmission frequency, characterized in that it comprises a stack of n metal layers (m1, m2, m3) and n substantially transparent layers (d1, d2, d3) which alternate between a first metal layer (m1) and an nth substantially transparent layer (d3), the n metal layers (m1, m2, m3) each having a constant thickness and at least one substantially transparent layer having a variable thickness which sets the optimum transmission frequency of an elementary optical filter, n being an integer larger than or equal to 2. Application to miniature image sensors.
    Type: Grant
    Filed: July 17, 2007
    Date of Patent: November 19, 2013
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Pierre Gidon, Gilles Grand
  • Patent number: 8569836
    Abstract: A semiconductor device includes an output port that has a first lateral double diffused metal oxide semiconductor (LDMOS) device and an electrostatic discharge protection device that has a second LDMOS device and a bipolar transistor and that protects the output port from electrostatic discharge. A breakdown voltage of the second LDMOS device is equal to or lower than a breakdown voltage of the first LDMOS device.
    Type: Grant
    Filed: November 30, 2011
    Date of Patent: October 29, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Mueng-Ryul Lee
  • Patent number: 8487350
    Abstract: An image sensor pixel includes a semiconductor layer, a photosensitive region to accumulate photo-generated charge, a floating node, a trench, and an entrenched transfer gate. The photosensitive region and the trench are disposed within the semiconductor layer. The trench extends into the semiconductor layer between the photosensitive region and the floating node and the entrenched transfer gate is disposed within the trench to control transfer of the photo-generated charge from the photosensitive region to the floating node.
    Type: Grant
    Filed: August 20, 2010
    Date of Patent: July 16, 2013
    Assignee: OmniVision Technologies, Inc.
    Inventors: Hidetoshi Nozaki, Tiejun Dai
  • Patent number: 8421177
    Abstract: The vertical silicon photomultiplier according to the present invention includes a trench electrode and a PN-junction layer perpendicular to the trench electrode forms and can maximize the quantum efficiency at optical wavelengths, 200˜900 nm in such a way that: it generates electric fields horizontal thereto, by applying a reverse bias voltage to between the trench electrode and the PN-junction layer, so that, although ultraviolet light does not reach the PN-junction layer but is incident on the surface, electron-hole pairs can be produced by the horizontally generated electric fields although and an avalanche breakdown can be thus generated, and it allows ultraviolet light, capable of being transmitted to a relatively deep depth, to react with the PN-junction layer.
    Type: Grant
    Filed: January 27, 2011
    Date of Patent: April 16, 2013
    Assignees: Ewha University-Industry Collaboration Foundation, Sense Technology
    Inventor: Il Hung Park
  • Patent number: 8343793
    Abstract: A solid state imaging device including: a plurality of sensor sections formed in a semiconductor substrate in order to convert incident light into an electric signal; a peripheral circuit section formed in the semiconductor substrate so as to be positioned beside the sensor sections; and a layer having negative fixed electric charges that is formed on a light incidence side of the sensor sections in order to form a hole accumulation layer on light receiving surfaces of the sensor sections.
    Type: Grant
    Filed: March 14, 2011
    Date of Patent: January 1, 2013
    Assignee: Sony Corporation
    Inventor: Yuko Ohgishi
  • Patent number: 8338701
    Abstract: A photoelectric conversion device using a semiconductor fine material such as a semiconductor fine particle sensitized with a dye carried thereon, characterized in that the dye is a methine type dye having a specific partial structure, for example, a methine type dye having a specific carboxyl-substituted hetero ring on one side of a methine group and an aromatic residue substituted with a dialkylamino group or an organic metal complex residue on the other side of the methine group, or a methine type dye having a carboxyl-substituted aromatic ring on one side of a methine group and a heteroaromatic ring having a dialkylamino group or an organic metal complex residue on the other side of the methine group; and a solar cell using the photoelectric conversion element. The photoelectric conversion element exhibits a conversion efficiency comparable or superior to that of a conventionally known photoelectric conversion element sensitized with a methine type dye.
    Type: Grant
    Filed: October 20, 2010
    Date of Patent: December 25, 2012
    Assignee: Nippon Kayaku Kabushiki Kaisha
    Inventors: Masaaki Ikeda, Koichiro Shigaki, Teruhisa Inoue
  • Patent number: 8338700
    Abstract: A photoelectric conversion device using a semiconductor fine material such as a semiconductor fine particle sensitized with a dye carried thereon, characterized in that the dye is a methine type dye having a specific partial structure, for example, a methine type dye having a specific carboxyl-substituted hetero ring on one side of a methine group and an aromatic residue substituted with a dialkylamino group or an organic metal complex residue on the other side of the methine group, or a methine type dye having a carboxyl-substituted aromatic ring on one side of a methine group and a heteroaromatic ring having a dialkylamino group or an organic metal complex residue on the otherside of the methine group; and a solar cell using the photoelectric conversion element. The photoelectric conversion element exhibits a conversion efficiency comparable or superior to that of a conventionally known photoelectric conversion element sensitized with a methine type dye.
    Type: Grant
    Filed: October 20, 2010
    Date of Patent: December 25, 2012
    Assignee: Nippon Kayaku Kabushiki Kaisha
    Inventors: Masaaki Ikeda, Koichiro Shigaki, Teruhisa Inoue
  • Publication number: 20120286144
    Abstract: A photodiode comprises a semiconductor material having a p-n junction, the p-n junction being located between a first doping region of a first doping type and a second doping region of a second doping type, the second doping region comprising a highly doped layer and a lightly doped layer. A photodiode further comprises a voltage source being capable to apply a variable voltage between the first doping region and the lightly doped layer of the second doping region in order to vary the expansion of a space charge zone of the p-n junction.
    Type: Application
    Filed: November 10, 2011
    Publication date: November 15, 2012
    Applicant: NaMLab GmbH
    Inventors: Juergen Holz, Andre Wachowiak, Stefan Slesazeck
  • Patent number: 8299469
    Abstract: According to an embodiment of the present invention, a thin film transistor array panel includes a gate line and a data line insulated from each other on an insulating substrate where the gate line and the data line cross each other to define a pixel region, a thin film transistor (TFT) disposed at an intersection of the gate line and the data line, a floating electrode where at least a portion of the floating electrode overlaps the data line, and a pixel electrode disposed at the pixel region where the pixel electrode is connected to the TFT and overlaps the at least a portion of the floating electrode.
    Type: Grant
    Filed: June 14, 2007
    Date of Patent: October 30, 2012
    Assignee: Samsung Display Co., Ltd.
    Inventor: Jong-woong Chang
  • Publication number: 20120268722
    Abstract: In one an embodiment, there is provided an assembly comprising at least one detector. Each of the at least one detector includes a substrate having a doped region of a first conduction type, a layer of dopant material of a second conduction type located on the substrate, a diffusion layer formed within the substrate and in contact with the layer of dopant material and the doped region of the substrate, wherein a doping profile, which is representative of a doping material concentration of the diffusion layer, increases from the doped region of the substrate to the layer of dopant material, a first electrode connected to the layer of dopant material, and a second electrode connected to the substrate. The diffusion layer is arranged to form a radiation sensitive surface.
    Type: Application
    Filed: February 17, 2012
    Publication date: October 25, 2012
    Applicant: ASML Netherlands B.V.
    Inventors: Stoyan NIHTIANOV, Arie Johan Van Der Sijs, Bearrach Moest, Petrus Wilhelmus Josephus Maria Kemper, Marc Antonius Maria Haast, Gerardus Wilhelmus Petrus Baas, Lis Karen Nanver, Francesco Sarubbi, Antonius Andreas Johannes Schuwer, Gregory Micha Gommeren, Martijn Pot, Thomas Ludovicus Maria Sholtes
  • Publication number: 20120205523
    Abstract: A semiconductor photodetector may provide charge carrier avalanche multiplication at high field regions of a semiconductor material layer. A semiconductor current amplifier may provide current amplification by impact ionization near a high field region. A plurality of metal electrodes are formed on a surface of a semiconductor material layer and electrically biased to produce a non-uniform high electric field in which the high electric field strength accelerates avalanche electron-hole pair generation, which is employed as an effective avalanche multiplication photodetection mechanism or as an avalanche impact ionization current amplification mechanism.
    Type: Application
    Filed: April 25, 2012
    Publication date: August 16, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Solomon Assefa, Yurii A. Vlasov, Fengnian Xia
  • Patent number: 8237206
    Abstract: A CMOS image sensor, in which an implantation process is performed on substrate under isolation structures each disposed between two adjacent photosensor cell structures. The implantation process is a destructive implantation to form lattice effects/trap centers. No defect repair process is carried out after the implantation process is performed. The implants can reside at the isolation structures or in the substrate under the isolation structures. Dark leakage and crosstalk are thus suppressed.
    Type: Grant
    Filed: August 12, 2008
    Date of Patent: August 7, 2012
    Assignee: United Microelectronics Corp.
    Inventor: Hsin-Ping Wu
  • Patent number: 8217479
    Abstract: An embodiment of the invention provides a solid-state image pickup element, including: a semiconductor layer having a photodiode, photoelectric conversion being carried out in the photodiode; a silicon oxide film formed on the semiconductor layer in a region having at least the photodiode by using plasma; and a film formed on the silicon oxide film and having negative fixed charges.
    Type: Grant
    Filed: January 21, 2010
    Date of Patent: July 10, 2012
    Assignee: Sony Corporation
    Inventors: Itaru Oshiyama, Susumu Hiyama
  • Patent number: 8093684
    Abstract: The semiconductor of the present invention has iron sulfide and a forbidden band control element contained in the iron sulfide. The forbidden band control element has a property capable of controlling the forbidden band of iron sulfide on the basis of the number density of the forbidden band control element in the iron sulfide. An n-type semiconductor is manufactured by incorporating a group 13 element of the IUPAC system into iron sulfide. Moreover, a p-type semiconductor is manufactured by incorporating a group Ia element into iron sulfide. A semiconductor junction device or a photoelectric converter is manufactured by using the n-type semiconductor and the p-type semiconductor.
    Type: Grant
    Filed: January 9, 2007
    Date of Patent: January 10, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshiyuki Nasuno, Noriyoshi Kohama, Kazuhito Nishimura
  • Patent number: 8076704
    Abstract: An organic light emitting device according to an embodiment includes a thin film transistor substrate including a plurality of thin film transistors and an over-coating film formed on the thin film transistors. The over-coating film includes a curved surface on at least two pixels among pixels of different colors and the slope angles of depressed portions forming the curved surface are respectively different from each other depending on the colors of the pixels. A plurality of first electrodes formed on the over-coating film includes a surface formed according to the curved surface, an organic light emitting member formed on the first electrodes includes a surface formed according to the curved surface, and a second electrode formed on the organic light emitting member includes a surface formed according to the curved surface. Slope angles of the depressed portions increase according to a decrease of wavelengths of the colors of the pixels.
    Type: Grant
    Filed: May 27, 2008
    Date of Patent: December 13, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Baek-Woon Lee, Young-In Hwang
  • Patent number: 8017429
    Abstract: The purpose is manufacturing a photoelectric conversion device with excellent photoelectric conversion characteristics typified by a solar cell with effective use of a silicon material. A single crystal silicon layer is irradiated with a laser beam through an optical modulator to form an uneven structure on a surface thereof. The single crystal silicon layer is obtained in the following manner; an embrittlement layer is formed in a single crystal silicon substrate; one surface of a supporting substrate and one surface of an insulating layer formed over the single crystal silicon substrate are disposed to be in contact and bonded; heat treatment is performed; and the single crystal silicon layer is formed over the supporting substrate by separating part of the single crystal silicon substrate fixed to the supporting substrate along the embrittlement layer or a periphery of the embrittlement layer.
    Type: Grant
    Filed: February 12, 2009
    Date of Patent: September 13, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Fumito Isaka, Sho Kato, Junpei Momo
  • Publication number: 20110204466
    Abstract: A photoelectric conversion device manufacturing method, includes: continuously forming a first p-type semiconductor layer, a first i-type semiconductor layer, and a first n-type semiconductor layer, which constitute a first-photoelectric conversion unit, and a second p-type semiconductor layer which constitutes a second-photoelectric conversion unit, in decompression chambers that are different from each other; exposing the second p-type semiconductor layer to an air atmosphere; and forming a second i-type semiconductor layer and a second n-type semiconductor layer, which constitute the second-photoelectric conversion unit, on the second p-type semiconductor layer of the second-photoelectric conversion unit which was exposed to the air atmosphere, in the same decompression chamber.
    Type: Application
    Filed: August 28, 2009
    Publication date: August 25, 2011
    Applicant: ULVAC, INC.
    Inventors: Shinichi Asahina, Hirota Uchida, Shin Asari, Masanori Hashimoto, Tetsushi Fujinaga, Tadamasa Kobayashi, Masafumi Wakai, Kenichi Imakita, Yoshinobu Ue, Kazuya Saito, Kyuzo Nakamura
  • Patent number: 7960199
    Abstract: A thin film transistor array substrate and a fabricating method thereof are disclosed. The thin film transistor array substrate protects a thin film transistor without a protective film and accordingly reduces the manufacturing cost. In the thin film transistor array substrate, a gate electrode is connected to a gate line. A source electrode is connected to a data line crossing the gate line to define a pixel area. A drain electrode is opposed to the source electrode with a channel therebetween. A semiconductor layer is in the channel. A pixel electrode in the pixel area contacts the drain electrode over substantially the entire overlapping area between the two. A channel protective film is provided on the semiconductor layer corresponding to the channel to protect the semiconductor layer.
    Type: Grant
    Filed: August 14, 2009
    Date of Patent: June 14, 2011
    Assignee: LG Display Co., Ltd.
    Inventors: Young Seok Choi, Byung Yong Ahn, Ki Su Cho, Hong Woo Yu
  • Patent number: 7943405
    Abstract: A liquid crystal display panel and a fabricating method thereof comprising an image sensing capability, image scanning, and touch inputting. In the liquid crystal display device, a gate line and a data line are formed to intersect each other on a substrate to define a pixel area in which a pixel electrode is positioned. A first thin film transistor is positioned at an intersection area of the gate line and the data line. A sensor thin film transistor senses light having image information and supplied with a first driving voltage from the data line. A driving voltage supply line is positioned in parallel to the gate line to supply a second driving voltage to the sensor thin film transistor.
    Type: Grant
    Filed: May 20, 2010
    Date of Patent: May 17, 2011
    Assignee: LG Display Co., Ltd.
    Inventors: Hee Kwang Kang, Kyo Seop Choo
  • Patent number: 7939359
    Abstract: A solid state imaging device includes: a plurality of sensor sections formed in a semiconductor substrate in order to convert incident light into an electric signal; a peripheral circuit section formed in the semiconductor substrate so as to be positioned beside the sensor sections; and a layer having negative fixed electric charges that is formed on a light incidence side of the sensor sections in order to form a hole accumulation layer on light receiving surfaces of the sensor sections.
    Type: Grant
    Filed: September 25, 2008
    Date of Patent: May 10, 2011
    Assignee: Sony Corporation
    Inventor: Yuko Ohgishi
  • Patent number: 7939900
    Abstract: Polymerizable anions and/or cations can be used as the ionically conductive species for the formation of a p-i-n junction in conjugated polymer thin films. After the junction is formed, the ions are polymerized in situ, and the junction is locked thereafter. The resulting polymer p-i-n junction diodes could have a high current rectification ratio. Electroluminescence with high quantum efficiency and low operating voltage may be produced from this locked junction. The diodes may also be used for photovoltaic energy conversion. In a photovoltaic cell, the built-in potential helps separate electron-hole pairs and increases the open-circuit voltage.
    Type: Grant
    Filed: March 4, 2008
    Date of Patent: May 10, 2011
    Assignee: The Regents of the University of California
    Inventor: Qibing Pei
  • Patent number: 7936034
    Abstract: A MESA-type photonic detection device, including at least one first junction, which itself includes a first receiving layer and sides formed or etched in the receiving layer. These sides at least partially include a layer with a doping opposite the doping of the first receiving layer.
    Type: Grant
    Filed: April 4, 2005
    Date of Patent: May 3, 2011
    Assignee: Commissariat a l'Energie Atomique
    Inventor: Johan Rothman
  • Patent number: 7888766
    Abstract: A photodiode array 1 is provided with an n-type silicon substrate 3. A plurality of photodiodes 4 are formed in array on the opposites surface side to an incident surface of light L to be detected, in the n-type silicon substrate 3. A depression 6 with a predetermined depth more depressed than a region not corresponding to regions where the photodiodes 4 are formed is formed in regions corresponding to the regions where the photodiodes 4 are formed, on the incident surface side of the light L to be detected, in the n-type silicon substrate 3.
    Type: Grant
    Filed: March 25, 2004
    Date of Patent: February 15, 2011
    Assignee: Hamamatsu Photonics K.K.
    Inventor: Katsumi Shibayama
  • Publication number: 20110024608
    Abstract: A semiconductor photodetector may provide charge carrier avalanche multiplication at high field regions of a semiconductor material layer. A semiconductor current amplifier may provide current amplification by impact ionization near a high field region. A plurality of metal electrodes are formed on a surface of a semiconductor material layer and electrically biased to produce a non-uniform high electric field in which the high electric field strength accelerates avalanche electron-hole pair generation, which is employed as an effective avalanche multiplication photodetection mechanism or as an avalanche impact ionization current amplification mechanism.
    Type: Application
    Filed: July 31, 2009
    Publication date: February 3, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Solomon Assefa, Yurii A. Vlasov, Fengnian Xia
  • Patent number: 7851701
    Abstract: A photoelectric conversion device using a semiconductor fine material such as a semiconductor fine particle sensitized with a dye carried thereon, characterized in that the dye is a methine type dye having a specific partial structure, for example, a methine type dye having a specific carboxyl-substituted hetero ring on one side of a methine group and an aromatic residue substituted with a dialkylamino group or an organic metal complex residue on the other side of the methine group, or a methine type dye having a carboxyl-substituted aromatic ring on one side of a methine group and a heteroaromatic ring having a dialkylamino group or an organic metal complex residue on the other side of the methine group; and a solar cell using the photoelectric conversion element. The photoelectric conversion element exhibits a conversion efficiency comparable or superior to that of a conventionally known photoelectric conversion element sensitized with a methine type dye.
    Type: Grant
    Filed: July 5, 2002
    Date of Patent: December 14, 2010
    Assignee: Nippon Kayaku Kabushiki Kaisha
    Inventors: Masaaki Ikeda, Koichiro Shigaki, Teruhisa Inoue
  • Patent number: 7821093
    Abstract: A solid-state imaging device with a structure such that an electrode for reading a signal charge is provided on one side of a light-receiving sensor portion constituting a pixel; a predetermined voltage signal V is applied to a light-shielding film formed to cover an image pickup area except the light-receiving sensor portion; a second-conductivity-type semiconductor area is formed in the center on the surface of a first-conductivity-type semiconductor area constituting a photo-electric conversion area of the light-receiving sensor portion; and areas containing a lower impurity concentration than that of the second-conductivity-type semiconductor area is formed on the surface of the first-conductivity-type semiconductor area at the end on the side of the electrode and at the opposite end on the side of a pixel-separation area.
    Type: Grant
    Filed: November 25, 2008
    Date of Patent: October 26, 2010
    Assignee: Sony Corporation
    Inventors: Yoshiaki Kitano, Hideshi Abe, Jun Kuroiwa, Kiyoshi Hirata, Hiroaki Ohki, Nobuhiro Karasawa, Ritsuo Takizawa, Mitsuru Yamashita, Mitsuru Sato, Katsunori Kokubun
  • Patent number: 7816755
    Abstract: A pixel space is narrowed without increasing PN junction capacitance. A photoelectric conversion device includes a plurality of pixels arranged therein, each including a first impurity region of a first conductivity type forming a photoelectric conversion region, a second impurity region of a second conductivity type forming a signal acquisition region arranged in the first impurity region, a third impurity region of the first conductivity type and a fourth impurity region of the first conductivity type are arranged in a periphery of each pixel for isolating the each pixel, the fourth impurity region is disposed between adjacent pixels, and an impurity concentration of the fourth impurity region is smaller than an impurity concentration of the third impurity region.
    Type: Grant
    Filed: August 4, 2008
    Date of Patent: October 19, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kazuo Yamazaki, Tetsunobu Kochi
  • Patent number: 7816712
    Abstract: A thin film transistor array and method of manufacturing the same include a pixel electrode formed of a transparent conductive layer on a substrate, a gate line formed of the transparent conductive layer and an opaque conductive layer on the substrate, a gate electrode connected to the gate line and formed of the transparent conductive layer and an opaque conductive layer on the substrate, a gate insulating layer which covers the gate line and the gate electrode, a semiconductor layer formed on the gate insulating layer to overlap the gate electrode, a data line which intersects the gate line, a source electrode connected to the data line to overlap a part of the semiconductor layer, and a drain electrode connected to the pixel electrode to overlap a part of the semiconductor layer.
    Type: Grant
    Filed: November 20, 2007
    Date of Patent: October 19, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Hyun Choung, Hong-Sick Park, Joo-Ae Youn, Sun-Young Hong, Bong-Kyun Kim, Won-Suk Shin, Byeong-Jin Lee
  • Patent number: 7812251
    Abstract: A photosensitizing transition metal complex of the formula (Ia) MLY1, (Ib) MLX3 (Ic) MLY2X, (Id) MLY3X or (Ie) MLY4X in which M is a transition metal selected from ruthenium, osmium, iron, rhenium and technetium, preferably ruthenium or osmium. X is a co-ligand independently selected from NCS—, Cl—, Br—, I—, CN—, H2O; pyridine unsubstituted or substituted by at least one group selected from vinyl, primary, secondary or tertiary amine, OH and C1-30 alkyl, preferably NSC and CN—; L is a tridentate polypyridine ligand, carrying at least one carboxylic, phosphoric acid or a chelating group and one substituted or unsubstituted alkyl group having 1 to 50 carbon atoms, substituted or unsubstituted alkylamide group having 2 to 30 carbon atoms or substituted or unsubstituted aralkyl group having 7 to 50 carbon atoms.
    Type: Grant
    Filed: October 15, 2004
    Date of Patent: October 12, 2010
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Ashraful Islam, Liyuan Han, Atsushi Fukui
  • Patent number: 7807999
    Abstract: An array substrate includes a gate line, a data line, a switching device, a transmissive electrode, a reflective electrode and a compensating wiring. A pixel region includes first and second regions. The switching device is connected to the gate line and the data line. The transmissive electrode is connected to the switching device. The transmissive electrode is formed in the first region. The reflective electrode is insulated from the transmissive electrode. The reflective electrode is formed in the second region that is adjacent to the first region. The compensating wiring is connected to the switching device. The compensating wiring faces the reflective electrode in the second region with an insulation layer interposed therebetween. Thus, both of a reflectivity of the reflective electrode and a transmissivity of the transmissive electrode are enhanced simultaneously, while the liquid crystal display apparatus maintains a uniform cell gap.
    Type: Grant
    Filed: December 17, 2003
    Date of Patent: October 5, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hee-Seop Kim, Won-Sang Park, Sang-Il Kim, Dong-Sik Sakong, Young-Chol Yang, Sung-Kyu Hong, Jong-Lae Kim
  • Patent number: 7791065
    Abstract: An ultrasensitive optical detector with high resolution in time, using a waveguide, and a processes for manufacturing this detector. The detector is configured to detect at least one photon and includes a dielectric substrate and at least one detection element on the substrate, configured to generate an electrical signal starting from energy of the photon received, and a guide element to guide the photon, the energy of which is then absorbed by the detection element at an absorption zone which is less than 100 nm thick. The detection element is substantially straight on the substrate and is short, and the guide element includes a single mode light waveguide with strong confinement, placed on the detection element. The detector is particularly applicable to detection and localization of operating defects in a semiconducting circuit.
    Type: Grant
    Filed: June 6, 2006
    Date of Patent: September 7, 2010
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Laurent Frey, Jean-Claude Villegier