Abstract: The present invention, in a photoelectric conversion device in which a pixel including a photoelectric conversion device for converting a light into a signal charge and a peripheral circuit including a circuit for processing the signal charge outside a pixel region in which the pixel are disposed on the same substrate, comprising: a first semiconductor region of a first conductivity type for forming the photoelectric region, the first semiconductor region being formed in a second semiconductor region of a second conductivity type; and a third semiconductor region of the first conductivity type and a fourth semiconductor region of the second conductivity type for forming the peripheral circuit, the third and fourth semiconductor regions being formed in the second semiconductor region; wherein in that the impurity concentration of the first semiconductor region is higher than the impurity concentration of the third semiconductor region.

Abstract: A pixel cell including a substrate having a top surface. A photo-conversion device is at a surface of the substrate and a trench is in the substrate adjacent the photo-conversion device. The trench has sidewalls and a bottom. At least one sidewall is angled less than approximately 85 degrees from the plane of the top surface of the substrate.

Abstract: Disclosed herein is a solid-state imaging device including: a pixel part configured to include a plurality of light receiving regions corresponding to different wavelengths; and an element isolator configured to separate the plurality of light receiving regions from each other in such a way that each of the light receiving regions in the pixel part has a size suited to an energy profile of light irradiation with a wavelength handled by the light receiving region.

Abstract: A semiconductor device comprises an integrated circuit formed on a substrate with a signal interface and at least one isolator capacitor. The integrated circuit comprises a plurality of interleaved inter-metal dielectric layers and interlayer dielectrics formed on the substrate, a thick passivation layer formed on the plurality of the interleaved inter-metal dielectric layers and interlayer dielectrics, and a thick metal layer formed on the thick passivation layer. The thick passivation layer has a thickness selected to be greater than the isolation thickness whereby testing for defects is eliminated. The one or more isolator capacitors comprise the thick metal layer and a metal layer in the plurality of interleaved inter-metal dielectric layers and interlayer dielectrics separated by the thick passivation layer as an insulator.

Abstract: A semiconductor structure with dual isolation structures is disclosed. The semiconductor structure may include a protruding isolation structure in a pixel array region of a substrate and an embedded isolation structure in a peripheral device region of the same substrate. A region of the protruding isolation structure extends from an upper surface of the substrate, while another region of the protruding isolation structure may, optionally, be embedded within the substrate. The embedded isolation structure is formed within the substrate and includes an upper surface that is substantially coplanar with the upper surface of the substrate. A method of forming the semiconductor structure with dual isolation structure is also disclosed.

Abstract: A theme is to prevent the generation of noise due to damage in a photodetecting portion in a mounting process in a photodiode array, a method of manufacturing the same, and a radiation detector. In a photodiode array, wherein a plurality of photodiodes (4) are formed in array form on a surface at a side of an n-type silicon substrate (3) onto which light to be detected is made incident and penetrating wirings (8), which pass through from the incidence surface side to the back surface side, are formed for the photodiodes (4), the photodiode array (1) is arranged with a transparent resin film (6), which covers the formed regions of the photodiodes (4) and transmits the light to be detected, provided at the incidence surface side.

Abstract: A solid-state imaging device includes, on a semiconductor substrate, a pixel portion having a plurality of pixels provided with a photoelectric conversion portion, which photoelectrically converts incident light to obtain a signal charge and a pixel transistor portion, which converts the signal charge read from the photoelectric conversion portion to a voltage, wherein an element isolation region disposed in the pixel portion includes an insulating film buried in a trench disposed in the semiconductor substrate, and the insulating film includes an insulating film having a negative charge.

Abstract: Ultra thin photodiode array structures and fabrication methods are disclosed. The back illuminated or front illuminated photodiode arrays have the active portion fabricated in a semiconductor layer which may be bonded to a supporting substrate layer. The active portion of semiconductor layer may comprise epitaxially grown layer. The isolation regions between pixels of an array may span the epitaxial layer and a semiconductor layer. Electrical contacts to the diodes are made through the bonded substrate or a portion of active layer. Methods of fabrication include steps to form a photodiode array of this type as well as steps to bond this array to supporting substrates. In some embodiments, supporting substrates are temporarily bonded for support of the methods of processing.

Abstract: A solid state imaging device having a back-illuminated type structure in which a lens is formed on the back side of a silicon layer with a light-receiving sensor portion being formed thereon. Insulating layers are buried into the silicon layer around an image pickup region, with the insulating layer being buried around a contact layer that connects an electrode layer of a pad portion and an interconnection layer of the surface side. A method of manufacturing such a solid-state imaging device is also provided.

Abstract: Disclosed herein is a solid-state imaging element which includes a plurality of drive signal inputs, a plurality of bus lines, and a plurality of vertical transfer register electrodes. In the solid-state imaging element, a charge accumulated in light-receiving elements in a pixel region is vertically transferred by the drive signals input to the electrodes. Each of the electrodes has a contact part connected to the second contact and having a width smaller than a width of the electrodes in the pixel region, and a blank region is formed between predetermined adjacent two of the contact parts so that a width of the blank region is larger than a distance between respective two of the contact parts other than the predetermined adjacent two of the contact parts. The first contact is disposed on the blank region.

Abstract: There is described a structure which is photosensitive to the colour of a light radiation; said structure being formed by a semiconductor substrate having a first type of conductivity and the substrate is adapted to generate a different distribution of carriers upon incidence of a light radiation as the depth varies as a function of the at least one wave length of the light radiation. The structure comprises at least one first and one second element, both arranged in the substrate and adapted to collect the generated carriers; both the first and second element being adapted to generate first and second electrical signals as a response to the amount of collected carriers.

Abstract: An image sensor and a method of manufacturing the same are provided. The image sensor includes a semiconductor substrate, a metal line layer, a first conduction type conducting layer, a first pixel isolation layer, an intrinsic layer, and second conduction type conducting layer. The semiconductor substrate includes a circuit region. The metal line layer including a plurality of metal lines and an interlayer insulating layer is formed on the semiconductor substrate. The first conductive layer having patterns separated from each other by the pixel isolation layer is formed on the metal lines. The first pixel isolation layer is formed between the separated patterns of the first conduction type conducting layer. The intrinsic layer is formed on the first conductive layer and the first pixel isolation layer. The second conduction type conducting layer is formed on the intrinsic layer.

Abstract: A method of fabricating a CMOS image sensor includes forming a substrate structure that includes a first substrate, a second substrate, and an index matching layer containing nitrogen and an oxide layer between the first and second substrates, and, forming at least one light-sensing device in the second substrate, and after forming the substrate structure, forming a metal interconnection structure on a first surface of the second substrate, the first surface facing away from the first substrate, such that the at least one light sensing device is between the metal interconnection structure and the index matching layer and the oxide layer, the metal interconnection structure being electrically connected to the at least one light-sensing device.

Abstract: Channel stop sections are formed by multiple times of impurity ion implanting processes. Four-layer impurity regions are formed across the depth of a semiconductor substrate (across the depth of the bulk), so that a P-type impurity region is formed deep in the semiconductor substrate; thus, incorrect movement of electric charges is prevented. Other four-layer impurity regions of another channel stop section are decreased in width step by step across the depth of the substrate, so that the reduction of a charge storage region of a light receiving section due to the dispersion of P-type impurity in the channel stop section is prevented in the depth of the substrate.

Abstract: A solid state imaging device includes: an imaging region formed in an upper part of a substrate made of silicon to have a photoelectric conversion portion, a charge accumulation region of the photoelectric conversion portion being of a first conductivity type; a device isolation region formed in at least a part of the substrate to surround the photoelectric conversion portion; and a MOS transistor formed on a part of the imaging region electrically isolated from the photoelectric conversion region by the device isolation region. The width of the device isolation region is smaller in its lower part than in its upper part, and the solid state imaging device further includes a dark current suppression region surrounding the device isolation region and being of a second conductivity type opposite to the first conductivity type.

Abstract: A semiconductor device includes: a trench device isolating region formed in a substrate to define a photodiode active region; a channel stop impurity region formed in the substrate contacting the device isolating region, wherein the channel stop impurity region surrounds a bottom and a sidewall of the device isolating region; and a photodiode formed within the photodiode active region.

Abstract: This invention describes an imaging system based on an array of semiconductor photosensitive elements with isolating structure between elements (pixels) of the array. The isolated pixels of the array may be photodiodes and they provide excellent imaging capabilities that are important for many applications. The isolated photosensitive pixels may be comprised also by photoconductors, avalanche photodiodes, photosensitive IC, or other similar solid-state devices. The fields of possible application include but are not limited to the detector modules for homeland security, medical imaging systems (CT, SPECT, and PET including), fundamental and applied research, etc.

Abstract: Disclosed is a die having photodetectors provided on a first surface thereof. The die includes an insulative shell member, a conductive shell member and a photodetector conductor. The insulative shell member extends around a periphery of the photodetector receptors and extending through a depth of the semiconductor die. The conductive shell member bridges the insulative shell member and extends through the depth of the semiconductor die. The photodetector conductors are provided on the first surface of the semiconductor die and electrically couple respective photodetectors with a corresponding conductive shell member. Also disclosed is a process for making a semiconductor die and an integrated circuit structure.

Abstract: A photodiode array 1 is provided with an n-type silicon substrate 3. A plurality of photodiodes 4 are formed in array on the opposite surface side to an incident surface of light L to be detected, in the n-type silicon substrate 3. A resin film 6 for transmitting the light L to be detected is provided so as to cover at least regions corresponding to regions where the photodiodes 4 are formed, on the incident surface side of the light L to be detected, in the n-type silicon substrate 3.

Abstract: Regions of an integrated circuit are isolated by a structure that includes at least one isolating trench on the periphery of an active area. The trench is deep, extending at least about 0.5 ?m into the substrate. The isolating structure prevents photons and electrons originating in peripheral circuitry from reaching the active area. Where the substrate has a heavily-doped lower layer and an upper layer on it, the trench can extend through the upper layer to the lower layer. A thermal oxide can be grown on the trench walls. A liner can also be deposited on the sidewalls of each trench. A fill material having a high-extinction coefficient is then deposited over the liner. The liner can also be light absorbent so that both the liner and fill material block photons.

Abstract: CMOS image sensor having high sensitivity and low crosstalk, particularly at far-red to infrared wavelengths, and a method for fabricating a CMOS image sensor. A CMOS image sensor has a substrate, an epitaxial layer above the substrate, and a plurality of pixels extending into the epitaxial layer for receiving light. The image sensor also includes at least one of a horizontal barrier layer between the substrate and the epitaxial layer for preventing carriers generated in the substrate from moving to the epitaxial layer, and a plurality of lateral barrier layers between adjacent ones of the plurality of pixels for preventing lateral diffusion of electrons in the epitaxial layer.

Abstract: A cell includes a plurality of diffusion region pairs, each of the diffusion region pairs being formed by a first impurity diffusion region which is a constituent of a transistor and a second impurity diffusion region such that the first and second impurity diffusion regions are provided side-by-side in a gate length direction with a device isolation region interposed therebetween. In each of the diffusion region pairs, the first and second impurity diffusion regions have an equal length in the gate width direction and are provided at equal positions in the gate width direction, and a first isolation region portion, which is part of the device isolation region between the first and second impurity diffusion regions, has a constant separation length. In the diffusion region pairs, the first isolation region portions have an equal separation length.

Abstract: Image sensors include a pixel region and a logic region. Pixel isolation regions in the pixel region include pixel isolation region walls that are less sloped than logic isolation region walls in the logic region. An impurity layer also may be provided adjacent at least some of the pixel isolation region walls, wherein at least some of the logic isolation region walls are free of the impurity layer. The impurity layer and/or the less sloped logic isolation region walls may also be provided for NMOS devices in the logic region but not for PMOS devices in the logic region. Doped sacrificial layers may be used to fabricate the impurity layer.

Abstract: An image sensor and a method of manufacturing the same are provided. The image sensor includes a substrate having a sensor array area and a peripheral circuit area a first insulating film structure formed on the peripheral circuit area and including a plurality of first multi-layer wiring lines and a second insulating film structure formed on the sensor array area and including a plurality of second multi-layer wiring lines. The uppermost-layer wiring line of the plurality of first multi-layer wiring lines is higher than that of the uppermost-layer wiring line of the plurality of second multi-layer wiring lines. The first insulating film structure includes an isotropic etch-stop layer, and the second insulating film structure does not include the isotropic etch-stop layer.

Abstract: A solid-state image pickup device comprising a semiconductor substrate which comprises a substrate body containing P-type impurities and a first N-type semiconductor layer containing N-type impurities, the first N-type semiconductor layer being provided on the substrate body, and including a first P-type semiconductor layer which contains p-type impurities, and which is located on the substrate body, a plurality of optical/electrical conversion portions formed of second N-type semiconductor layers which are provided independently of each other in respective positions in a surface portion of the first N-type semiconductor layer, and a plurality of second P-type semiconductor layers which are formed to surround the optical/electrical conversion portions, which are provided along element isolation regions provided in respective positions in the surface portion of the first N-type semiconductor layer, and which continuously extend from the surface portion of the first N-type semiconductor layer to a surface porti

Abstract: A primary object of the present invention is to provide a photoelectric conversion apparatus with less leak current in a floating diffusion region. In order to obtain the above object, a photoelectric conversion apparatus according to the present invention includes a photodiode for converting light into a signal charge, a first semiconductor region having a first conductivity type, a floating diffusion region formed from a second semiconductor region having a second conductivity type for converting the signal charge generated by the photodiode into a signal voltage, the second semiconductor region being formed in the first semiconductor region, and an electrode formed above the first semiconductor region through an insulating film and having an effect of increasing a concentration of majority carriers in the first semiconductor region, in which the electrode is not formed above a depletion region formed from the second semiconductor region.

Abstract: An image sensor may include a semiconductor substrate including a device isolating film and a light receiving device; an insulating film on the semiconductor substrate; a barrier; a metal wire layer on the insulating film; a trench between adjacent metal wires having a protective film pattern on sidewalls thereof; and a photosensitive material in the trench. A method for manufacturing an image sensor may comprise forming an insulating film on a semiconductor substrate, the semiconductor substrate having a device isolating film, a barrier and a light receiving device; forming a metal wire layer on the insulating film; forming a trench between adjacent metal wires; forming a protective film pattern on sidewall surfaces of the trench; forming a photosensitive material over the metal wire layer and in the trench; and planarizing the semiconductor substrate to remove portions of the photosensitive material over the metal wire layer.

Abstract: A method for forming the passivation layer for silicon-isolation interface between photosensitive regions of an image sensor, the method includes providing a substrate having a plurality of spaced apart photosensitive regions that collect charge in response to incident light; etching trenches in the substrate between the photosensitive regions; forming a plurality of masks over the photosensitive regions so that trenches between the photosensitive regions are not covered by the masks; implanting the image sensor with a first low dose to passivate the trenches; filling the trenches with a dielectric to form isolation between the photosensitive regions; forming a plurality of masks which cover the photosensitive regions but does not cover a surface corner of the isolation trench to permit passivation implantation at the surface corner of the trench isolation; and implanting the image sensor at a second low dose to passivate the surface corner of trenched isolation region.

Abstract: The embodiments of the invention provide a device, method, etc. for a dual stress STI. A semiconductor device is provided having a substrate with a first transistor region and a second transistor region different than the first transistor region. The first transistor region includes a PFET; and, the second transistor region includes an NFET. Further, STI regions are provided in the substrate adjacent sides of and positioned between the first transistor region and the second transistor region, wherein the STI regions each include a compressive region, a compressive liner, a tensile region, and a tensile liner.

Abstract: An image sensor is provided. The image sensor includes a substrate; a first isolation region, a second isolation region, a plurality of photoelectric transducer devices, a read element and a floating diffusion region. The second isolation region has a depth that is less than that of the first isolation region. The plurality of photoelectric transducer devices is isolated from one another by the first isolation region. The read element and the floating diffusion region are isolated from the photoelectric transducer devices by the second isolation region.

Abstract: In an optical unit including a photoelectric conversion chip adapted to be optically connected to an optical fiber, and a semiconductor chip for driving the photoelectric conversion chip, both the photoelectric conversion chip and the semiconductor chip are wrapped with a flexible sheet, to thereby produce an enveloper enveloping the photoelectric conversion chip and the semiconductor chip therein. At least a part of the enveloper is formed as a transparent area for allowing an optical connection between the optical fiber and the photoelectric conversion chip.

Abstract: The present disclosure is directed to a CMOS active pixel sensor that compensates for variations in a threshold voltage of a source follower contained therein. A structure in accordance with an embodiment includes: a replica source follower transistor; a system for creating a current in said replica source follower transistor such that a gate-source voltage of said replica source follower is substantially equal to a threshold voltage of said replica source follower; and a current mirror for biasing the isolation source follower transistor at a same current density as the replica source follower transistor.

Abstract: There is provided a method of producing a semiconductor device. The method includes the steps of: forming a first hard mask having an opening above a substrate; forming a sacrificial film above a side surface of the opening of the first hard mask; forming a second hard mask in the opening having the sacrificial film above the side surface; removing the sacrificial film after the second hard mask is formed; ion implanting a first conductivity-type impurity through the first hard mask; and ion implanting a second conductivity-type impurity through the first and second hard masks.

Abstract: Isolation methods and devices for isolating regions of a semiconductor device are disclosed. The isolation methods and structures include forming an isolating trench among pixels or other active areas of a semiconductor device. The trench extends through the substrate to the base layer, wherein a liner may be deposited on the side walls of the trench. A conductive material is deposited into the trench to block electrons from passing through.

Abstract: An inversion layer is formed in a part as a boundary between (a) a defect control layer formed along a trench surface for isolating pixel calls and (b) a photo diode. The defect control layer is a P-type, and the photo diode and the inversion layer are N-type. Here, an impurity concentration in the inversion layer is at least twice as high as an impurity concentration in the photo diode.

Abstract: A solid-state image sensor of the present invention has a plurality of pixel cells that generate signal charges in accordance with incident light. It is characterized by having a gettering region within the area of a pixel cell. The gettering region, which is disposed closely to the photoelectrical conversion layer, makes direct and efficient use of gettering capability in the pixel region in the solid-state image sensor. As a result, it is possible to effectively eliminate metal contaminant contained in the pixel region, thereby remarkably reducing dark outputs occurring from the metal contaminant.

Abstract: A photodetector array includes a semiconductor substrate having opposing first and second main surfaces, a first layer of a first doping concentration proximate the first main surface, and a second layer of a second doping concentration proximate the second main surface. The photodetector includes at least one conductive via formed in the first main surface and an anode/cathode region proximate the first main surface and the at least one conductive via. The via extends to the second main surface. The conductive via is isolated from the semiconductor substrate by a first dielectric material. The anode/cathode region is a second conductivity opposite to the first conductivity. The photodetector includes a doped isolation region of a third doping concentration formed in the first main surface and extending through the first layer of the semiconductor substrate to at least the second layer of the semiconductor substrate.

Abstract: A method of manufacturing a photodetecting device, by providing a first wafer that includes a photosensitive layer made of a semiconductor material and a second wafer that includes a circuit layer of electronic components, with one of the photosensitive layer or the circuit layer incorporating a field isolation layer; bonding the first and second wafers to form a structure comprising successively the circuit layer, the field isolation layer and the photosensitive layer; and forming electrically conductive vias to electrically connect the photosensitive layer to at least some of the electronic components of the circuit layer. Also, photodetecting devices prepared by these methods.

Abstract: A solid-state imaging device capable of reducing the occurrence of a dark current and a pixel defect is provided. A solid-state imaging device 10 is formed in which a plurality of photoelectric conversion elements 4 are formed in a semiconductor substrate 1; circuits 5 which read out signal charge from each of the plurality of photoelectric conversion elements 4 are respectively formed on the semiconductor substrate 1; light is applied from the opposite side to the circuits 5 which read out signal charge from each of the plurality of photoelectric conversion elements; and a gettering region is provided in an element-isolation area 2 which separate the photoelectric conversion elements 4 adjacent to each other.

Abstract: An image sensor for minimizing a dark level defect is disclosed. The image sensor includes an isolation layer formed on a substrate. A field region and an active region are defined on the substrate by the isolation layer. A photodiode is formed in the image sensor in such a structure that a first region is formed below a surface of the substrate in the active region and a second region is formed under the first region. A first conductive type impurity is implanted into the first region and a second conductive type impurity is implanted into the second region. A dark current suppressor is formed on side and bottom surfaces of the isolation layer adjacent to the first region, and the dark current suppressor is doped with the second conductive type impurity. The dark current suppressor suppresses the dark current to minimize the dark level defect caused by the dark current.

Abstract: Provided are an image sensor and a method of fabricating the same. The image sensor according to an embodiment includes a semiconductor substrate including a circuit region; a metal interconnection layer including a metal interconnection and an interlayer dielectric on the semiconductor substrate; a plurality of first pixel isolation layers on the interlayer dielectric, each of the first pixel isolation layers protruding above a top surface of the interlayer dielectric; and a light receiving portion between the first pixel isolation layers, the light receiving portion including protruding portions along sidewalls of the first pixel isolation layers.

Abstract: A semiconductor device includes a semiconductor substrate, an isolation film that is provided in one principal surface of the semiconductor substrate, wiring that is arranged on the isolation film, a diffusion layer that is formed inside the semiconductor substrate and located in the vicinity of the isolation film, and an insulating film that covers the diffusion layer over the one principal surface of the semiconductor substrate. The insulating film further covers a portion of the isolation film near to the diffusion layer and comes into contact with the side of the wiring near to the diffusion layer.

Abstract: The present disclosure provides an image sensor semiconductor device. A semiconductor substrate having a first-type conductivity is provided. A plurality of sensor elements is formed in the semiconductor substrate. An isolation feature is formed between the plurality of sensor elements. An ion implantation process is performed to form a doped region having the first-type conductivity substantially underlying the isolation feature using at least two different implant energy.

Abstract: Methods, methods of making, devices, and systems for image sensors that include isolation regions are disclosed. A semiconductor imager includes a pixel array and peripheral circuitry arranged on at least one side of the pixel array. Array devices are formed as part of the pixel array and periphery devices are formed in the periphery. Array isolation regions are disposed around at least a portion of at least some of the array devices and periphery isolation regions are disposed around at least a portion of at least some of the periphery devices. Within the semiconductor imager, the periphery isolation regions are configured differently from the array isolation regions. The semiconductor image sensor may be included in as part of an imaging system that includes a processor.

Abstract: A solid-state image pickup device includes an element isolation insulating film electrically isolating pixels on the surface of a well region; a first isolation diffusion layer electrically isolating the pixels under the element isolation insulating film; and a second isolation diffusion layer electrically isolating the pixels under the first isolation diffusion layer, wherein a charge accumulation region is disposed in the well region surrounded by the first and second isolation diffusion layers, the inner peripheral part of the first isolation diffusion layer forms a projecting region, an impurity having a conductivity type of the first isolation diffusion layer and an impurity having a conductivity type of the charge accumulation region are mixed in the projecting region, and a part of the charge accumulation region between the charge accumulation region and the second isolation diffusion layer is abutted or close to the second isolation diffusion layer under the projecting region.

Abstract: Regions of an integrated circuit are isolated by a structure that includes at least one isolating trench on the periphery of an active area. The trench is deep, extending at least about 0.5 ?m into the substrate. The isolating structure prevents photons and electrons originating in peripheral circuitry from reaching the active area. Where the substrate has a heavily-doped lower layer and an upper layer on it, the trench can extend through the upper layer to the lower layer. A thermal oxide can be grown on the trench walls. A liner can also be deposited on the sidewalls of each trench. A fill material having a high-extinction coefficient is then deposited over the liner. The liner can also be light absorbent so that both the liner and fill material block photons.

Abstract: An image sensor for minimizing a dark level defect is disclosed. The image sensor includes an isolation layer formed on a substrate. A field region and an active region are defined on the substrate by the isolation layer. A photodiode is formed in the image sensor in such a structure that a first region is formed below a surface of the substrate in the active region and a second region is formed under the first region. A first conductive type impurity is implanted into the first region and a second conductive type impurity is implanted into the second region. A dark current suppressor is formed on side and bottom surfaces of the isolation layer adjacent to the first region, and the dark current suppressor is doped with the second conductive type impurity. The dark current suppressor suppresses the dark current to minimize the dark level defect caused by the dark current.

Abstract: Multiple trench depths within an integrated circuit device are formed by first forming trenches in a substrate to a first depth, but of varying widths. Formation of a dielectric layer can cause some of the trenches to fill or close off while leaving other, wider trenches open. Removal of a portion of the dielectric material can then be tailored to expose a bottom of the open trenches while leaving remaining trenches filled. Removal of exposed portions of the underlying substrate can then be used to selectively deepen the open trenches, which can subsequently be filled. Such methods can be used to form trenches of varying depths without the need for subsequent masking.

Abstract: A method and system is disclosed for reducing or eliminating leakage between a pinned photodiode and shallow trench isolation structure fabricated therewith while optimizing the sensitivity of the photodiode. Provided is a system with an N+ region implanted in a P-type substrate; a P-type well separating the N+ region from the shallow trench isolation (STI) structure; and at least a P+ region over the N+ region, and overlapping at least part of the P-type well and a substrate portion between the N+ region and P-type well. The space between the N+ region and a damaged region adjacent the STI is greater than the distance that the depletion region between the N+ region and the P-type well, expands. The junctions of the various features are optimized to maximize a photosensitive response for the wavelength of the absorbed light as well as reducing or eliminating electrical leakage.

Abstract: The present invention relates to bipolar junction transistors (BJTS). The collector region of each BJT is located in a semiconductor substrate surface and adjacent to a first shallow trench isolation (STI) region. A second STI region is provided, which extends between the first STI region and the collection region and undercuts a portion of the active base region with an undercut angle of not more than about 90°. For example, the second STI region may a substantially triangular cross-section with an undercut angle of less than about 90°, or a substantially rectangular cross-section with an undercut angle of about 90°. Such a second STI region can be fabricated using a porous surface section formed in an upper surface of the collector region.