Schottky Barrier (e.g., A Transparent Schottky Metallic Layer Or A Schottky Barrier Containing At Least One Of Indium Or Tin (e.g., Sno 2 , Indium Tin Oxide)) Patents (Class 257/449)
  • Publication number: 20110233382
    Abstract: The inventors disclose a new high performance optical sensor, preferably of nanoscale dimensions, that functions at room temperature based on an extraordinary optoconductance (EOC) phenomenon, and preferably an inverse EOC (I-EOC) phenomenon, in a metal-semiconductor hybrid (MSH) structure having a semiconductor/metal interface. Such a design shows efficient photon sensing not exhibited by bare semiconductors. In experimentation with an exemplary embodiment, ultrahigh spatial resolution 4-point optoconductance measurements using Helium-Neon laser radiation reveal a strikingly large optoconductance property, an observed maximum measurement of 9460% EOC, for a 250 nm device. Such an exemplary EOC device also demonstrates specific detectivity higher than 5.06×1011 cm?Hz/W for 632 nm illumination and a high dynamic response of 40 dB making such sensors technologically competitive for a wide range of practical applications.
    Type: Application
    Filed: January 7, 2011
    Publication date: September 29, 2011
    Inventors: Stuart A. Solin, Samuel A. Wickline, AKM Shah Newaz, Kirk D. Wallace
  • Patent number: 8022494
    Abstract: A lateral photodiode, with improved response speed, includes a semiconductor substrate having active regions, and a p-type region and an n-type region arranged parallel to the surface of the substrate. The active regions are an n-layer and a p-layer respectively, and stacked in the thickness direction of the substrate to form a p-n junction. In addition, a barrier layer, for preventing movement of carriers from the substrate toward the active region, is provided on the side of the active regions toward the substrate.
    Type: Grant
    Filed: January 31, 2007
    Date of Patent: September 20, 2011
    Assignees: FUJIFILM Corporation, Massachusetts Institute of Technology
    Inventors: Yukiya Miyachi, Wojciech P. Giziewicz, Jurgen Michel, Lionel C. Kimerling
  • Patent number: 8003200
    Abstract: A transparent electrically-conductive film of the present invention comprises a transparent film substrate, a hard coat layer formed on one side of the transparent film substrate, a SiOx layer with a thickness of 10 nm to 300 nm that is formed on the hard coat layer by a dry process, and a transparent electrically-conductive thin layer with a thickness of 20 nm to 35 nm that is formed on another side of the transparent film substrate. The transparent electrically-conductive film has good resistance to moisture and heat and high durability against pen-based input and can be prevented from cracking during a punching process and also prevented from waving or curling even in a high-temperature, high-humidity environment.
    Type: Grant
    Filed: September 27, 2005
    Date of Patent: August 23, 2011
    Assignee: Nitto Denko Corporation
    Inventors: Tomotake Nashiki, Hideo Sugawara, Hidehiko Andou, Hidetoshi Yoshitake
  • Patent number: 7973379
    Abstract: A photovoltaic ultraviolet sensor comprises a zinc oxide single crystal substrate. On the +c face of the zinc oxide single crystal substrate, an ultraviolet receiver is formed. The exemplary ultraviolet receiver includes a Schottky electrode which, when receiving ultraviolet rays, produces a voltage in cooperation with the zinc oxide single crystal substrate. The ultraviolet sensor does not have any sensitivity to the visible rays. The ultraviolet sensor has a relatively fast response of several microseconds.
    Type: Grant
    Filed: March 23, 2006
    Date of Patent: July 5, 2011
    Assignees: Citizen Holdings Co., Ltd., Local Independent Administrative Agency Iwate Industrial Research Institute, Incorporated National University Iwate University
    Inventors: Mayo Sugibuchi, Kohsuke Takahashi, Shunsuke Goto, Yasube Kashiwaba, Haruyuki Endo, Tatsuo Hasegawa, Fukunori Izumida, Eriko Ohshima
  • Patent number: 7943994
    Abstract: The present invention discloses an integrated PMOS transistor and Schottky diode, comprising a PMOS transistor which includes a gate, a source, a drain and a channel region between the source and drain, wherein the source, drain and channel region are formed in a substrate, and a parasitic diode is formed between the drain and the channel region; and a Schottky diode formed in the substrate and connected in reverse series with the parasitic diode, the Schottky diode having one end connected with the parasitic diode and the other end connected with the source.
    Type: Grant
    Filed: May 22, 2009
    Date of Patent: May 17, 2011
    Assignee: Richtek Technology Corporation, R.O.C.
    Inventor: Chih-Feng Huang
  • Publication number: 20110089516
    Abstract: Provided is a rectifier such as a detector in which a cutoff frequency may be increased in a view point different from the reduction in size of the structure. The rectifier includes: a Schottky barrier portion including a Schottky electrode; a barrier portion having a rectifying property with respect to a majority carrier in the Schottky barrier portion; and an ohmic electrode in electrical contact with the barrier portion having the rectifying property, in which each of the Schottky barrier portion and the barrier portion having the rectifying property has an asymmetrical band profile whose gradient on one side is larger than a gradient of another side, and the Schottky barrier portion and the barrier portion having the rectifying property are connected to each other so that the steep gradient side of the band profile is located on a side of the Schottky electrode.
    Type: Application
    Filed: July 27, 2009
    Publication date: April 21, 2011
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Ryota Sekiguchi
  • Patent number: 7919344
    Abstract: Provided is an image sensor and a method for manufacturing the same. The image sensor includes a substrate on which a circuitry including a first lower metal line and a second lower metal line is formed. A lower electrode is formed on the first lower metal line. A separation metal pattern surrounds the lower electrode and connected to the second lower metal line. An intrinsic layer is formed on the lower electrode. A second conductive type conduction layer is formed on the intrinsic layer. An upper electrode is formed on the second conductive type conductive layer. A bias can be applied to the second lower metal line such that the separation metal pattern can provide a Schottky Barrier, directing electrons to the lower electrode and inhibiting crosstalk between pixels.
    Type: Grant
    Filed: October 14, 2008
    Date of Patent: April 5, 2011
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Tae Gyu Kim
  • Patent number: 7906785
    Abstract: A vertical nitride semiconductor light emitting device and a manufacturing method thereof are provided. In the device, an ohmic contact layer, a p-type nitride semiconductor layer, an active layer, an n-type nitride semiconductor layer and an n-electrode are sequentially formed on a conductive substrate. At least one of a surface of the p-type nitride semiconductor layer contacting the ohmic contact layer and a surface of the n-type nitride layer contacting the n-electrode has a high resistance area of damaged nitride single crystal in a substantially central portion thereof. The high resistance area has a Schottky junction with at least one of the ohmic contact layer and the n-electrode.
    Type: Grant
    Filed: October 24, 2006
    Date of Patent: March 15, 2011
    Assignee: Samsung LED Co., Ltd.
    Inventors: Doo Go Baik, Bang Won Oh, Tae Jun Kim
  • Patent number: 7880174
    Abstract: An object of the present invention is to reduce the conducting loss of an existing conversion circuit while suppressing its noise. The present invention is typically a circuit arrangement includes at least one switching device and a free-wheel diode connected in parallel with the switching device. The free-wheel diode is formed by connecting a silicon PiN diode in parallel with a Schottky barrier diode that uses a semiconductor material having a wider band gap than silicon as a base material. The silicon PiN diode and Schottky barrier diode are separate chips.
    Type: Grant
    Filed: February 12, 2008
    Date of Patent: February 1, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Haruka Shimizu, Katsumi Ishikawa, Masahiro Nagasu, Dai Tsugawa
  • Patent number: 7851881
    Abstract: A merged PN/Schottky diode is provided having a substrate of a first conductivity type and a grid of doped wells of the second conductivity type embedded in the substrate. A Schottky barrier metal layer makes a Schottky barrier contact with the surface of the substrate above the grid. Selected embedded wells in the grid make a Schottky barrier contact to the Schottky barrier metal layer, while most embedded wells do not. The diode forward voltage drop is reduced for the same diode area with reverse blocking benefits similar to a conventional JBS structure.
    Type: Grant
    Filed: February 3, 2009
    Date of Patent: December 14, 2010
    Assignee: Microsemi Corporation
    Inventors: Feng Zhao, Bruce Odekirk, Dumitru Sdrulla
  • Patent number: 7834367
    Abstract: A method of making a diode begins by depositing an AlxGa1?xN nucleation layer on a SiC substrate, then depositing an n+ GaN buffer layer, an n? GaN layer, an AlxGa1?xN barrier layer, and an SiO2 dielectric layer. A portion of the dielectric layer is removed and a Schottky metal deposited in the void. The dielectric layer is affixed to the support layer with a metal bonding layer using an Au-Sn utectic wafer bonding process, the substrate is removed using reactive ion etching to expose the n+ layer, selected portions of the n+, n?, and barrier layers are removed to form a mesa diode structure on the dielectric layer over the Schottky metal,; and an ohmic contact is deposited on the n+ layer.
    Type: Grant
    Filed: January 19, 2007
    Date of Patent: November 16, 2010
    Assignee: Cree, Inc.
    Inventors: Primit Parikh, Sten Heikman
  • Publication number: 20100244174
    Abstract: A device with increased photo-sensitivity using laser treated semiconductor as detection material is disclosed. In some embodiments, the laser treated semiconductor may be placed between and an n-type and a p-type contact or two Schottky metals. The field within the p-n junction or the Schottky metal junction may aid in depleting the laser treated semiconductor section and may be capable of separating electron hole pairs. Multiple device configurations are presented, including lateral and vertical configurations.
    Type: Application
    Filed: May 18, 2010
    Publication date: September 30, 2010
    Applicant: SIONYX, INC.
    Inventors: Nathaniel J. McCaffrey, James E. Carey
  • Patent number: 7800193
    Abstract: Both high light receiving sensitivity and high speed of a photodiode are achieved at the same time. The photodiode is provided with a semiconductor layer (1) and a pair of metal electrodes (2) which are arranged on the surface of the semiconductor layer (1) at an interval (d) and form an MSM junction. The interval (d) satisfies the relationship of ?>d>?/100, where ? is the wavelength of incident light. The metal electrodes (2) can induce surface plasmon. At least one of the electrodes forms a Schottky junction with the semiconductor layer (1), and a low end portion is embedded in the semiconductor layer (1) to a position at a depth less than ?/2n, where n is the refractive index of the semiconductor layer (1).
    Type: Grant
    Filed: March 8, 2007
    Date of Patent: September 21, 2010
    Assignee: NEC Corporation
    Inventors: Junichi Fujikata, Keishi Ohashi
  • Patent number: 7781048
    Abstract: A transparent conductive multilayer body of the present invention is characterized by having: a transparent film base; an SiOx film (x is no less than 1.5 and less than 2) which is provided on one surface of the above described film base in accordance with a dry process, and has a thickness of 1 nm to 30 nm and a relative index of refraction of 1.6 to 1.9; an SiO2 film which is provided on the above described SiOx film and has a thickness of 10 nm to 50 nm; and a transparent conductive thin film which is provided on the above described SiO2 film and has a thickness of 20 nm to 35 nm.
    Type: Grant
    Filed: August 16, 2006
    Date of Patent: August 24, 2010
    Assignee: Nitto Denko Corporation
    Inventors: Tomotake Nashiki, Hideo Sugawara, Hidetoshi Yoshitake
  • Publication number: 20100200941
    Abstract: Intended is to provide a device structure, which makes the light receiving sensitivity and the high speediness of a photodiode compatible. Also provided is a Schottky barrier type photodiode having a conductive layer formed on the surface of a semiconductor layer. The photodiode is so constituted that a light can be incident on the back side of the semiconductor layer, and that a periodic structure, in which a light incident from the back side of the semiconductor layer causes a surface plasmon resonance, is made around the Schottky junction of the photodiode.
    Type: Application
    Filed: November 28, 2007
    Publication date: August 12, 2010
    Inventors: Junichi Fujikata, Daisuke Okamoto, Kikuo Makita, Kenichi Nishi, Keishi Ohashi
  • Patent number: 7745901
    Abstract: A device with increased photo-sensitivity using laser treated semiconductor as detection material is disclosed. In some embodiments, the laser treated semiconductor may be placed between and an n-type and a p-type contact or two Schottky metals. The field within the p-n junction or the Schottky metal junction may aid in depleting the laser treated semiconductor section and may be capable of separating electron hole pairs. Multiple device configurations are presented, including lateral and vertical configurations.
    Type: Grant
    Filed: January 29, 2009
    Date of Patent: June 29, 2010
    Assignee: SiOnyx, Inc.
    Inventors: Nathaniel J. McCaffrey, James E. Carey
  • Patent number: 7705415
    Abstract: A device for detecting electromagnetic radiation, charged particles or photons including a 2-dimensional electron gas (2DEG) and/or a 2-dimensional hole gas (2DHG). The device detects the collective response of the plasma to perturbations of the 2DEG and/or the 2DHG. The device is tunable by using Schottky contacts. The device can be used for high-speed photodetector devices, terahertz sensors, and charged particle sensors.
    Type: Grant
    Filed: August 12, 2005
    Date of Patent: April 27, 2010
    Assignee: Drexel University
    Inventor: Bahram Nabet
  • Patent number: 7701028
    Abstract: The pixel for use in an image sensor comprises a low-doped semiconductor substrate (A). On the substrate (A), an arrangement of a plurality of floating areas e.g., floating gates (FG2-FG6), is provided. Neighboring floating gates are electrically isolated from each other yet capacitively coupled to each other. By applying a voltage (V2-V1) to two contact areas (FG1, FG7), a lateral steplike electric field is generated. Photogenerated charge carriers move along the electric-field lines to the point of highest potential energy, where a floating diffusion (D) accumulate the photocharges. The charges accumulated in the various pixels are sequentially read out with a suitable circuit known from image-sensor literature, such as a source follower or a charge amplifier with row and column select mechanisms. The pixel of offers at the same time a large sensing area, a high photocharge-detection sensitivity and a high response speed without any static current consumption.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: April 20, 2010
    Assignee: MESA Imaging AG
    Inventors: Rolf Kaufmann, Michael Lehmann, Peter Seitz
  • Patent number: 7700975
    Abstract: Metal-Semiconductor-Metal (“MSM”) photodetectors and methods to fabricate thereof are described. The MSM photodetector includes a thin heavily doped (“delta doped”) layer deposited at an interface between metal contacts and a semiconductor layer to reduce a dark current of the MSM photodetector. In one embodiment, the semiconductor layer is an intrinsic semiconductor layer. In one embodiment, the thickness of the delta doped layer is less than 100 nanometers. In one embodiment, the delta doped layer has a dopant concentration of at least 1×1018 cm?3. A delta doped layer is formed on portions of a semiconductor layer over a substrate. Metal contacts are formed on the delta doped layer. A buffer layer may be formed between the substrate and the semiconductor layer. In one embodiment, the substrate includes silicon, and the semiconductor layer includes germanium.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: April 20, 2010
    Assignee: Intel Corporation
    Inventors: Titash Rakshit, Miriam Reshotko
  • Publication number: 20100090226
    Abstract: Au base electrode materials have fatal disadvantages, such as inferior adhesion to diamond, low mechanical strength, and low thermal stability. A diamond UV sensor is provided which includes a photoconductive or Schottky optical sensor element having two-terminal electrodes and detects light irradiating a light-receiving portion according to the changes in electrical resistance or photo-induced current of the material of the light-receiving portion. The sensor element includes diamond having a surface from which a conductive surface layer has been removed, and the surface of the diamond is used as the light-receiving portion and a junction interface with the electrodes. The electrodes include a rectifying and an ohmic electrode. The rectifying electrode is transparent electrode capable of transmitting light and is defined by a single layer made of a nitride of a refractory metal element.
    Type: Application
    Filed: July 28, 2006
    Publication date: April 15, 2010
    Applicant: NATIONAL INSTITUTE FOR MATERIALS SCIENCE
    Inventors: Yasuo Koide, Meiyong Liao, Jose Antonio Alvarez
  • Patent number: 7692204
    Abstract: A radiation-emitting semiconductor component with a semiconductor body, including a first principal surface (5), a second principal surface (9) and a semiconductor layer sequence (4) with an electromagnetic radiation generating active zone (7), in which the semiconductor layer sequence (4) is disposed between the first and the second principal surfaces (5, 9), a first current spreading layer (3) is disposed on the first principal surface (5) and electrically conductively connected to the semiconductor layer sequence (4), and a second current spreading layer (10) is disposed on the second principal surface (9) and electrically conductively connected to the semiconductor layer sequence (4).
    Type: Grant
    Filed: July 30, 2004
    Date of Patent: April 6, 2010
    Assignee: OSRAM GmbH
    Inventors: Wilhelm Stein, Reiner Windisch, Ralph Wirth, Ines Pietzonka
  • Patent number: 7679662
    Abstract: Disclosed herein is a solid-state imaging element which includes a plurality of drive signal inputs, a plurality of bus lines, and a plurality of vertical transfer register electrodes. In the solid-state imaging element, a charge accumulated in light-receiving elements in a pixel region is vertically transferred by the drive signals input to the electrodes. Each of the electrodes has a contact part connected to the second contact and having a width smaller than a width of the electrodes in the pixel region, and a blank region is formed between predetermined adjacent two of the contact parts so that a width of the blank region is larger than a distance between respective two of the contact parts other than the predetermined adjacent two of the contact parts. The first contact is disposed on the blank region.
    Type: Grant
    Filed: November 9, 2006
    Date of Patent: March 16, 2010
    Assignee: Sony Corporation
    Inventors: Sadamu Suizu, Masaaki Takayama
  • Patent number: 7633135
    Abstract: This invention discloses a bottom-anode Schottky (BAS) diode that includes an anode electrode disposed on a bottom surface of a semiconductor substrate. The bottom-anode Schottky diode further includes a sinker dopant region disposed at a depth in the semiconductor substrate extending substantially to the anode electrode disposed on the bottom surface of the semiconductor and the sinker dopant region covered by a buried Schottky barrier metal functioning as an Schottky anode.
    Type: Grant
    Filed: July 22, 2007
    Date of Patent: December 15, 2009
    Assignee: Alpha & Omega Semiconductor, Ltd.
    Inventor: François Hébert
  • Patent number: 7608904
    Abstract: A semiconductor device component includes at least one conductive via. The at least one conductive via may include a seed layer for facilitating adhesion of a conductive material within the via aperture, a barrier material and solder, or a silicon-containing filler. Systems including such semiconductor device components are also disclosed.
    Type: Grant
    Filed: March 12, 2007
    Date of Patent: October 27, 2009
    Assignee: Micron Technology, Inc.
    Inventor: Nishant Sinha
  • Patent number: 7592632
    Abstract: A small-sized and high-efficiency light emitting device capable of easily emitting green light includes a resonator including a photonic crystal having a refractive-index periodic structure and a point defect member formed in the photonic crystal to disturb the refractive-index periodic structure, and an active member provided inside the resonator and formed by an In containing nitride semiconductor, wherein a wavelength determined by a band gap energy of the active member is included in a photonic band gap range of the photonic crystal, and is set to be shorter than a peak wavelength at a shortest-wavelength side of a resonance mode of the resonator in the photonic band gap range.
    Type: Grant
    Filed: September 25, 2007
    Date of Patent: September 22, 2009
    Assignee: Canon Kabushiki Kaisha
    Inventor: Akinari Takagi
  • Publication number: 20090134486
    Abstract: Both high light receiving sensitivity and high speed of a photodiode are achieved at the same time. The photodiode is provided with a semiconductor layer (1) and a pair of metal electrodes (2) which are arranged on the surface of the semiconductor layer (1) at an interval (d) and form an MSM junction. The interval (d) satisfies the relationship of ?>d>?100, where ? is the wavelength of incident light. The metal electrodes (2) can induce surface plasmon. At least one of the electrodes forms a Schottky junction with the semiconductor layer (1), and a low end portion is embedded in the semiconductor layer (1) to a position at a depth less than ?/2n, where n is the refractive index of the semiconductor layer (1).
    Type: Application
    Filed: March 8, 2007
    Publication date: May 28, 2009
    Applicant: NEC CORPORATION
    Inventor: Junichi Fujikata
  • Patent number: 7538362
    Abstract: The invention relates to a lateral semiconductor diode, in which contact metal fillings (6, 7), which run in trenches (3, 4) in particular in a silicon carbide body (1, 2), are interdigitated at a distance from one another, and a rectifying Schottky or pn junction (18) is provided.
    Type: Grant
    Filed: August 29, 2005
    Date of Patent: May 26, 2009
    Assignee: Infineon Technologies AG
    Inventors: Gabriel Konrad Dehlinger, Michael Treu
  • Patent number: 7518208
    Abstract: A semiconductor device has a first region and a second region formed on a surface of a substrate. Plural first conductors and second conductors are formed in the first and second regions respectively. A first semiconductor region and a second semiconductor region are formed between adjacent first conductors. The second semiconductor region is in the first semiconductor region and has a conductivity type opposite to that of the first semiconductor. A third semiconductor region is formed between adjacent second conductors. The third semiconductor region has the same conductivity type as the second semiconductor region and is lower in density than the second semiconductor region. The third semiconductor region has a metal contact region for contact with a metal, which is electrically connected to the second semiconductor region. A center-to-center distance between adjacent first conductors is smaller than that between adjacent second conductors.
    Type: Grant
    Filed: July 10, 2006
    Date of Patent: April 14, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Nobuyuki Shirai, Nobuyoshi Matsuura, Yoshito Nakazawa
  • Patent number: 7508573
    Abstract: A structure of an optical switch makes the optical switch capable of receiving broadband signals. And the manufacturing procedure is simplified.
    Type: Grant
    Filed: May 25, 2006
    Date of Patent: March 24, 2009
    Assignee: Atomic Energy Council - Institute of Nuclear Energy Research
    Inventors: Chih-Hung Wu, Kai-Sheng Chang, Hwa-Yuh Shih, Yen-Chang Tzeng
  • Patent number: 7495257
    Abstract: An object of the present invention is to provide a light emitting device in which variations in an emission spectrum depending on a viewing angle with respect to a side from which luminescence is extracted are decreased. A light emitting device according to the invention has a transistor, an insulating layer covering the transistor and a light emitting element provided in an opening of the insulating layer. The transistor and the light emitting element are electronically connected through a connecting portion. Additionally, the connecting portion is connected to the transistor through a contact hole penetrating the insulating layer. Note that the insulating layer may be a single layer or a multilayer in which a plurality of layers including different substances is laminated.
    Type: Grant
    Filed: December 21, 2004
    Date of Patent: February 24, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takahiro Kawakami, Kaoru Tsuchiya, Takeshi Nishi
  • Patent number: 7492029
    Abstract: A semiconductor structure. The structure includes (a) a semiconductor channel region, (b) a semiconductor source block in direct physical contact with the semiconductor channel region; (c) a source contact region in direct physical contact with the semiconductor source block, wherein the source contact region comprises a first electrically conducting material, and wherein the semiconductor source block physically isolates the source contact region from the semiconductor channel region, and (d) a drain contact region in direct physical contact with the semiconductor channel region, wherein the semiconductor channel region is disposed between the semiconductor source block and the drain contact region, and wherein the drain contact region comprises a second electrically conducting material; and (e) a gate stack in direct physical contact with the semiconductor channel region.
    Type: Grant
    Filed: July 8, 2008
    Date of Patent: February 17, 2009
    Assignee: International Business Machines Corporation
    Inventor: Edward J. Nowak
  • Patent number: 7453119
    Abstract: This invention discloses a semiconductor power device that includes a plurality of power transistor cells surrounded by a trench opened in a semiconductor substrate. At least one active cell further includes a trenched source contact opened between the trenches wherein the trenched source contact opened through a source region into a body region for electrically connecting the source region to a source metal disposed on top of an insulation layer wherein a trench bottom surface of the trenched source contact further covered with a conductive material to function as an integrated Schottky barrier diode in said active cell. A shielding structure is disposed at the bottom and insulated from the trenched gate to provide shielding effect for both the trenched gate and the Schottky diode.
    Type: Grant
    Filed: March 10, 2006
    Date of Patent: November 18, 2008
    Assignee: Alphs & Omega Semiconductor, Ltd.
    Inventors: Anup Bhalla, Sik K. Lui
  • Patent number: 7438978
    Abstract: A touch panel having excellent durability, in which depression is scarcely generated on the surface of the touch panel by pushing the surface with a pen, and a transparent conductive film and plate useful in the touch panel are provided. The transparent conductive film comprises a first polymer film having a transparent conductive thin layer thereon and a second polymer film having a hardcoat layer thereon, the first and second polymer films being bonded each other through an adhesive layer such that a surface having no transparent conductive thin layer of the first polymer film faces a surface having no hardcoat layer of the second polymer film, wherein work of the adhesive layer in elastic deformation is not less than 60%. The transparent conductive plate is provided with the adhesive layer, the touch panel is provided with the transparent conductive film or plate as an upper or lower electrode.
    Type: Grant
    Filed: August 2, 2005
    Date of Patent: October 21, 2008
    Assignee: Bridgestone Corporation
    Inventors: Hidefumi Kotsubo, Masato Yoshikawa, Yasuhiro Morimura, Kiyomi Sasaki
  • Patent number: 7432577
    Abstract: A semiconductor component for detecting electromagnetic radiation includes a contact between a metal and a semiconductor. The semiconductor has at least one metal-chalcogenide compound semiconductor as an optical absorbing material or is configured completely from said semiconductor. This allows a cost-effective component to be produced which reacts to electromagnetic radiation in a specifically defined manner. The semiconductor component can be used in an electronic component and a sensor system. A method is also described for producing a semiconductor component by bringing a substrate into contact with a solution, in which a precursor of metal-chalcogenide compound semiconductor is dissolved and/or suspended.
    Type: Grant
    Filed: October 10, 2000
    Date of Patent: October 7, 2008
    Assignee: Satronic AG
    Inventors: Tilman Weiss, Christoph Thiedig, Stefan Langer, Oliver Hilt, Hans Georg Koerner, Sebastian Stahn, Stephan Swientek
  • Patent number: 7420215
    Abstract: A transparent conductive film substantially made from In2O3, SnO2 and ZnO, having a molar ratio In/(In+Sn+Zn) of 0.65 to 0.8 and also a molar ratio Sn/Zn of 1 or less: The transparent conductive film has a favorable electric contact property with an electrode or line made from Al or Al alloy film. Further, a semiconductor device having an electrode or line made from the transparent conductive film has high reliability and productivity.
    Type: Grant
    Filed: June 22, 2007
    Date of Patent: September 2, 2008
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazunori Inoue, Nobuaki Ishiga, Kensuke Nagayama, Toru Takeguchi, Kazumasa Kawase
  • Patent number: 7414767
    Abstract: A semiconductor optical device, which includes a semiconductor substrate, an electro-absorption modulator, and at least one optical device is monolithically integrated on the semiconductor substrate. An insulative layer surrounds the electro-absorption modulator and the optical devices on the semiconductor substrate, at least two metallic pads, one of which being an electrode of the modulator, are formed at a distance from each other on the insulative layer. A plurality of metallic wires are adapted for electrically connecting the electro-absorption modulator to the metallic pads and adjusting a value of inductance of the electro-absorption modulator. The metallic wires are formed on the insulative layer. A dielectric layer formed under the insulative layer provides a minimizing of parasitic capacitance generated in the metallic pads and the metallic wires by being formed under the metallic pads and the metallic wires.
    Type: Grant
    Filed: July 21, 2004
    Date of Patent: August 19, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yu-Dong Bae, Byung-Kwon Kang
  • Patent number: 7405458
    Abstract: A semiconductor structure and a method for forming the same. The structure includes (a) a semiconductor channel region, (b) a semiconductor source block in direct physical contact with the semiconductor channel region; (c) a source contact region in direct physical contact with the semiconductor source block, wherein the source contact region comprises a first electrically conducting material, and wherein the semiconductor source block physically isolates the source contact region from the semiconductor channel region, and (d) a drain contact region in direct physical contact with the semiconductor channel region, wherein the semiconductor channel region is disposed between the semiconductor source block and the drain contact region, and wherein the drain contact region comprises a second electrically conducting material; and (e) a gate stack in direct physical contact with the semiconductor channel region.
    Type: Grant
    Filed: October 12, 2007
    Date of Patent: July 29, 2008
    Assignee: International Business Machines Corporation
    Inventor: Edward J. Nowak
  • Patent number: 7402891
    Abstract: Layered germanium polymers that are semiconductive and demonstrate a strong red or infrared luminescence are produced through the topochemical conversion of calcium digermanide. Furthermore, silicon/germanium layer polymers can also be produced in this manner. These layer polymers can be produced epitaxially on substrates comprising crystalline germanium, and can be used to construct light-emitting optoelectronic components such as light-emitting diodes or lasers.
    Type: Grant
    Filed: March 26, 2001
    Date of Patent: July 22, 2008
    Assignee: Osram Opto Semiconductors GmbH
    Inventors: Günther Vogg, Martin Brandt, Martin Stutzmann
  • Patent number: 7385271
    Abstract: Electro-hole production at a Schottky barrier has recently been observed experimentally as a result of chemical processes. This conversion of chemical energy to electronic energy may serve as a basic link between chemistry and electronics and offers the potential for generation of unique electronic signatures for chemical reactions and the creation of a new class of solide state chemical sensors. Detection of the following chemical species was established: hydrogen, deuterium, carbon monoxide, molecular oxygen. The detector (1b) consists of a Schottky diode between an Si layer and an ultrathin metal layer with zero force electrical contacts.
    Type: Grant
    Filed: April 29, 2005
    Date of Patent: June 10, 2008
    Assignee: Adrena, Inc.
    Inventors: Eric W. McFarland, Henry W. Weinberg, Hermann Nienhaus, Howard S. Bergh, Brian Gergen, Arunava Mujumdar
  • Patent number: 7348649
    Abstract: The present invention provides a transparent conductive film having: a transparent base film; a transparent SiOx thin film having a thickness of from 10 to 100 nm, a refractive index of from 1.40 to 1.80 and an average surface roughness Ra of from 0.8 to 3.0 nm, wherein x is from 1.0 to 2.0; and a transparent conductive thin film including an indium-tin complex oxide, which has a thickness of from 20 to 35 nm and a ratio of SnO2/(In2O3+SnO2) of from 3 to 15 wt %, wherein the transparent conductive thin film is disposed on one side of the transparent base film through the transparent SiOx thin film.
    Type: Grant
    Filed: June 1, 2005
    Date of Patent: March 25, 2008
    Assignee: Nitto Denko Corporation
    Inventors: Tomotake Nashiki, Hideo Sugawara
  • Patent number: 7345350
    Abstract: A method for forming a conductive via in a semiconductor component is disclosed. The method includes providing a substrate having a first surface and an opposing, second surface. At least one hole is formed in the substrate extending between the first surface and the opposing, second surface. A seed layer is formed on a sidewall defining the at least one hole of the substrate and coated with a conductive layer, and a conductive or nonconductive filler material is introduced into the remaining space within the at least one hole. A method of forming a conductive via through a substrate using a blind hole is also disclosed. Semiconductor components and electronic systems having substrates including the conductive via of the present invention are also disclosed.
    Type: Grant
    Filed: September 23, 2003
    Date of Patent: March 18, 2008
    Assignee: Micron Technology, Inc.
    Inventor: Nishant Sinha
  • Patent number: 7329937
    Abstract: A semiconductor structure and a method for forming the same. The structure includes (a) a semiconductor channel region, (b) a semiconductor source block in direct physical contact with the semiconductor channel region; (c) a source contact region in direct physical contact with the semiconductor source block, wherein the source contact region comprises a first electrically conducting material, and wherein the semiconductor source block physically isolates the source contact region from the semiconductor channel region, and (d) a drain contact region in direct physical contact with the semiconductor channel region, wherein the semiconductor channel region is disposed between the semiconductor source block and the drain contact region, and wherein the drain contact region comprises a second electrically conducting material; and (e) a gate stack in direct physical contact with the semiconductor channel region.
    Type: Grant
    Filed: April 27, 2005
    Date of Patent: February 12, 2008
    Assignee: International Business Machines Corporation
    Inventor: Edward J. Nowak
  • Patent number: 7286195
    Abstract: An interconnect structure connecting two isolated metal lines in a non-display area of a TFT-array substrate. A first metal line is disposed on the substrate, covered with a first insulating layer. A second metal line is disposed on the first insulating layer and covered by a second insulating layer. ITO (indium tin oxide) wiring is disposed on the second insulating layer, electrically connecting the first and second metal lines. A passivation structure is disposed on the second insulating layer, with an opening therein to expose and surround the ITO wiring.
    Type: Grant
    Filed: September 6, 2006
    Date of Patent: October 23, 2007
    Assignee: AU Optronics Corp.
    Inventor: Kun-Hong Chen
  • Patent number: 7279765
    Abstract: A pixel electrode employs a transparent electrode made from indium-zinc-oxide (IZO) that is capable of preventing damage and bending thereof. In a liquid crystal display device containing pixel electrodes, the transparent electrode is made from indium-zinc-oxide (IZO) having an amorphous structure so that it can be etched within a short period of time with a low concentration of etchant. Accordingly, it is possible to prevent damage and bending of the transparent electrode upon the patterning thereof.
    Type: Grant
    Filed: August 18, 2003
    Date of Patent: October 9, 2007
    Assignee: LG.Philips LCD Co., Ltd.
    Inventors: You Shin Ahn, Hu Kag Lee
  • Patent number: 7253491
    Abstract: A silicon light-receiving device is provided. In the device, a substrate is based on n-type or p-type silicon. A doped region is ultra-shallowly doped with the opposite type dopant to the dopant type of the substrate on one side of the substrate so that a photoelectric conversion effect for light in a wavelength range of 100-1100 nm is generated by a quantum confinement effect in the p-n junction with the substrate. First and second electrodes are formed on the substrate so as to be electrically connected to the doped region. Due to the ultra-shallow doped region on the silicon substrate, a quantum confinement effect is generated in the p-n junction. Even though silicon is used as a semiconductor material, the quantum efficiency of the silicon light-receiving device is far higher than that of a conventional solar cell, owing to the quantum confinement effect. The silicon light-receiving device can also be formed to absorb light in a particular or large wavelength band, and used as a solar cell.
    Type: Grant
    Filed: October 16, 2002
    Date of Patent: August 7, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eun-Kyung Lee, Byoung-Lyong Choi, Jun-Young Kim
  • Patent number: 7250666
    Abstract: Disclosed is a silicon-on-insulator-based Schottky barrier diode with a low forward voltage that can be manufactured according to standard SOI process flow. An active silicon island is formed using an SOI wafer. One area of the island is heavily-doped with an n-type or p-type dopant, one area is lightly-doped with the same dopant, and an isolation structure is formed on the top surface above a junction between the two areas. A metal silicide region contacts the lightly-doped side of the island forming a Schottky barrier. Another discrete metal silicide region contacts the heavily-doped area of the island forming an electrode to the Schottky barrier (i.e., a Schottky barrier contact). The two metal silicide regions are isolated from each other by the isolation structure. Contacts to each of the discrete metal silicide regions allow a forward and/or a reverse bias to be applied to the Schottky barrier.
    Type: Grant
    Filed: November 15, 2005
    Date of Patent: July 31, 2007
    Assignee: International Business Machines Corporation
    Inventor: Edward J. Nowak
  • Patent number: 7173310
    Abstract: An ESD LUBISTOR structure based on FINFET technology employs a vertical fin (a thin vertical member containing the source, drain and body of the device) in alternatives with and without a gate. The gate may be connected to the external electrode being protected to make a self-activating device or may be connected to a reference voltage. The device may be used in digital or analog circuits.
    Type: Grant
    Filed: June 2, 2005
    Date of Patent: February 6, 2007
    Assignee: International Business Machines Corporation
    Inventors: Steven H. Voldman, Jack A. Mandelman
  • Patent number: 7170142
    Abstract: A planar integrated circuit includes a semiconductor substrate having a substrate surface and a trench in the substrate, a waveguide medium in the trench having a top surface and a light propagation axis, the trench having a sufficient depth for the waveguide medium to be at or below said substrate surface, and at least one Schottky barrier electrode formed on the top surface of said waveguide medium and defining a Schottky barrier detector consisting of the electrode and the portion of the waveguide medium underlying the Schottky barrier electrode, at least the underlying portion of the waveguide medium being a semiconductor and defining an electrode-semiconductor interface parallel to the light propagation axis so that light of a predetermined wavelength from said waveguide medium propagates along the interface as a plasmon-polariton wave.
    Type: Grant
    Filed: May 26, 2004
    Date of Patent: January 30, 2007
    Assignee: Applied Materials, Inc.
    Inventors: Gregory L. Wojcik, Lawrence C. West, Thomas P. Pearsall
  • Patent number: RE39780
    Abstract: A photoelectric converter of a high signal-to-noise ratio, low cost, high productivity and stable characteristics and a system including the above photoelectric converter. The photoelectric converter includes a photoelectric converting portion in which a first electrode layer, an insulating layer for inhibiting carriers from transferring, a photoelectric converting semiconductor layer of a non-single-crystal type, an injection blocking layer for inhibiting a first type of carriers from being injected into the semiconductor layer and a second electrode layer are laminated in this order on an insulating substrate.
    Type: Grant
    Filed: June 13, 2002
    Date of Patent: August 21, 2007
    Assignee: Canon Kabushiki Kaisha
    Inventors: Noriyuki Kaifu, Hidemasa Mizutani, Shinichi Takeda, Isao Kobayashi, Satoshi Itabashi
  • Patent number: RE42157
    Abstract: A photoelectric converter of a high signal-to-noise ratio, low cost, high productivity and stable characteristics and a system including the above photoelectric converter. The photoelectric converter includes a photoelectric converting portion in which a first electrode layer, an insulating layer for inhibiting carriers from transferring, a photoelectric converting semiconductor layer of a non-single-crystal type, an injection blocking layer for inhibiting a first type of carriers from being injected into the semiconductor layer and a second electrode layer are laminated in this order on an insulating substrate.
    Type: Grant
    Filed: February 26, 2008
    Date of Patent: February 22, 2011
    Assignee: Canon Kabushiki Kaisha
    Inventors: Noriyuki Kaifu, Hidemasa Mizutani, Shinichi Takeda, Isao Kobayashi, Satoshi Itabashi