Light Responsive Pn Junction Patents (Class 257/461)
  • Patent number: 10340415
    Abstract: A semiconductor device includes a semiconductor structure including a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer provided between the first conductive semiconductor layer and the second conductive semiconductor layer, and a semiconductor device package including the semiconductor device. The active layer includes a plurality of barrier layers and a plurality of well layers. The second conductive semiconductor layer includes a conductive second semiconductor layer and a conductive first semiconductor layer provided on the conductive second semiconductor layer. The conductive second semiconductor layer has a higher aluminum composition than the well layers, and the conductive first semiconductor layer has a lower aluminum composition than the well layers.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: July 2, 2019
    Assignee: LG Innotek Co., Ltd.
    Inventors: Hyun Jee Oh, Rak Jun Choi, Byeoung Jo Kim
  • Patent number: 10323980
    Abstract: A sensor system, device and method for generating a wireless signal in response to a sensed illumination. A sensor is disclosed having: a photosensitive element; a device that converts a sensed illumination detected by the photosensitive element into a corresponding impedance response; and a wireless signal generator that generates a wireless output based on a characteristic of the corresponding impedance response, wherein the wireless output correlates to the sensed illumination.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: June 18, 2019
    Assignee: Rensselaer Polytechnic Institute
    Inventors: Tanuj Saxena, Partha Sarathi Dutta, Serguei Lvovich Roumiantsev, Michael Shur
  • Patent number: 10276617
    Abstract: Some embodiments relate to a pixel sensor array including a plurality of photosensors arranged in a semiconductor substrate. A protection ring circumscribes an outer perimeter of the pixel sensor array. The protection ring includes a first ring neighboring the pixel sensor array, a second ring circumscribing the first ring and meeting the first ring at a first p-n junction, and a third ring circumscribing the second ring and meeting the second ring at a second p-n junction. The first ring has a first width, the second ring has a second width, and the third ring has a third width. At least two of the first width, the second width, and the third width are different from one another.
    Type: Grant
    Filed: February 26, 2018
    Date of Patent: April 30, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsung-Han Tsai, Chun-Hao Chou, Kuo-Cheng Lee, Yung-Lung Hsu, Yun-Wei Cheng
  • Patent number: 10276609
    Abstract: A semiconductor device is provided. The device generates a signal based on both a first carrier generated in a first photodiode and a second carrier generated in a second photodiode. The first photodiode includes a first region of a second conductivity type and a second region of a first conductivity type arranged between a surface of a substrate and the first region. The second photodiode includes a third region of the first conductivity type and a fourth region of the second conductivity type arranged between the surface and the third region. A fifth region of the first conductivity type is provided at a position farther apart from the surface than the first region. A peak of an impurity concentration of the third region is positioned in a range where the first region exists between the second region and the fifth region.
    Type: Grant
    Filed: January 17, 2017
    Date of Patent: April 30, 2019
    Assignee: Canon Kabushiki Kaisha
    Inventors: Keisuke Ota, Hajime Ikeda, Tatsuhito Goden, Yoichi Wada, Toshinori Hasegawa
  • Patent number: 10263308
    Abstract: A solar flow battery comprising: a positive compartment containing at least one positive electrode in contact with a positive electrolyte containing a first redox active molecule; a negative compartment containing at least one negative electrode in contact with a negative electrolyte containing a second redox active molecule, wherein said first and second redox active molecules remain dissolved in solution when changed in oxidation state; at least one of said negative or positive electrodes comprises a semiconductor light absorber; electrical communication means between said electrodes and an external load for directing electrical energy into or out of said solar flow battery; a separator component that separates the positive and negative electrolytes while permitting the passage of non-redox-active species; and means for establishing flow of the positive and negative electrolyte solutions past respective electrodes.
    Type: Grant
    Filed: March 23, 2015
    Date of Patent: April 16, 2019
    Assignee: CORNELL UNIVERSITY
    Inventors: James R. McKone, Hector D. Abruna
  • Patent number: 10204957
    Abstract: An imaging device having a first surface on which light is incident and a second surface on an opposite side of the first surface, includes a photoelectric conversion section including semiconductors having a same conductivity type, in which an impurity concentration on the second surface side is higher than an impurity concentration on the first surface side.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: February 12, 2019
    Assignee: NIKON CORPORATION
    Inventor: Hironobu Murata
  • Patent number: 10203411
    Abstract: Aspects of the disclosure pertain to a system and method for reducing ambient light sensitivity of Infrared (IR) detectors. Optical filter(s) (e.g., absorption filter(s), interference filter(s)) placed over a sensor of the IR detector (e.g., gesture sensor) absorb or reflect visible light, while passing specific IR wavelengths, for promoting the reduced ambient light sensitivity of the IR detector.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: February 12, 2019
    Assignee: MAXIM INTEGRATED PRODUCTS, INC.
    Inventors: Joy T. Jones, Nicole D. Kerness, Sunny K. Hsu, Anand Chamakura, Christopher F. Edwards, David Skurnik, Phillip J. Benzel, Nevzat A. Kestelli
  • Patent number: 10032810
    Abstract: An image system with a dual layer photodiode structure is provided for processing color images. In particular, the image system can include an image sensor that can include photodiodes with a dual layer photodiode structure. In some embodiments, the dual layer photodiode can include a first layer of photodiodes (e.g., a bottom layer), an insulation layer disposed on the first layer of photodiodes, and a second layer of photodiodes (e.g., a top layer) disposed on the insulation layer. The first layer of photodiodes can include one or more suitable pixels (e.g., green, blue, clear, luminance, and/or infrared pixels). Likewise, the second layer of photodiodes can include one or more suitable pixels (e.g., green, red, clear, luminance, and/or infrared pixels). An image sensor incorporating dual layer photodiodes can gain light sensitivity with additional clear pixels and maintain luminance information with green pixels.
    Type: Grant
    Filed: July 7, 2015
    Date of Patent: July 24, 2018
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Yingjun Bai, Qun Sun
  • Patent number: 9960308
    Abstract: A number of micro-sized rectangular dot-like n-type semiconductor regions 121 are created in a p-type semiconductor region which is a base body 11. Contact parts 14, each of which is in contact with one n-type semiconductor region 121 and almost entirely covers the same region, are mutually connected by a wire part 15 as a common cathode terminal. The n-type semiconductor regions 121 receives no light; their function is to collect carriers generated within and outside the surrounding depletion layers. Appropriate setting of the spacing of the n-type semiconductor regions 121 enables efficient collection of the carriers generated in the p-type semiconductor region while improving the SN ratio of the photo-detection signal by a noise-reduction effect due to a decrease in the p-n junction capacitance. Carriers originating from light of shorter wavelengths are barely reflected in the photo-detection signal. Thus, unfavorable influences of the shorter wavelengths of light are eliminated.
    Type: Grant
    Filed: October 17, 2016
    Date of Patent: May 1, 2018
    Assignee: MICRO SIGNAL CO., LTD.
    Inventors: Kunihiro Watanabe, Masaya Okada, Kazunori Nohara
  • Patent number: 9726839
    Abstract: There is provided a bidirectional optical communication module including a bidirectional optical communication chip configured to include an optical circuit board in which a light receiving element constituting a receiving section, a transmitting element constituting a transmitting section, and a wavelength-division multiplexing (WDM) filter that divides transmission signal light and reception signal light from each other are hybrid-integrated, a reflecting section configured to direct a propagation direction of the transmission signal light output from the transmitting section and the reception signal light received by the receiving section to a direction orthogonal to the optical circuit board, and an optical coupling element configured to spatially optically-couple an input-output port for the transmission signal light and the reception signal light provided at the bidirectional optical communication chip to an input-output port of an optical fiber.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: August 8, 2017
    Assignees: Oki Electric Industry Co., Ltd., Photonics Electronics Technology Research Association
    Inventor: Daisuke Shimura
  • Patent number: 9721994
    Abstract: According to an embodiment, a semiconductor device includes a silicon substrate, a photoelectric conversion layer, a termination layer, and an electrode layer. In the silicon substrate, first semiconductor regions and second semiconductor regions are alternately arranged along a first surface on a light incident side of the silicon substrate. The first semiconductor regions are doped with impurities of first concentration and have a conductivity of either one of p-type and n-type. The second semiconductor regions are doped with impurities of a second concentration lower than the first concentration and have a conductivity of the other type. The photoelectric conversion layer is disposed on a first surface side of the silicon substrate. The termination layer is disposed between the silicon substrate and the photoelectric conversion layer, in contact with the first surface, and to terminate dangling bonds of the silicon substrate. The electrode layer is provided on the light incident side.
    Type: Grant
    Filed: November 17, 2015
    Date of Patent: August 1, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Miyazaki, Hideyuki Funaki, Yoshinori Iida, Isao Takasu, Yuki Nobusa
  • Patent number: 9613916
    Abstract: Some embodiments of the present disclosure provide an image sensor. The image sensor includes a pixel sensor array including a plurality of photosensors arranged in a semiconductor substrate. Peripheral circuitry is arranged in or on the semiconductor substrate and is spaced apart from the pixel sensor array. A protection ring circumscribes an outer perimeter of the pixel sensor array and separates the pixel sensor array from the peripheral circuitry. The protection ring has an annular width of greater than 20 microns. The protection ring includes a first ring in the substrate neighboring the pixel sensor array, a second ring circumscribing the first ring and meeting the first ring at a first p-n junction, and a third ring circumscribing the second ring and meeting the second ring at a second p-n junction.
    Type: Grant
    Filed: March 12, 2015
    Date of Patent: April 4, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsung-Han Tsai, Chun-Hao Chou, Kuo-Cheng Lee, Yung-Lung Hsu, Yun-Wei Cheng
  • Patent number: 9583614
    Abstract: A transistor having at least one passivated Schottky barrier to a channel includes an insulated gate structure on a p-type substrate in which the channel is located beneath the insulated gate structure. The channel and the insulated gate structure define a first and second undercut void regions that extend underneath the insulated gate structure toward the channel from a first and a second side of the insulated gate structure, respectively. A passivation layer is included on at least one exposed sidewall surface of the channel and metal source and drain terminals are located on respective first and second sides of the channel, including on the passivation layer and within the undercut void regions beneath the insulated gate structure. At least one of the metal source and drain terminals comprises a metal that has a work function near a valence band of the p-type substrate.
    Type: Grant
    Filed: June 6, 2014
    Date of Patent: February 28, 2017
    Assignee: Acorn Technologies, Inc.
    Inventors: Daniel E. Grupp, Daniel J. Connelly
  • Patent number: 9570491
    Abstract: A dual-mode image sensor with a signal-separating CFA includes a substrate including a plurality of photodiode regions and a plurality of tall spectral filters having a uniform first height and for transmitting a first electromagnetic wavelength range. Each of the tall spectral filters is disposed on the substrate and aligned with a respective photodiode region. The image sensor also includes a plurality of short spectral filters for transmitting one or more spectral bands within a second electromagnetic wavelength range. Each of the short spectral filters is disposed on the substrate and aligned with a respective photodiode region. The image sensor also includes a plurality of single-layer blocking filters for blocking the first electromagnetic wavelength range. Each single-layer blocking filter is disposed on a respective short spectral filter. Each single-layer blocking filter and its respective short spectral filter have a combined height substantially equal to the first height.
    Type: Grant
    Filed: October 8, 2014
    Date of Patent: February 14, 2017
    Assignee: OmniVision Technologies, Inc.
    Inventors: Jin Li, Qian Yin, Dyson Hsinchih Tai
  • Patent number: 9530913
    Abstract: Provided is a solar cell having improved photoelectric conversion efficiency. The solar cell (1) contains: a substrate (10) comprising a semiconductor material having one type of conductivity; a first semiconductor layer (12n) having the one type of conductivity; and a second semiconductor layer (17n) having the one type of conductivity. The first semiconductor layer (12n) is arranged on one main surface of the substrate (10). The second semiconductor layer (17n) is arranged on the other main surface of the substrate (10). The solar cell (1) is configured such that the strength of the electric field formed by the second semiconductor layer (17n) is greater than the strength of the electric field formed by the first semiconductor layer (12n).
    Type: Grant
    Filed: September 23, 2013
    Date of Patent: December 27, 2016
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Isao Hasegawa, Toshio Asaumi, Hitoshi Sakata
  • Patent number: 9502265
    Abstract: An embodiment method includes forming a nanowire extending upwards from a substrate, wherein the nanowire includes: a bottom semiconductor region; a middle semiconductor region over the bottom semiconductor region; and a top semiconductor region over the middle semiconductor region. The method also includes forming a dielectric layer around and extending over the nanowire and forming a chemical mechanical polish-stop (CMP-stop) layer within the dielectric layer using an implantation process. After forming the CMP-stop layer, the dielectric layer is planarized.
    Type: Grant
    Filed: November 4, 2015
    Date of Patent: November 22, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Hong Jiang, Li-Ting Wang, Teng-Chun Tsai, Shih-Chiang Chen
  • Patent number: 9412894
    Abstract: A photovoltaic device includes a semiconductor substrate; an amorphous first conductive semiconductor layer on a first region of a first surface of the semiconductor substrate and containing a first impurity; an amorphous second conductive semiconductor layer on a second region of the first surface of the semiconductor substrate and containing a second impurity; and a gap passivation layer located between the first region and the second region on the semiconductor substrate, wherein the first conductive semiconductor layer is also on the gap passivation layer.
    Type: Grant
    Filed: August 7, 2012
    Date of Patent: August 9, 2016
    Assignee: INTELLECTUAL KEYSTONE TECHNOLOGY LLC
    Inventors: Nam-Kyu Song, Min-Seok Oh, Yun-Seok Lee, Cho-Young Lee
  • Patent number: 9177994
    Abstract: An integrated thermoelectric generator includes a semiconductor. A set of thermocouples are electrically connected in series and thermally connected in parallel. The set of thermocouples include parallel semiconductor regions. Each semiconductor region has one type of conductivity from among two opposite types of conductivity. The semiconductor regions are electrically connected in series so as to form a chain of regions having, alternatingly, one and the other of the two types of conductivity.
    Type: Grant
    Filed: July 13, 2012
    Date of Patent: November 3, 2015
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Pascal Fornara, Christian Rivero
  • Patent number: 9178100
    Abstract: A single photon avalanche diode for use in a CMOS integrated circuit includes a deep n-well region formed above a p-type substrate and an n-well region formed above and in contact with the deep n-well region. A cathode contact is connected to the n-well region via a heavily doped n-type implant. A lightly doped region forms a guard ring around the n-well and deep n-well regions. A p-well region is adjacent to the lightly doped region. An anode contact is connected to the p-well region via a heavily doped p-type implant. The junction between the bottom of the deep n-well region and the substrate forms a multiplication region when an appropriate bias voltage is applied between the anode and cathode and the guard ring breakdown voltage is controlled with appropriate control of the lateral doping concentration gradient such that the breakdown voltage is higher than that of the multiplication region.
    Type: Grant
    Filed: September 8, 2011
    Date of Patent: November 3, 2015
    Assignees: STMicroelectronics (Research & Development) Limited, The University Court of the University of Edinburgh
    Inventors: Eric Alexander Garner Webster, Robert Kerr Henderson
  • Patent number: 9153755
    Abstract: A silicone resin sheet is formed from a resin composition containing a thermosetting silicone resin and microparticles. The complex viscosity thereof at a frequency of 10 Hz is 80 to 1000 Pa·s and the tan ? thereof at a frequency of 10 Hz is 0.3 to 1.6 obtained by a dynamic viscoelastic measurement at a frequency of 0.1 to 50 Hz at 30° C.; a rate of frequency increase of 10 Hz/min; and a distortion of 1% in a shear mode.
    Type: Grant
    Filed: October 12, 2012
    Date of Patent: October 6, 2015
    Assignee: NITTO DENKO CORPORATION
    Inventors: Ryuichi Kimura, Hiroyuki Katayama
  • Patent number: 9147776
    Abstract: An image sensor pixel includes a photodiode region having a first polarity doping type disposed in a semiconductor layer. A pinning surface layer having a second polarity doping type is disposed over the photodiode region in the semiconductor layer. The second polarity is opposite from the first polarity. A first polarity charge layer is disposed proximate to the pinning surface layer over the photodiode region. A contact etch stop layer is disposed over the photodiode region proximate to the first polarity charge layer. The first polarity charge layer is disposed between the pinning surface layer and the contact etch stop layer such that first polarity charge layer cancels out charge having a second polarity that is induced in the contact etch stop layer. A passivation layer is also disposed over the photodiode region between the pinning surface layer and the first polarity charge layer.
    Type: Grant
    Filed: July 15, 2014
    Date of Patent: September 29, 2015
    Assignee: OmniVision Technologies, Inc.
    Inventors: Howard E. Rhodes, Dajiang Yang, Gang Chen, Duli Mao, Vincent Venezia
  • Patent number: 9147777
    Abstract: The present invention is directed to a position sensing detector made of a photodiode having a semi insulating substrate layer; a buffered layer that is formed directly atop the semi-insulating substrate layer, an absorption layer that is formed directly atop the buffered layer substrate layer, a cap layer that is formed directly atop the absorption layer, a plurality of cathode electrodes electrically coupled to the buffered layer or directly to the cap layer, and at least one anode electrode electrically coupled to a p-type region in the cap layer. The position sensing detector has a photo-response non-uniformity of less than 2% and a position detection error of less than 10 ?m across the active area.
    Type: Grant
    Filed: February 17, 2014
    Date of Patent: September 29, 2015
    Assignee: OSI Optoelectronics, Inc.
    Inventors: Peter Steven Bui, Narayan Dass Taneja
  • Patent number: 9105789
    Abstract: An embodiment of a geiger-mode avalanche photodiode includes: a body of semiconductor material, having a first surface and a second surface; a cathode region of a first type of conductivity, which extends within the body; and an anode region of a second type of conductivity, which extends within the cathode region and faces the first surface, the anode and cathode regions defining a junction. The anode region includes at least two subregions, which extend at a distance apart within the cathode region starting from the first surface, and delimit at least one gap housing a portion of the cathode region, the maximum width of the gap and the levels of doping of the two subregions and of the cathode region being such that, by biasing the junction at a breakdown voltage, a first depleted region occupies completely the portion of the cathode region within the gap.
    Type: Grant
    Filed: March 24, 2011
    Date of Patent: August 11, 2015
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Massimo Cataldo Mazzillo, Delfo Nunziato Sanfilippo
  • Patent number: 9105767
    Abstract: An image sensor pixel includes a photodiode region having a first polarity doping type disposed in a semiconductor layer. A pinning surface layer having a second polarity doping type is disposed over the photodiode region in the semiconductor layer. A first polarity charge layer is disposed proximate to the pinning surface layer over the photodiode region. A contact etch stop layer is disposed over the photodiode region proximate to the first polarity charge layer. The first polarity charge layer is disposed between the pinning surface layer and the contact etch stop layer such that first polarity charge layer cancels out charge having a second polarity that is induced in the contact etch stop layer. The first polarity charge layer is disposed between a first one of a plurality of passivation layers and a second one of the plurality of passivation layers disposed over the photodiode region.
    Type: Grant
    Filed: July 15, 2014
    Date of Patent: August 11, 2015
    Assignee: OmniVision Technologies, Inc.
    Inventors: Howard E. Rhodes, Dajiang Yang, Gang Chen, Duli Mao, Vincent Venezia
  • Patent number: 9093624
    Abstract: A silicone resin sheet is formed from a resin composition containing a thermosetting silicone resin and microparticles. The complex viscosity thereof at a frequency of 10 Hz is 80 to 1000 Pa·s and the tan ? thereof at a frequency of 10 Hz is 0.3 to 1.6 obtained by a dynamic viscoelastic measurement at a frequency of 0.1 to 50 Hz at 30° C.; a rate of frequency increase of 10 Hz/min; and a distortion of 1% in a shear mode.
    Type: Grant
    Filed: October 12, 2012
    Date of Patent: July 28, 2015
    Assignee: NITTO DENKO CORPORATION
    Inventors: Ryuichi Kimura, Hiroyuki Katayama
  • Patent number: 9064987
    Abstract: An ultraviolet sensor having a p-type semiconductor layer containing, as its main constituent, a solid solution of NiO and ZnO, and an n-type semiconductor layer containing ZnO as its main constituent, which is joined to the p-type semiconductor layer such that a portion of the p-type semiconductor layer is exposed. An internal electrode is buried in the p-type semiconductor layer and opposed to the n-type semiconductor layer. Both ends of the internal electrode are exposed at both end surfaces of the p-type semiconductor layer, and first and second high-resistance layers composed of insulating materials cover one end of the internal electrode. The second high-resistance layer is obtained by diffusion of the insulating material from the first high-resistance layer into the p-type semiconductor layer. A first external electrode is connected to the other end of the internal electrode, and a second external electrode is connected to the n-type semiconductor layer.
    Type: Grant
    Filed: August 28, 2013
    Date of Patent: June 23, 2015
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Kazutaka Nakamura
  • Patent number: 9029908
    Abstract: A photonic device comprises a substrate and a dielectric material including two or more openings that expose a portion of the substrate, the two or more openings each having an aspect ratio of at least 1. A bottom diode material comprising a compound semiconductor material that is lattice mismatched to the substrate occupies the two or more openings and is coalesced above the two or more openings to form the bottom diode region. The device further includes a top diode material and an active diode region between the top and bottom diode materials.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: May 12, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Anthony J. Lochtefeld
  • Patent number: 9013023
    Abstract: A photoelectric element includes a first electrode; and a second electrode positioned so as to face the first electrode; and a semiconductor disposed on a face of the first electrode, the face being positioned so as to face the second electrode; and a photosensitizer carried on the semiconductor; and a first charge-transport layer interposed between the first electrode and the second electrode; and a second charge-transport layer interposed between the first charge-transport layer and the second electrode. The first charge-transport layer and the second charge-transport layer contain different oxidation-reduction materials. The oxidation-reduction material in the first charge-transport layer has an oxidation-reduction potential higher than an oxidation-reduction potential of the oxidation-reduction material in the second charge-transport layer.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: April 21, 2015
    Assignees: Panasonic Corporation, Waseda University
    Inventors: Michio Suzuka, Takashi Sekiguchi, Naoki Hayashi, Hiroyuki Nishide, Kenichi Oyaizu, Fumiaki Kato
  • Patent number: 9000541
    Abstract: A photoelectric conversion device includes circuit portions disposed on a substrate, a first electrode electrically connected to one of the circuit portions, an optically transparent second electrode opposing the first electrode, and a photoelectric conversion portion disposed between the first electrode and the second electrode. The photoelectric conversion portion has a multilayer structure including a light absorption layer made of a p-type compound semiconductor film having a chalcopyrite structure, an amorphous oxide semiconductor layer, and a window layer made of an n-type semiconductor film.
    Type: Grant
    Filed: February 7, 2012
    Date of Patent: April 7, 2015
    Assignee: Seiko Epson Corporation
    Inventors: Yasunori Hattori, Tomotaka Matsumoto, Tsukasa Eguchi
  • Publication number: 20150084151
    Abstract: A photoelectric conversion element includes a first electrode, a ferroelectric layer provided on the first electrode, and a second electrode provided on the ferroelectric layer, the second electrode being a transparent electrode, and a pn junction being formed between the ferroelectric layer and the first electrode or the second electrode.
    Type: Application
    Filed: September 25, 2014
    Publication date: March 26, 2015
    Inventors: Takayuki YONEMURA, Yoshihiko YOKOYAMA, Yasuaki HAMADA
  • Patent number: 8987738
    Abstract: A photoelectric conversion device with improved electric characteristics is provided. The photoelectric conversion device has a structure in which a window layer is formed by a stack of a first silicon semiconductor layer and a second silicon semiconductor layer, and the second silicon semiconductor layer has high carrier concentration than the first silicon semiconductor layer and has an opening. Light irradiation is performed on the first silicon semiconductor layer through the opening without passing through the second silicon semiconductor layer; thus, light absorption loss in the window layer can be reduced.
    Type: Grant
    Filed: September 27, 2012
    Date of Patent: March 24, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takashi Hirose, Naoto Kusumoto
  • Patent number: 8962376
    Abstract: An optoelectronic device, including a semiconductor body having a surface to receive photons and a plurality of doped regions of opposite doping polarities, the doped regions extending substantially from the surface of the semiconductor body and into the semiconductor body, and being arranged in one or more pairs of opposite doping polarities such that each pair of doped regions forms a corresponding space charge region having a corresponding electric field therein, the space charge region extending substantially from the surface of the semiconductor body and into the semiconductor body such that photons entering the semiconductor body through the surface and travelling along paths within the space charge region generate electron-hole pairs in the space charge region that are separated in opposing directions substantially orthogonal to the photon paths by the electric field and collected by the corresponding pair of doped regions, thereby providing an electrical current to be conducted from the device.
    Type: Grant
    Filed: April 21, 2010
    Date of Patent: February 24, 2015
    Assignee: The Silanna Group Pty Ltd
    Inventors: Petar Branko Atanackovic, Steven Grant Duvall
  • Patent number: 8928107
    Abstract: Provided are light detection devices and methods of manufacturing the same. The light detection device includes a first conductive pattern on a surface of a substrate, an insulating pattern on the substrate and having an opening exposing at least a portion of the first conductive pattern, a light absorbing layer filling the opening of the insulating pattern and having a top surface disposed at a level substantially higher than a top surface of the insulating pattern, a second conductive pattern on the light absorbing layer, and connecting terminals electrically connected to the first and second conductive patterns, respectively.
    Type: Grant
    Filed: October 28, 2011
    Date of Patent: January 6, 2015
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sang Hoon Kim, Gyungock Kim, In Gyoo Kim, JiHo Joo, Ki Seok Jang
  • Publication number: 20140374867
    Abstract: Described herein is a pinned photodiode pixel architecture having a p-type substrate that is independently biased with respect to a pixel area to provide an avalanche region between an n-type region and a p-type region formed on the substrate. Such a pinned photodiode pixel can be used in imaging sensors that are used in low light level conditions.
    Type: Application
    Filed: June 19, 2014
    Publication date: December 25, 2014
    Applicants: IMEC VZW
    Inventors: Koen De Munck, Tomislav Resetar
  • Patent number: 8916945
    Abstract: Prepared is an n? type semiconductor substrate 1 having a first principal surface 1a and a second principal surface 1b opposed to each other, and having a p+ type semiconductor region 3 formed on the first principal surface 1a side. At least a region opposed to the p+ type semiconductor region 3 in the second principal surface 1b of the n? type semiconductor substrate 1 is irradiated with a pulsed laser beam to form an irregular asperity 10. After formation of the irregular asperity 10, an accumulation layer 11 with an impurity concentration higher than that of the n? type semiconductor substrate 1 is formed on the second principal surface 1b side of the n type semiconductor substrate 1. After formation of the accumulation layer 11, the n? type semiconductor substrate 1 is subjected to a thermal treatment.
    Type: Grant
    Filed: February 15, 2010
    Date of Patent: December 23, 2014
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Akira Sakamoto, Takashi Iida, Koei Yamamoto, Kazuhisa Yamamura, Terumasa Nagano
  • Patent number: 8912619
    Abstract: The present invention provides an ultra-violet light sensing device. The ultra-violet light sensing device includes a first conductivity type substrate, a second conductivity type region, and a first conductivity type high density region. The first conductivity type substrate includes a light incident surface. The second conductivity type region is disposed in the first conductivity type substrate and adjacent to the light incident surface. The first conductivity type high density region is disposed under the second conductivity type region. The present invention also provides another ultra-violet light sensing device, which further includes a first conductivity type high density shallow region which is sandwiched between the light incident surface and the second conductivity type region. Manufacturing methods for these ultra-violet light sensing devices are also disclosed in the present invention.
    Type: Grant
    Filed: May 31, 2013
    Date of Patent: December 16, 2014
    Assignee: Pixart Imaging Incorporation
    Inventors: Han-Chi Liu, Huan-Kun Pan, Eiichi Okamoto
  • Patent number: 8912616
    Abstract: A photodiode device including a photosensitive diffusion junction within a single layer. The photodiode device further includes a resonant grating located within the single layer. The photosensitive diffusion junction is located within the resonant grating.
    Type: Grant
    Filed: January 19, 2012
    Date of Patent: December 16, 2014
    Assignee: International Business Machines Corporaion
    Inventors: Matthias Fertig, Thomas Morf, Nkolaj Moll, Martin Kreissig, Karl-Heinz Brenner, Maximilian Auer
  • Patent number: 8912579
    Abstract: A solid-state image pickup device includes: a photoelectric conversion portion formed on a substrate and composed of a photodiode; an image pickup area in which plural pixels each including a reading-out electrode for reading out signal electric charges generated and accumulated in the photoelectric conversion portion are formed; and a light blocking film having an opening portion right above the photoelectric conversion portion in an effective pixel area of the image pickup area, and light-blocking said photoelectric conversion portion in an OB pixel area of the image pickup area, in which a film deposited between the light blocking film and the substrate right above the photoelectric conversion portion in the OB pixel area is composed of only a silicon oxide film.
    Type: Grant
    Filed: December 7, 2011
    Date of Patent: December 16, 2014
    Assignee: Sony Corporation
    Inventor: Kaori Takimoto
  • Publication number: 20140353469
    Abstract: The present technology provides a semiconductor device that includes a substrate including an active region and an device isolation region, a plurality of micro insulation structures formed in the substrate of the device isolation region and spaced from each other, and an impurity region suitable for filling spaces between the micro insulation structures and for surrounding the micro insulation structures in the substrate of the device isolation region, and a method of fabricating the semiconductor device by improving a method of forming device isolation regions that insulate active regions. In particular, discontinuous micro insulation structures are suggested.
    Type: Application
    Filed: October 17, 2013
    Publication date: December 4, 2014
    Applicant: SK hynix Inc.
    Inventors: Do-Hyung KIM, Jang-Won MOON, Youn-Sub LIM, Do-Hwan KIM
  • Patent number: 8901697
    Abstract: An integrated circuit having an insulated conductor or within a semiconductor substrate and extending perpendicular to a plane of a semiconductor wafer or substrate on which the integrated circuit is fabricated, the conductor comprising a first region of doped semiconductor extending between a first device or a first contact and a second device or a second contact.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: December 2, 2014
    Assignee: Analog Devices, Inc.
    Inventor: Bernard Patrick Stenson
  • Patent number: 8889536
    Abstract: A method is provided for forming a dopant profile based on a surface of a wafer-like semiconductor component with phosphorus as a dopant. The method includes the steps of applying a phosphorus dopant source onto the surface, forming a first dopant profile with the dopant source that is present on the surface, removing the dopant source, and forming a second dopant profile that has a greater depth in comparison to the first dopant profile. In order to form an optimized dopant profile, the dopant source is removed after forming the first dopant profile, and precipitates that are crystallized selectively on or in the surface from the precipitates SixPy and SixPyOz are removed.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: November 18, 2014
    Assignee: Schott Solar AG
    Inventors: Gabriele Blendin, Joerg Horzel, Agata Lachowicz, Berthold Schum
  • Patent number: 8890219
    Abstract: An image sensor device is provided, including at least one transistor lying on a semiconductor-on-insulator substrate that includes a semi-conducting layer, in which a channel area of the transistor is disposed in a portion thereof, and an insulating layer separating the semi-conducting layer from a semi-conducting support layer, wherein the semi-conducting layer and the insulating layer extend beyond the channel area, and extend under at least a portion of source/drain regions of the transistor, wherein the semi-conducting support layer includes at least one photosensitive area including at least one P-doped region and at least one N-doped region forming a junction, the photosensitive area being disposed facing the transistor on a side of the channel area thereof and opposite a side of a gate electrode thereof, and wherein the insulating layer is configured to provide a capacitive coupling between the photosensitive area and the semi-conducting layer.
    Type: Grant
    Filed: October 26, 2012
    Date of Patent: November 18, 2014
    Assignee: Commissariat a l'energie atomique et aux energies alternatives
    Inventors: Laurent Grenouillet, Maud Vinet
  • Patent number: 8890275
    Abstract: The invention discloses an optoelectronic device and method of fabricating the same. The optoelectronic device according to the invention includes a semiconductor structure combination, a first surface passivation layer formed on an upper surface of the semiconductor structure combination, and a second surface passivation layer formed on the first surface passivation layer. The semiconductor structure combination includes at least one P-N junction. In particular, the interfacial state density of the first surface passivation layer is lower than that of the second surface passivation layer, and the fixed oxide charge density of the second surface passivation layer is higher than that of the first surface passivation layer.
    Type: Grant
    Filed: November 28, 2011
    Date of Patent: November 18, 2014
    Assignee: Sino-American Silicon Products Inc.
    Inventors: Miin-Jang Chen, Hsin-Jui Chen, Wen-Ching Hsu
  • Publication number: 20140327102
    Abstract: An image sensor pixel includes a photodiode region having a first polarity doping type disposed in a semiconductor layer. A pinning surface layer having a second polarity doping type is disposed over the photodiode region in the semiconductor layer. A first polarity charge layer is disposed proximate to the pinning surface layer over the photodiode region. A contact etch stop layer is disposed over the photodiode region proximate to the first polarity charge layer. The first polarity charge layer is disposed between the pinning surface layer and the contact etch stop layer such that first polarity charge layer cancels out charge having a second polarity that is induced in the contact etch stop layer. The first polarity charge layer is disposed between a first one of a plurality of passivation layers and a second one of the plurality of passivation layers disposed over the photodiode region.
    Type: Application
    Filed: July 15, 2014
    Publication date: November 6, 2014
    Inventors: Howard E. Rhodes, Dajiang Yang, Gang Chen, Duli Mao, Vincent Venezia
  • Patent number: 8878053
    Abstract: A bipolar solar cell includes a backside junction formed by an N-type silicon substrate and a P-type polysilicon emitter formed on the backside of the solar cell. An antireflection layer may be formed on a textured front surface of the silicon substrate. A negative polarity metal contact on the front side of the solar cell makes an electrical connection to the substrate, while a positive polarity metal contact on the backside of the solar cell makes an electrical connection to the polysilicon emitter. An external electrical circuit may be connected to the negative and positive metal contacts to be powered by the solar cell. The positive polarity metal contact may form an infrared reflecting layer with an underlying dielectric layer for increased solar radiation collection.
    Type: Grant
    Filed: June 13, 2012
    Date of Patent: November 4, 2014
    Assignee: SunPower Corporation
    Inventor: Peter John Cousins
  • Patent number: 8872301
    Abstract: The presented principles describe an apparatus and method of making the same, the apparatus being a semiconductor circuit device, having shallow trench isolation features bounding an active area and a periphery area on a semiconductor substrate to electrically isolate structures in the active area from structures in the periphery area. The shallow trench isolation feature bounding the active area is shallower than the shallow trench isolation feature bounding the periphery area, with the periphery area shallow trench isolation structure being formed through two or more etching steps.
    Type: Grant
    Filed: April 24, 2012
    Date of Patent: October 28, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Yang Hung, Po-Zen Chen, Szu-Hung Yang, Chih-Cherng Jeng, Chih-Kang Chao, I-I Cheng
  • Publication number: 20140312446
    Abstract: A semiconducting structure configured to receive electromagnetic radiation and transform the received electromagnetic radiation into an electric signal, the semiconductor structure including a semiconducting support within a first surface defining a longitudinal plane, a first zone with a first type of conductivity formed in the support with a second zone with a second type of conductivity that is opposite of the first type of conductivity to form a semiconducting junction. A mechanism limiting lateral current includes a third zone formed in the support in lateral contact with the second zone, the third zone having the second type of conductivity for which majority carriers are electrons. The third zone has a sufficient concentration of majority carriers to have an increase in an apparent gap due to a Moss-Burstein effect.
    Type: Application
    Filed: November 27, 2012
    Publication date: October 23, 2014
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT
    Inventors: Olivier Gravrand, Gerard Destefanis
  • Patent number: 8860101
    Abstract: A system and method for reducing cross-talk between photosensitive diodes is provided. In an embodiment an isolation region comprising a first concentration of dopants is located between the photosensitive diodes. The photosensitive diodes have a second concentration of dopants that is less than the first concentration of dopants, which helps to prevent diffusion from the photosensitive diodes to form a potential path for undesired cross-talk between the photosensitive diodes.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: October 14, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Lan Fang Chang, Ching-Hwanq Su, Wei-Ming You, Chih-Cherng Jeng, Chih-Kang Chao, Fu-Sheng Guo
  • Patent number: 8859310
    Abstract: Methods of fabricating optoelectronic devices, such as photovoltaic cells and light-emitting devices. In one embodiment, such a method includes providing a substrate, applying a monolayer of semiconductor particles to the substrate, and encasing the monolayer with one or more coatings so as to form an encased-particle layer. At some point during the method, the substrate is removed so as to expose the reverse side of the encased-particle layer and further processing is performed on the reverse side. When a device made using such a method has been completed and installed into an electrical circuit the semiconductor particles actively participate in the photoelectric effect or generation of light, depending on the type of device.
    Type: Grant
    Filed: June 10, 2011
    Date of Patent: October 14, 2014
    Assignee: Versatilis LLC
    Inventor: Ajaykumar R. Jain
  • Publication number: 20140299892
    Abstract: An optoelectronic semiconductor structure (20) comprises an n-type semiconductor region (3); a p-type semiconductor region (1); a p-n junction formed between the n-type and p-type semiconductor regions; and an active region (2). According to the present invention, the optoelectronic semiconductor structure (20) is configured to transport, when in use, charge carriers between the active region (2) and each of the retype semiconductor region (3) and the p-type semiconductor region (1) through a single substantially planar boundary surface (9) of the active region.
    Type: Application
    Filed: August 24, 2011
    Publication date: October 9, 2014
    Inventors: Jani Oksanen, Jaakko Tulkki