With Particular Doping Concentration Patents (Class 257/463)
  • Patent number: 8410570
    Abstract: A photodiode includes a first doped layer and a second doped layer that share a common face. A deep isolation trench has a face contiguous with the first and second doped layers. A conducting layer is in contact with a free face of the second doped layer. A protective layer is provided at an interface with the first doped layer and second doped layer. This protective layer is capable of generating a layer of negative charge at the interface. The protective layer may further be positioned within the second doped layer to form an intermediate protective structure.
    Type: Grant
    Filed: May 17, 2010
    Date of Patent: April 2, 2013
    Assignees: STMicroelectronics S.A., STMicroelectronics (Crolles 2) SAS
    Inventors: Jorge Regolini, Michael Gros-Jean
  • Patent number: 8405183
    Abstract: An electronic structure includes a first area having silicon grains having a size smaller than 100 micrometers and a second area superposed to the first area and having silicon grains having a size greater than or equal to 100 micrometers. The first and second areas form a support. At least one layer of an epitaxial semiconductor material is disposed on the second area.
    Type: Grant
    Filed: April 14, 2010
    Date of Patent: March 26, 2013
    Assignee: S'Tile Pole des Eco-Industries
    Inventor: Alain Straboni
  • Patent number: 8405097
    Abstract: An optical sensor and a method for manufacturing the same are provided. The optical sensor includes a first photosensitive layer, a first charge carrier collecting element, a second photosensitive layer and a second charge carrier collecting element. The first photosensitive layer has a first light incident surface. The first charge carrier collecting element is disposed on a surface of the first photosensitive layer opposite to the first light incident surface of the first photosensitive layer. The second photosensitive layer is adjacent to the first photosensitive layer and has a second light incident surface. The second charge carrier collecting element is disposed on a surface of the second photosensitive layer opposite to the second light incident surface of the second photosensitive layer.
    Type: Grant
    Filed: February 14, 2012
    Date of Patent: March 26, 2013
    Assignee: Novatek Microelectronics Corp.
    Inventor: Dong-Hai Huang
  • Patent number: 8399909
    Abstract: The present invention is directed to a position sensing detector made of a photodiode having a semi insulating substrate layer; a buffered layer that is formed directly atop the semi-insulating substrate layer, an absorption layer that is formed directly atop the buffered layer substrate layer, a cap layer that is formed directly atop the absorption layer, a plurality of cathode electrodes electrically coupled to the buffered layer or directly to the cap layer, and at least one anode electrode electrically coupled to a p-type region in the cap layer. The position sensing detector has a photo-response non-uniformity of less than 2% and a position detection error of less than 10 ?m across the active area.
    Type: Grant
    Filed: May 6, 2010
    Date of Patent: March 19, 2013
    Assignee: OSI Optoelectronics, Inc.
    Inventors: Peter Steven Bui, Narayan Dass Taneja
  • Publication number: 20130049155
    Abstract: A photosite is formed in a semiconductor substrate and includes a photodiode confined in a direction orthogonal to the surface of the substrate. The photodiode includes a semiconductor zone for storing charge that is formed in an upper semiconductor region having a first conductivity type and includes a main well of a second conductivity type opposite the first conductivity type and laterally pinned in a first direction parallel to the surface of the substrate. The photodiode further includes an additional semiconductor zone including an additional well having the second conductivity type that is buried under and makes contact with the main well.
    Type: Application
    Filed: June 21, 2012
    Publication date: February 28, 2013
    Applicants: STMICROELECTRONICS (CROLLES 2) SAS, STMICROELECTRONICS S.A.
    Inventors: Francois Roy, Julien Michelot
  • Patent number: 8373156
    Abstract: Provided is a biological component detection device with which a biological component can be detected at high sensitivity by using an InP-based photodiode in which a dark current is reduced without using a cooling mechanism and the sensitivity is extended to a wavelength of 1.8 ?m or more. An absorption layer 3 has a multiple quantum well structure composed of group III-V semiconductors, a pn-junction 15 is formed by selectively diffusing an impurity element in the absorption layer, and the concentration of the impurity element in the absorption layer is 5×1016/cm3 or less, the diffusion concentration distribution control layer has an n-type impurity concentration of 2×1015/cm3 or less before the diffusion, the diffusion concentration distribution control layer having a portion adjacent to the absorption layer, the portion having a low impurity concentration.
    Type: Grant
    Filed: July 30, 2009
    Date of Patent: February 12, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Youichi Nagai, Yasuhiro Iguchi
  • Patent number: 8368058
    Abstract: A photoelectric conversion element includes, in the following order: a substrate; a lower electrode containing titanium nitride; an organic layer including a photoelectric conversion layer; and an upper electrode containing a transparent electrode material.
    Type: Grant
    Filed: August 25, 2010
    Date of Patent: February 5, 2013
    Assignee: Fujifilm Corporation
    Inventors: Daigo Sawaki, Tetsuro Mitsui
  • Patent number: 8362582
    Abstract: A semiconductor structure is provided, which includes multiple sections arranged along a longitudinal axis. Preferably, the semiconductor structure comprises a middle section and two terminal sections located at opposite ends of the middle section. A semiconductor core having a first dopant concentration preferably extends along the longitudinal axis through the middle section and the two terminal sections. A semiconductor shell having a second, higher dopant concentration preferably encircles a portion of the semiconductor core at the two terminal sections, but not at the middle section, of the semiconductor structure. It is particularly preferred that the semiconductor structure is a nanostructure having a cross-sectional dimension of not more than 100 nm.
    Type: Grant
    Filed: March 7, 2011
    Date of Patent: January 29, 2013
    Assignee: International Business Machines Corporation
    Inventors: Joerg Appenzeller, Supratik Guha, Emanuel Tutuc
  • Patent number: 8294232
    Abstract: An optical detector includes a detector surface operable to receive light, a depleted field region coupled to the underside of the detector surface, a charge collection node underlying the depleted field region, an active pixel area that includes the portion of the depleted field region above the charge collection node and below the detector surface, and two or more guard regions coupled to the underside of the detector surface and outside of the active pixel area. The depleted field region includes an intrinsic or a near-intrinsic material. The charge collection node has a first width, and the guard regions are separated by a second width that is greater than the first width of the charge collection node. The guard regions are operable to prevent crosstalk to an adjacent optical detector.
    Type: Grant
    Filed: November 3, 2009
    Date of Patent: October 23, 2012
    Assignee: Raytheon Company
    Inventors: John L. Vampola, Sean P. Kilcoyne, Robert E. Mills, Kenton T. Veeder
  • Patent number: 8274126
    Abstract: A photodetector is described along with corresponding materials, systems, and methods. The photodetector comprises an integrated circuit and at least two optically sensitive layers. A first optically sensitive layer is over at least a portion of the integrated circuit, and a second optically sensitive layer is over the first optically sensitive layer. Each optically sensitive layer is interposed between two electrodes. The two electrodes include a respective first electrode and a respective second electrode. The integrated circuit selectively applies a bias to the electrodes and reads signals from the optically sensitive layers. The signal is related to the number of photons received by the respective optically sensitive layer.
    Type: Grant
    Filed: August 19, 2011
    Date of Patent: September 25, 2012
    Assignee: InVisage Technologies, Inc.
    Inventors: Hui Tian, Edward Sargent
  • Patent number: 8269302
    Abstract: A photodetector is described along with corresponding materials, systems, and methods. The photodetector comprises an integrated circuit and at least two optically sensitive layers. A first optically sensitive layer is over at least a portion of the integrated circuit, and a second optically sensitive layer is over the first optically sensitive layer. Each optically sensitive layer is interposed between two electrodes. The two electrodes include a respective first electrode and a respective second electrode. The integrated circuit selectively applies a bias to the electrodes and reads signals from the optically sensitive layers. The signal is related to the number of photons received by the respective optically sensitive layer.
    Type: Grant
    Filed: August 22, 2011
    Date of Patent: September 18, 2012
    Assignee: InVisage Technologies, Inc.
    Inventors: Hui Tian, Edward Sargent
  • Patent number: 8203195
    Abstract: Optically sensitive devices include a device comprising a first contact and a second contact, each having a work function, and an optically sensitive material between the first contact and the second contact. The optically sensitive material comprises a p-type semiconductor, and the optically sensitive material has a work function. Circuitry applies a bias voltage between the first contact and the second contact. The optically sensitive material has an electron lifetime that is greater than the electron transit time from the first contact to the second contact when the bias is applied between the first contact and the second contact. The first contact provides injection of electrons and blocking the extraction of holes. The interface between the first contact and the optically sensitive material provides a surface recombination velocity less than 1 cm/s.
    Type: Grant
    Filed: July 20, 2009
    Date of Patent: June 19, 2012
    Assignee: InVisage Technologies, Inc.
    Inventors: Igor Constantin Ivanov, Edward Hartley Sargent, Hui Tian
  • Patent number: 8203174
    Abstract: An image sensor and a method for fabricating the same are provided. The image sensor includes a first conductive type substrate including a trench formed in a predetermined portion of the first conductive type substrate, a second conductive type impurity region for use in a photodiode, formed below a bottom surface of the trench in the first conductive type substrate, and a first conductive type epitaxial layer for use in the photodiode, buried in the trench.
    Type: Grant
    Filed: October 27, 2009
    Date of Patent: June 19, 2012
    Assignee: Intellectual Ventures II LLC
    Inventors: Hee Jeen Kim, Han Seob Cha
  • Patent number: 8187913
    Abstract: In a process for producing a photoelectric conversion device comprising a bottom electrode layer, a photoelectric conversion semiconductor layer, a buffer layer, and a transparent conductive layer, which are stacked in this order on a substrate, all film forming stages ranging from a stage of forming the buffer layer to a stage of forming the transparent conductive layer are performed with a liquid phase technique. The buffer layer is formed with a chemical bath deposition technique, and the transparent conductive layer is formed with an electrolytic deposition technique.
    Type: Grant
    Filed: January 31, 2011
    Date of Patent: May 29, 2012
    Assignee: FUJIFILM Corporation
    Inventors: Tetsuo Kawano, Takashi Koike, Ryouko Agui
  • Patent number: 8178912
    Abstract: An image sensor includes a first substrate, readout circuitry, an electrical junction region, a metal interconnection and an image sensing device. The readout circuitry is formed on and/or over the first substrate and the electrical junction region is formed in the first substrate and electrically connected to the readout circuitry. The metal interconnection is electrically connected to the electrical junction region. The image sensing device is formed on and/or over the metal interconnection.
    Type: Grant
    Filed: October 3, 2008
    Date of Patent: May 15, 2012
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Joon Hwang
  • Patent number: 8173535
    Abstract: A wafer structure for an image sensor includes a substrate that has a given conductivity type, a given dopant concentration, and a given concentration of oxygen. An intermediate epitaxial layer is formed over the substrate. The intermediate epitaxial layer has the same conductivity type and the same, or substantially the same, dopant concentration as the substrate but a lower oxygen concentration than the substrate. A thickness of the intermediate epitaxial layer is greater than the diffusion length of a minority carrier in the intermediate layer. A device epitaxial layer is formed over the intermediate epitaxial layer. The device epitaxial layer has the same conductivity type but lower dopant and oxygen concentrations than the substrate.
    Type: Grant
    Filed: December 21, 2009
    Date of Patent: May 8, 2012
    Assignee: OmniVision Technologies, Inc.
    Inventor: Cristian A. Tivarus
  • Patent number: 8164127
    Abstract: A pixel cell includes a substrate, an epitaxial layer, and a photo converting device in the epitaxial layer. The epitaxial layer has a doping concentration profile of embossing shape, and includes a plurality of layers that are stacked on the substrate. The photo converting device does not include a neutral region that has a constant potential in the vertical direction. Therefore, the image sensor including the pixel cell has high quantization efficiency, and a crosstalk between photo-converting devices is decreased.
    Type: Grant
    Filed: September 16, 2009
    Date of Patent: April 24, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyung-Ho Lee, Kwang-il Jung, Jung-Chak Ahn, Yi-Tae Kim, Kyoung-Sik Moon, Bum-Suk Kim, Young-Bae Kee, Dong-Young Lee, Tae-Sub Jung, Kang-Sun Lee
  • Patent number: 8159011
    Abstract: A charge transfer transistor includes: a first diffusion region and a second diffusion region; a gate for controlling a charge transfer from the first diffusion region to the second diffusion region by a control signal; and a potential well incorporated under the gate, wherein the first diffusion region is a pinned photodiode. A pixel of an image sensor includes: a photodiode for generating and collecting a photo generated charge; a floating diffusion region for serving as a photo generated charge sensing node; a transfer gate for controlling a charge transfer from the photodiode to the floating diffusion region by a control signal; and a potential well incorporated under the transfer gate.
    Type: Grant
    Filed: February 28, 2007
    Date of Patent: April 17, 2012
    Assignee: Intellectual Ventures II LLC
    Inventor: Jaroslav Hynecek
  • Patent number: 8138567
    Abstract: Optically sensitive devices include a device comprising a first contact and a second contact, each having a work function, and an optically sensitive material between the first contact and the second contact. The optically sensitive material comprises an n-type semiconductor, and the optically sensitive material has a work function. Circuitry applies a bias voltage between the first contact and the second contact. The optically sensitive material has an electron lifetime that is greater than the electron transit time from the first contact to the second contact when the bias is applied between the first contact and the second contact. The first contact provides injection of electrons and blocking the extraction of holes. The interface between the first contact and the optically sensitive material provides a surface recombination velocity less than 1 cm/s.
    Type: Grant
    Filed: July 20, 2009
    Date of Patent: March 20, 2012
    Assignee: InVisage Technologies, Inc.
    Inventors: Igor Constantin Ivanov, Edward Hartley Sargent, Hui Tian
  • Patent number: 8093684
    Abstract: The semiconductor of the present invention has iron sulfide and a forbidden band control element contained in the iron sulfide. The forbidden band control element has a property capable of controlling the forbidden band of iron sulfide on the basis of the number density of the forbidden band control element in the iron sulfide. An n-type semiconductor is manufactured by incorporating a group 13 element of the IUPAC system into iron sulfide. Moreover, a p-type semiconductor is manufactured by incorporating a group Ia element into iron sulfide. A semiconductor junction device or a photoelectric converter is manufactured by using the n-type semiconductor and the p-type semiconductor.
    Type: Grant
    Filed: January 9, 2007
    Date of Patent: January 10, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshiyuki Nasuno, Noriyoshi Kohama, Kazuhito Nishimura
  • Patent number: 8084837
    Abstract: In a rear surface incidence type CMOS image sensor having a wiring layer 720 on a first surface (front surface) of an epitaxial substrate 710 in which a photodiode, a reading circuit (an n-type region 750 and an n+ type region 760) and the like are disposed, and a light receiving plane in a second surface (rear surface), the photodiode and a P-type well region 740 on the periphery of the photodiode are disposed in a layer structure that does not reach the rear surface (light receiving surface) of the substrate, and an electric field is formed within the substrate 710 to properly lead electrons entering from the rear surface (light receiving surface) of the substrate to the photodiode. The electric field is realized by providing a concentration gradient in a direction of depth of the epitaxial substrate 710. Alternatively, the electric field can be realized by providing a rear-surface electrode 810 or 840 for sending a current.
    Type: Grant
    Filed: April 19, 2010
    Date of Patent: December 27, 2011
    Assignee: Sony Corporation
    Inventor: Keiji Mabuchi
  • Patent number: 8080857
    Abstract: The present invention provides a semiconductor photodetecting device that suppresses sensitivity of a short wavelength component of irradiated light as well as a long wavelength component thereof and has a spectral sensitivity characteristic approximately coincident with a human visibility characteristic, and an illuminance sensor including the semiconductor photodetecting device. The semiconductor photodetecting device has a P-type well region and an N-type well region provided side by side along the surface of a P-type semiconductor substrate, a high-concentration N-type region formed in the neighborhood of the surface of the P-type well region, and a high-concentration P-type region formed in the neighborhood of the surface of the N-type well region.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: December 20, 2011
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Noriko Tomita
  • Patent number: 8063461
    Abstract: To provide a back-illuminated type solid-state imaging device capable of color separation of pixels without using a color filter, and a camera module and an electronic equipment module which incorporate the solid-state imaging device. A solid-state imaging device including: a photoelectric conversion element PD formed in a semiconductor substrate 22; a reading-out part which reads out signal charges from the photoelectric conversion element PD formed on one surface side of the semiconductor substrate 22; the other surface of the semiconductor substrate 22 made to a light incidence surface; and a pixel which exclusively makes light of a specific wavelength or longer photoelectrically converted, by adjusting pn junction depths h2 [h2 r, h2 g, h2 b] between the photoelectric conversion element PD and an accumulation layer 28 on the light incidence surface side. A camera module and an electronic equipment module which incorporate the solid-state imaging device.
    Type: Grant
    Filed: May 1, 2009
    Date of Patent: November 22, 2011
    Assignee: Sony Corporation
    Inventor: Takayuki Ezaki
  • Patent number: 8063466
    Abstract: There is provided a semiconductor substrate for solid-state image sensing device in which the production cost is lower than that of a gettering method through a carbon ion implantation and problems such as occurrence of particles at a device production step and the like are solved. Silicon substrate contains solid-soluted carbon having a concentration of 1×1016-1×1017 atoms/cm3 and solid-soluted oxygen having a concentration of 1.4×1018-1.6×1018 atoms/cm3.
    Type: Grant
    Filed: September 7, 2007
    Date of Patent: November 22, 2011
    Assignee: Sumco Corporation
    Inventor: Kazunari Kurita
  • Patent number: 8053853
    Abstract: An image sensor device includes a semiconductor substrate having a light-sensing region, and a first and second electrode embedded within the substrate. The first and second electrode forms an array of slits, the array of slits is configured to allow a wavelength of light to pass through to the light-sensing region. A method for making an image sensor device includes providing a semiconductor substrate, forming a plurality of pixels on the semiconductor substrate, and forming a plurality of slits embedded within each of the plurality of pixels. The plurality of slits is configured to allow a wavelength of light to pass through to each of the plurality of pixels.
    Type: Grant
    Filed: May 3, 2006
    Date of Patent: November 8, 2011
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jiunn-Yih Chyan, Gwo-Yuh Shiau, Chia-Shiung Tsai
  • Publication number: 20110260280
    Abstract: Provided is an image sensor device. The image sensor device includes a substrate having a front side and a back side. The image sensor also includes a radiation-detection device that is formed in the substrate. The radiation-detection device is operable to detect a radiation wave that enters the substrate through the back side. The image sensor further includes a recrystallized silicon layer. The recrystalized silicon layer is formed on the back side of the substrate. The recrystalized silicon layer has different photoluminescence intensity than the substrate.
    Type: Application
    Filed: April 23, 2010
    Publication date: October 27, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Chieh Chuang, Dun-Nian Yaung, Yeur-Luen Tu, Jen-Cheng Liu, Keng-Yu Chou, Chung Chien Wang
  • Patent number: 8044444
    Abstract: A fabricating method of a CMOS image sensor includes the steps of: forming a transfer gate on a semiconductor substrate where a device isolation layer is formed; forming a first n-type ion implantation region for a photodiode beneath a surface of the semiconductor substrate, the first n-type ion implantation region being aligned at one side of the transfer gate and having a first width and a first ion implantation depth; forming a second n-type ion implantation region aligned at one side of the transfer gate, the second n-type ion implantation region enclosing the first n-type ion implantation region and having a second width wider than the first width and a second ion implantation depth deeper than the first ion implantation depth and a second depth; forming a p-type ion implantation region between a surface of the semiconductor substrate and the first n-type ion implantation region, the p-type ion implantation region being aligned at one side of the transfer gate and partially overlapped with the first n-ty
    Type: Grant
    Filed: June 11, 2008
    Date of Patent: October 25, 2011
    Assignee: Intellectual Ventures II LLC
    Inventor: Youn-Sub Lim
  • Patent number: 8039917
    Abstract: A photodiode includes a first silicon semiconductor layer formed over an insulating layer, a second silicon semiconductor layer formed over the insulating layer, having a thickness ranging from greater than or equal to 3 nm to less than or equal to 36 nm, a low-concentration diffusion layer which is formed in the second silicon semiconductor layer and in which an impurity of either one of a P type and an N type is diffused in a low concentration, a P-type high-concentration diffusion layer which is formed in the first silicon semiconductor layer and in which the P-type impurity is diffused in a high concentration, and an N-type high-concentration diffusion layer which is opposite to the P-type high-concentration diffusion layer with the low-concentration diffusion layer interposed therebetween and in which the N-type impurity is diffused in a high concentration.
    Type: Grant
    Filed: February 26, 2008
    Date of Patent: October 18, 2011
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Noriyuki Miura
  • Publication number: 20110249163
    Abstract: A photoelectric conversion device comprises a p-type region, an n-type buried layer formed under the p-type region, an element isolation region, and a channel stop region which covers at least a lower portion of the element isolation region, wherein the p-type region and the buried layer form a photodiode, and a diffusion coefficient of a dominant impurity of the channel stop region is smaller than a diffusion coefficient of a dominant impurity of the buried layer.
    Type: Application
    Filed: January 20, 2010
    Publication date: October 13, 2011
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Hajime Ikeda, Yoshihisa Kabaya, Takanori Watanabe, Takeshi Ichikawa, Mineo Shimotsusa
  • Publication number: 20110234868
    Abstract: A photoelectric conversion apparatus comprises multiple photoelectric conversion portions (51) disposed in a semiconductor substrate (5B) wherein each photoelectric conversion portion (51) includes: a P-type charge accumulating area (107) containing a first impurity; and an N-type well portion (102) that, along with the P-type charge accumulating area, configures a photodiode, and each well portion has: an N-type first semiconductor region (102a) containing arsenic at a first density; an N-type second semiconductor region (102b,102C) disposed below the first semiconductor region and containing arsenic at a second density that is lower than the first density; and an N-type third semiconductor region (102d) disposed below the second semiconductor region and containing a second impurity at a third density that is higher than the first density.
    Type: Application
    Filed: January 26, 2010
    Publication date: September 29, 2011
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Yuichiro Yamashita, Takanori Watanabe, Mineo Shimotsusa, Takeshi Ichikawa
  • Publication number: 20110226936
    Abstract: Pixels, imagers and related fabrication methods are described. The described methods result in cross-talk reduction in imagers and related devices by generating depletion regions. The devices can also be used with electronic circuits for imaging applications.
    Type: Application
    Filed: March 18, 2010
    Publication date: September 22, 2011
    Inventors: Bedabrata PAIN, Thomas J. Cunningham
  • Patent number: 8013412
    Abstract: A photodetector is described along with corresponding materials, systems, and methods. The photodetector comprises an integrated circuit and at least two optically sensitive layers. A first optically sensitive layer is over at least a portion of the integrated circuit, and a second optically sensitive layer is over the first optically sensitive layer. Each optically sensitive layer is interposed between two electrodes. The two electrodes include a respective first electrode and a respective second electrode. The integrated circuit selectively applies a bias to the electrodes and reads signals from the optically sensitive layers. The signal is related to the number of photons received by the respective optically sensitive layer.
    Type: Grant
    Filed: March 19, 2010
    Date of Patent: September 6, 2011
    Assignee: InVisage Technologies, Inc.
    Inventor: Hui Tian
  • Patent number: 8004057
    Abstract: A photodetector is described along with corresponding materials, systems, and methods. The photodetector comprises an integrated circuit and at least two optically sensitive layers. A first optically sensitive layer is over at least a portion of the integrated circuit, and a second optically sensitive layer is over the first optically sensitive layer. Each optically sensitive layer is interposed between two electrodes. The two electrodes include a respective first electrode and a respective second electrode. The integrated circuit selectively applies a bias to the electrodes and reads signals from the optically sensitive layers. The signal is related to the number of photons received by the respective optically sensitive layer.
    Type: Grant
    Filed: March 19, 2010
    Date of Patent: August 23, 2011
    Assignee: InVisage Technologies, Inc.
    Inventors: Hui Tian, Edward Sargent
  • Patent number: 7999340
    Abstract: An apparatus and method for forming optical black pixels having uniformly low dark current. Optical Black opacity is increased without having to increase Ti/TiN layer thickness. A hybrid approach is utilized combining a Ti/TiN OB layer in conjunction with in-pixel metal stubs that further occlude the focal radius of each pixel's incoming light beam. Additional metal layers can be used to increase the opacity into the infrared region.
    Type: Grant
    Filed: March 7, 2007
    Date of Patent: August 16, 2011
    Assignee: AltaSens, Inc.
    Inventors: Giuseppe Rossi, Lester Kozlowski, Henry Lin, John Richardson, Gregory Chow, Gaurang Patel
  • Publication number: 20110186955
    Abstract: A method of producing a photoelectric conversion device having a multilayer structure, which includes a lower electrode, a photoelectric conversion layer made of a compound semiconductor layer, a buffer layer made of a compound semiconductor layer, and a transparent conductive layer, formed on a substrate is disclosed. Prior to a buffer layer forming step of forming the buffer layer on the photoelectric conversion layer, Cd ions are diffused into the photoelectric conversion layer by immersing the substrate including the photoelectric conversion layer on the surface thereof in an aqueous solution, which is controlled to a predetermined temperature not less than 40° C. and less than 100° C., contains at least one Cd source and at least one alkaline agent and contains no S ion source, and has a Cd ion concentration of not less than 0.1 M and a pH value in the range from 9 to 13.
    Type: Application
    Filed: January 21, 2011
    Publication date: August 4, 2011
    Applicant: FUJIFILM Corporation
    Inventors: Tetsuo KAWANO, Takashi KOIKE
  • Publication number: 20110175188
    Abstract: The present invention is directed toward a dual junction photodiode semiconductor devices with improved wavelength sensitivity. The photodiode employs a high quality n-type layer with relatively lower doping concentration and enables high minority carrier lifetime and high quantum efficiency with improved responsivity at multiple wavelengths. In one embodiment, the photodiode comprises a semiconductor substrate of a first conductivity type, a first impurity region of a second conductivity type formed epitaxially in the semiconductor substrate, a second impurity region of the first conductivity type shallowly formed in the epitaxially formed first impurity region, a first PN junction formed between the epitaxially formed first impurity region and the second impurity region, a second PN junction formed between the semiconductor substrate and the epitaxially formed first impurity region, and at least one passivated V-groove etched into the epitaxially formed first impurity region and the semiconductor substrate.
    Type: Application
    Filed: January 19, 2010
    Publication date: July 21, 2011
    Inventors: Peter Steven Bui, Narayan Dass Taneja, Manoocher Mansouri Aliabadi
  • Publication number: 20110163406
    Abstract: A photodiode includes a photosensitive element formed in a silicon semiconductor layer on an insulation layer. The photosensitive element includes a low concentration diffusion layer, a P-type high concentration diffusion layer, and an N-type high concentration diffusion layer. A method of producing the photodiode includes the steps of: forming an insulation material layer on the silicon semiconductor layer after the P-type impurity and the N-type impurity are implanted into the low concentration diffusion layer, the P-type high concentration diffusion layer, and the N-type high concentration diffusion layer; forming an opening portion in the insulation material layer in an area for forming the low concentration diffusion layer; and etching the silicon semiconductor layer in the area for forming the low concentration diffusion layer so that a thickness of the silicon semiconductor layer is reduced to a specific level.
    Type: Application
    Filed: March 15, 2011
    Publication date: July 7, 2011
    Inventor: Noriyuki MIURA
  • Publication number: 20110163407
    Abstract: A photoelectric conversion device comprising a semiconductor substrate of a first conduction type, and a photoelectric conversion element having an impurity region of the first conduction type and a plurality of impurity regions of a second conduction type opposite to the first conduction type. The plurality of second-conduction-type impurity regions include at least a first impurity region, a second impurity region provided between the first impurity region and a surface of the substrate, and a third impurity region provided between the second impurity region and the surface of the substrate. A concentration C1 corresponding to a peak of the impurity concentration in the first impurity region, a concentration C2 corresponding to a peak of the impurity concentration in the second impurity region and a concentration C3 corresponding to a peak of the impurity concentration in the third impurity region satisfy the following relationship: C2<C3<C1.
    Type: Application
    Filed: March 16, 2011
    Publication date: July 7, 2011
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Hiroshi YUZURIHARA, Ryuichi MISHIMA, Takanori WATANABE, Takeshi ICHIKAWA, Seiichi TAMURA
  • Patent number: 7973836
    Abstract: A method for lowering dark current in an image sensor pixel, the method includes the steps of providing a photosensitive area for receiving incident light which is converted into a charge; providing a gate for transferring charge from the photosensitive area; wherein the gate is held at a voltage which will accumulate majority carriers at a semiconductor-dielectric interface during integration for the photosensitive area. Alternatively, a potential profile can be provided under the gate to drain the dark current away from the photogeneration diffusion.
    Type: Grant
    Filed: October 28, 2004
    Date of Patent: July 5, 2011
    Assignee: OmniVision Technologies, Inc.
    Inventors: R. Daniel McGrath, Edward T. Nelson, Robert M. Guidash, Charles V. Stancampiano, James P. Lavine
  • Publication number: 20110147879
    Abstract: A wafer structure for an image sensor includes a substrate that has a given conductivity type, a given dopant concentration, and a given concentration of oxygen. An intermediate epitaxial layer is formed over the substrate. The intermediate epitaxial layer has the same conductivity type and the same, or substantially the same, dopant concentration as the substrate but a lower oxygen concentration than the substrate. A thickness of the intermediate epitaxial layer is greater than the diffusion length of a minority carrier in the intermediate layer. A device epitaxial layer is formed over the intermediate epitaxial layer. The device epitaxial layer has the same conductivity type but lower dopant and oxygen concentrations than the substrate.
    Type: Application
    Filed: December 21, 2009
    Publication date: June 23, 2011
    Inventor: Cristian A. Tivarus
  • Patent number: 7948050
    Abstract: A semiconductor structure is provided, which includes multiple sections arranged along a longitudinal axis. Preferably, the semiconductor structure comprises a middle section and two terminal sections located at opposite ends of the middle section. A semiconductor core having a first dopant concentration preferably extends along the longitudinal axis through the middle section and the two terminal sections. A semiconductor shell having a second, higher dopant concentration preferably encircles a portion of the semiconductor core at the two terminal sections, but not at the middle section, of the semiconductor structure. It is particularly preferred that the semiconductor structure is a nanostructure having a cross-sectional dimension of not more than 100 nm.
    Type: Grant
    Filed: January 11, 2007
    Date of Patent: May 24, 2011
    Assignee: International Business Machines Corporation
    Inventors: Joerg Appenzeller, Supratik Guha, Emanuel Tutuc
  • Patent number: 7944012
    Abstract: An accelerated electron detector comprises an array of monolithic sensors in a CMOS structure, each sensor comprising a substrate (10), an epi layer (11), a p+ well (12) and n+ wells (13) which are separated from the p+ well (12) by the epi layer (11). Integrated in the p+ well are a plurality of NMOS transistors. The sensor also includes a deep n region (15) beneath the p+ well (12) which establishes within the epi layer a depletion layer so that on application of a biasing voltage charge carriers generated in the epi layer are caused to drift to the n+ well (13). The detector has improved radiation hardness and it therefore suitable for the detection and imaging of accelerated electrons such as in electron microscopes.
    Type: Grant
    Filed: May 7, 2004
    Date of Patent: May 17, 2011
    Assignee: The Science and Technology Facilities Council
    Inventors: Renato Andrea Danilo Turchetta, Giulio Enrico Villani, Mark Lyndon Prydderch
  • Patent number: 7936038
    Abstract: Disclosed herein is a photodiode cell, including: a first-type substrate; a second-type epitaxial layer disposed on the first-type substrate; heavily-doped second-type layers, each having a small depth, formed on the second-type epitaxial layer; and heavily-doped first-type layers, each having a narrow and shallow section, disposed on the second-type epitaxial layer and formed between the heavily-doped second-type layers, wherein the first-type and second-type have opposite doped states.
    Type: Grant
    Filed: May 12, 2009
    Date of Patent: May 3, 2011
    Assignee: Samsung Electro-Mechanics Co.
    Inventors: Ha Woong Jeong, Kyoung Soo Kwon, Chae Dong Go, Deuk Hee Park
  • Patent number: 7928486
    Abstract: A photoelectric conversion device comprising a semiconductor substrate of a first conduction type, and a photoelectric conversion element having an impurity region of the first conduction type and a plurality of impurity regions of a second conduction type opposite to the first conduction type. The plurality of second-conduction-type impurity regions include at least a first impurity region, a second impurity region provided between the first impurity region and a surface of the substrate, and a third impurity region provided between the second impurity region and the surface of the substrate. A concentration C1 corresponding to a peak of the impurity concentration in the first impurity region, a concentration C2 corresponding to a peak of the impurity concentration in the second impurity region and a concentration C3 corresponding to a peak of the impurity concentration in the third impurity region satisfy the following relationship: C2<C3<C1.
    Type: Grant
    Filed: December 18, 2009
    Date of Patent: April 19, 2011
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroshi Yuzurihara, Ryuichi Mishima, Takanori Watanabe, Takeshi Ichikawa, Seiichi Tamura
  • Patent number: 7923801
    Abstract: A photodetector is described along with corresponding materials, systems, and methods. The photodetector comprises an integrated circuit and at least two optically sensitive layers. A first optically sensitive layer is over at least a portion of the integrated circuit, and a second optically sensitive layer is over the first optically sensitive layer. Each optically sensitive layer is interposed between two electrodes. The two electrodes include a respective first electrode and a respective second electrode. The integrated circuit selectively applies a bias to the electrodes and reads signals from the optically sensitive layers. The signal is related to the number of photons received by the respective optically sensitive layer.
    Type: Grant
    Filed: April 18, 2008
    Date of Patent: April 12, 2011
    Assignee: InVisage Technologies, Inc.
    Inventors: Hui Tian, Edward Hartley Sargent
  • Patent number: 7915652
    Abstract: An integrated infrared (IR) and full color complementary metal oxide semiconductor (CMOS) imager array is provided. The array is built upon a lightly doped p doped silicon (Si) substrate. Each pixel cell includes at least one visible light detection pixel and an IR pixel. Each visible light pixel includes a moderately p doped bowl with a bottom p doped layer and p doped sidewalls. An n doped layer is enclosed by the p doped bowl, and a moderately p doped surface region overlies the n doped layer. A transfer transistor has a gate electrode overlying the p doped sidewalls, a source formed from the n doped layer, and an n+ doped drain connected to a floating diffusion region. The IR pixel is the same, except that there is no bottom p doped layer. An optical wavelength filter overlies the visible light and IR pixels.
    Type: Grant
    Filed: October 24, 2008
    Date of Patent: March 29, 2011
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Jong-Jan Lee, Douglas J. Tweet, Jon M. Speigle
  • Patent number: 7910394
    Abstract: A method for forming a photodiode cathode in an integrated circuit imager includes defining and implanting a photodiode cathode region with a photodiode cathode implant dose of a dopant species and defining and implanting an edge region of the photodiode cathode region with a photodiode cathode edge implant dose of a dopant species to form a region of higher impurity concentration than the photodiode cathode impurity concentration.
    Type: Grant
    Filed: April 1, 2008
    Date of Patent: March 22, 2011
    Assignee: Foveon, Inc.
    Inventor: Maxim Ershov
  • Publication number: 20110062544
    Abstract: An optical semiconductor device is provided with a low concentration p-type silicon substrate (1); a low dopant concentration n-type epitaxial layer (second epitaxial layer) (26); a low dopant concentration p-type anode layer (27); a high concentration n-type cathode contact layer (9); a photodiode (2) made of the anode layer (27) and the cathode contact layer (9); and an NPN transistor (3) formed on the n-type epitaxial layer (26). The anode can be substantially completely depleted in the case where the anode layer (27) has its dopant concentration peak in the vicinity of the interface between the silicon substrate (1) and the n-type epitaxial layer (26). Therefore, high speed and high light receiving sensitivity characteristics can be obtained, and further, any influence of auto-doping from peripheral embedding layers can be controlled, so that a depletion layer can be stably formed in the anode.
    Type: Application
    Filed: November 19, 2010
    Publication date: March 17, 2011
    Applicant: PANASONIC CORPORATIN
    Inventor: Takaki IWAI
  • Patent number: 7902621
    Abstract: A semiconductor structure including a first active area under which is buried a first reflective layer and a least one second active area under which is buried a second reflective layer, wherein the upper surface of the second reflective layer is closer to the upper surface of the structure than the upper surface of the first reflective layer.
    Type: Grant
    Filed: March 5, 2009
    Date of Patent: March 8, 2011
    Assignee: STMicroelectronics S.A.
    Inventors: Perceval Coudrain, Philippe Coronel, Michel Marty, Matthieu Bopp
  • Patent number: 7898010
    Abstract: A pinned photodiode with improved short wavelength light response. In exemplary embodiments of the invention, a gate oxide is formed over a doped, buried region in a semiconductor substrate. A conductor is formed on top of the gate oxide. The gate conductor is transparent, and in one embodiment is a layer of indium-tin oxide. The transparent conductor can be biased to reduce the need for a surface dopant in creating a pinned photodiode region. The biasing of the transparent conductor produces a hole-rich accumulation region near the surface of the substrate. The gate conductor material permits a greater amount of charges from short wavelength light to be captured in the photo-sensing region in the substrate, and thereby increases the quantum efficiency of the photosensor.
    Type: Grant
    Filed: July 1, 2004
    Date of Patent: March 1, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Chandra Mouli, Howard E. Rhodes