Abstract: A series of connections of photodiodes has a plurality of alternating N-type conductivity surface areas with P-type conductivity surface areas with each member of the P-type conductivity surface areas being separated by a member of N-type conductivity surface areas. Metal conductors connect the P-type conductivity areas to the N-type conductivity areas at an N+ implanted area within the N-type conductivity surface area to form the series connection of photodiodes.

Abstract: Impurity concentration (Nd(X)) in an n-drift layer in a diode is at a maximum at a position at a distance Xp from an anode electrode in a direction from the anode electrode to a cathode electrode, and gradually decreases from the position toward each of the anode electrode and the cathode electrode. A ratio of the peak impurity concentration Np to an averaged impurity concentration Ndm in the n-drift layer is in the range of 1 to 5. This provides a diode and a manufacturing method thereof by which oscillations in voltage and current at reverse recovery are inhibited to achieve enhancement both in high speed and low-loss characteristics and in soft recovery characteristics.

Abstract: The present invention provides a photovoltaic device comprising an electricity generating layer including at least one p/n type junction, the layer comprising a silicon-based non-single-crystalline semiconductor material, wherein a nitrogen concentration has a maximum peak at the junction interface of the p/n type junction, and the nitrogen concentration at the maximum peak is within a range from 1×1018 atom/cm3 to 1×1020 atom/cm3, thereby providing a photovoltaic device of high photoelectric conversion efficiency and high reliability.

Abstract: The present invention provides a particle or electromagnetic radiation sensor structure, comprising a substrate (13) having a major surface and a sensitive layer (16) on the major surface of the substrate (13), the sensitive layer (16) being sensitive to particle or electromagnetic radiation and having a first surface (17) remote from the substrate (13). The sensitive layer (16) has a doping concentration gradient from a higher doping level to a lower doping level, the doping concentration decreasing from the substrate (13) to the first surface (17) of the sensitive layer (16). According to an embodiment, over any distance across the sensitive layer (16) which is half of the thickness of the sensitive layer (16), the ratio between the highest doping level and the lowest doping level is at least a factor 2, preferably at least a factor 3 or more. The present invention also provides a method for obtaining such a sensor structure, as well as arrays comprising such sensor structures.

Abstract: A photodetector (and method for producing the same) includes a semiconductor substrate, a buried insulator formed on the substrate, a buried mirror formed on the buried insulator, a semiconductor-on-insulator (SOI) layer formed on the conductor, alternating n-type and p-type doped fingers formed in the semiconductor-on-insulator layer, and a backside contact to one of the p-type doped fingers and the n-type doped fingers.

Abstract: In a photoelectric conversion element which is formed by alternately stacking a region of a first conductivity type and a region of a second conductivity type as a conductivity type opposite to the first conductivity type to form a multi-layered structure, in which junction surfaces between the neighboring regions of the first and second conductivity types are formed to have depths suited to photoelectrically convert light in a plurality of different wavelength ranges, and which outputs signals for respective wavelength ranges, a region of a conductivity type opposite to the conductivity type of a surface-side region of the junction surface closest to a surface is formed in the surface of the surface-side region. Thus, highly color-separable signals which suffer less color mixture upon reading out signals from a plurality of photodiode layers is read out.

Abstract: An object is to provide a semiconductor device which is free from such voltage oscillation as may cause malfunction of peripheral equipment. In a semiconductor device having a pin structure, the impurity concentration gradient in an n+ layer (103) serving as a buffer layer is set equal to or less than 2×1018cm−4. Then, when a reverse bias voltage is applied and a depletion layer reaches the n+ layer (103), the expansion of the depletion layer is prevented from rapidly stopping and the voltage oscillation can be suppressed.

Abstract: The invention is directed to an image sensor with enhanced blue response and limited cross-talk. The image sensor is made of a photodiode layer. Disposed on one side of the photodiode layer is a substrate layer made out of an oppositely charged semiconductor material. The substrate layer is further defined by two different sub-layers, where the doping densities of the sub-layers differ. This difference in doping creates a deep electric field that inhibits carriers from moving to another sensor. Additionally, the potential of the deep electric field directs these carriers back to the N-P junction formed by the substrate layer and the photodiode layer. Working in conjunction with this, a shallow implant layer is disposed on the opposite side of the photodiode layer. The shallow implant layer creates an electric field between the photodiode layer and the shallow implant layer, directing carriers to the photodiode layer.

Abstract: A high-speed silicon photodiode and method of manufacture include a first layer of silicon having thickness in a range of about 125 &mgr;m to about 550 &mgr;m. A second layer of silicon has a thickness in a range of about 3 &mgr;m to about 16 &mgr;m and a resistivity of at least about 500 ohm-cm. This first layer is doped with a second type of impurity. In an alternative aspect, a high-speed silicon photodiode and method of manufacture includes a silicon wafer doped with a first type of impurity. On a first side of the wafer a doping of a second type is applied in an active area of a photodiode. On the reverse of the wafer a volume of silicon is etched away and the resulting trench is coated with a conductor. The wafer may also exhibit a high resistivity of at least about 500 ohm-cm. In each aspect, a reverse bias not exceeding about 3.3 volts permits operation with a frequency response of at least 750 MHz.

Abstract: A method for manufacturing a photodiode CMOS image sensor. A first well and a second well are formed in a first type substrate. An isolation layer is formed over the first well and the second well. At the same time, an isolation layer is formed over another region to pattern out an active region for forming the photodiode. A protective ring layer is formed over the peripheral area of the photodiode active region. A first gate structure and a second gate structure are formed above the first well and the second well respectively. A first type source/drain region and a second type source/drain region are formed in the first well and the second well respectively. Concurrently, a second type heavily doped layer is formed in the first type substrate inside the area enclosed by the protective ring layer. A high-energy ion implantation is carried out to form a second type lightly doped layer in the first type substrate just outside the second type heavily doped layer.

Abstract: A method of manufacturing a semiconductor device comprising the step of epitaxially growing of an n-type doped layer of a semiconductor material using an n-type dopant gas, the growth process being performed at a pressure higher than 2.66×104 Pa.

Abstract: A photo semiconductor integrated circuit device has a photodiode portion and amplifier portion, each portion having a buried layer. The impurity concentration and/or depth of the buried layer for the photodiode portion is lower than that of the buried layer for the amplifier portion. As a result, the frequency band width is widened.

Abstract: The present invention describes a method of manufacturing a semiconductor device, comprising a semiconductor substrate (2) in the shape of a slice, the method comprising the steps of: step 1) selectively applying a pattern of a solids-based dopant source to a first major surface of said semiconducting substrate (2); step 2) diffusing the dopant atoms from said solids-based dopant source into said substrate (2) by a controlled heat treatment step in a gaseous environment surrounding said semi-conducting substrate (2), the dopant from said solids-based dopant source diffusing directly into said substrate (2) to form a first diffusion region (12) and, at the time, diffusing said dopant from said solids-based dopant source indirectly via said gaseous environment into said substrate (2) to form a second diffusion region (15) in at least some areas of said substrate (2) not covered by said pattern; and step 3) forming a metal contact pattern (20) substantially in alignment with said first diffusion region (12) with

Abstract: A device with an optically controlled VT is disclosed. The device includes a semiconductor die which includes an FET, the FET having a gate on an upper surface of a substrate, a body under the gate and a source contacting the body forming a body-to-source junction. A light source is provided for exposing the body to light from the lower surface of the substrate.

Abstract: The present invention provides an improved optoelectronic device and a method of manufacture therefor. The optoelectronic device includes a doped buffer layer located over a substrate having an optical window formed therein and an absorber layer located over the doped buffer layer. The optoelectronic device further includes a doped region located over the absorber layer and having a dopant tail that extends substantially through the absorber layer, and the doped buffer layer and the dopant tail are doped to augment an optical power threshold for bandwidth collapse of the optoelectronic device.

Abstract: An active pixel sensor cell, and the process for forming the active pixel sensor cell, featuring a pinned photodiode structure, and a readout region, located in a region of the pinned photodiode structure, has been developed. The process features the formation of a N+ readout region, performed simultaneously with the formation of the N+ source/drain region of the reset transistor, however with the N+ readout region placed in an area to be used for the pinned photodiode structure. The pinned photodiode structure is next formed via formation of a lightly doped N type well region, used as the lower segment of the pinned photodiode structure, followed by the formation of P+ region, used as the top segment of the pinned photodiode structure, with the N+ readout region, surrounded by the P+ region.

Abstract: A substrate-fluorescent LED having a fluorescent-impurity doped substrate and an epitaxial emission structure including an active layer and being made on the substrate. The epitaxial emission structure emits blue or green light corresponding to the band gap of the active layer. The substrate absorbs a part of the blue or green light and makes fluorescence of a longer wavelength. Neutral color light or white light is emitted from the LED. The fluorescent substrate is n-AlGaAs(Si dope), GaP(Zn+O dope), ZnSe(Cu+I, Ag+I, Al+I dope), GaN(O.C.Va(N) dope) or so.

Abstract: The present invention provides photodiodes exhibiting photoconductive gain. It is shown that photodiodes may exhibit photoconductive gain under certain conditions, and traditional photoconductive gain theory has been extended to describe these cases. Particularly, there is introduced the basic principles of photoconductive gain in p-i-n diodes, and there is described several approaches to designing photodiodes with photoconductive gain. In one approach, photogenerated carrier delay is used to obtain photoconductive gain in a photodiode. Delay structures inserted into the intrinsic region preferentially impede the flow of one of the carriers relative to the other to obtain the gain. Another method of obtaining photoconductive gain in a photodiode is to increase the rate at which electron-hole pairs are generated in the p-region or n-region, so as to decrease the times &tgr;p or &tgr;n.

Abstract: A photodiode with an optimized floating P+ region for a CMOS image sensor. The photodiode is constructed with a P+/Nwell/Psub structure. The Nwell/Psub junction of the photodiode acts as a deep junction photodiode which offers high sensitivity. The P+ floating region passivates the silicon surface to reduce dark currents. Unlike a traditional pinned photodiode structure, the P+ region in the present invention is not connected to the Pwell or Psub regions, thus making the P+ region floating. This avoids the addition of extra capacitance to the cell. The photodiode may be included as part of an active pixel sensor cell, the layout of which is fully compatible with the standard CMOS fabrication process. This type of active pixel sensor cell includes the photodiode, and may be configured with a three transistor configuration for reading out the photodiode signals.

Abstract: Semiconductor photo sensor and semiconductor wafer processing designs are disclosed. The disclosed designs provide significantly improved photo sensor performance within the framework of a CMOS process. CMOS compatible fabrication procedures are presented, that enable tailoring of the 3-dimensional doping profile and defect structure within a photo sensor, to optimize light detection efficiency and minimize noise from dark current.

Abstract: To form an impurity diffusion layer on only one side of a semiconductor substrate at least one semiconductor substrate and at least one diffusion protecting plate are put close to each other and a first impurity diffusion is perfomed on them, or at least one semiconductor substrate and at least one diffusion protecting plate are put close to each other and a first impurity diffusion is performed on them and then the semiconductor substrate and the diffusion protecting plate are arranged such that those sides on which the impurity diffusion has been performed face each other and a second impurity diffusion is performed. The diffusion protecting plate may be replaced by a semiconductor substrate. The first and second impurity diffusions may be performed using an impurity of the same conductivity type.

Abstract: A solid-state image sensor comprises a semiconductor substrate, a photoelectric conversion portion formed above the semiconductor substrate, and noise cancelers each formed, adjacent to the photoelectric conversion portion, on the semiconductor substrate through an insulating film, for removing noise of a signal read from the photoelectric conversion portion, wherein the semiconductor substrate has a conductive type opposite to a conductive type of a charge of the signal, and has a first region where concentration of impurities for determining the conductive type is high and a second region where concentration of the impurities on the first region is low.

Abstract: A photodiode converts light incident thereon into an electric signal by a junction between an N-type epitaxial layer and a P-type epitaxial layer with a sufficiently small junction capacitance. The photodiode is surrounded by a P+-type buried isolating diffused layer and a P-type isolating diffused layer, and thus is electrically separated from a signal processing circuit including a MOS transistor.

Abstract: In order to improve transistor characteristics (operating characteristics), separation characteristics between pixels, and high withstanding voltage characteristics, a photoelectric conversion device has a first conductive type well layer 12 provided on a semiconductor substrate 11 and a second conductive type light receiving region (photoelectric conversion region) 14 provided on the well layer 12.

Abstract: A planar avalanche photodetector (APD) is fabricated by forming a, for example, InGaAs absorption layer on a p+-type semiconductor substrate, such as InP, and wafer-bonding to the absorption layer a second p-type semiconductor, such as Si, to form a multiplication layer. The layer thickness of the multiplication layer is substantially identical to that of the absorption layer. A region in a top surface of the p-type Si multiplication layer is doped n+-type to form a carrier separation region and a high electric field in the multiplication region. The APD can further include a guard-ring to reduce leakage currents as well as a resonant mirror structure to provide to wavelength selectivity. The planar geometry furthermore favors the integration of high-speed electronic circuits on the same substrate to fabricate monolithic optoelectronic transceivers.

Abstract: A semiconductor device in which a photoreceptor element and a semiconductor element are formed on a common semiconductor substrate, includes: a substrate of a first conductive type; and a semiconductor layer of a second conductive type formed on the substrate; wherein the photoreceptor element is composed of the substrate and the semiconductor layer; and an impurity concentration region of the first conductive type having an impurity concentration higher than that of the substrate is provided at a position under the semiconductor layer in a region where the semiconductor element is to be formed.

Abstract: A semiconductor device includes: a photosensitive section essentially composed of a PN junction between a semiconductor multilayer structure of the first conductivity type and a first semiconductor layer of the second conductivity type; and a partitioning portion for splitting the photosensitive section into a plurality of regions. The semiconductor multilayer structure of the first conductivity type includes: a semiconductor substrate of the first conductivity type; a first semiconductor layer of the first conductivity type; and a second semiconductor layer of the first conductivity type. The partitioning portion includes a third semiconductor layer of the first conductivity type extending from the first semiconductor layer of the second conductivity type so as to reach the second semiconductor layer of the first conductivity type.

Abstract: Edge passivation for a small area silicon cell is provided in a batch process by providing streets between individual cells formed in a silicon substrate and diffusing dopant through the substrate along the streets. Following completion of fabrication of the plurality of cells in the substrate, the substrate is sawed along the streets with the diffused region providing passivation along the edges of the individual die.

Abstract: A thin film solar cell comprises a p-layer, an i-layer and an n-layer formed in this order as a pin junction on a substrate in which the p-layer and the i-layer are thin silicon films each containing a crystalline component, and the p-layer contains p-type impurities of 0.2 to 8 atom % and has a thickness of 10 to 200 nm.

Abstract: A low-bandgap, double-heterostructure PV device is provided, including in optical alignment a first InP1−yAsy n-layer formed with an n-type dopant, an GaxIn1−xAs absorber layer, the absorber layer having an n-region formed with an n-type dopant and an p-region formed with a p-type dopant to form a single pn-junction, and a second InP1−yAsy p-layer formed with a p-type dopant, wherein the first and second layers are used for passivation and minority carrier confinement of the absorber layers.

Abstract: A solar cell comprises at least a germanium (Ge) substrate, buffer layers formed on the germanium substrate, a first InxGa1-xAs layer of first conductivity type formed on the buffer layers, and a second InxGa1-xAs layer of second conductivity type formed on the first InxGa1-xAs layer to form pn junction. Because the composition x of In contained in the first InxGa1-xAs layer and the second InxGa1-xAs layer is in a range of 0.005≦x≦0.015, the inexpensive and high conversion efficiency solar cell can be achieved.

Abstract: The present invention relates to silicon with a high oxygen content and, at the same time, a high density of crystal lattice dislocations, and to its production. This silicon may be used in photovoltaics. Solar cells which are based on the material according to the invention exhibit high levels of efficiency despite the high oxygen content.

Abstract: This invention provides a method of forming a CMOS image sensor. The image sensor is formed in a predetermined region of a semiconductor wafer covered with a P-type substrate. The wafer comprises at least one N-channel area for forming one NMOS transistor and a sensor area for forming a photo-diode sensor. At least one gate electrode in the N-channel area is formed first. A first ion-implantation is performed to form a lightly doped drain (LDD) layer in predetermined areas on the surface of the P-type substrate in the N-channel area next to the gate electrode. A second ion-implantation is performed to form a heavy doped drain (HDD) layer in another predetermined area on the surface of the substrate in the N-channel area next to the LDD. A third ion-implantation is performed to form a doped layer with phosphorus as the major dopant on the surface of the substrate in the sensor area.

Abstract: The surface of a semiconductor wafer comprises a silicon substrate and a well positioned in a predetermined area just under the surface of the substrate. A photo diode comprises a MOS transistor positioned on the surface of the well, a photo sensor positioned beside the well and electrically connected to the MOS transistor, and an insulation layer positioned on the surface of the substrate surrounding the photo sensor. The photo sensor comprises a first doped region positioned on the surface of the photo sensor, and a second doped region positioned between the first doped region and the insulation layer, a portion of the second doped region at least partially under the insulation layer. The dopant density of the second doped region is less than that of the first doped region, and the second doped region functions to reduce the electrical field around the first doped region so as to reduce the leakage current.

Abstract: A solid-state image sensor comprises a semiconductor substrate, a photoelectric conversion portion formed above the semiconductor substrate, and noise cancelers each formed, adjacent to the photoelectric conversion portion, on the semiconductor substrate through an insulating film, for removing noise of a signal read from the photoelectric conversion portion, wherein the semiconductor substrate has a conductive type opposite to a conductive type of a charge of the signal, and has a first region where concentration of impurities for determining the conductive type is high and a second region where concentration of the impurities on the first region is low.

Abstract: A photovoltaic device have a pin junction of a p-layer, an i-layer and an n-layer, wherein the p-layer includes a first p-layer and a second p-layer thereover, the first p-layer having a thickness of 5 nm or less and being uniformly doped with a p-type impurity, and the second p-layer being formed by decomposition of a gas which does not positively incorporate a p-type impurity.

Abstract: The present invention discloses a semiconductor based detector for radiation with a small but effective barrier between the radiation sensitive volume in the semiconductor and the regions and junctions with readout circuitry, and with no or a lower barrier between the semiconductor substrate and the regions and junctions adapted and meant for collecting the charge carriers generated by the radiation in the semiconductor substrate.

Abstract: A thin film transistor for an antistatic circuit includes: wells formed on a silicon substrate; insulating layers for electrical isolation between electrodes formed within the wells; low density impurity diffused regions respectively interposed between the insulating layers; a first high-density impurity diffused region formed within one low-density impurity diffused region; a second high-density impurity diffused region formed within the other low-density impurity diffused region; interlevel insulating layers formed on the insulating layers and the low-density impurity diffused layers; and metal gate electrodes formed on the low-density impurity diffused layers and the interlevel insulating layers; at least one of the first high-density impurity diffused region and the second high-density impurity diffused region being arranged to overlap on active region, inward from outside edges of the active region.

Abstract: A photodiode is provided comprising a substrate, a well with a first electric type within the substrate, a heavily doped region with a second electric type within the well, and a insulating layer on the substrate. The insulating layer in the position on the heavily doped region is thinner than in other positions. A junction is thus formed between the heavily doped region and the well.

Abstract: A photo detective unit includes a photo detective semiconductor chip including a photo detective element formed under a first manufacturing condition and a buffer circuit for shaping output waveform of the photo detective element, and a signal processing semiconductor chip formed under a second manufacturing condition and responsive to voltage from the photo detective semiconductor chip for generating digital data, and the photo detective semiconductor chip and the signal processing semiconductor chip are together accommodated in a single package.

Abstract: In a light receiving element and a semiconductor device manufacturing method, the low density PN junction is formed by constructing the internal composition of the photodiode with N+ type diffusion layer, N− type epitaxial layer, P− type epitaxial layer, P+ type deposit layer, and P type Si from the light receiving surface, the vacant layer to be occurred when the photodiode is reverse biased will be widened and the light receiving sensitivity and the frequency characteristic will be improved. Furthermore, since the separation of bipolar elements will be conducted by P− epitaxial layer, the efficiency in density control at the time of P− type epitaxial growth can be improved.

Abstract: A solar cell that is capable of having a thickness optimum for the highest photoelectric conversion efficiency and achieves reduction of carrier recombination loss is provided. For this purpose, a solar cell (10) is formed by stacking a top cell (12) including an n.sup.+ layer, a p layer, and a p.sup.+ layer, and a bottom cell (14) including an n.sup.+ layer and a p.sup.+ layer arranged at the bottom of the p layer along the back surface. The top cell (12) has a band gap wider than that of the bottom cell (14). A top electrode (18) is formed at the n.sup.+ layer of the top cell (12), while a negative electrode (26) and a positive electrode (28) are individually connected to the n.sup.+ layer and the p.sup.+ layer of the bottom cell (14), respectively.

Abstract: The blue signal of a CMOS-based color pixel is increased with respect to the red and green signals by lowering the doping concentration of the surface regions of the pn-junction photodiodes that are used in the blue imaging cells with respect to the surface regions of the pn-junction photodiodes that are used in the red and green imaging cells.

Abstract: The circuit-integrating light-receiving element of this invention includes: a semiconductor substrate of a first conductivity type; a first semiconductor layer of a second conductivity type formed over the semiconductor substrate; a first semiconductor layer of the first conductivity type for dividing the first semiconductor layer into semiconductor regions of the second conductivity type; light-detecting sections being constituted by the divided semiconductor regions and underlying regions of the semiconductor substrate, a divided photodiode being composed of the light-detecting sections; a second semiconductor layer of the second conductivity type formed only in the vicinity of the first semiconductor layer of the first conductivity type functioning as a division section of the divided photodiode and within the regions of the semiconductor substrate forming the respective light-detecting sections; and a second semiconductor layer of the first conductivity type formed in a surface region of the first semicon

Abstract: A photoconductive switch, having at least a part of a first layer doped with dopants providing substantially no free charge carriers for charge transport between the electrodes at the normal operation temperature of the switch, has the nature of the doping, i.e., concentration, type (n or p). The dopants, varied from the first side to an opposite, second side of the first layer for co-operating with the intensity distribution of the light emitted by an illumination source, strikes the first side versus energy so as to obtain a substantially even creation of free charge carriers throughout the depth of the first layer from the first to the second side when illuminated by the illumination source.

Abstract: A delta-doped hybrid advanced detector (HAD) is provided which combines at least four types of technologies to create a detector for energetic particles ranging in energy from hundreds of electron volts (eV) to beyond several million eV. The detector is sensitive to photons from visible light to X-rays. The detector is highly energy-sensitive from approximately 10 keV down to hundreds of eV. The detector operates with milliwatt power dissipation, and allows non-sequential readout of the array, enabling various advanced readout schemes.

Abstract: The present invention relates to an image sensor; and, more particularly, to a CMOS image sensor employing photodiodes which linearly increase the ability of keeping up photogenerated charges. In accordance with the present invention, a unit pixel of a CMOS image sensor comprises: a photodiode including: a) an N-type semiconductor region and a P-type semiconductor region for a PN junction to which a reverse bias is applied; and b) a highly doped region formed on one of the N-type semiconductor region and the P-type semiconductor region for collecting carriers of electron-hole pairs generated in a depletion region of the PN junction so that a voltage drop of the reverse bias is linear; and an image data processing unit for producing an image data in response to the carriers transferred from the highly doped region.

Abstract: The present invention provides a solid state image sensor constructed in such a manner that, even if the impurity concentration of the wells of a transistors is increased, the junction leakage current does not increase, and thus, the picture quality of the reproduced picture is not deteriorated. On a p-type substrate, there are formed a first p-type well for a photoelectric conversion portion comprising a photodiode, and a second p-type well for a signal scanning circuit portion. In the surface portions of the first and second p-type wells, a first and a second n-type diffused layers are formed, respectively. The drain of a reset transistor and the drain of an amplifying transistor which constitute the second n-type diffused layer are connected to a power supply line. Further, the source of an address transistor which is an n-type diffused layer is connected to a vertical signal line.

Abstract: A multilayer solar cell with bypass diodes includes a stack of alternating p and n type semiconductor layers 10, 11, 12, 13, 14 arranged to form a plurality of rectifying photovoltaic junctions 15, 16, 17, 18. Contact is made to underlying layers by way of a buried contact structure comprising grooves extending down through all of the active layers, the walls of each groove being doped 33, 34 with n-or p-type impurities depending upon the layers to which the respective contact is to be connected and the grooves being filled with metal contact material 31, 32. One or more bypass diodes are provided by increasing the doping levels on either side 10, 13 of one or more portions of the junctions 16 of the cell such that quantum mechanical tunnelling provides a reverse bias characteristic whereby conduction occurs under predetermined reverse bias conditions. Ideally, the doping levels in the bypass diodes is 10.sup.18 atoms/cm.sup.3 or greater and the junction area is small.

Abstract: A photoelectric conversion device has a non-single-crystal semiconductor laminate member formed on a substrate having a conductive surface, and a conductive layer formed on the non-single-crystal semiconductor laminate member. The non-single-crystal semiconductor laminate member has such a structure that a first non-single-crystal semiconductor layer having a P or N first conductivity type, an I-type second non-single-crystal semiconductor layer and a third non-single-crystal semiconductor layer having a second conductivity type opposite the first conductivity type are laminated in this order. The first (or third) non-single-crystal semiconductor layer is disposed on the side on which light is incident, and is P-type. The I-type non-single-crystal semiconductor layer has introduced thereinto a P-type impurity, such as boron which is distributed so that its concentration decreases towards the third (or first) non-single-crystal semiconductor layer in the thickness direction of the I-type layer.