Responsive To Nonelectrical External Signals (e.g., Light) Patents (Class 257/53)
  • Patent number: 8653533
    Abstract: A method of manufacturing a semiconductor device includes the steps of forming a silicon oxide film on a silicon carbide substrate, annealing the silicon carbide substrate and the silicon oxide film in gas containing hydrogen, and forming an aluminum oxynitride film on the silicon oxide film after the annealing of the silicon carbide substrate and the silicon oxide film.
    Type: Grant
    Filed: September 2, 2010
    Date of Patent: February 18, 2014
    Assignee: Rohm Co., Ltd.
    Inventors: Shuhei Mitani, Yuki Nakano, Heiji Watanabe, Takayoshi Shimura, Takuji Hosoi, Takashi Kirino
  • Patent number: 8648250
    Abstract: A multi-stack semiconductor device comprises: a substrate; a first conductive layer, a first group of the semiconductor material layers and a second group of the semiconductor material layers. The first conductive layer is formed on the substrate scribed by laser on the bottom of the first conductive layer to form a plurality of the first scribe lines. The first group of the semiconductor material layers is formed on the first conductive layer, and the second group of the semiconductor material layers is formed on the first group of the semiconductor material layers. The first group of the semiconductor material layers and the second group of the semiconductor material layers are simultaneously scribed by laser on bottom of the first group of the semiconductor material layers to form a plurality of the second scribe lines. Each second scribe line is comprised of a plurality of the second pores.
    Type: Grant
    Filed: September 2, 2011
    Date of Patent: February 11, 2014
    Assignee: Sun Well Solar Corporation
    Inventors: Chang-Shiang Yang, Ke-Hsuan Liu, Chih-hsien Chien
  • Publication number: 20140034950
    Abstract: A flat panel sensor and a flat panel detector are provided on the basis of a top-gate TFT structure. The flat panel sensor comprises a base substrate, and a top-gate TFT and a storage capacitor that are formed on the base substrate; the storage capacitor includes a first conductive layer, a second conductive layer disposed in opposition to the first conductive layer, a third conductive layer for output of an electric signal, and a ground line; the first conductive layer is directly connected to a drain electrode and an active layer of the top-gate TFT, the second conductive layer is directly connected to the ground line, and the third conductive layer is connected to the first conductive layer through a via hole.
    Type: Application
    Filed: July 31, 2013
    Publication date: February 6, 2014
    Applicant: Beijing BOE Optoelectronics Technology Co., Ltd.
    Inventor: Xiaokun Li
  • Publication number: 20140027775
    Abstract: Accordingly, a method of forming a metal chalcogenide material may comprise introducing at least one metal precursor and at least one chalcogen precursor into a chamber comprising a substrate, the at least one metal precursor comprising an amine or imine compound of an alkali metal, an alkaline earth metal, a transition metal, a post-transition metal, or a metalloid, and the at least one chalcogen precursor comprising a hydride, alkyl, or aryl compound of sulfur, selenium, or tellurium. The at least one metal precursor and the at least one chalcogen precursor may be reacted to form a metal chalcogenide material over the substrate. A method of forming a metal telluride material, a method of forming a semiconductor device structure, and a semiconductor device structure are also described.
    Type: Application
    Filed: July 24, 2012
    Publication date: January 30, 2014
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Timothy A. Quick, Stefan Uhlenbrock, Eugene P. Marsh
  • Publication number: 20140027774
    Abstract: Photovoltaic heterojunction devices, combination hetero- homo-junction devices, and associated methods are provided. In one aspect, for example, a photovoltaic device can include a doped semiconductor substrate having a first textured region and a second textured region opposite the first textured region, a first intrinsic semiconductor layer coupled to the first textured region opposite the semiconductor substrate and a second intrinsic semiconductor layer coupled to the second textured region opposite the semiconductor substrate. A first semiconductor layer can be coupled to the first intrinsic semiconductor layer opposite the first textured region, where the first semiconductor layer is doped to an opposite polarity of the doped semiconductor substrate.
    Type: Application
    Filed: May 15, 2012
    Publication date: January 30, 2014
    Applicant: SiOnyx, Inc.
    Inventors: Xia Li, Christopher Vineis, Martin U. Pralle
  • Publication number: 20140021472
    Abstract: A printable medium is proposed, such as can be used, for example, during the production of metal contacts for silicon solar cells which are covered with a passivation layer on a surface of a silicon substrate. A corresponding production method and a correspondingly produced solar cell are also disclosed. The printable medium contains at least one medium that etches the passivation layer and metal particles such as nickel particles, for example. By locally applying the printable medium to the passivation layer and subsequent heating, the passivation layer can be opened locally with the aid of the etching medium. As a result, the nickel particles can form a mechanical and electrical contact with the substrate surface, preferably with the formation of a nickel silicide layer. The printable medium and the production method made possible therewith are cost-effective owing to the use of nickel particles, for example, and allow both good electrical contact and avoidance of undesirable high-temperature steps.
    Type: Application
    Filed: April 5, 2012
    Publication date: January 23, 2014
    Applicant: UNIVERSITÄT KONSTANZ
    Inventors: Giso Hahn, Bernd Raabe, Stefan Braun
  • Publication number: 20140021471
    Abstract: An MRAM bit (10) includes a free magnetic region (15), a fixed magnetic region (17) comprising an antiferromagnetic material, and a tunneling barrier (16) comprising a dielectric layer positioned between the free magnetic region (15) and the fixed magnetic region (17). The MRAM bit (10) avoids a pinning layer by comprising a fixed magnetic region exhibiting a well-defined high Hflop using a combination of high Hk (uniaxial anisotropy), high Hsat (saturation field), and ideal soft magnetic properties exhibiting well-defined easy and hard axes.
    Type: Application
    Filed: June 24, 2013
    Publication date: January 23, 2014
    Inventors: Srinivas V. Pietambaram, Bengt J. Akerman, Renu W. Dave, Jason A. Janesky, Nicholas D. Rizzo, Jon M. Slaughter
  • Patent number: 8629347
    Abstract: Novel structures of photovoltaic cells (also known as solar cells) are provided. The Cells are based on the nanometer-scaled wire, tubes, and/or rods, which are made of the electronics materials covering semiconductors, insulator or metallic in structure. These photovoltaic cells have large power generation capability per unit physical area over the conventional cells. These cells can have also high radiation tolerant capability. These cells will have enormous applications such as in space, in commercial, residential and industrial applications.
    Type: Grant
    Filed: September 30, 2012
    Date of Patent: January 14, 2014
    Assignee: Banpil Photonics, Inc.
    Inventors: Nobuhiko P. Kobayashi, Achyut K. Dutta
  • Patent number: 8629436
    Abstract: Systems, methods, devices, and products of processes consistent with the innovations herein relate to thin-film solar cells having contacts on the backside, only. In one exemplary implementation, there is provided a thin film device. Moreover, such device may comprise a substrate, and a layer of silicon or silicon-containing material positioned on a first side of the substrate, wherein the layer comprises a n-doped region and a p-doped region. In some exemplary implementations, the device may be fabricated such that the n-doped region and the p-doped region are formed on the backside surface of the layer to create an electrical structure characterized by a P-type anode and an N-type cathode forming a junction positioned along the backside surface of the layer.
    Type: Grant
    Filed: August 16, 2010
    Date of Patent: January 14, 2014
    Assignee: Gigasi Solar, Inc.
    Inventor: Venkatraman Prabhakar
  • Publication number: 20140008653
    Abstract: Provided is a multi-wave band light sensor combined with a function of infrared ray (IR) sensing including a substrate, an IR sensing structure, a dielectric layer, and a multi-wave band light sensing structure. The substrate includes a first region and a second region. The IR sensing structure is in the substrate for sensing IR. The dielectric layer is on the IR sensing structure. The multi-wave band light sensing structure includes a first wave band light sensor, a second wave band light sensor, and a third wave band light sensor. The second wave band light sensor and the first wave band light sensor are overlapped and disposed on the IR sensing structure on the first region of the substrate from the bottom up. The third wave band light sensor is in the dielectric layer of the second region.
    Type: Application
    Filed: September 9, 2013
    Publication date: January 9, 2014
    Applicant: Maxchip Electronics Corp.
    Inventors: Jin-Wei Chang, Hung-Lung Wang, Jung-Kai Hung
  • Publication number: 20130341623
    Abstract: A photoreceptor includes a multilayer blocking structure to reduce dark discharge of the surface voltage of the photoreceptor resulting from electron injection from an electrically conductive substrate. The multilayer blocking structure includes wide band gap semiconductor layers in alternating sequence with one or more narrow band gap blocking layers. A fabrication method of the photoreceptor includes transfer-doping of the narrow band gap blocking layers, which are deposited in alternating sequence with wide band gap semiconductor layers to form a blocking structure. Suppression of hole or electron injection can be obtained using the method.
    Type: Application
    Filed: June 20, 2012
    Publication date: December 26, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Bahman Hekmatshoartabari, Jeehwan Kim, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
  • Patent number: 8604334
    Abstract: An object of the present invention is to provide a simple process to manufacture a wiring connecting photoelectric cells in a photoelectric conversion device. Another object of this invention is to prevent defective rupture from occurring in the said wiring. The photoelectric conversion device comprises a first and a second photoelectric conversion cells comprising respectively a first and a second single crystal semiconductor layers. First electrodes are provided on the downwards surfaces of the first and second photoelectric conversion cells, and second electrodes are provided on their upwards surfaces. The first and second photoelectric conversion cells are fixed onto a support substrate side by side. The second single crystal semiconductor layer has a through hole which reaches the first electrode. The second electrode of the first photoelectric conversion cell is extended to the through hole to be electrically connected to the first electrode of the second photoelectric conversion cell.
    Type: Grant
    Filed: September 1, 2009
    Date of Patent: December 10, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yasuyuki Arai
  • Publication number: 20130320333
    Abstract: In a display portion of a liquid crystal display device, the dead space corresponding to a unit pixel is reduced while the aperture ratio of the unit pixel is increased. One amplifier circuit portion is shared by a plurality of unit pixels, so that the area of the amplifier circuit portion corresponding to the unit pixel is reduced and the aperture ratio of the unit pixel is increased. In addition, when the amplifier circuit portion is shared by a larger number of unit pixels, a photosensor circuit corresponding to the unit pixel can be prevented from increasing in area even with an increase in photosensitivity. Furthermore, an increase in the aperture ratio of the unit pixel results in a reduction in the power consumption of a backlight in a liquid crystal display device.
    Type: Application
    Filed: May 21, 2013
    Publication date: December 5, 2013
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Jun KOYAMA, Shunpei YAMAZAKI
  • Publication number: 20130320343
    Abstract: A semiconductor-to-metal interface with ohmic contact is provided. The interface includes a semiconductor material, a metal layer, and a silicon carbide layer disposed between the semiconductor material and the metal layer. The silicon carbide layer causes the formation of a semiconductor-to-metal interface with ohmic contact. Applications include forming a photovoltaic device with ohmic contact by disposing a layer of silicon carbide over the photovoltaic material before depositing a bottom electrode layer of metal to complete the bottom of a photovoltaic cell.
    Type: Application
    Filed: March 15, 2013
    Publication date: December 5, 2013
    Inventors: Atsushi Yamaguchi, Jose Briceno
  • Patent number: 8598587
    Abstract: An optical sensor preventing damage to a semiconductor layer, and preventing a disconnection and a short circuit of a source electrode and a drain electrode, and a manufacturing method of the optical sensor is provided. The optical sensor includes: a substrate; an infrared ray sensing thin film transistor including a first semiconductor layer disposed on the substrate; a visible ray sensing thin film transistor including a second semiconductor layer disposed on the substrate; a switching thin film transistor including a third semiconductor layer disposed on the substrate; and a semiconductor passivation layer enclosing an upper surface and a side surface of an end portion of at least one of the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer.
    Type: Grant
    Filed: August 12, 2011
    Date of Patent: December 3, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yun Jong Yeo, Hong-Kee Chin, Byeong Hoon Cho, Ki-Hun Jeong, Jung Suk Bang, Woong Kwon Kim, Sung Ryul Kim, Dae Cheol Kim, Kun-Wook Han
  • Publication number: 20130313554
    Abstract: The present invention provides an ion sensor with which an ion concentration can be stably measured with high accuracy, and a display device. The present invention is an ion sensor that includes a field effect transistor. The ion sensor also includes an ion sensor antenna and a reset device. The ion sensor antenna and the reset device are connected to a gate electrode of the field effect transistor. The reset device is capable of controlling the potential of the gate electrode and the ion sensor antenna to a predetermined potential.
    Type: Application
    Filed: May 18, 2011
    Publication date: November 28, 2013
    Inventors: Atsuhito Murai, Yoshiharu Kataoka, Takuya Watanabe, Yuhko Hisada, Satoshi Horiuchi
  • Publication number: 20130313555
    Abstract: A photoelectric conversion element including a first gate electrode, a first gate insulating layer, a crystalline semiconductor layer, an amorphous semiconductor layer, an impurity semiconductor layer, a source electrode and a drain electrode in contact with the impurity semiconductor layer, a second gate insulating layer covering a region between the source electrode and the drain electrode, and a second gate electrode over the second gate insulating layer. In the photoelectric conversion element, a light-receiving portion is provided in the region between the source electrode and the drain electrode, the first gate electrode includes a light-shielding material and overlaps with the entire surface of the crystalline semiconductor layer and the amorphous semiconductor layer, the second gate electrode includes a light-transmitting material and overlaps with the light-receiving portion, and the first gate electrode is electrically connected to the source electrode or the drain electrode is provided.
    Type: Application
    Filed: August 6, 2013
    Publication date: November 28, 2013
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tsudoi NAGI, Koji Dairiki
  • Patent number: 8586859
    Abstract: A method of forming a plurality of discrete, interconnected solar cells mounted on a carrier by providing a first semiconductor substrate; depositing on the first substrate a sequence of layers of semiconductor material forming a solar cell structure; forming a metal back contact layer over the solar cell structure; mounting a carrier on top of the metal back contact; removing the first substrate; and lithographically patterning and etching the solar cell structure to form a plurality of discrete solar cells mounted on the carrier.
    Type: Grant
    Filed: July 27, 2012
    Date of Patent: November 19, 2013
    Assignee: Emcore Solar Power, Inc.
    Inventor: Tansen Varghese
  • Patent number: 8586975
    Abstract: A photoelectric conversion element includes a first electrode, a second electrode, and a photoelectric conversion element provided between the first electrode and the second electrode. The photoelectric conversion element includes a polymer. The polymer includes at least one light absorber which absorbs light and generates at least one kind of carrier. An end part of the polymer combines with a surface, which faces the second electrode, of the first electrode.
    Type: Grant
    Filed: January 27, 2012
    Date of Patent: November 19, 2013
    Assignee: Seiko Epson Corporation
    Inventor: Takashi Miyazawa
  • Publication number: 20130299829
    Abstract: A photoelectric conversion device is disclosed. The photoelectric conversion device includes an electrode layer, an intermediate layer on the electrode layer and a light-absorbing layer on the intermediate layer. The electrode layer includes molybdenum. The light-absorbing layer includes one or more Group I-B elements, one or more Group III-B elements, and at least one element of sulfur and selenium. The intermediate layer includes an amorphous layer. The amorphous layer includes at least one of the sulfur and the selenium which are contained in the light-absorbing layer, and the molybdenum.
    Type: Application
    Filed: December 21, 2011
    Publication date: November 14, 2013
    Applicant: KYOCERA CORPORATION
    Inventor: Shinya Ishikawa
  • Patent number: 8575713
    Abstract: A semiconductor device 700 includes a substrate and an optical sensor unit 700 formed on the substrate for sensing light and for generating a sensing signal, the optical sensor unit 700 including a first thin film diode 701A for detection of light in a first wavelength range, a second thin film diode 701B detecting light in a second wavelength range that contains wavelengths longer than the longest wavelength in the first wavelength range. The first thin film diode 701A and the second thin film diode 701B are connected in parallel to each other. The sensing signal is generated based on the output from one of the first thin film diode 701A and the second thin film diode 701B. By this means, the wavelength range that can be detected by the optical sensor unit can be expanded and the sensing sensitivity can be increased.
    Type: Grant
    Filed: February 12, 2010
    Date of Patent: November 5, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Naoki Makita, Masahiro Fujiwara
  • Publication number: 20130256662
    Abstract: A material is manufactured from a single piece of semiconductor material. The semiconductor material can be an n-type semiconductor. Such a manufactured material may have a top layer with a crystalline structure, transitioning into a transition layer, further transitioning into an intermediate layer, and further transitioning to the bulk substrate layer. The orientation of the crystalline pores of the crystalline structure align in layers of the material. The transition layer or intermediate layer includes a material that is substantially equivalent to intrinsic semiconductor. Also described is a method for manufacturing a material from a single piece of semiconductor material by exposing a top surface to an energy source until the transformation of the top surface occurs, while the bulk of the material remains unaltered. The material may exhibit photovoltaic properties.
    Type: Application
    Filed: March 15, 2013
    Publication date: October 3, 2013
    Inventor: Jose Briceno
  • Patent number: 8546157
    Abstract: An improved bifacial solar cell is disclosed. In some embodiments, the front side includes an n-type field surface field, while the back side includes a p-type emitter. In other embodiments, the p-type emitter is on the front side. To maximize the diffusion of majority carriers and lower the series resistance between the contact and the substrate, the regions beneath the metal contacts are more heavily doped. Thus, regions of higher dopant concentration are created in at least one of the FSF or the emitter. These regions are created through the use of selective implants, which can be performed on one or two sides of the bifacial solar cell to improve efficiency.
    Type: Grant
    Filed: March 7, 2012
    Date of Patent: October 1, 2013
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Atul Gupta, Nicholas P. T. Bateman
  • Publication number: 20130248865
    Abstract: According to an embodiment, a solid-state imaging device includes a photoelectric, conversion element. The photoelectric conversion element includes a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer. In the solid-state imaging device, D2m3/L2m3×ni32/N2<D1M2/L1M2×ni22/N2 and D1m1/L1m1×ni12/N1<D1m2/L1m2×ni22/N1 are established.
    Type: Application
    Filed: December 28, 2012
    Publication date: September 26, 2013
    Inventors: Shuichi TORIYAMA, Koichi KOKUBUN, Hiroki SASAKI
  • Patent number: 8541783
    Abstract: The present invention relates to a solar power generation device which includes an electric double-layer capacitor and a solar cell. The electric double-layer capacitor includes a pair of current collectors formed using a light-transmitting conductive material; active materials which are dispersed on the pair of current collectors; a light-transmitting electrolyte layer which is provided between the pair of current collectors; and a terminal portion which is electrically connected to the current collector. The solar cell includes, over a light-transmitting substrate, a first light-transmitting conductive film; a photoelectric conversion layer which is provided in contact with the first light-transmitting conductive film; and a second light-transmitting conductive film which is provided in contact with the photoelectric conversion layer.
    Type: Grant
    Filed: August 2, 2011
    Date of Patent: September 24, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yumiko Saito, Junpei Momo, Rie Matsubara, Kuniharu Nomoto, Hiroatsu Todoriki
  • Publication number: 20130234142
    Abstract: A display device includes an infrared sensing transistor and a visible sensing transistor. The visible sensing transistor includes a semiconductor on a substrate; an ohmic contact on the semiconductor; an etch stopping layer on the ohmic contact; a source electrode and a drain electrode on the etch stopping layer; a passivation layer on the source electrode and the drain electrode; and a gate electrode on the passivation layer. The etch stopping layer may be composed of the same material as the source electrode and the drain electrode. The infrared sensing transistor is similar to the visible sensing transistor except the etch stopping layer is absent.
    Type: Application
    Filed: April 29, 2013
    Publication date: September 12, 2013
    Applicant: Samsung Display Co., Ltd.
    Inventors: Dae-Cheol KIM, Sung-Ryul KIM, Yung-Jong YEO, Hong-Kee CHIN, Ki-Hun JEONG
  • Patent number: 8530267
    Abstract: A method for manufacturing a silicon-based thin film solar cell including a crystalline silicon photoelectric conversion unit which contains a p-type layer (4p), a crystalline i-type silicon photoelectric conversion layer (4ic), and an n-type layer (4nc) stacked in this order from a transparent substrate side is provided. In one example, an n-type silicon-based thin film layer (4na) is formed on the crystalline i-type silicon photoelectric conversion layer (4ic), the n-type silicon-based thin film layer (4na) having an n-type silicon alloy layer having a film thickness of 1-12 nm and being in contact with the crystalline i-type silicon photoelectric conversion layer.
    Type: Grant
    Filed: October 9, 2009
    Date of Patent: September 10, 2013
    Assignee: Kaneka Corporation
    Inventors: Kunta Yoshikawa, Mitsuru Ichikawa, Kenji Yamamoto
  • Publication number: 20130229397
    Abstract: The present invention provides a display apparatus for capturing images. The display apparatus includes a first substrate, a pixel array disposed on the first substrate, a thin film transistor array disposed in the pixel array and a photodetector array disposed in the pixel array. The pixel array includes a plurality of sub-pixels. The thin film transistor array controls image data transferred to the pixel array. When a light illuminates a sub-pixel of the pixel array, a photodetector corresponding to the sub-pixel of the photodetector array generates a leakage current in response to a gray-level of the light.
    Type: Application
    Filed: August 8, 2012
    Publication date: September 5, 2013
    Applicant: CHUNGHWA PICTURE TUBES, LTD.
    Inventors: Tzu-Hsuan Huang, Jyun-Cheng Lin, Ru-Ji Hiseh
  • Patent number: 8525019
    Abstract: A method for forming a reduced conductive area in transparent conductive. The method includes providing a transparent, electrically conductive, chemically reducible material. A reducing atmosphere is provided and concentrated electromagnetic energy from an energy source is directed toward a portion of the transparent, electrically conductive, chemically reducible material to form a reduced conductive area. The reduced conductive area has greater electrical conductivity than the transparent, electrically conductive, chemically reducible material. A thin film article and photovoltaic module are also disclosed.
    Type: Grant
    Filed: July 1, 2010
    Date of Patent: September 3, 2013
    Assignee: Primestar Solar, Inc.
    Inventors: Jonathan Mack Frey, Scott Daniel Feldman-Peabody
  • Patent number: 8513662
    Abstract: Provided is a semiconductor device including a semiconductor element including at least a semiconductor as a component characterized by including: a mechanism for irradiating the semiconductor with light having a wavelength longer than an absorption edge wavelength of the semiconductor; and a dimming mechanism, provided in a part of an optical path through which the light passes, for adjusting at least one factor selected from an intensity, irradiation time and the wavelength of the light, wherein a threshold voltage of the semiconductor element is varied by the light adjusted by the dimming mechanism.
    Type: Grant
    Filed: May 11, 2009
    Date of Patent: August 20, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hisato Yabuta, Masato Ofuji, Yasuyoshi Takai, Takehiko Kawasaki, Norio Kaneko, Ryo Hayashi
  • Patent number: 8507789
    Abstract: A solar cell and a method of manufacturing the same are disclosed. The solar cell includes a substrate of a first conductive type having at least one via hole; an emitter layer only on at least a portion of the via hole and at least one selected from a group consisting of an incident surface and side surfaces of the substrate, the emitter layer having a second conductive type opposite the first conductive type; at least one first electrode on the incident surface, the first electrode being electrically connected to the emitter layer; a second electrode connected to an opposite surface to the incident surface; and at least one first electrode current collector on the opposite surface, the at least one first electrode current collector being insulated from the second electrode and being electrically connected to the at least one first electrode through the via hole.
    Type: Grant
    Filed: May 18, 2012
    Date of Patent: August 13, 2013
    Assignee: LG Electronics Inc.
    Inventors: Jihoon Ko, Juwan Kang, Jonghwan Kim, Daehee Jang
  • Patent number: 8507963
    Abstract: A photoelectric conversion device in accordance with an aspect of the present invention includes a thin-film transistor formed on a substrate, and a photo diode electrically connected to the thin-film transistor, wherein the photo diode includes a lower electrode connected to a drain electrode of the thin-film transistor, a photoelectric conversion layer formed on the lower electrode, an upper electrode formed from a transparent conductive film on the photoelectric conversion layer, the upper electrode being formed so as to be contained within an upper surface of the photoelectric conversion layer as viewed from a top, and a protective film (compound layer or the like) formed so as to protect a part of an upper surface of the photoelectric conversion layer located outside the upper electrode.
    Type: Grant
    Filed: November 4, 2010
    Date of Patent: August 13, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventor: Masami Hayashi
  • Publication number: 20130200373
    Abstract: The present invention provides an inexpensive display device that includes an ion sensor portion and a display and that can be miniaturized. The present invention is a display device that includes an ion sensor portion including an ion sensor circuit and a display including a display-driving circuit. The display device has a substrate, and at least one portion of the ion sensor circuit and at least one portion of the display-driving circuit are formed on the same main surface of the substrate.
    Type: Application
    Filed: May 18, 2011
    Publication date: August 8, 2013
    Inventors: Atsuhito Murai, Yoshiharu Kataoka, Takuya Watanabe, Yuhko Hisada, Satoshi Horiuchi
  • Patent number: 8502217
    Abstract: Provided is an oxide semiconductor device including an oxide semiconductor layer and an insulating layer coming into contact with the oxide semiconductor layer in which the insulating layer includes: a first insulating layer coming into contact with an oxide semiconductor, having a thickness of 50 nm or more, and including an oxide containing Si and O; a second insulating layer coming into contact with the first insulating layer, having a thickness of 50 nm or more, and including a nitride containing Si and N; and a third insulating layer coming into contact with the second insulating layer, the first insulating layer and the second insulating layer having hydrogen contents of 4×1021 atoms/cm3 or less, and the third insulating layer having a hydrogen content of more than 4×1021 atoms/cm3.
    Type: Grant
    Filed: November 27, 2008
    Date of Patent: August 6, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Ayumu Sato, Ryo Hayashi, Hisato Yabuta, Tomohiro Watanabe
  • Patent number: 8502065
    Abstract: Disclosed is a photovoltaic device. The photovoltaic device includes: a first electrode and a second electrode; a first unit cell and a second unit cell which are placed between the first electrode and the second electrode and include a first conductive semiconductor layer, an intrinsic semiconductor layer and a second conductive semiconductor layer; and an intermediate reflector which is placed between the first unit cell and the second unit cell, and includes a hydrogenated amorphous carbon layer.
    Type: Grant
    Filed: January 9, 2011
    Date of Patent: August 6, 2013
    Assignee: KISCO
    Inventor: Seung-Yeop Myong
  • Patent number: 8492766
    Abstract: Problems exist in areas such as image visibility, endurance of the device, precision, miniaturization, and electric power consumption in an information device having a conventional resistive film method or optical method pen input function. Both EL elements and photoelectric conversion elements are arranged in each pixel of a display device in an information device of the present invention having a pen input function. Information input is performed by the input of light to the photoelectric conversion elements in accordance with a pen that reflects light by a pen tip. An information device with a pen input function, capable of displaying a clear image without loss of brightness in the displayed image, having superior endurance, capable of being miniaturized, and having good precision can thus be obtained.
    Type: Grant
    Filed: January 12, 2012
    Date of Patent: July 23, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama
  • Patent number: 8492240
    Abstract: The invention relates to a solar-cell marking method comprising the steps of: providing a substrate with a substrate surface for producing a solar cell (1) that comprises an active zone (5); and producing at least one indentation (21, 31) in the substrate surface with the use of laser irradiation, wherein the at least one indentation (21, 31) forms a marking (2, 3) for marking the solar cell (1), and producing the indentation (21, 31) is carried out prior to carrying out a solar-cell manufacturing process or during carrying out a solar-cell manufacturing process. According to the invention the substrate is designed as a semiconductor wafer with a wafer surface, and the marking (2, 3) is positioned on the wafer surface such that the marking (2, 3) is in the active zone (5) of the solar cell (1) formed by the semiconductor wafer.
    Type: Grant
    Filed: February 28, 2007
    Date of Patent: July 23, 2013
    Assignee: Hanwha Q.CELLS GmbH
    Inventors: Joerg Mueller, Toralf Patzlaff
  • Patent number: 8487306
    Abstract: A photoelectric conversion element includes a first conductive layer over a substrate; a first insulating layer covering the first conductive layer; a first semiconductor layer over the first insulating layer; a second conductive layer formed over the first semiconductor layer; an impurity semiconductor layer over the second semiconductor layer; a second conductive layer over the impurity semiconductor layer; a second insulating layer covering the first semiconductor layer and the second conductive layer; and a light-transmitting third conductive layer over the second insulating layer. A first opening and a second opening are formed in the second insulating layer. In the first opening, the first semiconductor layer is connected to the third conductive layer. In the second opening, the first conductive layer is connected to the third conductive layer. In the first opening, a light-receiving portion surrounded by an electrode formed of the second conductive layer is provided.
    Type: Grant
    Filed: June 17, 2011
    Date of Patent: July 16, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Koji Dairiki, Hidekazu Miyairi, Tsudoi Nagi
  • Patent number: 8482646
    Abstract: An image sensing device comprises a pixel array, and a peripheral circuit, a column selecting circuit, and a readout, wherein each pixel includes a photodiode, a floating diffusion, a transfer PMOS transistor to the floating diffusion, an amplifier PMOS transistor, and a reset PMOS transistor, the amplifier PMOS transistor has a gate which is formed by an n-type conductive pattern, and is isolated by a first element isolation region and an n-type impurity region which covers at least a lower portion of the first element isolation region, and each PMOS transistor included in the column selecting circuit has a gate which is formed by a p-type conductive pattern and is isolated by a second element isolation region, and an n-type impurity concentration in a region adjacent to a lower portion of the second element isolation region is lower than that in the n-type impurity region.
    Type: Grant
    Filed: January 20, 2010
    Date of Patent: July 9, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takanori Watanabe, Mineo Shimotsusa, Takeshi Ichikawa, Hajime Ikeda, Yasuhiro Sekine, Akira Ohtani, Takeshi Kojima
  • Patent number: 8481847
    Abstract: A solar cell and a method of manufacturing the same are disclosed. The solar cell includes a substrate of a first conductive type having at least one via hole; an emitter layer only on at least a portion of the via hole and at least one selected from a group consisting of an incident surface and side surfaces of the substrate, the emitter layer having a second conductive type opposite the first conductive type; at least one first electrode on the incident surface, the first electrode being electrically connected to the emitter layer; a second electrode connected to an opposite surface to the incident surface; and at least one first electrode current collector on the opposite surface, the at least one first electrode current collector being insulated from the second electrode and being electrically connected to the at least one first electrode through the via hole.
    Type: Grant
    Filed: May 18, 2012
    Date of Patent: July 9, 2013
    Assignee: LG Electronics Inc.
    Inventors: Jihoon Ko, Juwan Kang, Jonghwan Kim, Daehee Jang
  • Patent number: 8476627
    Abstract: Provided is an oxide thin-film transistor (TFT) substrate that may enhance the display quality of a display device and a method of fabricating the same via a simple process. The oxide TFT substrate includes: a substrate, a gate line, a data line, an oxide TFT, and a pixel electrode. An oxide layer of the oxide TFT includes a first region that has semiconductor characteristics and a channel, and a second region that is conductive and surrounds the first region. A portion of the first region is electrically connected to the pixel electrode, and the second region is electrically connected to the data line.
    Type: Grant
    Filed: March 11, 2011
    Date of Patent: July 2, 2013
    Inventors: Pil-Sang Yun, Young-Wook Lee, Woo-Geun Lee
  • Patent number: 8461590
    Abstract: An adverse effect of parasitic capacitance on optical data output from a photodetector circuit is suppressed. A photodetector circuit includes a photoelectric conversion element; a first field-effect transistor; a second field-effect transistor; a first conductive layer functioning as a gate of the first field-effect transistor; an insulating layer provided over the first conductive layer; a semiconductor layer overlapping with the first conductive layer with the insulating layer interposed therebetween; a second conductive layer electrically connected to the semiconductor layer; and a third conductive layer electrically connected to the semiconductor layer, whose pair of side surfaces facing each other overlaps with at least one conductive layer including the first conductive layer with the insulating layer interposed therebetween, and which functions as the other of the source and the drain of the first field-effect transistor.
    Type: Grant
    Filed: December 7, 2011
    Date of Patent: June 11, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hikaru Tamura, Yoshiyuki Kurokawa, Takayuki Ikeda
  • Publication number: 20130140568
    Abstract: An image detector comprises: an active matrix-type TFT array substrate having a pixel area, in which photoelectric conversion elements and thin film transistors are arranged in a matrix shape, a data line, and a bias line; a conversion layer, which is arranged on the TFT array substrate and converts radiation into light; and a conductive cover, which covers the conversion layer, wherein the conductive cover is adhered in an adhesion area in an upper layer than an area, in which at least one of the data line and the bias line extend from the pixel area to each of terminals, and wherein inorganic insulation films configured by at least two layers are formed between the at least one of the data line and the bias line and the adhesion area.
    Type: Application
    Filed: November 30, 2012
    Publication date: June 6, 2013
    Inventors: Kenichi MIYAMOTO, Masami HAYASHI, Hiromasa MORITA, Isao NOJIRI
  • Patent number: 8455753
    Abstract: It is an object of the present invention to minimize an electrode in a solar cell to minimize the solar cell. The present invention provides a method for manufacturing a solar cell comprising the steps of forming a first electrode layer over a substrate, forming a photoelectric conversion layer over the first electrode layer, forming an organic layer over the photoelectric conversion layer, forming an opening reaching the first electrode layer in the photoelectric conversion layer, and forming a second electrode layer by filling the opening with a conductive paste, wherein the organic layer modifies the surface of the photoelectric conversion layer and a contact angle between the conductive paste and the photoelectric conversion becomes greater. According to the present invention, wettability of a photoelectric conversion layer can be decreased by forming an organic layer on a surface of the photoelectric conversion layer. Thereby an electrode layer and an insulating isolation layer can be thinned.
    Type: Grant
    Filed: January 4, 2006
    Date of Patent: June 4, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kazuo Nishi, Tomoyuki Aoki, Toshiyuki Isa, Gen Fujii
  • Publication number: 20130126850
    Abstract: A radiation detector that includes a first scintillator layer, an organic photoelectric conversion layer and a substrate is provided. The first scintillator layer, the organic photoelectric conversion layer and the substrate are layered along a radiation incident direction. The first scintillator layer contains a blend of a first phosphor material that is mainly sensitive to low energy radiation in incident radiation and converts the radiation into light of a first wavelength, and a second phosphor material that is more sensitive to high energy than low energy radiation in the radiation and converts the radiation into light of a second wavelength different from the first wavelength. The organic photoelectric conversion layer is configured by disposing a plurality of first light detection sensors and a plurality of second light detection sensors in the same plane.
    Type: Application
    Filed: January 18, 2013
    Publication date: May 23, 2013
    Applicant: FUJIFILM CORPORATION
    Inventor: FUJIFILM CORPORATION
  • Patent number: 8445909
    Abstract: Provided are a sensor array substrate and a method of fabricating the same. The sensor array substrate includes: a substrate in which a switching element region and a sensor region that senses light are defined; a first semiconductor layer which is formed in the sensor region; a first gate electrode which is formed on the first semiconductor layer and overlaps the first semiconductor layer; a second gate electrode which is formed in the switching element region; a second semiconductor layer which is formed on the second gate electrode and overlaps the second gate electrode; and a light-blocking pattern which is formed on the second semiconductor layer and overlaps the second semiconductor layer, wherein the first semiconductor layer and the second semiconductor layer are disposed on different layers, and the second gate electrode and the light-blocking pattern are electrically connected to each other.
    Type: Grant
    Filed: May 6, 2011
    Date of Patent: May 21, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Kyung-Sook Jeon, Jun-Ho Song, Sang-Youn Han, Sung-Hoon Yang, Dae-Cheol Kim, Ki-Hun Jeong, Mi-Seon Seo
  • Patent number: 8439834
    Abstract: A portable medical system is provided for the purposes of analysis and/or medication, the system having at least one of a medical monitoring device, an analysis device and a medication device. The portable medical system comprises at least one display element comprising at least one organic light-emitting diode display. An optimization device can be provided that comprises a brightness sensor and is configured to optimize the brightness, contrast and/or power consumption of the at least one display element. Furthermore, a monitoring device can be provided which monitors the functionality of the display element. Faults in the display element can be detected in this way, and a corresponding warning can be output to a person using the portable medical system.
    Type: Grant
    Filed: May 29, 2008
    Date of Patent: May 14, 2013
    Assignee: Roche Diagnostics Operations, Inc.
    Inventors: Guenther Schmelzeisen-Redeker, Wolfgang Heck, Stefan Kalveram, Andreas Menke, Wilfried Schmid, Friedrich Ziegler
  • Publication number: 20130112256
    Abstract: A photovoltaic device operable to convert light to electricity, comprising a substrate, one or more structures essentially perpendicular to the substrate, and a wavelength-selective layer disposed on the substrate, wherein the structures comprise a crystalline semiconductor material.
    Type: Application
    Filed: November 3, 2011
    Publication date: May 9, 2013
    Inventors: Young-June YU, Munib WOBER
  • Publication number: 20130112266
    Abstract: The photoelectric conversion device of the present invention is a photoelectric conversion device which includes a substrate on which the following are layered in the order listed below: a lower electrode layer; a photoelectric conversion semiconductor layer which includes, as a major component, at least one kind of compound semiconductor having a chalcopyrite structure formed of a group Ib element, a group IIIb element, and a group VIb element; a buffer layer; and a transparent conductive layer, in which the buffer layer includes a ternary compound of a cadmium-free metal, oxygen, and sulfur, and a has a carbonyl ion on a surface facing the transparent conductive layer.
    Type: Application
    Filed: January 2, 2013
    Publication date: May 9, 2013
    Applicant: FUJIFILM CORPORATION
    Inventor: FUJIFILM CORPORATION
  • Patent number: 8431928
    Abstract: Provided herein are PIN structures including a layer of amorphous n-type silicon, a layer of intrinsic GaAs disposed over the layer of amorphous n-type silicon, and a layer of amorphous p-type silicon disposed over the layer of intrinsic GaAs. The layer of intrinsic GaAs may be engineered by the disclosed methods to exhibit a variety of structural properties that enhance light absorption and charge carrier mobility, including oriented polycrystalline intrinsic GaAs, embedded particles of intrinsic GaAs, and textured surfaces. Also provided are devices incorporating the PIN structures, including photovoltaic devices.
    Type: Grant
    Filed: December 15, 2011
    Date of Patent: April 30, 2013
    Assignee: The University of Utah Research Foundation
    Inventors: Ashutosh Tiwari, Makarand Karmarkar, Nathan Wheeler Gray