Abstract: Embodiments of the present invention relate to methods for depositing an amorphous film that may be suitable for using in a NIP photodiode in display applications. In one embodiment, the method includes providing a substrate into a deposition chamber, supplying a gas mixture having a hydrogen gas to silane gas ratio by volume greater than 4 into the deposition chamber, maintaining a pressure of the gas mixture at greater than about 1 Torr in the deposition chamber, and forming an amorphous silicon film on the substrate in the presence of the gas mixture, wherein the amorphous silicon film is configured to be an intrinsic-type layer in a photodiode sensor.

Abstract: This semiconductor photodetector consists of a diode with at least two heterojunctions comprising two external layers, a first layer with a given kind or type of doping and a second layer with a kind or type of doping opposite to that of the first layer, the bandgap width of these two layers being determined as a function of the energy and hence the wavelength or wavelength band that they are each intended to detect, these two layers being separated from each other by an intermediate layer having the same kind or type of doping as one of said first and second layers, said diode being subjected to a bias voltage of adjustable value between the two external layers. The bandgap width of the intermediate layer is greater than that of the layer that has the same type of doping as layer.

Abstract: A system for displaying images includes a thin film transistor array substrate including a substrate with thin film transistors array and at least one light-sensing element containing an amorphous silicon layer formed on the substrate, wherein the light-sensing element has a current flow direction perpendicular to the substrate.

Abstract: A wavelength meter, an associated method, and system are generally described. In one example, an apparatus includes a photodiode to receive an optical signal and to generate a photocurrent upon receiving the optical signal, the photodiode having an absorption edge that is substantially aligned with a band of wavelengths, wherein the absorption edge shifts toward longer wavelengths when a reverse bias is applied to the photodiode, and control electronics coupled with the photodiode to apply at least a first reverse bias and a second reverse bias to the photodiode, wherein a ratio of a first measurement of the photocurrent at the first reverse bias and a second measurement of the photocurrent at the second reverse bias provides information about the wavelength of the optical signal.

Abstract: The present invention provides an electromagnetic wave detecting element that can suppress occurrence of cracking at a substrate peripheral portion, and occurrence of breakage of lead-out wires. An interlayer insulating film is formed so as to cover TFT switches on a substrate. An interlayer insulating film is formed so as to cover semiconductor layer of sensor portions that generate charges due to electromagnetic waves that are an object of detection being irradiated, and cover a region on the substrate where the interlayer insulating film is formed.

Abstract: The manufacturing method of a semiconductor device according to the present invention comprises steps of forming a metal film, an insulating film, and an amorphous semiconductor film in sequence over a first substrate; crystallizing the metal film and the amorphous semiconductor film; forming a first semiconductor element by using the crystallized semiconductor film as an active region; attaching a support to the first semiconductor element by using an adhesive; causing separation between the metal film and the insulating film; attaching a second substrate to the separated insulating film; separating the support by removing the adhesive; forming an amorphous semiconductor film over the first semiconductor element; and forming a second semiconductor element using the amorphous semiconductor film as an active region.

Abstract: An image sensor includes a lower metal interconnection, an interlayer dielectric, a first substrate, a photodiode, an upper electrode and an amorphous silicon layer. The lower metal interconnection and the interlayer dielectric are formed over the first substrate including a pixel region and a peripheral region. The photodiode is formed over the pixel region of the first substrate. The upper electrode layer is connected to the photodiode. The amorphous silicon layer is formed between the photodiode and the interlayer dielectric.

Abstract: Provided is a method of patterning an organic thin film which can prevent surface damage of an organic semiconductor layer. Also, an organic thin film transistor that can reduce an off-current and can prevent surface damage of the organic semiconductor layer and a method of manufacturing the organic thin film transistor, and an organic electroluminescence display device having the organic thin film transistor are provided. The method of patterning the organic thin film includes forming the organic thin film on a substrate, selectively printing a mask material on a portion of the organic thin film, dry etching an exposed portion of the organic thin film using the mask material, and removing the mask material.

Abstract: An electro-optical apparatus includes a base, a resin film on the base, the resin film having at least one of projections and depressions at an upper surface thereof, and a light reflecting film disposed on the at least one of projections and depressions. The resin film under the light reflecting film includes a first region and a second region. A mode of the at least one of projections and depressions in the first region is different from a mode of the at least one of projections and depressions in the second region. A diffuse reflectivity of the first region is larger than a diffuse reflectivity of the second region.

Abstract: Apparatus and methods for forming optoelectronic devices such as an array of light emitting diodes or photovoltaic cells in one embodiment a roll-to-roll process in which a uniquely configured roller having a raised spiral coating surface is aligned with a plurality of first electrodes disposed on an angle on a substrate for coating a plurality of spaced-apart angled coated strips of optoelectronic materials along the cross-web direction of the substrate.

Abstract: An image sensor can include a first substrate, an amorphous layer, and a photodiode. A circuitry including a metal interconnection can be formed on the first substrate. The amorphous layer is disposed over the first substrate, and contacts the metal interconnection. The photodiode can be formed in a crystalline semiconductor layer and is bonded to the first substrate such that the photodiode contacts the amorphous layer and is electrically connected to the metal interconnection.

Abstract: Embodiments relate to an image sensor and a method for manufacturing an image sensor. According to embodiments, an interlayer insulating layer including a metal line may be formed on and/or over a semiconductor substrate. A lower electrode layer connected with the metal line may be formed on and/or over the interlayer insulating layer. A photoresist pattern may be formed on and/or over the lower electrode layer and may form lower electrodes separated from each other. The photoresist pattern may be removed. A polymer with Cl group that may be generated when removing the photoresist pattern may be removed. According to embodiments, by removing the polymer, photons that may be generated in a photo diode may be more easily gathered, which may enhance an image quality of an image sensor.

Abstract: An image sensor includes a first substrate having a circuitry including a wire formed therein and a photodiode formed above the circuitry. An unevenness is formed at the top of the photodiode. The unevenness may, for example, be formed by selectively etching the top of the photodiode and may act to maximize light absorption by the photodiode.

Abstract: An image sensor may include a first substrate having circuitry including wires and a silicon layer formed on and/or over the first substrate to selectively contact the wires. The image sensor may include photodiodes bonded to the first substrate while contacting the silicon layer and electrically connected to the wires. Each unit pixel may be implemented having complicated circuitry without a reduction in photosensitivity. Additional on-chip circuitry may also be implanted in the design.

Abstract: Dimensional parameters of structures on a substrate are measured by providing a substrate with a structured surface. The structured surface includes a number of juxtaposed structural elements. A radiation source is configured to emit a beam of radiation having a wavelength in the infrared range. The substrate is illuminated with the beam of radiation. A signal corresponding to a part of the beam of radiation being transmitted through the substrate is detected. Dimensional parameters of the structural elements are calculated based on the transmitted beam signal.

Abstract: An object of the present invention is to provide a structure of a thin film circuit portion and a method for manufacturing a thin film circuit portion by which an electrode for connecting to an external portion can be easily formed under a thin film circuit. A stacked body including a first insulating film, a thin film circuit formed over one surface of the first insulating film, a second insulating film formed over the thin film circuit, an electrode formed over the second insulating film, and a resin film formed over the electrode, is formed. A conductive film is formed adjacent to the other surface of the first insulating film of the stacked body to be overlapped with the electrode. The conductive film is irradiated with a laser.

Abstract: A photoelectric conversion device includes an intrinsic semiconductor layer, a first conductive type semiconductor layer disposed on a first side of the intrinsic semiconductor layer, and a second conductive type semiconductor layer disposed on a second side of the intrinsic semiconductor layer opposite the first side. The intrinsic semiconductor layer includes an amorphous semiconductor layer and a crystalline semiconductor layer including a plurality of crystals. A diameter of a crystal of the plurality of crystals is equal to or less than approximately 100 angstroms.

Abstract: Disclosed is a photoelectric surface including: a first group III nitride semiconductor layer that produces photoelectrons according to incidence of ultraviolet rays; and a second group III nitride semiconductor layer provided adjacent to the first group III nitride semiconductor layer and made of a thin-film crystal having c-axis orientation in a thickness direction, the second group III nitride semiconductor layer having an Al composition higher than that of the first group III nitride semiconductor layer.

Abstract: A MOS or CMOS based active pixel sensor designed for operation with zero or close to zero potential across the pixel photodiodes to minimize or eliminate dark current. In preferred embodiments the pixel photodiodes are produced with a continuous pin or nip photodiode layer laid down over pixel electrodes of the sensor. In this preferred embodiment, the voltage potential across the pixel photodiode structures is maintained constant and close to zero, preferably less than 1.0 volts. This preferred embodiment enables the photodiode to be operated at a constant bias condition during the charge detection cycle. Setting this constant bias condition close to zero (near “short circuit” condition) assures that dark current is substantially zero.

Abstract: A light emitting diode (LED) package and process of making the same includes a silicon-on-insulator (SOI) substrate that is composed of two silicon based materials and an insulation layer interposed therebetween. The two silicon based materials of silicon-on-insulator substrate are etched to form a reflective cavity and an insulation trench, respectively, for dividing the silicon-on-insulator substrate into contact surfaces of positive and negative electrodes. A plurality of metal lines are then formed to electrically connect the two silicon based materials such that the LED chip can be mounted on the reflective cavity and electrically connected to the corresponding electrodes of the silicon-on-insulator substrate by the metal lines. Thus the properties of heat resistance and heat dispersal can be improved and the process can be simplified.

Abstract: Planar AWG circuits and systems are disclosed that use air trench bends to increase planar circuit compactness.

Abstract: A single-photon generator includes an exciton generation part including therein a quantum dot, an excitation part for generating an exciton in the exciton generator part, a recombination control part for controlling recombination timing of the exciton in the exciton generation part, and an optical window provided in the exciton generation part so as to pass a single photon formed as a result of recombination of the exciton, wherein the recombination control part causes, in the exciton generation part, recombination of the excitons at longer intervals than a recombination lifetime of a exciton molecule.

Abstract: An image sensor and a manufacturing method thereof are provided. The sensor includes a substrate, a bottom electrode, an intrinsic layer and a first conductive layer formed over the substrate, a diffusion barrier film formed over the first conductive layer, and an upper transparent electrode formed over the diffusion barrier film. Therefore, a vertical integration of a transistor circuitry and a photodiode can be provided. Further, the leakage current is prevented and the photosensitivity is increased by performing the plasma treatment on the first conductive layer. Due to the vertically integrated transistor circuitry and photodiode, the fill factor can approach 100%, and higher sensitivity compared with the related art having the same pixel size can be provided. The sensitivity of each unit pixel is not reduced, even though more complex circuitry is realized on the image sensor.

Abstract: A highly sensitive optical sensor element, and a switch element such as a sensor driver circuit are formed on the same insulating substrate by using an LTPS planar process to provide a low cost area sensor (optical sensor device) incorporating the sensor driver circuit and the like or an image display device incorporating the optical sensor element. As an optical sensor element structure, one electrode of the sensor element is manufactured with the same film of the polycrystalline silicon film that is an active layer of the switch element constituting a circuit. A photoelectric conversion unit for performing photoelectric conversion is made of an amorphous silicon or a polycrystalline silicon film of an intrinsic layer. A structure in which the amorphous silicon of the photoelectric conversion unit and the insulating layer are sandwiched between two electrodes of the sensor element is adopted.

Abstract: An optical semiconductor device may include a semiconductor component having an optical sensor on a front face thereof, and a transparent plate having electrical connection lines on a rear face thereof and lying outside a free region of the rear face. The front face of the semiconductor component may be attached to the rear face of the transparent plate so that the optical sensor is adjacent the free region. The optical semiconductor device may also include electrical connectors electrically connecting the semiconductor component to the electrical connection lines, a sealing spacer extending only partway between the front face of the semiconductor component and the rear face of the transparent plate at the periphery of the optical sensor, and an encapsulating material for encapsulating the electrical connectors and a periphery of the semiconductor component on the rear face of the transparent plate. The sealing spacer may be structurally distinct from, abutting, and retaining the encapsulating material.

Abstract: A solid-state element has: a semiconductor layer formed on a substrate, the semiconductor layer having a first layer that corresponds to an emission area of the solid-state element to and a second layer through which current is supplied to the first layer; a light discharge surface through which light emitted from the first layer is externally discharged, the light discharge surface being located on the side of the substrate; and an electrode having a plurality of regions that are of a conductive material and are in ohmic-contact with the second layer.

Abstract: The manufacturing method of a semiconductor device according to the present invention comprises steps of forming a metal film, an insulating film, and an amorphous semiconductor film in sequence over a first substrate; crystallizing the metal film and the amorphous semiconductor film; forming a first semiconductor element by using the crystallized semiconductor film as an active region; attaching a support to the first semiconductor element by using an adhesive; causing separation between the metal film and the insulating film; attaching a second substrate to the separated insulating film; separating the support by removing the adhesive; forming an amorphous semiconductor film over the first semiconductor element; and forming a second semiconductor element using the amorphous semiconductor film as an active region.

Abstract: A solid-state element has: a semiconductor layer formed on a substrate, the semiconductor layer having a first layer that corresponds to an emission area of the solid-state element to and a second layer through which current is supplied to the first layer; a light discharge surface through which light emitted from the first layer is externally discharged, the light discharge surface being located on the side of the substrate; and an electrode having a plurality of regions that are of a conductive material and are in ohmic-contact with the second layer.

Abstract: A device for generating a plurality of electron-hole pairs from a photon is disclosed. The device includes a substrate, a first electrode formed above the substrate, and a first doped Group IV nanoparticle thin film deposited on the first electrode. The device further includes an intrinsic layer deposited on the first doped Group IV nanoparticle thin film, wherein the intrinsic layer includes a matrix material with a melting temperature T1, wherein T1 is greater than about 300° C., and a set of quantum confined nanoparticles each with a melting temperature T2, wherein T2 is less than about 900° C., wherein the melting temperature T1 is less than the melting temperature T2.

Abstract: An image sensor and a method of manufacturing the same are provided. A metal wiring layer is formed on a semiconductor substrate including a circuit region, and first conductive layers are formed on the metal layer separated by a pixel isolation layer. An intrinsic layer is formed on the first conductive layers, and a second conductive layer is formed on the intrinsic layer.

Abstract: Disclosed is an image sensor, which includes a substrate having a transistor circuit and lower interconnections. First interconnections are formed separated from each other on the substrate and electrically connected to the CMOS circuitry through the lower interconnections. Planarized insulating layers are formed between the first interconnections to isolate unit pixels. An intrinsic layer is formed on the substrate including the insulating layers, and a second conductive layer is formed on the intrinsic layer. The first interconnections, the intrinsic layer and the second conductive layer provide a photodiode structure for the image sensor.

Abstract: An image sensor contains a semiconductor substrate, a plurality of pixels defined on the semiconductor substrate, a photo conductive layer and a transparent conductive layer formed on the pixel electrodes of the pixels in order, and a shield device positioned between any two adjacent pixel electrodes. The shield device has a shield electrode and an isolation structure surrounding the shield electrode so that the shield electrode is isolated from the pixel electrodes and the photo conductive layer by the isolation structure.

Abstract: A photo-detecting device includes a buried doping layer of a first conductivity type and disposed at an upper portion of a silicon substrate. A first silicon epitaxial layer of first conductivity type is disposed on the buried doping layer, and a second silicon epitaxial layer of second conductivity type is disposed on the first silicon epitaxial layer. An isolation doping layer doped of first conductivity type is disposed at a predetermined region of the second silicon epitaxial layer to define a body region of second conductivity type. A silicon germanium epitaxial layer of second conductivity type is disposed on the body region.

Abstract: One exemplary embodiment is a semiconductor structure, that can include a semiconductor substrate of one conductivity type, having a front surface and a back surface, a first semiconductor layer disposed on the front surface of the semiconductor substrate, a second semiconductor layer disposed on a portion of the back surface of the semiconductor substrate, and a third semiconductor layer disposed on another portion of the back surface of the semiconductor substrate. Each of the second and third semiconductor layers may be compositionally graded through its depth, from substantially intrinsic at an interface with the substrate, to substantially conductive at an opposite side, and have a selected conductivity type obtained by the incorporation of one or more selected dopants.

Abstract: Microelectronic imagers with curved image sensors and methods for manufacturing curved image sensors. In one embodiment, a microelectronic imager device includes an imager die having a substrate, a curved microelectronic image sensor having a face with a convex and/or concave portion at one side of the substrate, and integrated circuitry in the substrate operatively coupled to the image sensor. The imager die can further include external contacts electrically coupled to the integrated circuitry and a cover over the curved image sensor.

Abstract: Some embodiments provide a microdisplay integrated circuit (IC), a substantially transparent protective cover coupled to the microdisplay IC, and a base coupled to the microdisplay IC. Thermal expansion characteristics of the base may be substantially similar to thermal expansion characteristics of the protective cover. According to some embodiments, at least one set of imaging elements is fabricated on an upper surface of a semiconductor substrate, and a base is affixed to a lower surface of the semiconductor substrate to generate substantially negligible mechanical stress between the semiconductor substrate and the base.

Abstract: A semiconductor substrate for forming a pixel area provided surfacially with a plurality of pixels for photoelectric conversion, the semiconductor substrate, including a polysilicon film of a thickness of 0.5-2.0, on a rear surface of the pixel area-bearing surface, and having an oxygen concentration of 1.3-1.5E+18 atom/cm3 (old ASTM).

Abstract: A semiconductor light-receiving device includes: a semi-insulating substrate; a semiconductor layer of a first conduction type that is formed on the semi-insulating substrate; a buffer layer of the first conduction type that is formed on the semi-insulating substrate and has a lower impurity concentration than the semiconductor layer of the first conduction type; a light absorption layer that is formed on the buffer layer and generates carriers in accordance with incident light; a semiconductor layer of a second conduction type that is formed on the light absorption layer; and a semiconductor intermediate layer that is interposed between the buffer layer and the light absorption layer, and has a forbidden bandwidth within a range lying between the forbidden bandwidth of the buffer layer and the forbidden bandwidth of the light absorption layer.

Abstract: A method of forming a multiple layer passivation film on a semiconductor device surface comprises placing a semiconductor device in a chemical vapor deposition reactor, introducing a nitrogen source into the reactor, introducing a carbon source into the reactor, depositing a layer of carbon nitrogen on the semiconductor device surface, introducing a silicon source into the reactor after the carbon source, and depositing a layer of silicon carbon nitrogen on the carbon nitrogen layer. A semiconductor device incorporating the multiple layer passivation film is also described.

Abstract: A solar cell comprises a substrate, and a metal electrode layer, a p-i-n junction, and a transparent electrode layer which are successively laminated on the substrate. The p-i-n junction comprises an n layer, an i layer, and a p layer which are laminated in this order. The i layer is made of an amorphous iron silicide film containing hydrogen in accordance with the present invention, and is formed on the n layer by supplying an iron vapor into a plasma of a material gas in which a silane type gas and a hydrogen gas are mixed. In the i layer, dangling bonds of silicon atoms and/or iron atoms are terminated with hydrogen, whereby a number of trap levels which may occur in the amorphous iron silicide film are eliminated.

Abstract: A solar battery 10 comprises a metal electrode layer 12, a pin junction 100, and a transparent electrode layer 16 which are successively laminated on a substrate 11 such as a silicon substrate. The pin junction 100 comprises an n-layer 13, an i-layer 14, and a p-layer 15 which are laminated in succession. The i-layer 14 is formed by amorphous iron silicide (FexSiy:H) containing hydrogen atoms. In the i-layer 14, at least a part of the hydrogen atoms contained therein terminate dangling bonds of silicon atoms and/or iron atoms, so that a number of trap levels which may occur in an amorphous iron silicide film can be eliminated, whereby the i-layer 14 exhibits a characteristic as an intrinsic semiconductor layer.

Abstract: An array-type modularized light-emitting diode structure and a method for packaging the structure. The array-type modularized light-emitting diode structure includes a lower substrate and an upper substrate fixed on the lower substrate. A material with high heat conductivity is selected as the material of the upper substrate. The upper substrate is formed with multiple arrayed dents and through holes on the bottom of each dent. A material with high heat conductivity is selected as the material of the lower substrate. The surface of the lower substrate is formed with a predetermined circuit layout card. The bottom face of the upper substrate is placed on the upper face of the lower substrate with the through holes of the dents respectively corresponding to the contact electrodes of the circuit layout card of the lower substrate. Multiple light-emitting diode crystallites are respectively fixed on the bottoms of the dents.

Abstract: A photosensor for a transmitted-light method for detecting the intensity profile of an optical standing wave, with a transparent substrate, with a semiconductor component, and with at least three contacts, is characterized by the fact that two semiconductor components are connected with each other, such that the first semiconductor component and the second semiconductor component each have a photoelectrically active first semiconductor layer, and such that the two photoelectrically active semiconductor layers have a fixed phase relation to each other, which is adjusted by at least one photoelectrically inactive layer.

Abstract: To manufacture a micro structure and an electric circuit included in a micro electro mechanical device over the same insulating surface in the same step. In the micro electro mechanical device, an electric circuit including a transistor and a micro structure are integrated over a substrate having an insulating surface. The micro structure includes a structural layer having the same stacked-layer structure as a layered product of a gate insulating layer of the transistor and a semiconductor layer provided over the gate insulating layer. That is, the structural layer includes a layer formed of the same insulating film as the gate insulating layer and a layer formed of the same semiconductor film as the semiconductor layer of the transistor. Further, the micro structure is manufactured by using each of conductive layers used for a gate electrode, a source electrode, and a drain electrode of the transistor as a sacrificial layer.

Abstract: The present invention relates to an electrode connecting member and a surface light source backlight unit having the same. The electrode connecting member includes a first coupling unit coupled to an end of a surface light source and a second coupling unit assembled to the first coupling unit. The first coupling unit includes a first body. The second connecting unit includes a second body arranged on the first body, a soldering portion connected to an electrode of the surface light source, and a compressing portion connected to a wire for applying a power to the surface light source.

Abstract: In one embodiment, a method of controlling the across-chip line-width variation (ACLV) on a semiconductor integrated circuit includes forming an ACLV controlled region including a plurality of semiconductor devices each having a gate structure and arranging the plurality of semiconductor devices to have a substantially uniform spacing between each gate structure. The method also includes forming a decoupling capacitor region adjacent to the ACLV controlled region. The decoupling capacitor region may include a plurality of capacitor structures each having a conductive structure, such as a polysilicon electrode, for example.

Abstract: A novel Active Pixel Sensor (APS) cell structure and method of manufacture. Particularly, an image sensor APS cell having a predoped transfer gate is formed that avoids the variations of Vt as a result of subsequent manufacturing steps. According to the preferred embodiment of the invention, the image sensor APS cell structure includes a doped p-type pinning layer and an n-type doped gate. There is additionally provided a method of forming the image sensor APS cell having a predoped transfer gate and a doped pinning layer. The predoped transfer gate prevents part of the gate from becoming p-type doped.

Abstract: An image pixel cell with a doped, hydrogenated amorphous silicon photosensor, raised above the surface of a substrate is provided. Methods of forming the raised photosensor are also disclosed. Raising the photosensor increases the fill factor and the quantum efficiency of the pixel cell. Utilizing hydrogenated amorphous silicon decreases the leakage and barrier problems of conventional photosensors, thereby increasing the quantum efficiency of the pixel cell. Moreover, the doping of the photodiode with inert implants like fluorine or deuterium further decreases leakage of charge carriers and mitigates undesirable hysteresis effects.

Abstract: A semiconductor optical element having a includes an n-type GaAs buffer layer, an n-type AlGaInP cladding layer, a first InGaAsP (including zero As content)guide layer without added dopant impurities, an InGaAsP (including zero In content) active layer, a second InGaAsP (including zero As content)guide layer without added dopant impurities, a p-type AlGaInP cladding layer, a p-type band discontinuity reduction layer, and a p-type GaAs contact layer sequentially laminated on an n-type GaAs substrate C or Mg is the dopant impurity in the p-type GaAs contact layer, the p-type band discontinuity reduction layer, and the p-type AlGaInP cladding layer.

Abstract: A photoelectric converter of a high signal-to-noise ratio, low cost, high productivity and stable characteristics and a system including the above photoelectric converter. The photoelectric converter includes a photoelectric converting portion in which a first electrode layer, an insulating layer for inhibiting carriers from transferring, a photoelectric converting semiconductor layer of a non-single-crystal type, an injection blocking layer for inhibiting a first type of carriers from being injected into the semiconductor layer and a second electrode layer are laminated in this order on an insulating substrate.