Abstract: The reliability of a semiconductor device is increased by suppression of a variation in electric characteristics of a transistor as much as possible. As a cause of a variation in electric characteristics of a transistor including an oxide semiconductor, the concentration of hydrogen in the oxide semiconductor, the density of oxygen vacancies in the oxide semiconductor, or the like can be given. A source electrode and a drain electrode are formed using a conductive material which is easily bonded to oxygen. A channel formation region is formed using an oxide layer formed by a sputtering method or the like under an atmosphere containing oxygen. Thus, the concentration of hydrogen in a stack, in particular, the concentration of hydrogen in a channel formation region can be reduced.

Abstract: There is provided a semiconductor device that includes a substrate, an electric field shielding layer, and a semiconductor element. The electric field shielding layer is provided on the substrate. The semiconductor element includes an electrode, and is provided on the electric field shielding layer with an insulating film in between.

Abstract: The present invention discloses an array substrate, which comprises a substrate; a gate line and a gate connected to the gate line on the substrate; a first insulating layer covering the gate line and the gate; an active layer on the first insulating layer; an organic layer on the first insulating layer, which exposes the active layer; a source, a drain, and a data line connected with the source on the organic layer, the source and the drain being respectively connected with the active layer, the data line and the gate line being overlapped; a second insulating layer covering the source, the drain, the data line, and the active layer; a contact hole in the second insulating layer, the contact hole exposing the drain; and a pixel electrode on the second insulating layer, the pixel electrode being contacted with the drain through the contact hole.

Abstract: A semiconductor device with reduced parasitic capacitance is provided. A stack is formed on an insulating layer, the stack comprising a first oxide insulating layer, an oxide semiconductor layer over the first oxide insulating layer, and a second oxide insulating layer on the oxide semiconductor layer; a gate electrode layer and a gate insulating layer are formed on the second oxide insulating layer; a first low-resistance region is formed by adding a first ion to the second oxide semiconductor layer using the gate electrode layer as a mask; a sidewall insulating layer is formed on an outer side of the gate electrode layer; a second conductive layer is formed over the gate electrode layer, the sidewall insulating layer, and the second insulating layer; and an alloyed region in the second oxide semiconductor layer is formed by performing heat treatment.

Abstract: A method includes depositing a layer of silicon oxide onto a layer of silicon carbide; ion implanting the layer of silicon carbide, annealing the ion implanted layer of silicon carbide to produce defects within the layer of silicon carbide, performing photolithography using a mask layer on regions of the layer of silicon carbide to define regions for electrode deposition, removing the layer of silicon oxide from the layer of silicon carbide in the one or more regions for electrode deposition, forming one or more electrodes by depositing indium tin oxide (ITO) in each of the regions for electrode deposition, performing a first lift-off operation to remove the mask layer surrounding the electrodes, depositing a passivation and gate silicon oxide layer on top of the layer of silicon carbide and the electrodes, and performing a second lift-off operation to fabricate an optically transparent ITO gate between the electrodes.

Abstract: The present invention provides a data processing device connected with an intermission driving. The data processing device achieves a satisfactory power saving while ensuring a high level of display quality of the display device. Upon detection of non-data update in a frame buffer, the host calculates a next refreshing timing based on driving information obtained from a liquid crystal display device (LCD), sets a timer for a timeout after a length of time representing the calculated result, and then the host and the LCD shift to Intermission State 1. Thereafter, when the timer times out to bring the host back to Normal State and a data update at the frame buffer is detected, data for refreshing an display image in the LCD is transferred from the host to the LCD. If the amount of time representing the calculated result is longer than a predetermined baseline, a shift is made to Intermission State 2 which provides greater power saving than Intermission State 1.

Abstract: A semiconductor device, an array substrate, and a display device, and their fabrication methods are provided. An exemplary semiconductor device includes a first electrode, an insulating layer, and a second electrode, over a substrate. A conductive layer is on the insulating layer. A semiconductor layer is on the first electrode, on a first sidewall of the insulating layer, on the conductive layer, on the second sidewall of the insulating layer, and on the second electrode. A first gate electrode is over a portion of the semiconductor layer that is on the first sidewall of the insulating layer. A second gate electrode is over a portion of the semiconductor layer that is on the second sidewall of the insulating layer.

Abstract: To provide a highly reliable semiconductor device by giving stable electrical characteristics to a transistor including an oxide semiconductor film. A gate electrode layer is formed over a substrate, a gate insulating film is formed over the gate electrode layer, an oxide semiconductor film is formed over the gate insulating film, a conductive film is formed over the oxide semiconductor film, so that a region in vicinity of an interface with the oxide semiconductor film in contact with the conductive film is made amorphous, heat treatment is performed, the conductive film is then processed to form a source electrode layer and a drain electrode layer, and a part of the amorphous region in the oxide semiconductor film which is exposed by formation of the source electrode layer and the drain electrode layer is removed.

Abstract: A method for manufacturing an OLED display screen integrated with a touch function is provided, which includes steps of providing a glass substrate, forming an insulating layer and a wiring circuit layer, forming an OLED light-emitting layer, forming a first insulating ceramic layer, forming a first insulating organic layer, forming a first touch electrode layer, forming a touch insulating ceramic layer, forming a wire through hole in the wiring region of the glass substrate, forming a second touch electrode layer; and forming a wire in the wiring region of the glass substrate, wherein the wire is to the wiring circuit layer through the wiring through hole.

Abstract: [Problem] To provide a semiconductor device suitable for miniaturization. To provide a highly reliable semiconductor device. To provide a semiconductor device with improved operating speed. [Solving Means] A semiconductor device including a memory cell including first to cth (c is a natural number of 2 or more) sub memory cells, wherein: the jth sub memory cell includes a first transistor, a second transistor, and a capacitor; a first semiconductor layer included in the first transistor and a second semiconductor layer included in the second transistor include an oxide semiconductor; one of terminals of the capacitor is electrically connected to a gate electrode included in the second transistor; the gate electrode included in the second transistor is electrically connected to one of a source electrode and a drain electrode which are included in the first transistor; and when j?2, the jth sub memory cell is arranged over the j?1th sub memory cell.

Abstract: Disclosed examples provide processes for fabricating a semiconductor product and for forming a patterned stack with an aluminum layer and a tungsten layer, including forming a first dielectric layer on a gate structure and on first and second regions of a substrate, forming a diffusion barrier layer on the first dielectric layer, forming a tungsten layer on the diffusion barrier layer, forming an aluminum layer on the tungsten layer, forming a hard mask on the aluminum layer, forming a patterned resist mask which covers the hard mask above the first region and exposes the hard mask layer above the second region, dry etching the hard mask and the aluminum layer above the second region using the patterned resist mask layer, removing the resist mask, and dry etching the tungsten layer using the hard mask layer to expose the first dielectric layer above the second region.

Abstract: Disclosed is a liquid crystal display panel and a method for manufacturing the same. The panel includes a thin-film transistor. An active layer in communication with a source and a drain of the thin-film transistor is formed by more than two film layers. The active layer contacts with a passivation layer of the panel on a non-high-speed deposited film layer of the active layer.

Abstract: A method for use in forming a fin of a field-effect transistor includes: patterning a mandrel into a substrate at least by recessing portions of the substrate; forming dielectric material at least on the recessed portions of the substrate, wherein the dielectric material partially covers exterior sidewalls of the mandrel; forming a first buffer at least on a portion of the exterior sidewalls of the mandrel not covered by the dielectric material; forming a second buffer at least on exterior sidewalls of the first buffer; forming a semiconductor channel at least on the dielectric material, wherein at least the second buffer is between the channel and the mandrel; exposing interior sidewalls of at least the first buffer at least by removing the mandrel; and removing the first buffer and the second buffer without removing the channel.

Abstract: A TFT, a manufacturing method thereof, and a display device are provided. The TFT includes a semiconductor layer and an etch-stop layer merely covering a channel region of the semiconductor layer. The semiconductor layer and the etch-stop layer are formed through a single patterning process.

Abstract: An active element array substrate including a substrate, a first metal layer, a first insulation layer, a semiconductor layer, a first patterned conductive layer, a second metal layer, a second insulation layer, and a second patterned conductive layer is provided. The semiconductor layer is disposed on the first insulation layer. The first patterned conductive layer is disposed on the first insulation layer and covers a partial region of the semiconductor layer. The second metal layer is disposed on the first patterned conductive layer. The second insulation layer is disposed on the second metal layer and covers at least a partial region of the second metal layer, the first patterned conductive layer, the semiconductor layer, and the first insulation layer. The second patterned conductive layer is disposed on the second insulation layer and overlapped with the first patterned conductive layer. A display panel is also provided.

Abstract: a thin-film transistor according to an exemplary embodiment of the present invention comprises an active layer; an intermediate layer; a gate insulating film; a gate electrode; an interlayer insulating film; and source and drain electrodes. The active layer is positioned on a substrate, and the gate insulating film is positioned on the active layer. The gate electrode is positioned on the gate insulating film, and the interlayer insulating film is positioned on the gate electrode. The source and drain electrodes are positioned on the interlayer insulating film and connected to the active layer. The intermediate layer is positioned between the active layer and the gate insulating film, and made of an oxide semiconductor comprising a Group IV element.

Abstract: An object is to provide a display device with a high aperture ratio or a semiconductor device in which the area of an element is large. A channel formation region of a TFT with a multi-gate structure is provided under a wiring that is provided between adjacent pixel electrodes (or electrodes of an element). In addition, a channel width direction of each of a plurality of channel formation regions is parallel to a longitudinal direction of the pixel electrode. In addition, when a channel width is longer than a channel length, the area of the channel formation region can be increased.

Abstract: A minute transistor is provided. A transistor with small parasitic capacitance is provided. A transistor with high frequency characteristics is provided. A semiconductor device including the transistor is provided. A semiconductor device includes an oxide semiconductor, a first conductor and a second insulator embedded in a first insulator, a second conductor and a third conductor. Edges of the second conductor and the third conductor facing each other each has a taper angle of 30 degree or more and 90 degree or less.

Abstract: A semiconductor device (100A) includes a substrate (101) and a thin film transistor (10) supported by the substrate. The thin film transistor includes a gate electrode (102), an oxide semiconductor layer (104), a gate insulating layer (103), a source electrode (105) and a drain electrode (106). The oxide semiconductor layer includes an upper semiconductor layer (104b) which is in contact with the source electrode and the drain electrode and which has a first energy gap, and a lower semiconductor layer (104a) which is provided under the upper semiconductor layer and which has a second energy gap that is smaller than the first energy gap. The source electrode and the drain electrode include a lower layer electrode (105a, 106a) which is in contact with the oxide semiconductor layer and which does not contain Cu, and a major layer electrode (105b, 106b) which is provided over the lower layer electrode and which contains Cu.

Abstract: To manufacture a highly reliable semiconductor device by giving stable electric characteristics to a transistor. An oxide semiconductor film is deposited by a sputtering method with the use of a polycrystalline sputtering target. In that case, partial pressure of water in a deposition chamber before or in the deposition is set to be lower than or equal to 10?3 Pa, preferably lower than or equal to 10?4 Pa, more preferably lower than or equal to 10?5 Pa. Thus, a dense oxide semiconductor film is obtained. The density of the oxide semiconductor film is higher than 6.0 g/cm3 and lower than 6.375 g/cm3.

Abstract: An organic thin film transistor and a method of manufacturing the same, the transistor including a gate electrode; an organic semiconductor layer overlapping the gate electrode; and an insulating layer between the gate electrode and the organic semiconductor layer, the insulating layer having an organic/inorganic hybrid region, wherein the organic/inorganic hybrid region includes a polymer and an inorganic material that is chemically bonded to the polymer through a reactive group on the polymer, and the insulating layer includes a space adjacent to the polymer, the inorganic material being positioned in the space.

Abstract: The present invention discloses a thin film transistor, a liquid crystal display and the manufacturing method of a thin film transistor. The thin film transistor includes a substrate, a gate electrode formed on the surface of the substrate; a gate insulting layer covered on the gate electrode; a semiconductor layer disposed on the surface of the gate insulating layer and corresponding to the gate electrode; an etching stop layer covered the semiconductor layer and having a first through hole and a second through hole; a passivation layer covered the etching stop layer having a third through hole and a fourth through hole; a source electrode disposed on the passivation layer and connected to the semiconductor layer via the first and the third through hole; and a drain electrode disposed on the passivation layer and connected to the semiconductor layer via the second and the fourth through hole.

Abstract: To improve field-effect mobility and reliability of a transistor including an oxide semiconductor film. Provided is a semiconductor device including an oxide semiconductor film. The semiconductor device includes a first insulating film, the oxide semiconductor film over the first insulating film, a second insulating film and a third insulating film over the oxide semiconductor film, and a gate electrode over the second insulating film. The oxide semiconductor film includes a first oxide semiconductor film, a second oxide semiconductor film over the first oxide semiconductor film, and a third oxide semiconductor film over the second oxide semiconductor film. The first to third oxide semiconductor films contain the same element. The second oxide semiconductor film includes a region where the crystallinity is lower than the crystallinity of one or both of the first oxide semiconductor film and the third oxide semiconductor film.

Abstract: An electronic device includes a control electrode 11 formed on a substrate 10, an insulating layer 12 covering the control electrode 11, an active layer 13 including an organic semiconductor material, which is formed on the insulating layer 12, and a first electrode 14A and a second electrode 14B formed on the active layer 13, and portions 15 of the first electrode and second electrode in contact with the active layer 13 are modified with an electrode modification material.

Abstract: A fingerprint detector includes a driving circuit, a sensing array, a gate driving circuit, a reading circuit, a first light emitting structure and a second light emitting structure. The first and the second light emitting structures are isolated from one another. The driving circuit provides power to the first and the second light emitting structures. The sensing array includes a plurality of first light sensing elements disposed under the first light emitting structure and a plurality of second light sensing elements disposed under the second light emitting structure. Each of the light sensing elements generates a light sensing voltage according to scanning light received. The gate driving circuit drives a plurality of rows of the light sensing elements sequentially through a plurality of gate lines. The reading circuit sequentially or synchronously reads the light sensing voltages generated by light sensing elements in different columns of a same row driven by the gate driving circuit.

Abstract: Systems and methods are disclosed for insertion of implantable medical devices, and more particularly to insertion of implantable devices with a vibrating insertion tool. More specifically, a vibrating insertion tool is described, the insertion tool comprising an insertion tool controllable by a user to support and guide movement of an object, the insertion tool comprising an elongate arm having a proximal end region and a distal end region, the distal end region having a receiving region, a user-controllable vibration source for generating vibrations in accordance with a selected vibration profile, and an elongate rigid spine, connected to the vibration source and the receiving region, configured to deliver the vibrations to the receiving region.

Abstract: To provide a semiconductor device with high design flexibility. A first transistor and a second transistor having different electrical characteristics from those of the first transistor are provided over the same layer without significantly increasing the number of manufacturing steps. A semiconductor layer where a channel of the first transistor is formed and a semiconductor layer where a channel of the second transistor is formed are formed using semiconductor materials having different electron affinities. When an oxide semiconductor is used for the semiconductor layer, an insulating layer containing excess oxygen is used as an insulating layer below the semiconductor layer. By increasing the thickness of the insulating layer, a large amount of oxygen can be supplied to the semiconductor layer.

Abstract: According to an aspect, a liquid crystal display panel includes an extending portion. The extending portion is metal wiring provided on the same plane as a plane parallel to a surface of a TFT substrate on which a scan line extends in the X-direction, and is electrically conductive metal extending from the scan line. The extending portion partially overlaps a space, but does not overlap an opening area, in the Z-direction.

Abstract: A thin-film transistor includes a substrate, a gate electrode formed on a surface of the substrate, a gate protection layer and a semiconductor layer stacked on the gate electrode, and an etch stop layer, source terminal metal, and drain terminal metal formed on a surface of the semiconductor layer in such a way that the source terminal metal and the drain terminal metal are respectively located on two opposite sides of the etch stop layer. The thin-film transistor further includes a light shielding layer, an insulation medium layer, and a pixel electrode. The light shielding layer is stacked on the etch stop layer to prevent light from irradiating the semiconductor layer. The insulation medium layer covers the source terminal metal, the drain terminal metal, and the light shielding layer. The pixel electrode is formed on a surface of the insulation medium layer and electrically connected to the drain terminal metal.

Abstract: A fully depleted field effect transistor (FET) and an anti-fuse structure are provided on a same chip. The fully depleted FET and the anti-fuse structure share a same high dielectric (k) constant dielectric material. The anti-fuse structure contains a faceted epitaxial doped semiconductor material as a bottom electrode, a high k dielectric material portion, and a gate electrode material portion as a top electrode. The sharp corners of the faceted epitaxial doped semiconductor material cause electric field concentration, which aid in the reduction of the breakdown voltage of the anti-fuse structure.

Abstract: A display apparatus including a substrate, a display portion disposed on an active area defined at the substrate, a buffer layer disposed on the active area and a pad area defined at the substrate, a touch sensing portion disposed on the buffer layer, and a pad portion disposed between the pad area and the buffer layer. The touch sensing portion includes a first pad pattern, a middle layer disposed on the first pad pattern, and a second pad pattern disposed on the middle layer. The first pad pattern is connected to the pad portion through a first contact hole defined on the pad portion in the buffer layer. The second pad pattern is connected to the first pad pattern through a second contact hole defined on the first contact hole in the middle layer.

Abstract: A semiconductor device including a transistor is provided. The transistor includes a gate electrode, a first insulating film over the gate electrode, a second insulating film over the first insulating film, an oxide semiconductor film over the second insulating film, a source electrode and a drain electrode electrically connected to the oxide semiconductor film, a third insulating film over the source electrode, and a fourth insulating film over the drain electrode. A fifth insulating film including oxygen is provided over the transistor. The third insulating film includes a first portion, the fourth insulating film includes a second portion, and the fifth insulating film includes a third portion. The amount of oxygen molecules released from each of the first portion and the second portion is smaller than the amount of oxygen molecules released from the third portion when the amounts are measured by thermal desorption spectroscopy.

Abstract: A load related to a scanning line is decreased and a load related to a common electrode is decreased without decrease in an aperture ratio of each pixel. A display apparatus has a red sub-pixel and a green sub-pixel. A distance in the Y-axis direction between a pedestal electrode and a scanning line that drives a transistor in a plan view in the red sub-pixel is longer than a distance in the Y-axis direction between a pedestal electrode and a scanning line that drives a transistor in a plan view in the green sub-pixel. Furthermore, a superposed width of a light shielding film with a red pixel region in the Y-axis direction is larger than a superposed width of the light shielding film with a green pixel region in the Y-axis direction.

Abstract: To provide a semiconductor device including an oxide semiconductor layer with high and stable electrical characteristics, the semiconductor device is manufactured by forming a first insulating layer, forming oxide over the first insulating layer and then removing the oxide n times (n is a natural number), forming an oxide semiconductor layer over the first insulating layer, forming a second insulating layer over the oxide semiconductor layer, and forming a conductive layer over the second insulating layer. Alternatively, the semiconductor device is manufactured by forming the oxide semiconductor layer over the first insulating layer, forming the second insulating layer over the oxide semiconductor layer, forming the oxide over the second insulating layer and then removing the oxide n times (n is a natural number), and forming the conductive layer over the second insulating layer.

Abstract: A thin film transistor array panel is provided as follows. A gate electrode is disposed on a substrate. A semiconductor layer is disposed on the gate electrode. A gate insulating layer is disposed between the gate electrode and the semiconductor layer. A source electrode is disposed on a first side of the semiconductor layer, having a first lateral surface. A drain electrode is disposed on a second side of the semiconductor layer, having a second lateral surface. The first and second lateral surfaces define a spacing which overlaps the gate electrode. A metal suicide layer is disposed on the first and second lateral surfaces. A passivation layer is disposed on the metal silicide layer, the source electrode and the drain electrode. The passivation layer is not in contact with the first and second lateral surfaces.

Abstract: A thin film transistor substrate includes a plurality of thin film transistors arranged in columns and rows respectively on a substrate. Each of the thin film transistors includes a laser annealed part in which an amorphous silicon layer that forms a channel region is laser annealed to be a polysilicon layer, each laser annealed part is disposed with a designed pitch in a scanning direction in which a laser light for laser annealing and the substrate move relatively to each other, and the laser annealed part is provided within a channel width formed in a direction orthogonal to the scanning direction and being narrower than the channel width.

Abstract: A display apparatus and a display control circuit which may contain an occurrence of the inappropriate brightness, such as flickering, at the time of pausing driving are provided. A scan period (St1, St2) during which a display panel drive device scans a display panel device and a retention period (Vt1) during which the display panel drive device does not scan the display panel device alternate and a timing control device causes the display panel drive device to scan the display panel device a plurality of times in the scan period when at least the brightness (Lb1) of the backlight device is changed.

Abstract: To suppress a change in electrical characteristics and improve reliability in a transistor including an oxide semiconductor film. Provided is a semiconductor device including a transistor including a first gate electrode, a first insulating film over the first gate electrode, a first oxide semiconductor film over the first insulating film, a source electrode electrically connected to the first oxide semiconductor film, a drain electrode electrically connected to the first oxide semiconductor film, a second insulating film over the first oxide semiconductor film, a second oxide semiconductor film as a second gate electrode over the second insulating film, and a third insulating film over the second oxide semiconductor film. The second insulating film includes an excess oxygen region having a concentration gradient.

Abstract: According to one embodiment, a thin-film transistor includes a polycrystalline semiconductor layer, a gate electrode opposing the polycrystalline semiconductor layer, a gate insulating film provided between the gate electrode and the polycrystalline semiconductor layer and in contact with the gate electrode, and an amorphous layer provided between the gate insulating film and the polycrystalline semiconductor layer, and in contact with the gate insulating film and the polycrystalline semiconductor layer.

Abstract: Disclosed is a semiconductor device having a first transistor and a second transistor over the first transistor. The first transistor includes a first semiconductor, and the second transistor includes an oxide semiconductor that is different from the first semiconductor. A gate of the first transistor is electrically connected to a source or drain electrode of the second transistor. The second transistor has a semiconductor layer including the oxide semiconductor over the source and drain electrodes and a gate electrode over the semiconductor layer with an insulating layer therebetween.

Abstract: A method that includes forming a patterned stack of materials comprising at least one channel semiconductor material layer and first and second layers of sacrificial material positioned above and below, respectively, the at least one channel semiconductor material layer, forming a replacement gate cavity above the patterned stack of materials and performing an etching process through the gate cavity to selectively remove at least a portion of the first and second layers of sacrificial material relative to the at least one channel semiconductor material layer. The method further includes performing a second etching process to form a reduced-thickness portion of the channel semiconductor material layer that has a final thickness that is less than the initial thickness and forming a replacement gate structure around at least the reduced-thickness portion of the channel semiconductor material layer.

Abstract: Methods for depositing a metal film comprising forming an amorphous silicon layer as a nucleation layer and/or glue layer on a substrate. Some embodiments further comprise the incorporation of a glue layer to increase the ability of the amorphous silicon layer and metal layer to stick to the substrate.

Abstract: The present invention relates to organic electronic devices, and more specifically to organic field effect transistors, comprising a dielectric layer that comprises a polycycloolefinic polymer with an olefinic side chain.

Abstract: A transistor with stable electrical characteristics is provided. Provided is a method for manufacturing a semiconductor device that includes, over a substrate, an oxide semiconductor, a first conductor, a first insulator, a second insulator, and a third insulator. The oxide semiconductor is over the first insulator. The second insulator is over the oxide semiconductor. The third insulator is over the second insulator. The first conductor is over the third insulator. The oxide semiconductor has a first region and a second region. To form the first region, ion implantation into the oxide semiconductor is performed using the first conductor as a mask, and then hydrogen is added to the oxide semiconductor using the first conductor as a mask.

Abstract: An object is to provide a display device with a high aperture ratio or a semiconductor device in which the area of an element is large. A channel formation region of a TFT with a multi-gate structure is provided under a wiring that is provided between adjacent pixel electrodes (or electrodes of an element). In addition, a channel width direction of each of a plurality of channel formation regions is parallel to a longitudinal direction of the pixel electrode. In addition, when a channel width is longer than a channel length, the area of the channel formation region can be increased.

Abstract: An organic CMOS circuit including a substrate having an N-type organic transistor and a P-type organic transistor formed thereon, the transistors respectively including a layer of N-type semiconductor material and a layer of P-type semiconductor material. A surface of each of the semiconductor material layers, opposite to the substrate, is covered with an anti-ultraviolet layer made of electrically-insulating material absorbing and/or reflecting ultra-violet rays.

Abstract: Provided is a semiconductor device which includes a semiconductor layer and an insulating layer adjacent to the semiconductor layer, in which the insulating layer is formed of a crosslinked product of a polymer compound that has a repeating unit (IA) represented by the following Formula (IA) and a repeating unit (IB) represented by the following Formula (IB); and an insulating layer-forming composition which is used for forming an insulating layer of a semiconductor device and contains a polymer compound that has the following repeating units (IA) and (IB). In Formulae, R1a and R1b each independently represent a hydrogen atom, a halogen atom, or an alkyl group. L1a, L2a, and L1b each independently represent a single bond or a linking group. X represents a crosslinkable group and YB represents a decomposable group or a hydrogen atom. m1a and m2a each independently represent an integer of 1 to 5. The symbol “*” represents a bonding position of the repeating units.

Abstract: A connection electrode for connecting a transistor including a semiconductor material other than an oxide semiconductor to a transistor including an oxide semiconductor material is smaller than an electrode of the transistor including a semiconductor material other than an oxide semiconductor that is connected to the connection electrode.

Abstract: A display apparatus includes a first substrate; a display device including a display portion and located on the first substrate; a second substrate located above the display device; a sealing portion between the first substrate and the second substrate, and surrounding the display portion, the sealing portion bonding the first substrate and the second substrate; a circuit portion located between the sealing portion and the display portion; and one or more supplement members located between the circuit portion and the sealing portion so as to absorb an external shock delivered to the sealing portion.

Abstract: One object is to provide a new semiconductor device whose standby power is sufficiently reduced. The semiconductor device includes a first power supply terminal, a second power supply terminal, a switching transistor using an oxide semiconductor material and an integrated circuit. The first power supply terminal is electrically connected to one of a source terminal and a drain terminal of the switching transistor. The other of the source terminal and the drain terminal of the switching transistor is electrically connected to one terminal of the integrated circuit. The other terminal of the integrated circuit is electrically connected to the second power supply terminal.