Abstract: According to one embodiment, a semiconductor package includes: a first metal body on which a part of a waveguide structure is formed; a second metal body including a mounting area for a semiconductor device and disposed on the first metal body; a line substrate on which a signal transmission line configured to communicate a waveguide with the semiconductor device mounted on the mounting area is formed; and a lid body disposed at a position facing the first metal body, interposing the second metal body and the line substrate. The lid body is made of resin, on which a structure corresponding to another waveguide structure on an extension of the waveguide structure in the first metal body is formed. The structure includes a metal-coated inner wall surface.

Abstract: A coplanar waveguide device includes a coplanar waveguide structure disposed on a substrate, at least one qubit coupled to the coplanar waveguide structure and an add-on chip having a metallized trench, and disposed over the substrate.

Abstract: A monolithic microwave integrated circuit included a substrate, a first pad, a first line, a second line, a second pad, a third pad, a first active element, a second active element. The first line includes an input end connected to the first pad. The second line includes an input end connected to the first pad. The second and third pads are connected to the ground. The first active element includes a first gate electrode connected to the output end of the first line. The second active element includes a second gate electrode connected to the output end of the second line. The first pad is provided between the second pad and a third pad. Electrical length of the first line is equal to electrical length of the second line.

Abstract: The invention relates to an optoelectronic assembly. The optoelectronic assembly comprises one or more optoelectronic components and a housing. The housing comprises an outer wall electrically connected to the one or more optoelectronic elements. The housing is configured to provide an electrical interface between the one or more optoelectronic components and an external electronic device. The electrical connection between the outer wall and the one or more optoelectronic components comprises an electrically conductive element. The electrically conductive element is supported on a dielectric material, such that the dielectric material provides structural support to the electrically conductive element between the one or more optoelectronic components and the outer wall.

Abstract: A high-frequency module includes an integrated body including a semiconductor chip and a reflector, the semiconductor and the reflector being integrated by a resin; an antenna provided with a space from the reflector; and a rewiring layer provided on the surface of the integrated body, the rewiring layer including a rewiring line electrically coupling the semiconductor chip to the antenna. Further, a method for manufacturing a high-frequency module, the method includes forming an integrated body by integrating a semiconductor chip with a reflector by a resin; and forming a rewiring layer on the surface of the integrated body, the rewiring layer including a rewiring line electrically coupling the semiconductor chip to an antenna provided with a space from the reflector.

Abstract: A flexible wiring board includes a conductive film provided on one surface of a substrate. The conductive film includes a plurality of pad portions to which a plurality of connection electrodes are respectively bonded with solder, and a wiring portion extending in a direction crossing a row in which the plurality of pad portions are arranged. The plurality of pad portions include a terminal portion electrically connected with the wiring portion, and at least two land portions located on both sides of the terminal portion while avoiding electrical connection to the wiring portion. The solder includes land solder portions respectively overlaid on the at least two land portions and a terminal solder portion overlaid on the terminal portion. The land solder portion has a shape extending longer than the terminal solder portion along a direction in which the wiring portion extends from the connection electrode corresponding thereto.

Abstract: Various embodiments of a millimeter-wave system operative to enhance propagation of millimeter-waves inside a laminate waveguide structure, in which electrical energy has leaked outside the laminated waveguide structure. The system comprises a laminate waveguide structure inside a printed circuit board, and an electrically conductive fence also inside the printed circuit board but outside the laminate waveguide structure. In various embodiments, the electrical energy of millimeter-waves leaks outside the laminate waveguide structure and is reflected by the electrically conducive fence back into the laminate waveguide structure.

Abstract: Provided is a transmitter and receiver package including an interposer substrate including a top surface, a bottom surface facing the top surface, and a through-via, semiconductor devices mounted on the top surface of the interposer substrate, an exothermic element mounted on the bottom surface of the interposer substrate, and a heat dissipation member disposed on the bottom surface of the interposer substrate, the heat dissipation member being configured to cover the exothermic element.

Abstract: In some developing interconnect technologies, such as chip-to-chip optical interconnect or metal waveguide interconnects, misalignment can be a serious issue. Here, however, a interconnect that uses an on-chip directional antenna (which operates in the sub-millimeter range) to form a radio frequency (RF) interconnect through a dielectric waveguide is provided. This system allows for misalignment while providing the increased communication bandwidth.

Abstract: Electromagnetic slow wave structures (SWS) comprised of arrays of conductive obstacles are formed inside conductive parallel-plate waveguides These SWS may be formed using, for example, MEMS manufacturing processes at the wafer level on substrates including ceramic and silicon. An effective relative permittivity in the range of 15 to 40 may be obtained at millimeterwave frequencies. The SWS can be made absorptive by incorporating resistive losses in a plate of the PPW. Applications of these slow wave structures include delay lines and bootlace lens beamformers for microwave and millimeterwave antenna systems.

Abstract: A quadrature hybrid comprising first and second coupled open waveguides. Each open waveguide comprises first and second ports. One port in the first open waveguide is used as input port for an input signal which is used to generate I and Q output signals. The other port in the first open waveguide is used to output the Q signal, and one of the ports in the second waveguide is used to output the I signal. The other of the ports in the second open waveguide is an isolated port. The quadrature hybrid comprises a first differential amplifier with positive and negative ports, the positive port being connected to the first open waveguide and the negative port being connected to the second open waveguide.

Abstract: A method of manufacturing a semiconductor device includes the steps of placing, on a heat sink made of a metal, a semiconductor element and a frame surrounding the semiconductor element, placing solder on an upper surface of the frame, placing a cap on the solder, and heating the solder while exerting on the cap a force to be applied toward the frame without scrubbing the cap on the frame. In the heating step a heat source is brought into contact with the heat sink and the solder is heated with the heat source.

Abstract: A semiconductor substrate has a plurality of different size recesses formed in the substrate to provide a stepped interposer. A conductive via can be formed through the stepped interposer. An insulating layer follows a contour of the stepped interposer. A conductive layer is formed over the insulating layer following the contour of the stepped interposer. A first semiconductor die is partially disposed in a first recess and electrically connected to the conductive layer. A second semiconductor die is partially disposed in a second recess and electrically connected to the conductive layer. The first semiconductor die is electrically connected to the second semiconductor die through the conductive layer. The first and second semiconductor die can be flipchip type semiconductor die. An encapsulant is deposited over the first and second semiconductor die. A portion of the stepped interposer can be removed to reduce thickness.

Abstract: A device includes a first power semiconductor chip with a first contact pad and a second contact pad on a first face and a third contact pad on the second face. The device further includes a second power semiconductor chip with a first contact pad and a second contact pad on a first face and a third contact pad on the second face. The first and second power semiconductor chips are arranged one above another, and the first face of the first power semiconductor chip faces in the direction of the first face of the second power semiconductor chip. In addition, the first power semiconductor chip is located laterally at least partially outside of the outline of the second power semiconductor chip.

Abstract: The present invention is related to a microwave component packaging technique which ensures that there is no space between component and pocket after inserting the component into pocket. The continuity of ground connections at the microwave gates of the components is provided just compressing the component without using electrically conductive epoxy material.

Abstract: A device includes a metal pad over a substrate. A passivation layer includes a portion over the metal pad. A post-passivation interconnect (PPI) is electrically coupled to the metal pad, wherein the PPI comprises a portion over the metal pad and the passivation layer. A polymer layer is over the PPI. A dummy bump is over the polymer layer, wherein the dummy bump is electrically insulated from conductive features underlying the polymer layer.

Abstract: Various embodiments of millimeter-wave systems on a printed circuit board, including a microstrip, a probe, and an RF integrated circuit, as well as methods for manufacturing said systems. Various embodiments have holes extending through lamina in the PCB, thereby improving radiation propagation. Various embodiments have conductive cages created by multiple through-holes extending through lamina in the PCB, thereby increasing radiation propagation. The manufacture of such systems is easier and less expensive than the manufacture of current systems.

Abstract: A device housing package includes a base body (1) including, at its upper surface, a placement portion (1a) of a semiconductor device (9); a frame body (2) disposed on the base body (1) surrounding the placement portion (1a), including a notch (2b) formed by cutting a side wall thereof; an input-output terminal (3) attached to the notch (2b), including a wiring conductor layer (3a) electrically connected to the semiconductor device (9); and a sealing ring (5) disposed on an upper portion of the frame body (2). Moreover, side walls of the frame body (2) have, when seen in a plan view, an outer corner (2c) of adjacent side walls having a curved surface, the outer corner (2c) lying within a region overlapping the sealing ring (5) as seen in a plan view.

Abstract: An electronic device which comprises at least one interconnect, a semiconductor chip comprising at least one electric chip pad, an encapsulant structure packaging at least a part of the semiconductor chip, and an electrically conductive redistribution layer arranged between and electrically coupled with the at least one interconnect and the at least one chip pad, wherein the redistribution layer comprises at least one adjustment structure configured for adjusting radio frequency properties of a transition between the semiconductor chip and its periphery.

Abstract: A hyperfrequency interconnection device between two components is provided, each component comprising an upper face and a signal line arranged on the upper face, the planes containing the upper faces of the components being separated by a distance known as the height difference. The hyperfrequency interconnection device comprises a substrate comprising a lower face and an upper face defined by a first axis and a second axis perpendicular to the first axis, a signal line arranged on the lower face of the substrate, a projection of the signal line into the plane of the upper face forming the first axis, at least two contact pads capable of electrically connecting the signal line of the device to the signal line of the components. The upper face of the substrate is corrugated along the second axis, capable of conferring on the substrate flexibility along the first axis.

Abstract: A radio frequency semiconductor device package includes a metal base plate, a first metal wall, a second metal wall, and feed-through parts. The first metal wall is provided with first and second openings and connected onto the metal base plate. The openings are set back from a lower surface side and do not reach an upper surface. The second metal wall is connected to the upper surface of the first metal wall. Thickness of the second metal wall is larger than thickness of the first metal wall. The feed-through parts include insulators and line patterns insulated from the first and second metal walls and are joined to inner walls of the openings and the metal base plate.

Abstract: A power supply system (200) has a QFN leadframe with leads and a pad (201, switch node terminal); a pad surface having a portion recessed with a depth (270) and an outline suitable for attaching a semiconductor chip. A first FET chip (220) is vertically stacked to the opposite pad surface. A clip (240) is vertically stacked on the first FET chip and tied to a lead (202, grounded output terminal). A second FET chip (210) has its source terminal attached to the recessed portion and its drain (210a, input terminal) and gate (210b) terminals co-planar with the un-recessed portion. A driver-and-controller chip (230) is attached to the clip. Packaging compound (290) encapsulates the parts but leaves a pad surface and the drain and gate terminals of the second FET chip un-encapsulated.

Abstract: In some developing interconnect technologies, such as chip-to-chip optical interconnect or metal waveguide interconnects, misalignment can be a serious issue. Here, however, a interconnect that uses an on-chip directional antenna (which operates in the sub-millimeter range) to form a radio frequency (RF) interconnect through a dielectric waveguide is provided. This system allows for misalignment while providing the increased communication bandwidth.

Abstract: An integrated circuit package is provided. The package includes a housing on which at least one semiconductor device is mounted, active side up. A substrate having a transmission line formed on or within a first dielectric layer thereof is provided. The transmission line is arranged between the active side of the semiconductor device and at least one input or output port of the package for providing an electrical connection therebetween.

Abstract: According to example configurations herein, an apparatus comprises a die and a host substrate. The die can include a first transistor and a second transistor. A surface of the die includes multiple conductive elements disposed thereon. The multiple conductive elements on the surface are electrically coupled to respective nodes of the first transistor and the second transistor. Prior to assembly, the first transistor and second transistor are electrically isolated from each other. During assembly, the surface of the die including the respective conductive elements is mounted on a facing of the host substrate. Accordingly, a die including multiple independent transistors can be flipped and mounted to a respective host substrate such as printed circuit board, lead frame, etc.

Abstract: In some developing interconnect technologies, such as chip-to-chip optical interconnect or metal waveguide interconnects, misalignment can be a serious issue. Here, however, a interconnect that uses an on-chip directional antenna (which operates in the sub-millimeter range) to form a radio frequency (RF) interconnect through a dielectric waveguide is provided. This system allows for misalignment while providing the increased communication bandwidth.

Abstract: The present invention discloses a power device with integrated power transistor and Schottky diode and a method for making the same. The power device comprises a power transistor having a drain region, a Schottky diode in the drain region of the power transistor, and a trench-barrier near the Schottky diode. The trench-barrier is provided to reduce a reverse leakage current of the Schottky diode and minimizes the possibility of introducing undesired parasitic bipolar junction transistor in the power device.

Abstract: Microelectronic packages and methods for fabricating microelectronic packages are provided. In one embodiment, the method includes producing a plurality of vertically-elongated contacts in ohmic contact with interconnect lines contained within one or more redistribution layers built over the frontside of a semiconductor die. A molded radiofrequency (RF) separation or stand-off layer is formed over the redistribution layers through which the plurality of vertically-elongated contacts extend. An antenna structure is fabricated or otherwise provided over the molded RF stand-off layer and electrically coupled to the semiconductor die through at least one of the plurality of vertically-elongated contacts.

Abstract: A semiconductor packaging container allowing to use in millimeter band is provided at a low cost. The inner SIG pads and the inner GND pads, capable of a direct connection with a signal terminal of a semiconductor chip 10 are provided on the bottomed cylindrical dielectric case formed of the liquid crystal polymer. Further, the external SIG pads integrally formed with the inner SIG pads 201, 202 and the external GND pad 303 integrally formed with the inner GND pad are provided on the back of the bottom surface of the dielectric case as the external terminal. The inner GND pads and are to form the coplanar waveguide with the inner SIG pads and. Also, the inner GND pads and are to add capacitive reactance for canceling the inductance caused by the space at the semiconductor chip portion to the coplanar waveguide.

Abstract: Various implementations enable management of parasitic capacitance and voltage handling of stacked integrated electronic devices. Some implementations include a radio frequency switch arrangement having a ground plane, a stack and a first solder bump. The stack is arranged in relation to the ground plane, and includes switching elements coupled in series with one another, and a first end of the stack includes a respective terminal of a first one of the plurality of switching elements. The first solder bump is coupled to the respective terminal of the first one of the plurality of switching elements such that at least a portion of the first solder bump overlaps with one or more of the plurality of switching elements, an overlap dimension set in relation to a first threshold value in order to set a respective contribution to a parasitic capacitance of the radio frequency switch arrangement.

Abstract: A millimeter-wave dielectric transmission device. The millimeter-wave dielectric transmission device includes a semiconductor chip provided on one interposer substrate and capable of millimeter-wave dielectric transmission, an antenna structure connected to the semiconductor chip, two semiconductor packages including a molded resin configured to cover the semiconductor chip and the antenna structure, and a dielectric transmission path provided between the two semiconductor packages to transmit a millimeter wave signal. The semiconductor packages are mounted such that the antenna structures thereof are arranged with the dielectric transmission path interposed therebetween.

Abstract: The present invention provides a thin semiconductor device in which its security such as prevention of counterfeit or information leakage is to be enhanced. One feature of the present invention is a thin semiconductor device in which a plurality of thin film integrated circuits are mounted and in which at least one integrated circuit is different from the other integrated circuits in any one of a specification, layout, frequency for transmission or reception, a memory, a communication means, a communication rule and the like. According to the present invention, a thin semiconductor device tag having the plurality of thin film integrated circuits communicates with a reader/writer and at least one of the thin film integrated circuits receives a signal to write information in a memory, and the information written in the memory determines which of the thin film integrated circuits communicates.

Abstract: Provided are integrated electronic components which include a waveguide microstructure formed by a sequential build process and an electronic device, and methods of forming such integrated electronic components. The microstructures have particular applicability to devices for transmitting electromagnetic energy and other electronic signals.

Abstract: Impedance mismatching to be caused in signal transmission paths is reduced, without any restriction being put on the number of layers. An interconnect board according to an embodiment of the present technique includes: interconnect layers and insulating layers that are alternately stacked; vias that electrically connect the interconnect layers; front-surface-side electrode pads formed on the front-surface side; back-surface-side electrode pads that are formed on the back-surface side and are arranged in an array; and a conductor loop that is formed in a conductor path connecting one of the front-surface-side electrode pads and one of the back-surface-side electrode pads, the conductor loop being formed with interconnects in the interconnect layers and the vias, the conductor loop extending in a direction perpendicular to the thickness direction of the interconnect board.

Abstract: A semiconductor transmission line substructure and methods of transmitting RF signals are described. The semiconductor transmission line substructure can include a substrate; a first signal line over the substrate; a first ground line over the substrate; and a second semiconductor substrate over the substrate. The first signal line, the first ground line and the second semiconductor substrate are each vertically spaced apart from one another and can be separated from one another by at least one electrically insulating layer.

Abstract: Methods and apparatus for lowering the capacitance of an interconnect, are disclosed. An example apparatus may include an interconnect formed in at least one integrated circuit and configured to pass a signal through at least a portion of the at least one integrated circuit. The apparatus may include a transmitter to operate at a first voltage and a second voltage, and to output to an end node of the interconnect a reduced swing signal ranging from the first voltage to a third voltage. The third voltage may be between the first and second voltages, and the reduced swing signal may operate to reduce a capacitance of the interconnect when compared to operating the transmitter at the second voltage. Additional apparatus and methods are disclosed.

Abstract: A semiconductor structure for facilitating an integration of power devices on a common substrate includes a first insulating layer formed on the substrate and an active region having a first conductivity type formed on at least a portion of the first insulating layer. A first terminal is formed on an upper surface of the structure and electrically connects with at least one other region having the first conductivity type formed in the active region. A buried well having a second conductivity type is formed in the active region and is coupled with a second terminal formed on the upper surface of the structure. The buried well and the active region form a clamping diode which positions a breakdown avalanche region between the buried well and the first terminal. A breakdown voltage of at least one of the power devices is a function of characteristics of the buried well.

Abstract: An interconnection device for elements to be interconnected such as electronic modules or circuits, comprises at least one transmission line coupled to a ground line, the two lines being produced on a face of a dielectric substrate, the interconnection being made substantially at the ends of the transmission line and of the ground line, wherein said interconnection device is flexible over at least a part of its length situated roughly between the elements to be interconnected.

Abstract: An electronic device which comprises at least one interconnect, a semiconductor chip comprising at least one electric chip pad, an encapsulant structure packaging at least a part of the semiconductor chip, and an electrically conductive redistribution layer arranged between and electrically coupled with the at least one interconnect and the at least one chip pad, wherein the redistribution layer comprises at least one adjustment structure configured for adjusting radio frequency properties of a transition between the semiconductor chip and its periphery.

Abstract: To reduce the radio frequency (RF) losses associated with high RF loss plating, such as, for example, Nickel/Palladium/Gold (Ni/Pd/Au) plating, an on-die passive device, such as a capacitor, resistor, or inductor, associated with a radio frequency integrated circuit (RFIC) is placed in an RF upper signal path with respect to the RF signal output of the RFIC. By placing the on-die passive device in the RF upper signal path, the RF current does not directly pass through the high RF loss plating material of the passive device bonding pad.

Abstract: A differential port and a method of arranging the differential port are described. The method includes arranging a first electrode to receive a drive signal, and arranging a second electrode to receive a guard signal, the guard signal having a different phase than the drive signal and the first electrode and the second electrode having a gap therebetween. The method also includes disposing a signal line from the first electrode to drive a radio frequency (RF) device.

Abstract: An apparatus having a bonding pad and a conductor is disclosed. The bonding pad may be formed in a conductive layer of an integrated circuit. The bonding pad generally has (i) a bond region, (ii) an interface edge sized to match a transmission line and (iii) a tapered region between the bond region and the interface edge. The interface edge may be narrower than the bond region. The tapered region generally has a non-rectangular shape that spans from the bond region to the interface edge. The conductor may be bonded to the bond region. The conductor is generally configured to exchange a signal with the bond region. The signal may be in a microwave frequency range.

Abstract: A structure having a coplanar waveguide transistor; and a microwave section, coupled to the transistor, having: a strip conductor coplanar with the electrodes of the coplanar waveguide transistor and a ground plane conductor disposed under the strip conductor.

Abstract: A semiconductor module, having an integrated circuit, a rewiring layer for externally connecting the integrated circuit, and at least one waveguide integrated into the semiconductor module for radar signals having a conductive pattern, which laterally surrounds the interior of the waveguides, the integrated circuit and the at least one waveguide being embedded, at least in regions, in a housing material of the semiconductor module; as well as a radar sensor, a motor vehicle radar system having such a semiconductor module, and a method for producing a semiconductor module.

Abstract: Microfeature dies with redistribution structures that reduce or eliminate line interference are disclosed. The microfeature dies can include a substrate having a bond site and integrated circuitry electrically connected to the bond site. The microfeature dies can also include and a redistribution structure coupled to the substrate. The redistribution structure can include an external contact site configured to receive an electric coupler, a conductive line that is electrically connected to the external contact site and the bond site, and a conductive shield that at least partially surrounds the conductive line.

Abstract: A common mode filter monolithically integrated with a protection device. In accordance with an embodiment a semiconductor material having a resistivity of at least 5 Ohm-centimeters is provided. A protection device is formed from a portion of the semiconductor material and a dielectric material is formed over the semiconductor material. A coil is formed over the dielectric material.

Abstract: A semiconductor structure includes a molding compound, a conductive plug, and a cover. The conductive plug is in the molding compound. The cover is over a top meeting joint between the conductive plug and the molding compound. The semiconductor structure further has a dielectric. The dielectric is on the cover and the molding compound.

Abstract: A semiconductor device of an embodiment includes: a substrate, a high-frequency integrated circuit being provided on the substrate, a cap, and a sealing wall provided between the substrate and the cap. The cap includes a first conductive layer, a second conductive layer, an insulating layer provided between the first conductive layer and the second conductive layer, and a conductive via provided in the insulating layer. The conductive via connects the first conductive layer and the second conductive layer. The first conductive layer or the second conductive layer is connected to a ground potential. The sealing wall surrounds the high-frequency integrated circuit.

Abstract: A semiconductor package according to the present invention includes: a semiconductor element where a high frequency signal is input or output; a planar lead terminal having an end electrically connected to an input terminal or an output terminal of the semiconductor element; an encapsulation resin for encapsulating the lead terminal and the semiconductor element, the lead terminal having another end exposed from the resin; and a ground enhancing metal body encapsulated in the encapsulation resin, having a first main surface facing the lead terminal and a second main surface exposed from the encapsulation resin, wherein the ground enhancing metal body has a shape with a cross section parallel to the second main surface and having a smaller area than an area of the first main surface.

Abstract: A high frequency signal can be transmitted and received in a semiconductor device. In a QFP, an antenna (frame body) is supported by three suspension leads. The antenna is arranged to be symmetrical with respect to a first virtual diagonal line of a plan view of a sealing body. One of the three suspension leads is arranged on the first virtual diagonal line. With this configuration, discontinuities of a wave of a signal in the antenna can be reduced, as a result of which the high frequency signal of 5 Gbps class can be transmitted and received in the QFP.