Including Epoxide Patents (Class 257/793)
  • Patent number: 7291684
    Abstract: An epoxy resin composition for encapsulating a semiconductor chip, which has good flowability without deterioration in curability. Specifically, a resin composition is disclosed for encapsulating a semiconductor chip containing a phenol aralkyl type epoxy resin containing biphenylene structure(A), a phenol aralkyl type resin containing phenylene or biphenylene structure (B), an inorganic filler (C) and a curing accelerator (D) as main components, further containing a silane coupling agent (E) in 0.01 wt % to 1 wt % both inclusive of the total amount of the epoxy resin composition and a Compound (F) containing two hydroxyl groups combined with each of adjacent carbon atoms on a naphthalene ring in more than or equal to 0.01 wt % of the total amount of the epoxy resin composition.
    Type: Grant
    Filed: March 25, 2004
    Date of Patent: November 6, 2007
    Assignee: Sumitomo Bakelite Co., Ltd.
    Inventors: Kuniharu Umeno, Shigehisa Ueda
  • Patent number: 7288838
    Abstract: It is an object of the invention to provide a circuit board for mounting a semiconductor chip and a manufacturing method thereof that prevent post-reflow warping and prevent peeling of the semiconductor chip and breakage resulting from thermal stress. In the circuit board for mounting a semiconductor chip, wiring regions, in which are formed wirings electrically connected to a semiconductor chip, are disposed on an insulating substrate in a vicinity of a chip region in which the semiconductor chip is mounted. A reinforcement layer, in which is formed reinforcement layers for reinforcing the insulating substrate, is disposed in a vicinity of the wiring regions.
    Type: Grant
    Filed: January 14, 2004
    Date of Patent: October 30, 2007
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Hiroaki Nakano
  • Patent number: 7279781
    Abstract: A semiconductor card includes a printed circuit substrate upon which is mounted a card circuit including one or more semiconductor components such as dice or packages. External contacts link the card circuit to the circuit of another apparatus by removable insertion therein. The substrate is defined by a peripheral opening in a surrounding frame, which may be part of a multiframe strip. The substrate is connected to the frame by connecting segments. The card includes a first plastic casting molded to the substrate and encapsulating the semiconductor components while leaving a peripheral portion of the substrate uncovered. A second plastic casting is molded to the peripheral portion to abut the first plastic casting and form the card periphery. A method for fabricating the semiconductor card is also included.
    Type: Grant
    Filed: March 2, 2004
    Date of Patent: October 9, 2007
    Assignee: Micron Technology, Inc.
    Inventor: Todd O. Bolken
  • Patent number: 7268191
    Abstract: A method for producing an epoxy resin composition for semiconductor encapsulation, which does not cause void generation and the like and is excellent in reliability. A method for producing an epoxy resin composition for semiconductor encapsulation, which contains the following components (A) to (C): (A) an epoxy resin, (B) a phenol resin, and (C) a hardening accelerator, which comprises mixing the whole or a part of the components excluding the component (A) among the components containing the components (A) to (C) in advance under a reduced pressure of from 1.333 to 66.65 kPa and under a heating condition of from 100 to 230° C., and then mixing the component (A) and remaining components with the resulting mixture.
    Type: Grant
    Filed: December 2, 2004
    Date of Patent: September 11, 2007
    Assignee: Nitto Denko Corporation
    Inventors: Eiji Toyoda, Takeshi Okada, Keisuke Yoshikawa, Takuya Eto, Kazuhiro Ikemura, Shinya Akizuki, Tsuyoshi Ishizaka, Takahiro Uchida, Kei Toyota
  • Patent number: 7265167
    Abstract: An epoxy resin composition for semiconductor encapsulation capable of giving semiconductor devices of high reliability that do not cause short circuits even in pitch reduction in the interconnection electrode distance or the conductor wire distance therein as well as a semiconductor device using the same. The epoxy resin composition for semiconductor encapsulation, which comprises the following components (A) to (C): (A) an epoxy resin, (B) a phenolic resin, and (C) an inorganic filler for preventing semiconductors from short-circuiting in a step of semiconductor encapsulation.
    Type: Grant
    Filed: November 10, 2003
    Date of Patent: September 4, 2007
    Assignee: Nitto Denko Corporation
    Inventors: Shinya Akizuki, Kazuhiro Ikemura, Hisataka Ito, Takahiro Uchida, Takuya Eto, Tsutomu Nishioka, Katsumi Shimada
  • Patent number: 7262507
    Abstract: Semiconductor-mounted device comprises wired board, first semiconductor chip mounted on first side of wired board, second semiconductor chip mounted on second side of wired board and sealing resin sealing, with a same height, a region disposed at and around first semiconductor chip and opposite, across wired board, to at least an area of projecting electrodes of second semiconductor chip; and a producing method thereof. Semiconductor-mounted device also comprises wired board, first semiconductor chip mounted on first side of wired board, second semiconductor chip mounted on second side of wired board and resin sheet covering, at substantially a same height as first semiconductor chip, a region disposed around first semiconductor chip and opposite, across wired board, to at least an area of projecting electrodes of second semiconductor chip, back surface of first semiconductor chip being exposed; and a producing method thereof.
    Type: Grant
    Filed: December 27, 2004
    Date of Patent: August 28, 2007
    Assignee: NEC Electronics Corporation
    Inventors: Shigekazu Hino, Takashi Magoi, Syunichi Iwanaga
  • Patent number: 7262514
    Abstract: An epoxy resin composition for semiconductor encapsulation in producing surface mount lead-less thin semiconductor devices. The epoxy resin composition for surface mount lead-less semiconductor device encapsulation which device comprising an encapsulating resin layer and, encapsulated therein, a substrate, a semiconductor element mounted on the substrate, two or more conductive parts disposed around the semiconductor element, and wires which electrically connect electrodes of the semiconductor element to the conductive parts, wherein the bottom face of the substrate and the bottom face of each conductive part are exposed without being encapsulated in the encapsulating resin layer, and the epoxy resin composition used for forming the encapsulating resin layer has the following properties (?) and (?): (?) a melt viscosity of 2-10 Pa.s at 175° C.; and (?) a flexural strength of cured state of 130 MPa or higher at ordinary temperature.
    Type: Grant
    Filed: April 27, 2005
    Date of Patent: August 28, 2007
    Assignee: Nitto Denko Corporation
    Inventors: Keisuke Yoshikawa, Kazuhito Hosokawa, Takuji Okeyui, Kazuhiro Ikemura
  • Patent number: 7211888
    Abstract: Solder joints coupling pins to a microelectronic package substrate are enshrouded with an encapsulation material. In this manner, pin movement is limited even if the pin solder subsequently melts.
    Type: Grant
    Filed: July 23, 2003
    Date of Patent: May 1, 2007
    Assignee: Intel Corporation
    Inventor: Michele J. Berry
  • Patent number: 7205669
    Abstract: A semiconductor device that exhibits an enhanced inhibition to a generation of voids in an underfill resin for encapsulation supplied between a semiconductor chip and an electronic component, which are mutually coupled through bump electrodes. The semiconductor device includes a first semiconductor chip and a second semiconductor chip, wherein bumps-formed surface of the first semiconductor chip is opposed to bumps-formed surface of the electronic component. The semiconductor device includes insulating films that function as protective films respectively formed on an uppermost surface of the first semiconductor chip and on an uppermost surface of the electronic component. Openings for supplying an underfill resin between the first semiconductor chip and the second semiconductor chip are provided in the vicinity of the bumps-formed regions of at least one of the insulating films.
    Type: Grant
    Filed: March 20, 2006
    Date of Patent: April 17, 2007
    Assignee: NEC Electronics Corporation
    Inventor: Takashi Miyazaki
  • Patent number: 7192997
    Abstract: A composition for use in making an encapsulant usable in the encapsulation of a semiconductor chip assembled to a substrate with C4 solder interconnections therebetween, which in turn may form part of an electronic package. The composition comprises a resin, a flexibilizing agent and a filler material.
    Type: Grant
    Filed: February 7, 2001
    Date of Patent: March 20, 2007
    Assignee: International Business Machines Corporation
    Inventor: Konstantinos I. Papathomas
  • Patent number: 7193331
    Abstract: One of the aspects of the present invention is to provide a semiconductor device, which includes a circuit board, a first semiconductor chip mounted on the circuit board, a built-in semiconductor package on the first semiconductor chip, and a first molded resin encompassing the first semiconductor chip and the built-in semiconductor package. The built-in semiconductor package includes at least one second semiconductor chip mounted on a die pad, and the second semiconductor chip has a plurality of terminals. Also, the built-in semiconductor package includes a plurality of lead frames, and each of the lead frames is electrically connected with respective one of the terminals of the second semiconductor chip, and has a connection region on one side and a support region on the other opposing side.
    Type: Grant
    Filed: May 19, 2005
    Date of Patent: March 20, 2007
    Assignee: Renesas Technology Corp.
    Inventor: Hideki Ishii
  • Patent number: 7183588
    Abstract: A light emission device. A lead frame comprises a first lead frame segment and a second lead frame segment. A light source is coupled to the first lead frame segment. A wire bond is coupled to the light source and coupled to the second lead frame segment. A translucent epoxy cast encases the light source, the wire bond and a portion of the lead frame.
    Type: Grant
    Filed: January 8, 2004
    Date of Patent: February 27, 2007
    Assignee: Avago Technologies ECBU IP (Singapore) Pte. Ltd.
    Inventors: Chee Wai Chia, Hui Peng Koay, Lye Yee Wong
  • Patent number: 7183661
    Abstract: Epoxy-resin systems resistant to aging, molded materials and components generated from them, and their utilization. An epoxy-resin system especially suitable in the application of casting-resin methods comprising an epoxide-containing A component based on a glycidyl ether or glycidyl ester and a B component containing anhydride as a hardener is proposed, where a sterically hindered amine is added to the A component as a stabilizer to prevent aging of molded materials. Light-emitting components potted with it exhibit increased aging stability, especially as with respect to light yield over time. The epoxy-resin system can also be used for encapsulants and molding compositions, and can be blended with acrylates, for all applications, particularly in the exterior.
    Type: Grant
    Filed: May 16, 2001
    Date of Patent: February 27, 2007
    Assignee: Osram Opto Semiconductors GmbH
    Inventors: Georg Bogner, Herbert Brunner, Klaus Hoehn
  • Patent number: 7183657
    Abstract: A device and a method for controlling resin bleed, the device comprising a substrate having a surface, wherein an interior region, a peripheral region, and an exterior region of the surface are generally defined. An adhesive generally resides on the surface of the substrate in the peripheral region thereof, wherein the adhesive comprises a plurality of components, such as a metal and a resin. A first barrier is formed on the surface of the substrate generally between the adhesive and the exterior region, wherein the first barrier generally prevents one or more of the plurality of components of the adhesive from bleeding onto the exterior region of the surface of the substrate.
    Type: Grant
    Filed: September 23, 2004
    Date of Patent: February 27, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Robert John Furtaw, John Henry Abbott, Emily Ellen Hoffman
  • Patent number: 7178235
    Abstract: A method for providing an encapsulated optoelectronic chip is provided. The optoelectronic chip is secured on a substrate. A translucent coating substance is then applied on said optoelectronic chip and the translucent coating substance is then polished away to enable an optical coupling.
    Type: Grant
    Filed: December 3, 2003
    Date of Patent: February 20, 2007
    Assignee: Reflex Photonics Inc.
    Inventors: David Robert Cameron Rolston, Tomasz Maj
  • Patent number: 7163973
    Abstract: A molding composition or encapsulant for an electronic component and its method of preparation provides reduced moisture uptake without undue swelling and comprises melt-blending an epoxy resin, hardener and clay, cooling, adding a catalyst to form an epoxy-clay nano-composite, and combining it with a bulk amount of a filler.
    Type: Grant
    Filed: August 8, 2002
    Date of Patent: January 16, 2007
    Assignee: Henkel Corporation
    Inventor: Tanweer Ahsan
  • Patent number: 7138723
    Abstract: A semiconductor chip is secured in a state deformed into a substantially cylinder shape by a coating material formed on its surface. The deformed semiconductor chip is flip-chip connected to an interposer and sealed with sealing resin onto the interposer. Solder balls are provided, as external terminals, on the other side of the interposer.
    Type: Grant
    Filed: December 8, 2004
    Date of Patent: November 21, 2006
    Assignee: Fujitsu Limited
    Inventors: Kazuyuki Aiba, Akira Takashima, Kaname Ozawa, Tetsuya Hiraoka, Takaaki Suzuki, Yasurou Matsuzaki
  • Patent number: 7122910
    Abstract: A semiconductor device in which moisture penetration into the package interior is suppressed, comprising a rewiring layer formed by plating, with improved reliability of electrical characteristics. On the main surface of a semiconductor chip comprising circuit elements and formed on a wafer, a passivation film opposing the circuit elements is formed, so as to expose a first region of the main surface along the edges of the main surface. An insulating film, which extends over the main surface and along the side faces of this passivation film and onto the main surface of the semiconductor chip, is formed such that there remains a second region within the first region, along the edges of the main surface. A sealing layer covering the insulating film is then formed on the second region.
    Type: Grant
    Filed: November 4, 2004
    Date of Patent: October 17, 2006
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Kenji Nagasaki
  • Patent number: 7122587
    Abstract: A flame retardant epoxy resin composition for semiconductor encapsulation includes as essential components, (A) an epoxy resin, (B) a curing agent, (C) an inorganic filler, and (D) a phosphazene compound of the average compositional formula (1) having a melting point of 110–130° C., wherein a, b and n are numbers satisfying 0<a?0.05n, 1.90n?b<2n, 2a+b=2n, and 3?n?6, the composition being substantially free of bromides and antimony compounds.
    Type: Grant
    Filed: August 12, 2003
    Date of Patent: October 17, 2006
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventors: Tarou Shimoda, Shoichi Osada, Hiroyuki Takenaka, Shingo Ando, Kazutoshi Tomiyoshi, Toshio Shiobara
  • Patent number: 7122896
    Abstract: To provide a low cost mounting structure of an electronic component and to increase the reliability of the conductive connection between a bump electrode and a terminal formed on a substrate, in the mounting structure of the electronic component, the bump electrode includes a core composed of an inner resin and a conductive film covering the surface of the core. The bump electrode is brought into conductive contact with the terminal directly and is elastically deformed to make contact with the face of the substrate in a planar manner. A sealing resin is filled in around the conductive contact portion between the bump electrode and the terminal to hold the bump electrode and the terminal.
    Type: Grant
    Filed: August 10, 2004
    Date of Patent: October 17, 2006
    Assignee: Seiko Epson Corporation
    Inventors: Atsushi Saito, Shuichi Tanaka
  • Patent number: 7115989
    Abstract: An adhesive sheet for producing a semiconductor device, which includes a base layer and an adhesive layer and is used in the process for producing the semiconductor device including the step of sealing a semiconductor element connected to an electric conductor with a sealing resin on the adhesive layer, wherein the adhesive layer of the adhesive sheet includes a rubber component and an epoxy resin component and the ratio of the rubber component in organic materials in the adhesive layer is from 5 to 40% by weight. According to this adhesive sheet, pollution is not caused by silicon components, a sufficient elastic modulus can be kept even at high temperature, and a problem that paste remains is not easily caused.
    Type: Grant
    Filed: August 23, 2004
    Date of Patent: October 3, 2006
    Assignee: Nitto Denko Corporation
    Inventor: Kazuhito Hosokawa
  • Patent number: 7115982
    Abstract: A semiconductor component includes a stiffener, a circuit decal attached to the stiffener, and a semiconductor die attached to the stiffener. The circuit decal includes conductors which function as an internal signal transmission system for the component, and a mask layer which functions as a solder mask and an outer insulating layer for the component. An adhesive layer in physical contact with the conductors attaches the circuit decal to the stiffener, and electrically insulates the conductors from the stiffener. The component also includes an area array of terminal contacts on the conductors electrically isolated by the mask layer. A method for fabricating the component includes the steps of attaching the circuit decal to the stiffener, attaching the die to the stiffener, interconnecting the die and the circuit decal, encapsulating the die, and forming the terminal contacts.
    Type: Grant
    Filed: April 5, 2005
    Date of Patent: October 3, 2006
    Assignee: Micron Technology, Inc.
    Inventor: Stephen F. Moxham
  • Patent number: 7109591
    Abstract: An integrated circuit device having a semiconductor device and an encapsulating material on at least a portion of the semiconductor device and a method for encapsulating an integrated circuit device is disclosed. The encapsulating material includes a plurality of nanoparticles.
    Type: Grant
    Filed: June 4, 2004
    Date of Patent: September 19, 2006
    Inventors: Jonathan A. Hack, Timothy M. Hsieh
  • Patent number: 7109592
    Abstract: An electronic fabrication process and structure is provided for attaching discrete passive surface mount devices (SMD) to a substrate in a single step. A liquid noflow resin encapsulant containing flux material is dispensed between presoldered pads on a substrate. The SMD, having a pair of electrical contacts, is pressed into said encapsulant so that the electrical contacts make contact with said presoldered pads. Heat is applied to first activate said flux material and then reflow the solder on said presoldered pads to bond said SMD contacts to said presoldered pads. The reflow temperature is maintained for about 180 seconds during which time the resin solidifies. The resin encapsulant fills the space between substrate and SMD and forms fillets around the solder bonded contacts.
    Type: Grant
    Filed: March 23, 2004
    Date of Patent: September 19, 2006
    Assignee: International Business Machines Corporation
    Inventors: Clément J. Fortin, Pierre M. Langevin, Son K. Tran, Michael B. Vincent
  • Patent number: 7105919
    Abstract: A semiconductor package having an ultra thin thickness and a method of manufacturing the same are provided. The ultra thin semiconductor package comprises a circuit board in which a through hole is formed. A semiconductor chip is located in the through hole and a connecting element electrically connects the circuit board and the semiconductor chip. An epoxy molding compound (EMC) covers the semiconductor chip and the connecting element and a supporter having a thermal expansion coefficient similar to the EMC is attached inside the through hole on a lower surface of the semiconductor chip. An external connecting terminal is attached to at least one side of the circuit board. Because of the inclusion of the supporter, warpage of the semiconductor package resulting from the curing of the EMC is prevented.
    Type: Grant
    Filed: November 3, 2004
    Date of Patent: September 12, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Hyeong-Seob Kim
  • Patent number: 7098545
    Abstract: A package of a semiconductor device comprising an integrated circuit (10) generally comprises an inner layer (21) and an outer layer (16), which layers (16,21) have a mutual interface (24). An improved stability of the package is realized in that the interface (24) encloses a delamination area (22), which area (22) is isolated from any bond pads (18) of the integrated circuit (10). The delamination area (22) may be created by a pattern-wise activation of a surface of the inner layer (21). A quantity of a curable polymer may be disposed on this surface to achieve this.
    Type: Grant
    Filed: November 20, 2002
    Date of Patent: August 29, 2006
    Assignee: Koninklijke Phllips Electronics N.V.
    Inventor: Jacob Wijdenes
  • Patent number: 7095124
    Abstract: A semiconductor device comprises a semiconductor chip in which a multilayer interconnection structure having an interlayer insulation film with a low relative dielectric constant is formed on a silicon substrate and a sealing resin layer which coats the semiconductor chip. The sealing resin layer meets, in coefficient of linear expansion (?) at room temperature, Young's modulus (E) at room temperature and thickness (h) thereof, a relationship of the following formula (1) E<0.891/{(???s)2×h}??(1) where E represents the Young's modulus (GPa) of the sealing resin at room temperature; ? represents the coefficient of linear expansion (ppm) of the sealing resin at room temperature; ?s represents the coefficient of linear expansion (3.5 ppm) of the silicon substrate; and h represents the thickness (m) of the sealing resin on the device-formed surface of the semiconductor chip.
    Type: Grant
    Filed: October 28, 2004
    Date of Patent: August 22, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masahiko Hasunuma, Akitsugu Hatazaki
  • Patent number: 7095125
    Abstract: A semiconductor encapsulating epoxy resin composition is provided comprising (A) an epoxy resin, (B) a phenolic resin curing agent, (C) a molybdenum compound, (D-i) an organopolysiloxane, (D-ii) an organopolysiloxane cured product, or (D-iii) a block copolymer obtained by reacting an epoxy resin or alkenyl group-bearing epoxy resin with an organohydrogenpolysiloxane, and (E) an inorganic filler. The composition has improved moldability and solder crack resistance while exhibiting high flame retardance despite the absence of halogenated epoxy resins and antimony oxide.
    Type: Grant
    Filed: July 14, 2003
    Date of Patent: August 22, 2006
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventors: Shoichi Osada, Eiichi Asano, Shigeki Ino, Takayuki Aoki, Kazutoshi Tomiyoshi, Toshio Shiobara
  • Patent number: 7090895
    Abstract: An epoxy resin composition is provided, which includes (A) an epoxy resin with at least 2 epoxy groups within each molecule, (B) a curing agent, and (C) a foaming agent. This composition displays excellent flame retardancy and reliability and is suitable for use as a semiconductor encapsulating material.
    Type: Grant
    Filed: July 24, 2003
    Date of Patent: August 15, 2006
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventor: Yoshifumi Inoue
  • Patent number: 7078794
    Abstract: A chip package structure comprising a substrate, a chip, a plurality of bumps, a plurality of conductive wires and an insulating material is provided. The substrate has a first surface and a corresponding second surface. The substrate has a slot that penetrates the substrate. The chip is attached to the first surface of the substrate in a position that covers the slot. The conductive wires pass through the slot such that one end of each conductive wire is attached to a contact point on the chip while the other end of the conductive wire is attached to a contact point on the second surface of the substrate. The insulating material fills the space between the chip and the substrate and the slot so that the conductive wires and the bumps are enclosed.
    Type: Grant
    Filed: June 20, 2003
    Date of Patent: July 18, 2006
    Assignee: VIA Technologies, Inc.
    Inventor: I Tseng Lee
  • Patent number: 7075187
    Abstract: There is disclosed a coating material formulation for layering a plurality of electrodes to provide a substrate for the electrochemical synthesis of organic oligomers. Specifically, there is disclosed a coating layer of from about 0.5 to about 100 microns thick and is composed of a mixture of controlled porosity glass (CPG) particles having an average particle size of from about 0.25 to about 25 microns, and a thickening agent.
    Type: Grant
    Filed: November 9, 2001
    Date of Patent: July 11, 2006
    Assignee: CombiMatrix Corporation
    Inventor: Karl Maurer
  • Patent number: 7067930
    Abstract: A liquid epoxy resin composition is provided comprising (A) a liquid epoxy resin, (B) an optional curing agent, (C) a curing accelerator, (D) an inorganic filler, and (E) acrylic submicron particles of core-shell structure formed of polymers or copolymers comprising an alkyl acrylate and/or alkyl methacrylate as a monomeric component, the core having a Tg of up to ?10° C., the shell having a Tg of 80-150° C. The composition is adherent to surfaces of silicon chips, especially polyimide resins and nitride film and useful as sealant for flip chip type semiconductor devices.
    Type: Grant
    Filed: November 13, 2001
    Date of Patent: June 27, 2006
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventors: Kazuaki Sumita, Toshio Shiobara
  • Patent number: 7061085
    Abstract: A semiconductor component includes a stiffener, a circuit decal attached to the stiffener, and a semiconductor die attached to the stiffener. The circuit decal includes conductors which function as an internal signal transmission system for the component, and a mask layer which functions as a solder mask and an outer insulating layer for the component. An adhesive layer in physical contact with the conductors attaches the circuit decal to the stiffener, and electrically insulates the conductors from the stiffener. The component also includes an area array of terminal contacts on the conductors electrically isolated by the mask layer. A method for fabricating the component includes the steps of attaching the circuit decal to the stiffener, attaching the die to the stiffener, interconnecting the die and the circuit decal, encapsulating the die, and forming the terminal contacts.
    Type: Grant
    Filed: September 19, 2003
    Date of Patent: June 13, 2006
    Assignee: Micron Technology, Inc.
    Inventor: Stephen F. Moxham
  • Patent number: 7037399
    Abstract: A curable underfill encapsulant composition that is applied directly onto semiconductor wafers before the wafers are diced into individual chips. The composition comprises a thermally curable epoxy resin, a solvent, an imidazole-anhydride curing agent, fluxing agents, and optionally, wetting agents. Various other additives, such as defoaming agents, adhesion promoters, flow additives and rheology modifiers may also be added as desired. The underfill encapsulant is B-stageable to provide a coating on the wafer that is smooth, non-tacky and will allow the wafer to be cleanly diced into individual chips. A method for producing an electronic package containing the B-stageable material may also utilize an unfilled liquid curable fluxing material on the substrate to which the chip is to be attached.
    Type: Grant
    Filed: March 1, 2002
    Date of Patent: May 2, 2006
    Assignee: National Starch and Chemical Investment Holding Corporation
    Inventors: Quinn K. Tong, Yue Xiao, Bodan Ma, Sun Hee Hong
  • Patent number: 6967412
    Abstract: A chip scale package and a method for its manufacture which include providing sticky interconnects on a surface of a semiconductor die, the interconnects being surrounded by a layer of thermal epoxy.
    Type: Grant
    Filed: April 22, 2003
    Date of Patent: November 22, 2005
    Assignee: International Rectifier Corporation
    Inventor: Martin Standing
  • Patent number: 6962957
    Abstract: An epoxy resin composition for semiconductor encapsulation comprising (A) an epoxy resin, (B) a phenolic resin, and (C) butadiene rubber particles having an average particle size of secondary particles of 100 ?m or smaller and having such a size distribution that the proportion of secondary particles having a particle size of 250 ?m or smaller is 97% by weight or more, and the proportion of secondary particles having a particle size of 150 ?m or smaller is 80% by weight or more. Component (C) is uniformly dispersed in the composition without forming coarse agglomerates to secure low stress properties.
    Type: Grant
    Filed: April 24, 2003
    Date of Patent: November 8, 2005
    Assignee: Nitto Denko Corporation
    Inventors: Hideyuki Usui, Satoshi Okuda, Minoru Nakao
  • Patent number: 6963125
    Abstract: A hermetically coated device includes an integrated semiconductor circuit die, a first layer comprising an inorganic material, the first layer enveloping the integrated semiconductor circuit die, a second layer, the second layer enveloping the integrated semiconductor circuit die. Formation of such device includes steps of providing an integrated semiconductor circuit die, applying a first layer comprising an inorganic material, the first layer enveloping the integrated semiconductor circuit die, and applying a second layer, the second layer enveloping the integrated semiconductor circuit die.
    Type: Grant
    Filed: February 13, 2002
    Date of Patent: November 8, 2005
    Assignees: Sony Corporation, Sony Electronics, Inc.
    Inventors: Michael Featherby, Jennifer L. DeHaven
  • Patent number: 6956297
    Abstract: An electronic circuit unit includes a substrate on which a wiring pattern is provided; electronic parts, including a semiconductor bare chip disposed on a surface of the substrate; and a soft sealing resin provided on the substrate so as to cover the electronic parts. A wire of the semiconductor bare chip is connected to the wiring pattern and is covered with the soft sealing resin and a protection member made of a resin harder than the sealing resin having an upper wall having a flat external surface and leg parts extending from the upper wall to the substrate. Since the leg parts are secured to the substrate while the protection member covers the sealing resin, the protection member can protect the sealing resin without being cracked even when external force is applied to the protection member, thereby preventing the wire from breaking.
    Type: Grant
    Filed: March 9, 2004
    Date of Patent: October 18, 2005
    Assignee: Alps Electric Co., Ltd.
    Inventor: Takeshi Tanemura
  • Patent number: 6936664
    Abstract: The present invention discloses reworkable epoxy compositions suitable for encapsulation of and underfill for electronic components comprising (a) a curable epoxy component which is the reaction product of an epoxidized 1-alkenyl ether or 1-cycloalkenyl ether and a polycarboxylic acid, the reaction product being substantially free of unreacted acid or acid impurities; and (b) a curing agent for the epoxy component, wherein the reaction products of the epoxy composition are reworkable. The cured epoxy compositions of this invention contain thermally labile weak ?-alkoxy ester linkages which provide for the reworkable aspect of the invention.
    Type: Grant
    Filed: October 4, 2001
    Date of Patent: August 30, 2005
    Assignee: Henkel Corporation
    Inventors: John G. Woods, Susanne D. Morrill, Jianzhao Wang, Brendan J. Kneafsey
  • Patent number: 6933618
    Abstract: A tablet for producing a semiconductor device with substantially no bowing, comprising an epoxy resin composition comprising an epoxy resin and a curing agent, wherein the tablet has the characteristic of an amount reduced by heating being less than 0.05% by weight; a wafer with a resin layer and a semiconductor device produced by using the tablet; and a process for producing the wafer and the semiconductor device.
    Type: Grant
    Filed: May 12, 2004
    Date of Patent: August 23, 2005
    Assignee: Nitto Denko Corporation
    Inventors: Akihisa Kuroyanagi, Hisataka Ito, Shinichirou Sudo, Hirofumi Oono
  • Patent number: 6919420
    Abstract: Reworkable thermoset acid-cleavable acetal and ketal based epoxy oligomers can be B-staged into a tack free state. Compositions containing the epoxy oligomers are employed in a reworkable assembly such as a wafer-level underfilled microelectronic package.
    Type: Grant
    Filed: December 5, 2002
    Date of Patent: July 19, 2005
    Assignee: International Business Machines Corporation
    Inventors: Stephen Leslie Buchwalter, Claudius Feger, Gareth Hougham, Nancy LaBianca, Hosadurga Shobha
  • Patent number: 6911503
    Abstract: An epoxy resin composition comprising an epoxy resin (A), a curing agent (B) and a curing accelerator (C), wherein the curing agent (B) is a phenol compound having two or more hydroxyl functional groups or a compound obtained by esterification of the phenol compound or a mixture of these compounds, and the curing accelerator (C) is a salt of a phosphazenium compound represented by a formula (I): (wherein R1s each represent a hydrogen atom, a linear, branched or cyclic alkyl group having 1 to 10 carbon atoms or an aryl or aralkyl group having 6 to 10 carbon atoms and may be all the same or different from one another; and Z? represents a halogen anion, hydroxy anion, alkoxy anion, aryloxy anion or carboxy anion).
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: June 28, 2005
    Assignee: Mitsui Chemicals, Inc.
    Inventors: Sunao Maeda, Tatsuhiro Urakami, Tomoyuki Kawabata, Koutarou Suzuki, Tadahito Nobori
  • Patent number: 6906405
    Abstract: An electronic part comprising: a functional element chip on which a functional element has been formed; a wiring member which is electrically connected to the functional element chip; and a protecting member for protecting the functional element chip, wherein the wiring member has a stair shape and is electrically connected to the functional element chip, so that an electronic part having a functional element chip which is hard to be distorted. An electronic part comprising: a functional element chip on which a functional element has been formed; and a protecting member for protecting the functional element chip, wherein a spacer is sandwiched between the functional element chip and the protecting member, so that a constant gap between a functional element chip and a protecting cap is easily held.
    Type: Grant
    Filed: June 20, 2003
    Date of Patent: June 14, 2005
    Assignee: Canon Kabushiki Kaisha
    Inventor: Koji Ono
  • Patent number: 6903270
    Abstract: Method and structure for securing a mold compound to a printed circuit board is disclosed. A through hole or a blind hole is fabricated in a printed circuit board adjacent to a die. The hole is then filled with a mold compound. The mold compound also surrounds and covers the die. The mold compound within the hole locks the mold compound to the surface of the printed circuit board. In one embodiment, a through hole or a blind hole is fabricated adjacent to a semiconductor die. The semiconductor die is attached to a layer of gold-plated copper on the printed circuit board. After the semiconductor die is attached to the layer of gold-plated copper on the printed circuit board, the semiconductor die is surrounded and covered by the mold compound and the fabricated hole is filled with the mold compound. The mold compound within the hole has good adhesion to the resin layer which constitutes the printed circuit board. This adhesion locks the mold compound securely to the surface of the printed circuit board.
    Type: Grant
    Filed: August 11, 2000
    Date of Patent: June 7, 2005
    Assignee: Skyworks Solutions, Inc.
    Inventors: Doug A. Hawks, Mark A. Kuhlman, Kevin J. Cote
  • Patent number: 6897490
    Abstract: The invention describes a radiation-emitting semiconductor component with a luminescent conversion element, at which the semiconductor body is placed in a recess of the base body. A cup-like area is molded inside of the recess around the semiconductor body, which contains the luminescent conversion element and coats the semiconductor body. The cup-like portion is formed as indentation inside of the recess or as annular border on the base of the recess.
    Type: Grant
    Filed: October 28, 2002
    Date of Patent: May 24, 2005
    Assignee: Osram Opto Semiconductors GmbH
    Inventors: Herbert Brunner, Alexandra Debray, Harald Jāger, Günther Waitl
  • Patent number: 6881812
    Abstract: This invention provides a latent catalyst having a structure of phosphonium borate consisting of a monovalent cation portion in which four specific groups are bonded to the phosphorus atom and a monovalent anion portion in which four specific groups are bonded to the boron atom, and a latent catalyst having a structure wherein the above phosphonium borate is the recurring unit and at least two of said recurring unit are connected through at least one of the four specific groups bonded to the boron atom. This invention also provides a thermosetting resin composition comprising such a latent catalyst and an epoxy resin molding material comprising such a latent catalyst and further provides a semiconductor device in which a semiconductor is encapsulated with said epoxy resin molding material.
    Type: Grant
    Filed: December 17, 2002
    Date of Patent: April 19, 2005
    Assignee: Sumitomo Bakelite Company, Ltd.
    Inventors: Sumiya Miyake, Akiko Okubo, Hiromi Honda, Yoshiyuki Go, Hiroshi Nagata, Minoru Kobayashi
  • Patent number: 6882050
    Abstract: A semiconductor device having bump electrodes electrically connected to connection pads formed on a semiconductor chip of the semiconductor device, tips of the bump electrodes exposing at a surface of a sealing resin film formed on a surface of the semiconductor chip, wherein the sealing resin film is comprised of a low-elastic resin layer formed on the surface of the semiconductor chip and a high-elastic resin layer formed on a surface of the low-elastic resin layer and having an elastic coefficient higher than that of the low-elastic resin layer, a thickness of the high-elastic resin layer being between 5 ?m and 45 ?m.
    Type: Grant
    Filed: July 22, 2003
    Date of Patent: April 19, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Yasuo Tanaka
  • Patent number: 6878783
    Abstract: Epoxy resin compositions are disclosed which comprise (A) at least one cycloaliphatic epoxy resin, (B) at least one anhydride curing agent, (C) at least one a boron containing catalyst that is essentially free of halogen, (D) at least one cure modifier, and, optionally (E) at least one ancillary curing catalyst. The encapsulant may also optionally comprise at least one of thermal stabilizers, UV stabilizers, coupling agents, or refractive index modifiers. Also disclosed are packaged solid state devices comprising a package, a chip, and an encapsulant comprising an epoxy resin composition of the invention. A method of encapsulating a solid state device is also provided.
    Type: Grant
    Filed: April 29, 2003
    Date of Patent: April 12, 2005
    Assignee: General Electric Company
    Inventors: Gary William Yeager, Malgorzata Iwona Rubinsztajn
  • Patent number: 6876091
    Abstract: The present invention provides a wiring board in which electronic components are embedded by means of an embedding resin which attains a high mounting density of the electronic components in the wiring board, which exhibits excellent electrical properties such as insulating property, which prevents random reflection of light, and which reduces non-uniformity in color of the resin during curing thereof. The present invention includes a wiring board in which electronic components are embedded by use of an embedding resin having a dielectric constant of less than or equal to about 5 and tan ? of less than or equal to about 0.08. The embedding resin preferably contains carbon black in an amount of less than or equal to about 1.4 mass %. Moreover, the embedding resin preferably contains at least a thermosetting resin and at least one inorganic filler.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: April 5, 2005
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Hiroki Takeuchi, Toshifumi Kojima, Kazushige Obayashi, Hisahito Kashima
  • Patent number: 6873060
    Abstract: The electronic component has a semiconductor chip embedded in a plastic compound. The electronic component is produced by first producing a number of electronic components on a panel and subsequent dicing into single electronic components. The semiconductor chip of this component is disposed on a substrate the includes or is entirely formed of plastic and it is embedded in a plastic package molding compound. The plastic of the substrate has a glass transition temperature range which is lower than the glass transition temperature range of the plastic package molding compound.
    Type: Grant
    Filed: March 25, 2003
    Date of Patent: March 29, 2005
    Assignee: Infineon Technologies AG
    Inventors: Stephan Blaszczak, Martin Reiss