With Heterojunction Patents (Class 257/85)
  • Patent number: 7375378
    Abstract: A photovoltaic device comprising a photovoltaic cell is provided. The photovoltaic cell includes an emitter layer comprising a crystalline semiconductor material and a lightly doped crystalline substrate disposed adjacent the emitter layer. The lightly doped crystalline substrate and the emitter layer are oppositely doped. Further, the photovoltaic device includes a back surface passivated structure coupled to the photovoltaic cell. The structure includes a highly doped back surface field layer disposed adjacent the lightly doped crystalline substrate. The highly doped back surface field layer includes an amorphous or a microcrystalline semiconductor material, wherein the highly doped back surface field layer and the lightly doped crystalline substrate are similarly doped, and wherein a doping level of the highly doped back surface field layer is higher than a doping level of the lightly doped crystalline substrate.
    Type: Grant
    Filed: May 12, 2005
    Date of Patent: May 20, 2008
    Assignee: General Electric Company
    Inventors: Venkatesan Manivannan, Abasifreke Udo Ebong, Jiunn-Ru Jeffrey Huang, Thomas Paul Feist, James Neil Johnson
  • Patent number: 7355212
    Abstract: An InGaN active layer is formed on a sapphire substrate. A p-side electrode is formed on the InGaN active layer to supply an electric current to this InGaN active layer. The p-side electrode includes {circle around (1)} an Ni layer for forming an ohmic contact with a p-GaN layer, {circle around (2)} an Mo layer having a barrier function of preventing diffusion of impurities, {circle around (3)} an Al layer as a high-reflection electrode, {circle around (4)} a Ti layer having a barrier function, and {circle around (5)} an Au layer for improving the contact with a submount on a lead frame. The p-side electrode having this five-layered structure realizes an ohmic contact and high reflectance at the same time.
    Type: Grant
    Filed: May 4, 2005
    Date of Patent: April 8, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Haruhiko Okazaki, Hideto Sugawara
  • Patent number: 7352008
    Abstract: The present invention relates to a field effect transistor having heterostructure with a buffer layer or substrate. A channel is arranged on the buffer layer or on the substrate, and a capping layer is arranged on the channel. The channel consists of a piezopolar material and either the region around the boundary interface between the buffer layer or substrate and channel or the region around the boundary interface between the channel and capping layer is doped in a manner such that the piezocharges occurring at the respective boundary interface are compensated.
    Type: Grant
    Filed: June 1, 2001
    Date of Patent: April 1, 2008
    Assignee: Microgan GmbH
    Inventors: Erhard Kohn, Ingo Daumiller, Markus Kamp, Matthias Seyboth
  • Patent number: 7329942
    Abstract: An array-type modularized light-emitting diode structure and a method for packaging the structure. The array-type modularized light-emitting diode structure includes a lower substrate and an upper substrate fixed on the lower substrate. A material with high heat conductivity is selected as the material of the upper substrate. The upper substrate is formed with multiple arrayed dents and through holes on the bottom of each dent. A material with high heat conductivity is selected as the material of the lower substrate. The surface of the lower substrate is formed with a predetermined circuit layout card. The bottom face of the upper substrate is placed on the upper face of the lower substrate with the through holes of the dents respectively corresponding to the contact electrodes of the circuit layout card of the lower substrate. Multiple light-emitting diode crystallites are respectively fixed on the bottoms of the dents.
    Type: Grant
    Filed: May 18, 2005
    Date of Patent: February 12, 2008
    Inventors: Ching-Fu Tsou, I-Ju Chen, Yeh-Chin Chao
  • Patent number: 7326963
    Abstract: An improved nitride-based light emitting heterostructure is provided. The nitride-based light emitting heterostructure includes an electron supply layer and a hole supply layer with a light generating structure disposed there between. The light generating structure includes a set of barrier layers, each of which has a graded composition and a set of quantum wells, each of which adjoins at least one barrier layer. Additional features, such as a thickness of each quantum well, can be selected/incorporated into the heterostructure to improve one or more of its characteristics. Further, one or more additional layers that include a graded composition can be included in the heterostructure outside of the light generating structure. The graded composition layer(s) cause electrons to lose energy prior to entering a quantum well in the light generating structure, which enables the electrons to recombine with holes more efficiently in the quantum well.
    Type: Grant
    Filed: December 2, 2005
    Date of Patent: February 5, 2008
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Remigijus Gaska, Jianping Zhang, Michael Shur
  • Patent number: 7326965
    Abstract: A surface-emitting type device includes a substrate including a first face, a second face that is tilted with respect to the first face and has a plane index different from a plane index of the first face, and a third face that is tilted with respect to the second face and has a plane index equal to the plane index of the first face, an emission section formed above the first face, and a rectification section formed above each of the second face and the third face, wherein the emission section includes a first semiconductor layer of a first conductivity type, an active layer formed above the first semiconductor layer, and a second semiconductor layer of a second conductivity type formed above the active layer, the rectification section includes a first semiconductor layer of the second conductivity type formed above the second face, and a second semiconductor layer of the first conductivity type formed continuously with the first semiconductor layer above the third face, at least a portion of the first semico
    Type: Grant
    Filed: February 1, 2006
    Date of Patent: February 5, 2008
    Assignee: Seiko Epson Corporation
    Inventors: Hajime Onishi, Tetsuo Nishida
  • Patent number: 7312472
    Abstract: In the present invention, (Ti1?xAx)N [in which A is at least one kind of metal selected from the group consisting of Al, Ga, and In] is used as a metal nitride layer, so that a Group III nitride compound semiconductor layer is formed on the metal nitride layer. When a Ti layer is formed between the metal nitride layer having a sufficient thickness and a substrate and the titanium layer is removed, a Group III nitride compound semiconductor device using metal nitride as a substrate can be obtained.
    Type: Grant
    Filed: January 10, 2002
    Date of Patent: December 25, 2007
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Toshiaki Chiyo, Jun Ito, Naoki Shibata
  • Patent number: 7282746
    Abstract: A light emitting diode (LED) and a method are provided for fabricating the a LED with an improved structure for better light emitting efficiency and better light output performance.
    Type: Grant
    Filed: June 8, 2006
    Date of Patent: October 16, 2007
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jeong-wook Lee, Vassili Leniachine, Mi-jeong Song, Suk-ho Yoon, Hyun-soo Kim
  • Patent number: 7279698
    Abstract: The optical modulator may include a strained layer of SiGe to confine carriers in a quantum well. The strained layer of SiGe may be doped with arsenic to provide electrons. The optical modulator may receive an optical signal and modulate the received signal by altering the absorption coefficient of the strained layer of SiGe responsive to an electrical signal. The optical modulator device device may be suitable for use in chip-to-chip and on-chip interconnections.
    Type: Grant
    Filed: December 31, 2003
    Date of Patent: October 9, 2007
    Assignee: Intel Corporation
    Inventor: Donald S. Gardner
  • Patent number: 7271418
    Abstract: The present invention is a semiconductor apparatus for white light generation and amplification, where, under different current bias, white light can be generated steadily and evenly by folding up multi-wavelength quantum wells and by side-injecting a current. And, the white light can be excited out electronically without mingling with a fluorescent powder so that the cost for sealing is reduced. Because the light is directly excited out by electricity to prevent from energy loss during fluorescence transformation, the light generation efficiency of the present invention is far greater than that of the traditional phosphorus mingled with light-emitting diode of white light. Besides, concerning the characteristics of the white light, the spectrum of the white light can be achieved by adjusting the structure and/or the number of the quantum wells while preventing from being limited by the atomic emission lines of the fluorescent powder.
    Type: Grant
    Filed: September 24, 2004
    Date of Patent: September 18, 2007
    Assignee: National Central University
    Inventors: Jin-Wei Shi, Jinn-Kong Sheu
  • Patent number: 7259398
    Abstract: A semiconductor light emitting apparatus is proposed, which has thyristor without increasing number of constituent semiconductor layers, with large degree of freedom of selection of ON voltage.
    Type: Grant
    Filed: October 26, 2004
    Date of Patent: August 21, 2007
    Assignee: Sony Corporation
    Inventor: Yoshifumi Yabuki
  • Patent number: 7259399
    Abstract: Provided are a vertical GaN-based LED and a method of manufacturing the same. The vertical GaN-based LED includes an n-electrode. An AlGaN layer is formed under the n-electrode. An undoped GaN layer is formed under the AlGaN layer to provide a two-dimensional electron gas layer to a junction interface of the AlGaN layer. A GaN-based LED structure includes an n-type GaN layer, an active layer, and a p-type GaN layer that are sequentially formed under the undoped GaN layer. A p-electrode is formed under the GaN-based LED structure. A conductive substrate is formed under the p-electrode.
    Type: Grant
    Filed: July 21, 2006
    Date of Patent: August 21, 2007
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jae Hoon Lee, Hee Seok Choi, Jeong Tak Oh, Su Yeol Lee
  • Publication number: 20070170443
    Abstract: A light generating module includes a light emitting part and a power supplying part. The light emitting part includes a first region and a second region. First and second lights having different wavelengths from each other are generated in each of the first and second regions. The first region is an outermost region of the light emitting part. The power supplying part applies different currents to the first region from the second region to generate the first and second lights having different intensities from each other. Therefore, color uniformity is increased so that an image display quality is improved.
    Type: Application
    Filed: January 22, 2007
    Publication date: July 26, 2007
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sang-Gil LEE, Hyeon-Yonh JANG
  • Patent number: 7214971
    Abstract: A semiconductor light-receiving device has a substrate including upper, middle and lower regions in its front side. A p-type layer on the lower region has a top surface including a portion on a level with the middle region. An electrode covers at least part of the boundary between the portion of the p-type layer and the middle region. An n-type layer on the p-type layer has a top surface including a portion on a level with the upper region. Another electrode covers at least part of the boundary between the portion of the n-type layer and the upper region.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: May 8, 2007
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Minoru Niigaki, Kazutoshi Nakajima
  • Patent number: 7208752
    Abstract: A structure of a gallium nitride light emitting diode has a transparent conductive window layer including a diffusion barrier layer, an ohmic contact layer, and a window layer. By using the added domain contact layer, the diffusion barrier layer and the P-type semiconductor layer of the light emitting diode are put into ohmic contact. And then, the rising of the contact resistivity is barred by applying the diffusion barrier layer to block the diffusion of the window layer from the contact with the domain contact layer so as to lower down the operating voltage and advance the transparency.
    Type: Grant
    Filed: May 7, 2004
    Date of Patent: April 24, 2007
    Assignee: Supernova Optoelectronics Corporation
    Inventors: Mu-Jen Lai, Schang-Jing Hon, Hsueh-Feng Sun, Shih-Ming Yang
  • Patent number: 7196357
    Abstract: The optical semiconductor apparatus includes, on an n-GaAs substrate, a surface-emitting semiconductor laser device and a photodiode integrated on the periphery of the laser device with an isolation region interposed there between. The laser device is composed of an n-DBR mirror, an active region, and a p-DBR mirror and includes a columnar layered structure with its sidewall covered with an insulating film. The photodiode is formed on the substrate and has a circular layered structure wherein an i-GaAs layer and a p-GaAs layer surrounds the laser device with an isolating region interposed between the i-GaAs and p-GaAs layers and the laser device. The diameter of the photodiode is smaller than the diameter of the optical fiber core optically coupled with the optical semiconductor apparatus. Since the laser device and the photodiode are monolithically integrated, the devices do not require optical alignment, and thus, facilitate optical coupling with an optical fiber.
    Type: Grant
    Filed: July 29, 2005
    Date of Patent: March 27, 2007
    Assignee: Sony Corporation
    Inventors: Hironobu Narui, Tomonori Hino, Nobukata Okano, Jugo Mitomo
  • Patent number: 7190076
    Abstract: A GaN layer is formed on a sapphire substrate through an AlN buffer layer and doped with Mg to prepare a laminate (referred to as “GaN substrate”). A metal (Pt and Ni) electrode 50 nm thick is formed on the GaN substrate by (1) vapor deposition after the GaN substrate is heated to a temperature of 300° C. or by (2) vapor deposition while the GaN substrate is left at room temperature. (3) The electrode obtained in (2) is heated to 300° C. in a nitrogen atmosphere. The contact resistance of the electrode obtained in (1) is lower by two or three digits than that of the electrode obtained in (2) or (3). That is, the electric characteristic of the electrode obtained in (1) is improved greatly.
    Type: Grant
    Filed: October 29, 2003
    Date of Patent: March 13, 2007
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Ippei Fujimoto, Tsutomu Sekine, Miki Moriyama, Masanori Murakami, Naoki Shibata
  • Patent number: 7180097
    Abstract: A GaN-based LED structure is provided so that the brightness and lighting efficiency of the GaN-based LED are enhanced effectively. The greatest difference between the GaN-based LEDs according to the invention and the prior arts lies in the addition of a thin layer on top of the p-type contact layer within the traditional structure. The thin layer could be formed using silicon-nitride (SiN), or it could have a superlattice structure made of either SiN and undoped indium-gallium-nitride (InGaN), or SiN and undoped aluminum-gallium-indium-nitride (AlGaInN), respectively. Because of the use of SiN in the thin layer, the surfaces of the GaN-based LEDs would be micro-roughened, and the total internal reflection resulted from the GaN-based LEDs' higher index of refraction than the atmosphere could be avoided. The GaN-based LEDs according to the invention therefore have superior external quantum efficiency and lighting efficiency.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: February 20, 2007
    Assignee: Formosa Epitaxy Incorporation
    Inventors: Liang-Wen Wu, Ru-Chin Tu, Cheng-Tsang Yu, Tzu-Chi Wen, Fen-Ren Chien
  • Patent number: 7180924
    Abstract: The invention provides a semiconductor unit and a semiconductor apparatus having a low electric resistance as a whole, even when the electric resistance of a functional layer or a semiconductor substrate is high. A method of making the semiconductor unit and apparatus is also provided. An electrooptic apparatus and an electronic apparatus are also provided. A semiconductor apparatus includes a predetermined substrate and a semiconductor unit bonded to the substrate. The semiconductor unit includes a highly conductive layer and a functional layer including a semiconductor element.
    Type: Grant
    Filed: May 21, 2003
    Date of Patent: February 20, 2007
    Assignee: Seiko Epson Corporation
    Inventor: Takayuki Kondo
  • Patent number: 7180096
    Abstract: An epitaxial structure for GaN-based LEDs to achieve better reverse withstanding voltage and anti-ESD capability is provided. The epitaxial structure has an additional anti-ESD thin layer on top of the p-type contact layer within traditional GaN-based LEDs, which is made of undoped indium-gallium-nitrides (InGaN) or low-band-gap (Eg<3.4 eV), undoped aluminum-indium-gallium-nitrides (AlInGaN). This anti-ESD thin layer greatly improves the GaN-based LEDs' reverse withstanding voltage and resistivity to ESD, which in turn extends the GaN-based LEDs' operation life significantly.
    Type: Grant
    Filed: October 12, 2004
    Date of Patent: February 20, 2007
    Assignee: Formosa Epitaxy Incorporation
    Inventors: Liang-Wen Wu, Ru-Chin Tu, Cheng-Tsang Yu, Tzu-Chi Wen, Fen-Ren Chien
  • Patent number: 7166869
    Abstract: A nitride semiconductor device has a nitride semiconductor layer structure. The structure includes an active layer of a quantum well structure containing an indium-containing nitride semiconductor. A first nitride semiconductor layer having a band gap energy larger than that of the active layer is provided in contact with the active layer. A second nitride semiconductor layer having a band gap energy smaller than that of the first layer is provided over the first layer. Further, a third nitride semiconductor layer having a band gap energy larger than that of the second layer is provided over the second layer.
    Type: Grant
    Filed: March 16, 2004
    Date of Patent: January 23, 2007
    Assignee: Nichia Corporation
    Inventors: Shuji Nakamura, Shinichi Nagahama, Naruhito Iwasa
  • Patent number: 7166865
    Abstract: There is provided and manufactured, at a low cost and with high yields, a semiconductor light emitting device which allows extraction of light produced in an emitter layer not only from its top surface but also from its side surfaces and which has high luminance. An AlGaInP-based semiconductor light emitting device having a contact layer 8 made of (AlyGa1?y)zIn1?zP (0?y?1, 0<z<1) disposed between an emitter layer 3 and a transparent substrate 2 which is transparent to emission wavelengths from the emitter layer 3.
    Type: Grant
    Filed: October 5, 2004
    Date of Patent: January 23, 2007
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Takahisa Kurahashi, Tetsurou Murakami, Shouichi Ohyama, Hiroshi Nakatsu
  • Patent number: 7167498
    Abstract: A semiconductor electrooptic monolithic component comprising successively a first section capable of emitting light at a first wavelength and including a first active layer, a second section capable of absorbing light at the said first wavelength and including a second active layer, and a third section capable of detecting light at a second wavelength and including a third active layer. The component is characterized in that the second active layer is designed to ensure in the said second section an absorption higher than that which would be allowed by an active layer identical to the said first layer.
    Type: Grant
    Filed: May 14, 2004
    Date of Patent: January 23, 2007
    Assignee: Avanex Corporation
    Inventors: Franck Mallecot, Christine Chaumont, Joël Jacquet, Arnaud Leroy, Antonina Plais, Joe Harari, Didier Decoster
  • Patent number: 7161170
    Abstract: An InGaAs/InAlAs-based avalanche photodetector provides high gain and high bandwidth over a range of operating biases. A graded transition region alleviates the barrier to electron transport from the absorption region to the multiplication region when an operating bias is applied. The graded transition region is a graded bandgap material with a relatively wide bandwidth in the region closer to the multiplication region and a relatively narrow bandgap in the region closer to the absorption region. In another embodiment, a p-type dopant profile is introduced within the absorption layer to produce an electrostatic field which accelerates electrons towards the multiplication region. In another embodiment, a bi-level multiplication region with a wide bandgap ternary layer and a narrower bandgap quarternary layer is provided at an increased thickness to improve gain per unit length.
    Type: Grant
    Filed: December 12, 2003
    Date of Patent: January 9, 2007
    Assignee: TriQuint Technology Holding Co.
    Inventor: Paul Douglas Yoder
  • Patent number: 7157741
    Abstract: A silicon optoelectronic device and an optical transceiver, wherein the silicon optoelectronic device includes an n- or p-type silicon-based substrate and a doped region formed in a first surface of the substrate and doped to an opposite type from that of the substrate. The doped region provides photoelectrical conversion. The silicon optoelectronic device includes a light-emitting device section and a light-receiving device section. These sections use the doped region in common and are formed in the first surface of the substrate. The silicon optoelectronic device has an internal amplifying circuit, can selectively perform emission and detection of light, and can control the duration of emission and detection of light.
    Type: Grant
    Filed: February 25, 2004
    Date of Patent: January 2, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-young Kim, Byoung-lyong Choi, Eun-kyung Lee
  • Patent number: 7154121
    Abstract: A light emitting device includes a micro-reflection structure carrier, which is formed by performing etching process on a carrier, a reflection layer, a light emitting layer, and a transparent adhesive layer, wherein the reflection layer is formed over the micro-reflection structure carrier and adheres to the light emitting layer through the transparent adhesive layer.
    Type: Grant
    Filed: October 29, 2003
    Date of Patent: December 26, 2006
    Assignee: Epistar Corporation
    Inventors: Min-Hsun Hsieh, Wen-Huang Liu
  • Patent number: 7151281
    Abstract: A light-emitting diode (LED) structure with electrostatic discharge (ESD) protection is described. The LED includes a substrate, a patterned semiconductor layer, a first electrode and a second electrode. The patterned semiconductor layer is disposed over the substrate, and is divided into at least a first island structure and a second island structure. The first electrode and the second electrode are connected between the first island structure and the second island structure. A shunt diode is formed by the first electrode, the second electrode and the second island structure. The shunt diode is connected in parallel to the LED with an inverse voltage compared to the LED. In the LED structure of the invention, the first island structure and the second island structure are manufactured simultaneously by the epitaxy procedure. Therefore, the LED could be protected from damage due to electrostatic discharge (ESD).
    Type: Grant
    Filed: September 24, 2004
    Date of Patent: December 19, 2006
    Assignee: South Epitaxy Corporation
    Inventors: Shih-Chang Shei, Jinn-Kong Sheu
  • Patent number: 7148514
    Abstract: The invention relates to a nitride semiconductor LED and a fabrication method thereof. In the LED, a first nitride semiconductor layer, an active region a second nitride semiconductor layer of a light emitting structure are formed in their order on a transparent substrate. A dielectric mirror layer is formed on the underside of the substrate, and has at least a pair of alternating first dielectric film of a first refractivity and a second dielectric film of a second refractivity larger than the first refractivity. A lateral insulation layer is formed on the side of the substrate and the light emitting structure. The LED of the invention effectively collimate undesirably-directed light rays, which may be otherwise extinguished, to maximize luminous efficiency, and are protected by the dielectric mirror layer formed on the side thereof to remarkably improve ESD characteristics.
    Type: Grant
    Filed: June 18, 2004
    Date of Patent: December 12, 2006
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jun Ho Seo, Jong Ho Jang
  • Patent number: 7145180
    Abstract: In the fabricating of a light emitting device, a light emitting layer portion 24 and a current spreading layer 7, respectively composed of a Group III-V compound semiconductor, are stacked on a single crystal substrate. The light emitting layer portion 24 is formed by a metal organic vapor-phase epitaxy process, and the current spreading layer 7, on such light emitting layer portion 24, is formed to have conductivity type of n-type by a hydride vapor-phase epitaxy process.
    Type: Grant
    Filed: July 28, 2003
    Date of Patent: December 5, 2006
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Masayuki Shinohara, Masato Yamada
  • Patent number: 7115908
    Abstract: A semiconductor light emitting device includes a light emitting layer sandwiched between two spacer layers. The difference between the net polarization in at least one of the spacer layers and the net polarization in the light emitting layer is less than in the device with conventional spacer layers, such as GaN spacer layers. The difference between the net polarization in at least one of the spacer layers and the net polarization in the light emitting layer is less than about 0.02 C/m2. In some embodiments, at least one of the spacer layers is a quaternary alloy of aluminum, indium, gallium, and nitrogen.
    Type: Grant
    Filed: January 30, 2004
    Date of Patent: October 3, 2006
    Assignee: Philips Lumileds Lighting Company, LLC
    Inventors: Satoshi Watanabe, Stephen A. Stockman
  • Patent number: 7102185
    Abstract: An interline transfer type image sensing device that can be operated at high speed and with low image smear is described. The device incorporates a refractory metal layer which is used for both a light shield over the vertical charge transfer region and as a wiring layer for low resistance strapping of poly crystalline silicon (polysilicon) gate electrodes for the vertical charge transfer region. Plugs provided by a separate metallization layer connect the refractory light shield to the polysilicon gate electrode. These plugs allow high temperature processing after refractory light shield patterning for improved sensor performance without degradation of the polysilicon gate electrode or the refractory lightshield layer.
    Type: Grant
    Filed: June 21, 2004
    Date of Patent: September 5, 2006
    Assignee: Eastman Kodak Company
    Inventors: David N. Nichols, David L. Losee, Christopher Parks
  • Patent number: 7053415
    Abstract: A monolithically integrated VCSEL and photodetector, and a method of manufacturing the same, are disclosed for applications where the VCSEL and photodetector require separate operation such as duplex serial data communications applications. A first embodiment integrates a VCSEL with an MSM photodetector on a semi-insulating substrate. A second embodiment builds layers of a p-i-n photodiode on top of layers forming a VCSEL using a standard VCSEL process. The p-i-n layers are etched away in areas where VCSELs are to be formed and left where photodetectors are to be formed. The VCSELs underlying the photodetectors are inoperable, and serve to recirculate photons which are not initially absorbed back into the photodetector. The transmit and receive pairs are packaged into a single package for interface to multifiber ferrules. The distance between the devices is precisely defined photolithographically, thereby making alignment easier.
    Type: Grant
    Filed: June 4, 2003
    Date of Patent: May 30, 2006
    Assignee: Optical Communication Products, Inc.
    Inventors: Stanley E. Swirhun, Jeffrey W. Scott
  • Patent number: 7045823
    Abstract: An optical semiconductor device comprises a semiconductor laser (11) including a lower clad layer, an active layer (4), and an upper layer formed in this order, an electroabsorptive modulator (12) including the lower clad, a light absorption layer (6), and the upper clad layer formed in this order, and a separation region (13) provided between the semiconductor laser and the electroabsorptive modulator. The upper clad layer extends from the semiconductor laser through the separation region to the electroabsorptive modulator and up to the side of the separation region.
    Type: Grant
    Filed: October 20, 2003
    Date of Patent: May 16, 2006
    Assignee: Oki Electric Industry Co. Ltd.
    Inventor: Takahito Suzuki
  • Patent number: 7030407
    Abstract: Photon emitter and data transmission device wherein a second resonator is arranged in a direction of emission of a radiation-emitting first resonator in such a way that a quantum dot contained in the second resonator can be excited by energy of radiation emitted by the first resonator. A control unit brings the excitation ground state of the quantum dot into resonance with a prescribed resonator mode of the second resonator.
    Type: Grant
    Filed: December 19, 2003
    Date of Patent: April 18, 2006
    Assignee: Infineon Technologies AG
    Inventor: Peter Michler
  • Patent number: 7030417
    Abstract: The present invention relates to a semiconductor light emitting device comprising a sapphire substrate 11; a u-GaN layer 12 that is formed on top of the substrate 11 and that comprises a plurality of concave portions 121 formed into band-like shapes with predetermined intervals therebetween; a regrown u-GaN layer 13 formed on the u-Ga layer 12; a layered structure that is formed on the u-GaN layer 13 comprises an n-GaN layer 15, an active layer 16, and a p-GaN layer 19; an n-type electrode 24 formed on the n-GaN layer 15 exposed by removing a potion of the layered structure; and a transparent p-type electrode 20 formed on the p-GaN layer 19, wherein the p-type electrode 20 is an emission detection surface, and an air layer S is formed between the bottom surface of the u-GaN layer 13 and the concave portions 121.
    Type: Grant
    Filed: August 4, 2003
    Date of Patent: April 18, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Akihiko Ishibashi, Toshiya Yokogawa, Kiyoshi Ohnaka, Susumu Koike
  • Patent number: 7019325
    Abstract: The invention concerns a superluminescent light emitting diode (SLED) comprising a semiconductor heterostructure forming a PN junction and a waveguide. The semiconductor heterostructure includes a gain region with a contact means for biasing the PN junction so as to produce light emission including stimulated emission from an active zone of the gain region, and in the active zone a plurality of quantum dot layers, each quantum dot layer made up of a plurality of quantum dots and a plurality of adjoining layers, each adjoining layer adjacent to one of said quantum dot layers. The material composition or a deposition parameter of at least two adjoining layers is different. This ensures an enhanced emission spectral width.
    Type: Grant
    Filed: June 16, 2004
    Date of Patent: March 28, 2006
    Assignee: Exalos AG
    Inventors: Lianhe Li, Andrea Fiore, Lorenzo Occhi, Christian Velez
  • Patent number: 7009210
    Abstract: A method and apparatus for a tunable optical spectrum analyzer that can measure the optical spectrum of a demultiplexed DWDM signal are presented. The signal level and Optical Signal to Noise Ratio (OSNR) of an individual channel of the DWDM signal can be obtained from the measured optical spectrum. The device employs a rapid tuning and detection technique to obtain the optical spectrum of the incoming signal. In a preferred embodiment the apparatus is fabricated on a single chip resulting in a compact measurement device. Using the device of the preferred embodiment, single channel OSNR can be determined in as small a time interval as approximately 225 microseconds. Using an array of these devices an entire DWDM mixed signal can be monitored as to OP and OSNR in the same time interval.
    Type: Grant
    Filed: May 9, 2001
    Date of Patent: March 7, 2006
    Assignee: Alphion Corporation
    Inventors: Jithamithra Sarathy, Chinnabbu Ekambaram, David Lidsky, Bharat Dave, Boris Stefanov, Tan B. Thai, Ronald Simprini, Julio Martinez, Gaurav Naik
  • Patent number: 6998285
    Abstract: A charge separation heterojunction structure which uses a fullerene polymer film as a part of its constituent materials and which may be used to produce a solar cellor a light emitting diode superior in durability, physical properties of electrons and economic merits. The heterojunction structure is such a structure in which an electron-donating electrically conductive high-polymer film and an electron-accepting fullerene polymer film are layered between a pair of electrodes at least one of which is light transmitting. In forming the layers, the fullerene polymer film is identified using in particular the Raman and Nexafs methods in combination so that upper layers are formed after identifying the polymer film.
    Type: Grant
    Filed: May 16, 2003
    Date of Patent: February 14, 2006
    Assignee: Sony Corporation
    Inventors: Matthias Ramm, Masafumi Ata
  • Patent number: 6987285
    Abstract: The semiconductor light emitting device includes a semiconductor substrate formed from InP, an active layer, an n-type cladding layer formed from InGaAsP, and a p-type cladding layer formed from InP. The active layer is formed at the upper side of the semiconductor substrate. The n-type cladding layer and the p-type cladding layer are formed so as to hold the active layer therebetween. The semiconductor light emitting device is, given that, a refractive index of the n-type cladding layer is na, and a refractive index of the p-type cladding layer is nb, set so as to be the relationship of na>nb in which the refractive index na of the n-type cladding layer is higher than the refractive index nb of the p-type cladding layer, and due to the distribution of light generated by the active layer being deflected to the n-type cladding layer side, optical loss by intervalence band light absorption at the p-type cladding layer is suppressed, and high-power light output can be obtained.
    Type: Grant
    Filed: October 23, 2003
    Date of Patent: January 17, 2006
    Assignee: Anritsu Corporation
    Inventors: Yasuaki Nagashima, Yoshiharu Shimose, Atsushi Yamada, Tomoyuki Kikugawa
  • Patent number: 6979844
    Abstract: A low-resistance silicon baseplate (11) has formed thereon a buffer layer 12 in the form of an alternating lamination of AlN sublayers (12a) and GaN sublayers (12b). On this buffer layer there are formed an n-type semiconductor region (13) of gallium nitride, an active layer (14) of gallium indium nitride, and a p-type semiconductor region (15) of gallium nitride, in that order. An anode (17) is formed on the p-type semiconductor region (15), and a cathode (18) on the baseplate (11).
    Type: Grant
    Filed: March 21, 2003
    Date of Patent: December 27, 2005
    Assignee: Sanken Electric Co., Ltd.
    Inventors: Tetsuji Moku, Kohji Ohtsuka, Masataka Yanagihara, Masaaki Kikuchi
  • Patent number: 6963086
    Abstract: Disclosed are a semiconductor light emitting device capable of enhancing a light emergence efficiency at a lower light emergence plane of the device by forming an electrode on a halfway area of a tilt crystal plane and a fabrication method thereof. According to this light emitting device, since light emitted by a light emitting region can be efficiently, totally reflected and a current can be injected only in a good crystalline region for the reason that the halfway area, on which the electrode is formed, of the tilt crystal plane is better in crystallinity than other regions of the tilt crystal plane, it is possible to enhance both a light emergence efficiency and a luminous efficiency, and hence to enhance the light emergence efficiency by an input current.
    Type: Grant
    Filed: October 10, 2001
    Date of Patent: November 8, 2005
    Assignee: Sony Corporation
    Inventor: Toyoharu Oohata
  • Patent number: 6956240
    Abstract: In an active matrix type light emitting device, a top surface exit type light emitting device in which an anode formed at an upper portion of an organic compound layer becomes a light exit electrode is provided. In a light emitting element made of a cathode, an organic compound layer and an anode, a protection film is formed in an interface between the anode that is a light exit electrode and the organic compound layer. The protection film formed on the organic compound layer has transmittance in the range of 70 to 100%, and when the anode is deposited by use of the sputtering method, a sputtering damage to the organic compound layer can be inhibited from being inflicted.
    Type: Grant
    Filed: October 29, 2002
    Date of Patent: October 18, 2005
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toshimitsu Konuma, Hiroko Yamazaki
  • Patent number: 6946682
    Abstract: A physically robust light emitting diode is disclosed that offers high-reliability in standard packaging and that will withstand high temperature and high humidity conditions. The diode comprises a Group III nitride heterojunction diode with a p-type Group III nitride contact layer, an ohmic contact to the p-type contact layer, and a passivation layer on the ohmic contact. The diode is characterized in that it will emit at at least 50% of its original optical power and remain substantially unchanged in operating voltage after operating for at least 1000 hours at 10 miliamps in the environment of 85% relative humidity at a temperature of 85 C. An LED lamp incorporating the diode is also disclosed.
    Type: Grant
    Filed: March 21, 2003
    Date of Patent: September 20, 2005
    Assignee: Cree, Inc.
    Inventors: David B. Slater, Jr., Gerald H. Negley, John A. Edmond
  • Patent number: 6946687
    Abstract: Recesses interrupt an active layer on a semiconductor chip to improve the coupling out of light. As a result, side faces of the active layer appear, as seen from a light-generating point, at a large solid angle and the paths of light in the active layer are shortened.
    Type: Grant
    Filed: January 10, 2003
    Date of Patent: September 20, 2005
    Assignee: Osram GmbH
    Inventors: Dominik Eisert, Volker Härle, Uwe Strauss, Ulrich Zehnder
  • Patent number: 6927422
    Abstract: A direct-wafer-bonded, double heterojunction, light emitting semiconductor device includes an ordered array of quantum dots made of one or more indirect band gap materials selected from a group consisting of Si, Ge, SiGe, SiGeC, 3C—SiC, and hexagonal SiC, wherein the quantum dots are sandwiched between an n-type semiconductor cladding layer selected from a group consisting of SiC, 3C—SiC, 4H—SiC, 6H—SiC and diamond, and a p-type semiconductor cladding layer selected from a group consisting of SiC, 3C—SiC, 4H—SiC, 6H—SiC and diamond. A Ni contact is provided for the n-type cladding layer. An Al, a Ti or an Al/Ti alloy contact is provided for the p-type cladding layer. The quantum dots have a thickness that is no greater than about 250 Angstroms, a width that is no greater than about 200 Angstroms, and a center-to-center spacing that is in the range of from about 10 Angstroms to about 1000 Angstroms.
    Type: Grant
    Filed: May 6, 2003
    Date of Patent: August 9, 2005
    Assignee: Astralux, Inc.
    Inventor: John Tarje Torvik
  • Patent number: 6917055
    Abstract: An optoelectronic component has at least one light source which is monolithically integrated in a semiconductor material, in particular having a laser diode. At least one photodetector for measuring the light output power is coupled to the light source via an active layer of the light source. At least one active layer or a modulator layer has a multiple quantum well structure formed with at least two quantum well types and/or a quantum dot structure. In the production method the active layer for the light source is first grown on a substrate and a photodetector structure is then grown on the active layer for the light source. The novel optoelectronic component is very compact and can be regulated efficiently.
    Type: Grant
    Filed: January 9, 2003
    Date of Patent: July 12, 2005
    Assignee: Infineon Technologies AG
    Inventor: Bernhard Stegmüller
  • Patent number: 6891214
    Abstract: A semiconductor power module capable of efficiently utilizing the performance of the module and facilitating management of the module in custody. The semiconductor power module having one or more semiconductor power switching elements and a drive unit is provided with a non-volatile memory for storing use history of the module and a drive unit. The use history contains information of one of the number of switching times of the semiconductor power switching element, the number of over-current detections of the semiconductor power switching element and a temperature rise of the semiconductor power module.
    Type: Grant
    Filed: March 13, 2002
    Date of Patent: May 10, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Kazuhisa Mori, Takashi Ikimi, Shuji Katoh, Yutaka Sato
  • Patent number: 6876006
    Abstract: A radiation source (30) is provided comprising a first active layer (42) coupled to a second active layer (62), wherein the first active layer (42) produces primary radiation of frequency v1 by appropriate stimulation, and the primary radiation is converted by the second active layer (62) to secondary radiation of frequency v2 for subsequent output. The coupling between the first and second active layers is achieved by an intermediary layer (58) disposed between the first active layer (42) and the second active layer (62). The radiation source (30) further comprises a p-n junction (48) incorporated in the first active layer (42), where injection of electrical carriers into the first active layer (42) from the p-n junction stimulates the first active layer (42) to emit the primary radiation.
    Type: Grant
    Filed: April 21, 2000
    Date of Patent: April 5, 2005
    Assignee: Schlumberger Technology Corporation
    Inventors: Boris Matveev, Nonna Zotova, Natalia Il'Inskaya, Sergey Karandashov, Maxim Remennyi, Nikolai Stus' , Georgii Talalakin
  • Patent number: 6872982
    Abstract: A GaN layer is grown on a sapphire substrate, an SiO2 film is formed on the GaN layer, and a GaN semiconductor layer including an MQW active layer is then grown on the GaN layer and the SiO2 film using epitaxial lateral overgrowth. The GaN based semiconductor layer is removed by etching except in a region on the SiO2 film, and a p electrode is then formed on the top surface of the GaN based semiconductor layer on the SiO2 film, to join the p electrode on the GaN based semiconductor layer to an ohmic electrode on a GaAs substrate. An n electrode is formed on the top surface of the GaN based semiconductor layer.
    Type: Grant
    Filed: September 19, 2001
    Date of Patent: March 29, 2005
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Nobuhiko Hayashi, Takashi Kano
  • Patent number: 6864510
    Abstract: Provided are a nitride semiconductor field effect transistor (FET) and a method of fabricating the nitride semiconductor FET. The nitride semiconductor FET includes a first semiconductor layer, a second semiconductor layer, a two-dimensional electron gas layer, a T-shaped gate, and a source/drain ohmic electrode. The first semiconductor layer is formed on a substrate. The second semiconductor layer is formed on the first semiconductor layer and has a bandgap energy that is different from the bandgap energy of the first semiconductor layer. The two-dimensional electron gas layer is formed of a hetero-junction of the first semiconductor layer and the second semiconductor layer in an interfacial area between the first semiconductor layer and the second semiconductor layer. The T-shaped gate is formed on the second semiconductor layer and is connected to the second semiconductor layer.
    Type: Grant
    Filed: October 9, 2003
    Date of Patent: March 8, 2005
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Doo Hyeb Youn, Kyu Seok Lee