With Electrical Isolation Means In Integrated Circuit Structure Patents (Class 257/93)
  • Patent number: 8174033
    Abstract: A light emission device includes a plurality of semiconductor light emitting elements and a supporting substrate on which the plurality of semiconductor light emitting elements are flip-chip mounted. Each of the plurality of semiconductor light emitting elements has a substantially rectangular shape which has a first side and a second side different from the first side. Light emitted from a first element end face on the first side is stronger than light emitted from a second element end face on the second side. Each first side of each of the plurality of semiconductor light emitting elements faces each other substantially in parallel.
    Type: Grant
    Filed: April 17, 2008
    Date of Patent: May 8, 2012
    Assignee: Nichia Corporation
    Inventors: Akinori Yoneda, Akiyoshi Kinouchi, Hirofumi Kawaguchi
  • Patent number: 8164104
    Abstract: A light emitting element array including an active layer commonly used for light emitting element regions, carrier injection layers which are electrically isolated from each other and which are provided in the respective light emitting element regions, and a resistive layer which has a resistance higher than that of the carrier injection layers and which is provided between the active layer and the carrier injection layers.
    Type: Grant
    Filed: June 22, 2010
    Date of Patent: April 24, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventor: Tetsuya Takeuchi
  • Publication number: 20120086026
    Abstract: An optoelectronic semiconductor body comprises a substantially planar semiconductor layer sequence having a first and a second main side, which has an active layer suitable for generating electromagnetic radiation. Furthermore, the semiconductor body comprises at least one trench that severs the active layer of the semiconductor layer sequence and serves for subdividing the active of the semiconductor layer sequence into at least two electrically insulated active partial layers. A first and second connection layer arranged on a second main side serve for making contact with the active partial layers. In this case, the first and second connection layers for making contact with the at least two active partial layers are electrically conductively connected to one another in such a way that the active partial layers form a series circuit.
    Type: Application
    Filed: February 25, 2009
    Publication date: April 12, 2012
    Inventors: Karl Engl, Patrick Rode, Lutz Hoeppel, Martin Strassburg
  • Patent number: 8148738
    Abstract: In a semiconductor device 100, a light emitting element 120 has been mounted on an upper plane of a semiconductor substrate 102. In an impurity diffusion region of the semiconductor substrate 102, a P conducting type of a layer 104, and an N layer 106 have been formed, while an N conducting type impurity is implanted to the P layer 104, and then the implanted impurity is diffused to constitute the N layer 106. A zener diode 108 made of a semiconductor device has been formed by the P layer 104 and the N layer 106.
    Type: Grant
    Filed: June 15, 2007
    Date of Patent: April 3, 2012
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Kei Murayama, Mitsutoshi Higashi, Naoyuki Koizumi, Yuichi Taguchi, Akinori Shiraishi, Masahiro Sunohara
  • Patent number: 8148746
    Abstract: A semiconductor light emitting device (A1) includes a case (1) and a plurality of semiconductor light emitting elements (3) arranged in the case. The case (1) is formed with a plurality of reflectors (11) each in the form of a truncated cone surrounding a respective one of the semiconductor light emitting elements (3). Current is applied to each of the semiconductor light emitting elements (3) via two wires (6). Each of the wires (6) includes a first end, and a second end opposite to the first end. The first end is connected to the semiconductor light emitting element (3), whereas the second end is located outside the space surrounded by the reflector (11).
    Type: Grant
    Filed: September 27, 2007
    Date of Patent: April 3, 2012
    Assignee: Rohm Co., Ltd.
    Inventor: Masahiko Kobayakawa
  • Patent number: 8143629
    Abstract: An object of the invention is to provide a lighting device which can suppress luminance nonuniformity in a light emitting region when the lighting device has large area. A layer including a light emitting material is formed between a first electrode and a second electrode, and a third electrode is formed to connect to the first electrode through an opening formed in the second electrode and the layer including a light emitting material. An effect of voltage drop due to relatively high resistivity of the first electrode can be reduced by electrically connecting the third electrode to the first electrode through the opening.
    Type: Grant
    Filed: September 22, 2009
    Date of Patent: March 27, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yasuyuki Arai
  • Patent number: 8134164
    Abstract: A semiconductor device and an optical print head, an image forming apparatus that has the semiconductor device are supplied capable of reduce occurrence probability of defect. The semiconductor device is formed by using semiconductor thin film bonded on the substrate, and includes a covering layer that covers at least one part region of the semiconductor thin film and covers at least one part of electroconductive member connecting with the semiconductor thin film.
    Type: Grant
    Filed: February 27, 2009
    Date of Patent: March 13, 2012
    Assignee: Oki Data Corporation
    Inventors: Mitsuhiko Ogihara, Hiroyuki Fujiwara, Tomohiko Sagimori
  • Patent number: 8134163
    Abstract: A semiconductor device having light-emitting diodes (LEDs) formed on a concave textured substrate is provided. A substrate is patterned and etched to form recesses. A separation layer is formed along the bottom of the recesses. An LED structure is formed along the sidewalls and, optionally, along the surface of the substrate between adjacent recesses. In these embodiments, the surface area of the LED structure is increased as compared to a planar surface. In another embodiment, the LED structure is formed within the recesses such that the bottom contact layer is non-conformal to the topology of the recesses. In these embodiments, the recesses in a silicon substrate result in a cubic structure in the bottom contact layer, such as an n-GaN layer, which has a non-polar characteristic and exhibits higher external quantum efficiency.
    Type: Grant
    Filed: October 8, 2008
    Date of Patent: March 13, 2012
    Assignee: Taiwan Semiconductor Manfacturing Co., Ltd.
    Inventors: Chen-Hua Yu, Hung-Ta Lin, Wen-Chih Chiou, Ding-Yuan Chen, Chia-Lin Yu
  • Publication number: 20120056219
    Abstract: Solid state lights (SSLs) including a back-to-back solid state emitters (SSEs) and associated methods are disclosed herein. In various embodiments, an SSL can include a carrier substrate having a first surface and a second surface different from the first surface. First and second through substrate interconnects (TSIs) can extend from the first surface of the carrier substrate to the second surface. The SSL can further include a first and a second SSE, each having a front side and a back side opposite the front side. The back side of the first SSE faces the first surface of the carrier substrate and the first SSE is electrically coupled to the first and second TSIs. The back side of the second SSE faces the second surface of the carrier substrate and the second SSE is electrically coupled to the first and second TSIs.
    Type: Application
    Filed: September 2, 2010
    Publication date: March 8, 2012
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Cem Basceri, Casey Kurth, Kevin Tetz
  • Patent number: 8129727
    Abstract: A semiconductor light emitting device including a second electrode layer; a light emitting unit including a plurality of compound semiconductor layers under one portion of the second electrode layer; a first insulating layer under the other portion of the second electrode; an electrostatic protection unit including a plurality of compound semiconductor layer under the first insulating layer; a first electrode layer electrically connecting the light emitting unit to the electrostatic protection unit; and a wiring layer electrically connecting the electrostatic protection unit to the second electrode layer.
    Type: Grant
    Filed: July 23, 2009
    Date of Patent: March 6, 2012
    Assignee: LG Innotek Co., Ltd.
    Inventor: Hwan Hee Jeong
  • Patent number: 8110835
    Abstract: A light emitting component can include a substrate, a light emitting device supported by the substrate, wherein the light-emitting device has first and second terminals, and a switching element supported by the substrate and having first and second terminals electrically connected to the first and second terminals of the light-emitting device, respectively. The switching element is configured to, at least in part, divert at least some current away from the light emitting device when the switching element is in a closed state. An electrical connection between the first terminal of the switching element and the first terminal of the light emitting device can have a length of less than 5 cm (e.g., less than 2 cm, less than 1 cm, less than 5 mm, less than 1 mm). A current regulator may be supported by a second substrate and can supply current to the light emitting device.
    Type: Grant
    Filed: April 19, 2007
    Date of Patent: February 7, 2012
    Assignee: Luminus Devices, Inc.
    Inventors: Rashmi Kumar, Robert F. Karlicek
  • Patent number: 8110838
    Abstract: Light-emitting devices (e.g., LEDs) and methods associated with such devices are provided. In some embodiments, the device includes a distribution of light-generating portions (including active regions) that are spatially localized and separated (e.g., horizontally or vertically) from one or more patterned light extraction portions. This arrangement can allow light generated by the device to propagate and pass through regions of low absorption (e.g., light-extraction portions) rather than in regions of high absorption (e.g., light-generating portions), which can enhance light emission.
    Type: Grant
    Filed: December 8, 2006
    Date of Patent: February 7, 2012
    Assignee: Luminus Devices, Inc.
    Inventors: Alexander L. Pokrovskiy, Michael Lim, Nikolay I. Nemchuk, Alexei A. Erchak, Milan Singh Minsky
  • Publication number: 20120025230
    Abstract: A three-dimensional LED structure with vertically displaced active-region includes at least two groups of vertically displaced surfaces on a non-planar substrate. The first group of surfaces are separated from the second group of surfaces by a vertical distance in the growth direction of the LED structure. The first group of surfaces are connected to the second group of surfaces by sidewalls, respectively. The sidewalls can be inclined or vertical and have a sufficient height so that a layer such as an n-type layer, an active-region, or a p-type layer in a first LED structure deposited on the first group of surfaces and a corresponding layer such as an n-type layer, an active-region, or a p-type layer in a second LED structure deposited on the second group of surfaces are separated by the sidewalls. The two groups of surfaces may be vertically displaced from each other in certain areas of an LED chip, while merge into an integral surface in other areas.
    Type: Application
    Filed: July 30, 2010
    Publication date: February 2, 2012
    Applicant: InvenLux CORPORATION
    Inventors: CHUNHUI YAN, JIANPING ZHANG, YING LIU, FANGHAI ZHAO, KEVIN MA
  • Publication number: 20120025231
    Abstract: LED layers are grown over a sapphire substrate. Individual flip chip LEDs are formed by trenching or masked ion implantation. Modules containing a plurality of LEDs are diced and mounted on a submount wafer. A submount metal pattern or a metal pattern formed on the LEDs connects the LEDs in a module in series. The growth substrate is then removed, such as by laser lift-off. A semi-insulating layer is formed, prior to or after mounting, that mechanically connects the LEDs together. The semi-insulating layer may be formed by ion implantation of a layer between the substrate and the LED layers. PEC etching of the semi-insulating layer, exposed after substrate removal, may be performed by biasing the semi-insulating layer. The submount is then diced to create LED modules containing series-connected LEDs.
    Type: Application
    Filed: October 10, 2011
    Publication date: February 2, 2012
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.
    Inventors: Michael R. Krames, John E. Epler, Daniel A. Steigerwald, Tal Margalith
  • Patent number: 8098699
    Abstract: A semiconductor laser apparatus comprises a first semiconductor laser device that emits a blue-violet laser beam, a second semiconductor laser device that emits a red laser beam, and a conductive package body. The first semiconductor laser device has a p-side pad electrode and an n-side electrode. The p-side pad electrode and n-side electrode of the first semiconductor laser device are electrically isolated from the package body. The p-side pad electrode of the first semiconductor laser device is connected with a drive circuit that generates a positive potential, while the n-side electrode thereof is connected with a dc power supply that generates a negative potential.
    Type: Grant
    Filed: June 17, 2009
    Date of Patent: January 17, 2012
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Daijiro Inoue, Yasuyuki Bessho, Masayuki Hata, Yasuhiko Nomura
  • Patent number: 8089077
    Abstract: A light-emitting element array with the improvement of the light-emitting efficiency and the improvement of the uneven amount of light is provided. A light-emitting element array comprises a light-emitting portion array consisting of a plurality of light-emitting portions linearly arranged in a main scanning direction, and a micro-lens formed on each of the light-emitting portions, wherein the micro-lens has a shape of the length of a sub-scanning direction different from the length of the main scanning direction, and the length of the sub-scanning direction is longer than the length of the main scanning direction, and is 3.5 times or less of the length of the main scanning direction.
    Type: Grant
    Filed: February 21, 2007
    Date of Patent: January 3, 2012
    Assignee: Fuji Xerox Co., Ltd.
    Inventors: Kenjiro Hamanaka, Takahiro Hashimoto
  • Patent number: 8084775
    Abstract: A light source and method for making the same are disclosed. The light source includes a substrate and a light emitting structure that is deposited on the substrate. A barrier divides the light emitting structure into first and second segments that are electrically isolated from one another. A serial connection electrode connects the first segment in series with the second segment. A first blocking diode between the light emitting structure and the substrate prevents current from flowing between the light emitting structure and the substrate when the light emitting structure is emitting light. The barrier extends through the light emitting structure into the first blocking diode.
    Type: Grant
    Filed: March 16, 2010
    Date of Patent: December 27, 2011
    Assignee: Bridgelux, Inc.
    Inventors: Ghulam Hasnain, Steven D. Lester, Syn-Yem Hu, Jeff Ramer
  • Publication number: 20110291131
    Abstract: A mortar-shaped or funnel-shaped light emitting device (50) includes: a substrate (20); at least one LED chip (25) die-bonded to the substrate (20); and a wavelength converting portion (40) covering said at least one LED chip (25); at least four planes uprising from the substrate (20); and a lens having a top surface (10a) facing the substrate (20), the four planes being positioned in four directions, respectively, in such a manner as to surround said at least one LED chip (25), and the top surface (10a) having a concave portion.
    Type: Application
    Filed: February 18, 2010
    Publication date: December 1, 2011
    Inventor: Shin Ito
  • Patent number: 8064872
    Abstract: An integrated circuit having voltage isolation capabilities includes a first area of the integrated circuit containing functional circuitry that is located in the substrate of the integrated circuit. A second area of the integrated circuit contains an integrated RF isolation circuitry for voltage isolating the functional circuitry. The RF isolation circuitry is located in the metal layers of the integrated circuit.
    Type: Grant
    Filed: June 24, 2008
    Date of Patent: November 22, 2011
    Assignee: Silicon Laboratories Inc.
    Inventor: Timothy Dupuis
  • Patent number: 8063407
    Abstract: There is provided a light emitting device that can minimize reflection or absorption of emitted light, maximize luminous efficiency with the maximum light emitting area, enable uniform current spreading with a small area electrode, and enable mass production at low cost with high reliability and high quality. A light emitting device according to an aspect of the invention includes a light emitting lamination including a first conductivity type semiconductor layer, a second conductivity type semiconductor layer, and an active layer, and a conductive substrate at one surface thereof. Here, the light emitting device includes a barrier unit separating the light emitting lamination into a plurality of light emitting regions, a first electrode structure, and a second electrode structure. The first electrode structure includes a bonding unit, contact holes, and a wiring unit connecting the bonding unit to the contact holes.
    Type: Grant
    Filed: April 8, 2010
    Date of Patent: November 22, 2011
    Assignee: Samsung LED Co., Ltd.
    Inventors: Pun Jae Choi, Jin Hyun Lee, Si Hyuk Lee, Seon Young Myoung, Ki Yeol Park
  • Publication number: 20110278608
    Abstract: A monolithic LED chip is disclosed comprising a plurality of junctions or sub-LEDs (“sub-LEDs”) mounted on a submount. The sub-LEDs are serially interconnected such that the voltage necessary to drive the sub-LEDs is dependent on the number of serially interconnected sub-LEDs and the junction voltage of the sub-LEDs. Methods for fabricating a monolithic LED chip are also disclosed with one method comprising providing a single junction LED on a submount and separating the single junction LED into a plurality of sub-LEDs. The sub-LEDs are then serially interconnected such that the voltage necessary to drive the sub-LEDs is dependent on the number of the serially interconnected sub-LEDs and the junction voltage of the sub-LEDs.
    Type: Application
    Filed: July 25, 2011
    Publication date: November 17, 2011
    Inventors: James IBBETSON, Sten HEIKMAN
  • Publication number: 20110254029
    Abstract: An exemplary LED module includes a base, an anisotropic conductive film on the base, multiple LED dies on the anisotropic conductive film, multiple first electrodes between the base and the anisotropic conductive film, and multiple second electrodes on the LED dies. The LED dies are arranged in multiple rows by multiple columns. The first electrodes each are elongated and parallel to each other. The second electrodes each are elongated and parallel to each other. The LED dies of each column are connected to one of the first electrodes electrically. Each second electrode is electrically coupled to the LED dies of one row.
    Type: Application
    Filed: June 17, 2010
    Publication date: October 20, 2011
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: CHIH-CHEN LAI
  • Patent number: 8039831
    Abstract: Described herein is an electronic device provided with an electrode and a region of polymeric material set in contact with the electrode. The electrode has a polysilicon region and a silicide region, which coats the polysilicon region and is arranged, as interface, between the polysilicon region and the region of polymeric material. The polysilicon region is doped with a doping level that is a function of a desired work function at the interface with the region of polymeric material. The electronic device is, for example, a testing device for characterizing the properties of the polymeric material.
    Type: Grant
    Filed: January 30, 2007
    Date of Patent: October 18, 2011
    Inventors: Riccardo Sotgiu, Agostino Pirovano
  • Publication number: 20110248297
    Abstract: Provided is a light-emitting apparatus which can prevent a shadow mask from contacting a light-emitting medium to suppress damage of the medium, by using a conductive layer formed on a device isolation layer as a pressing member for the shadow mask, and can attain more secure conduction between a second electrode and an auxiliary electrode.
    Type: Application
    Filed: June 20, 2011
    Publication date: October 13, 2011
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Naoyuki Ito
  • Patent number: 8035115
    Abstract: A semiconductor apparatus includes a substrate; and a plurality of semiconductor thin films formed on said substrate, each of said semiconductor thin films having a pn-junction, and electrodes of p-type and n-type for injecting carriers to the pn-junction, wherein said semiconductor thin films are formed so that all or a part of said pn-junctions are connected serially. As different from a semiconductor thin film constituted of a single pn-junction, the light emission with the invented semiconductor apparatus is the summation of the light emission intensities of the entire pn-junctions, so that the light emitting intensity can be increased largely.
    Type: Grant
    Filed: May 11, 2006
    Date of Patent: October 11, 2011
    Assignee: Oki Data Corporation
    Inventors: Mitsuhiko Ogihara, Takahito Suzuki, Hiroshi Kurokawa, Taishi Kaneto
  • Publication number: 20110241549
    Abstract: A light generating system comprising: a plurality of solid state emitters (SSEs) and a stability control system for controlling the spectral stability of the SSEs. In a particular case, the stability control system may comprise: a power regulator to regulate power supplied to a sub-set of the plurality of SSEs; a constant current circuit connected to the power regulator to provide a constant current to the sub-set of SSEs; a current regulation set point connected to the constant current circuit; and a controller configured to set the regulation set point based on metrology relating to the state of the SSEs.
    Type: Application
    Filed: March 31, 2011
    Publication date: October 6, 2011
    Applicant: ATS Automation Tooling Systems Inc.
    Inventor: Gerald R. WOOTTON
  • Patent number: 8030669
    Abstract: There is provided a highly reliable semiconductor light emitting device even in using for street lamps or traffic signals, which can be used in place of electric lamps or fluorescent lamps by protecting from surges such as static electricity or the like. A plurality of light emitting units (1) are formed, by forming a semiconductor lamination portion by laminating semiconductor layers on a substrate so as to form a light emitting layer, by electrically separating the semiconductor lamination portion into a plurality, and by providing a pair of electrodes (19) and (20). The light emitting units (1) are respectively connected in series and/or in parallel with wiring films (3). An inductor (8) absorbing surges is connected, in series, to the plurality of light emitting units (1) connected in series between electrode pads (4a) and (4b) connected to an external power source. For an example, the inductor (8) is formed by arranging the plurality of light emitting units (1) in a whirl shape.
    Type: Grant
    Filed: September 12, 2005
    Date of Patent: October 4, 2011
    Assignee: Rohm Co., Ltd.
    Inventors: Yukio Shakuda, Toshio Nishida, Masayuki Sonobe
  • Publication number: 20110233579
    Abstract: A modular package for a light emitting device includes a leadframe having a top surface and including a central region having a bottom surface and having a first thickness between the top surface of the leadframe and the bottom surface of the central region. The leadframe may further include an electrical lead extending away from the central region. The electrical lead has a bottom surface and has a second thickness from the top surface of the leadframe to the bottom surface of the electrical lead. The second thickness may be less than the first thickness. The package further includes a package body on the leadframe surrounding the central region and exposing the bottom surface of the central region. The package body may be at least partially provided beneath the bottom surface of the lead and adjacent the bottom surface of the central region. Methods of forming modular packages and leadframes are also disclosed.
    Type: Application
    Filed: June 6, 2011
    Publication date: September 29, 2011
    Inventors: Ban P. Loh, Bernd Keller, Nicholas W. Medendorp, JR.
  • Patent number: 8022437
    Abstract: One embodiment of the present invention is an organic electroluminescence element having a substrate, a first electrode formed on the substrate, an organic luminescent medium layer which includes an organic luminescent layer and is formed on the first electrode, a second electrode formed on the organic luminescent medium layer and arranged so as to face the first electrode, a first passivation layer formed on the second electrode, an adhesive layer adhered to the substrate and formed so as to cover the first electrode, the organic luminescent medium layer, the second electrode and the first passivation layer, a sealing substrate formed on the adhesive layer and a second passivation layer formed so as to entirely cover the adhesive layer, the sealing substrate and an upper surface of an exposure part of the substrate.
    Type: Grant
    Filed: July 2, 2009
    Date of Patent: September 20, 2011
    Assignee: Toppan Printing Co., Ltd.
    Inventor: Hiroaki Koyama
  • Publication number: 20110215350
    Abstract: Disclosed are a method of fabricating a light emitting device includes the steps of: forming a plurality of compound semiconductor layers on a substrate, the substrate including a plurality of chip regions and isolation region; selectively etching the compound semiconductor layers to form a light emitting structure on each chip region and form a buffer structure on the isolation region; forming a conductive support member on the light emitting structure and the buffer structure; removing the substrate by using a laser lift off process; and dividing the conductive support member into the a plurality of chips of the chip regions, wherein the buffer structure is spaced apart from the light emitting structure.
    Type: Application
    Filed: February 28, 2011
    Publication date: September 8, 2011
    Inventors: June O SONG, Young Kyu Jeong, Kyung Wook Park, Kwang Ki Choi, Da Jeong Song
  • Publication number: 20110210352
    Abstract: A semiconductor light emitting device includes a substrate; a plurality of light emitting cells disposed on the top surface of the substrate, the light emitting cells each having an active layer; a plurality of connection parts formed on the substrate with the light emitting cells formed thereon to connect the light emitting cells in a parallel or series-parallel configuration; and an insulation layer formed on the surface of the light emitting cell to prevent an undesired connection between the connection parts and the light emitting cell. The light emitting cells comprise at least one defective light emitting cell, and at least one of the connection parts related to the defective light emitting cell is disconnected.
    Type: Application
    Filed: February 24, 2011
    Publication date: September 1, 2011
    Inventors: Su Yeol LEE, Yong Tae KIM, Jin Bock LEE, Gi Bum KIM
  • Patent number: 7998761
    Abstract: The present invention relates to a light emitting diode with enhanced luminance and light emitting performance due to increase in efficiency of current diffusion into an ITO layer, and a method of fabricating the light emitting diode. According to the present invention, there is manufactured at least one light emitting cell including an N-type semiconductor layer, an active layer and a P-type semiconductor layer on a substrate. The method of the present invention comprises the steps of (a) forming at least one light emitting cell with an ITO layer formed on a top surface of the P-type semiconductor layer; (b) forming a contact groove for wiring connection in the ITO layer through dry etching; and (c) filling the contact groove with a contact connection portion made of a conductive material for the wiring connection.
    Type: Grant
    Filed: December 8, 2006
    Date of Patent: August 16, 2011
    Assignee: Seoul Opto Device Co., Ltd.
    Inventors: Dae Won Kim, Yeo Jin Yoon, Duck Hwan Oh, Jong Hwan Kim
  • Patent number: 7994514
    Abstract: One or more circuit elements such as silicon diodes, resistors, capacitors, and inductors are disposed between the semiconductor structure of a semiconductor light emitting device and the connection layers used to connect the device to an external structure. In some embodiments, the n-contacts to the semiconductor structure are distributed across multiple vias, which are isolated from the p-contacts by one or more dielectric layers. The circuit elements are formed in the contacts-dielectric layers-connection layers stack.
    Type: Grant
    Filed: April 21, 2006
    Date of Patent: August 9, 2011
    Assignees: Koninklijke Philips Electronics N.V., Philips Lumileds Lighting Company, LLC
    Inventors: Jérôme C. Bhat, Steven T. Boles
  • Patent number: 7989822
    Abstract: This invention details how a low cost opto coupler can be made on Silicon On Insulator (SOI) using conventional integrated circuit processing methods. Specifically, metal and deposited insulating materials are use to realize a top reflector for directing light generated by a silicon PN junction diode to a silicon PN junction photo diode detector. The light generator or LED can be operated either in the avalanche mode or in the forward mode. Also, side reflectors are described as a means to contain the light to the LED-photo detector pair. Furthermore, a serpentine junction PN silicon LED is described for the avalanche mode of the silicon LED. For the forward mode, two LED structures are described in which hole and electrons combine in lightly doped regions away from heavily doped regions thereby increasing the LED conversion efficiency.
    Type: Grant
    Filed: November 10, 2008
    Date of Patent: August 2, 2011
    Inventor: Eugene Robert Worley
  • Patent number: 7985977
    Abstract: Briefly, in accordance with one or more embodiments, a dielectric platform is at least partially formed in a semiconductor substrate and extending at least partially below a surface of a semiconductor substrate. The dielectric platform may include structural pillars formed by backfilling a first plurality of cavities etched in the substrate, and a second plurality of cavities formed by etching away sacrificial pillars disposed between the structural pillars. The second plurality of cavities may be capped to hermetically seal the second plurality of cavities to impart the dielectric constant of the material contained therein, for example air, to the characteristic dielectric constant of the dielectric platform. Alternatively, the second plurality of cavities may be backfilled with a material having a lower dielectric constant than the substrate, for example silicon dioxide where the substrate comprises silicon.
    Type: Grant
    Filed: December 9, 2008
    Date of Patent: July 26, 2011
    Assignee: HVVi Semiconductors, Inc.
    Inventors: Bishnu Prasanna Gogoi, David William Wolfert, Jr.
  • Patent number: 7968358
    Abstract: A method of manufacturing an imaging array includes providing a silicon tile having a first surface and a second, opposite surface. A buried dielectric layer is formed in the silicon tile between the first and second surfaces to define a bottom silicon layer between the first surface and the dielectric layer. A separation boundary is formed in the silicon tile between the second surface and the dielectric layer to define a top silicon layer between the dielectric layer and the separation boundary and a removable silicon layer between the separation boundary and the second surface. An oxide layer is formed on the first surface of the silicon tile and the silicon tile is bonded to a glass substrate at the oxide layer. The silicon tile is separated at the separation boundary to remove the removable silicon layer, exposing the top silicon layer. Semiconductive elements are formed using the exposed top silicon layer.
    Type: Grant
    Filed: July 29, 2009
    Date of Patent: June 28, 2011
    Assignee: Carestream Health, Inc.
    Inventors: Timothy J. Tredwell, Jackson Lai
  • Patent number: 7964883
    Abstract: In accordance with the invention, a light emitting diode package assembly is provided to emulate the pattern of light produced by an incandescent filament bulb. The package assembly is composed of a substrate for LEDs comprising a heat-sinking base having a pair of opposing major surfaces. Each major surface has an overlying of thermally conducting ceramic and an outer surface layer of light reflective material. Disposed on each surface layer is a plurality of LEDs. Advantageously, the LEDs are arranged on the surface in a configuration of low mutual obstruction. Advantageously, reflecting elements transverse to each surface layer are positioned and shaped to reflect a substantial portion of the light emitted from the LEDs that would otherwise enter neighboring LEDs. In a preferred embodiment, the LEDs are arranged in the general form of a closed curve, and a transverse reflector is disposed in the interior of the curve. Alternatively, the LEDs can be arranged in a linear array.
    Type: Grant
    Filed: February 26, 2004
    Date of Patent: June 21, 2011
    Assignee: Lighting Science Group Corporation
    Inventors: Joseph Mazzochette, Edmar Amaya, Lin Li, Greg E. Blonder
  • Patent number: 7964870
    Abstract: To provide a display device capable of reliably forming a resistive element formed on a substrate including pixels. A display device including at least a thin-film transistor and a resistive element on a substrate has a gate electrode, an insulating film, a semiconductor layer and a conductive layer which are sequentially stacked on the substrate, in which the resistive element is formed by using the semiconductor layer formed between end portions of wiring made of the conductive layer as a resistive body, and at least one conductive layer apart from the end portions is formed on the semiconductor layer between the end portions of wiring.
    Type: Grant
    Filed: June 2, 2008
    Date of Patent: June 21, 2011
    Assignee: Panasonic Liquid Crystal Display Co., Ltd.
    Inventors: Tsuyoshi Uchida, Hiroshi Katayanagi
  • Patent number: 7960743
    Abstract: The invention relates to a broad-band light emitting diode having an active layer composed of a plurality of light emission regions of differing materials for emitting light at a plurality of wavelengths, wherein each of the emission regions of the active layer is electrically controlled by a separate electrode for providing a broad-band emission or optical gain with a multi-point control of its spectral profile.
    Type: Grant
    Filed: December 5, 2008
    Date of Patent: June 14, 2011
    Assignee: JDS Uniphase Corporation
    Inventor: Pierre Doussiere
  • Publication number: 20110133229
    Abstract: A light emitting diode (LED) structure and a LED packaging structure are disclosed. The LED structure includes a sub-mount, a stacked structure, an electrode, an isolation layer and a conductive thin film layer. The sub-mount has a first surface and a second surface opposite the first surface. The stacked structure has a first semiconductor layer, an active layer and a second semiconductor layer that are laminated on the first surface. The electrode is disposed apart from the stacked structure on the first surface. The isolation layer is disposed on the first surface to surround the stacked structure as well as cover the lateral sides of the active layer. The conductive thin film layer connects the electrode to the stacked structure and covers the stacked structure.
    Type: Application
    Filed: December 29, 2010
    Publication date: June 9, 2011
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yao-Jun Tsai, Chen-Peng Hsu, Hung-Lieh Hu, Ji-Feng Chen
  • Patent number: 7956368
    Abstract: An LED bare chip which is one type of a semiconductor light emitting device (2) includes a multilayer epitaxial structure (6) composed of a p-GaN layer (12), an InGaN/GaN MQW light emitting layer (14) and an n-GaN layer (16). A p-electrode (18) is formed on the p-GaN layer (12), and an n-electrode (20) is formed on the n-GaN layer (16). An Au plating layer (4) is formed on the p-electrode (18). The Au plating layer (4) supports the multilayer epitaxial structure (6) and conducts heat generated in the light emitting layer (14). The Au plating layer (4) is electrically divided into two portions by a polyimide member (10). One of the two portions (4A) is connected to the p-electrode (18), to be constituted as an anode power supply terminal, and the other portion (4K) is connected to the n-electrode (20) by a wiring (22), to be constituted as a cathode power supply terminal.
    Type: Grant
    Filed: September 29, 2009
    Date of Patent: June 7, 2011
    Assignee: Panasonic Corporation
    Inventors: Hideo Nagai, Tetsuzo Ueda, Masaaki Yuri
  • Patent number: 7952112
    Abstract: A submount for red, green, and blue LEDs is described where the submount has thermally isolated trenches and/or holes in the submount so that the high heat generated by the green/blue AlInGaN LEDs is not conducted to the red AlInGaP LEDs. The submount contains conductors to interconnect the LEDs in a variety of configurations. In one embodiment, the AlInGaP LEDs are recessed in the submount so all LEDs have the same light exit plane. The submount may be used for LEDs generating other colors, such as yellow, amber, orange, and cyan.
    Type: Grant
    Filed: April 29, 2005
    Date of Patent: May 31, 2011
    Assignee: Philips Lumileds Lighting Company LLC
    Inventor: Franklin J. Wall, Jr.
  • Patent number: 7947993
    Abstract: Disclosed is a light emitting device having an isolating insulative layer for isolating light emitting cells from one another and a method of fabricating the same. The light emitting device comprises a substrate and a plurality of light emitting cells formed on the substrate. Each of the light emitting cells includes a lower semiconductor layer, an upper semiconductor layer positioned on one region of the lower semiconductor layer, and an active layer interposed between the lower and upper semiconductor layers. Furthermore, an isolating insulative layer is filled in regions between the plurality of light emitting cells to isolate the light emitting cells from one another. Further, wirings electrically connect the light emitting cells with one another. Each of the wirings connects the lower semiconductor layer of one light emitting cell and the upper semiconductor layer of another light emitting cell adjacent to the one light emitting cell.
    Type: Grant
    Filed: December 18, 2006
    Date of Patent: May 24, 2011
    Assignee: Seoul Opto Device Co., Ltd.
    Inventors: Dae Won Kim, Dae Sung Kal
  • Patent number: 7947894
    Abstract: In the solar battery module 20, solar battery cells 10 arranged in a matrix of eight rows and four columns with their conducting direction aligned and five plate spring members 22 having nearly an inverted U-shaped cross-section are housed in an inner space surrounded by a support substrate 21, an outer frame, a rubber packing frame, and a glass casing plate 25, and the plate spring members 22 each have a pair of connection flanges 22a at the bottom. The plate spring members 22 are provided on either side of columns of multiple solar battery cells 10. Eight solar battery cells 10 are interposed between the connection flanges 22a of the plate spring members on either side of them, whereby they are parallel-connected. Four columns of solar battery cells 10 are serially-connected by five plate spring members 22 and the output is retrieved through the positive electrode coating 28 and negative electrode coating 29.
    Type: Grant
    Filed: February 6, 2006
    Date of Patent: May 24, 2011
    Assignee: Kyosemi Corporation
    Inventor: Josuke Nakata
  • Patent number: 7939839
    Abstract: A light source and method for making the same are disclosed. The light source includes a substrate, and a light emitting structure that is divided into segments. The light emitting structure includes a first layer of semiconductor material of a first conductivity type deposited on the substrate, an active layer overlying the first layer, and a second layer of semiconductor material of an opposite conductivity type from the first conductivity type overlying the active layer. A barrier divides the light emitting structure into first and second segments that are electrically isolated from one another. A serial connection electrode connects the first layer in the first segment to the second layer in the second segment. A power contact is electrically connected to the second layer in the first segment, and a second power contact electrically connected to the first layer in the second segment.
    Type: Grant
    Filed: September 11, 2008
    Date of Patent: May 10, 2011
    Assignee: Bridgelux, Inc.
    Inventor: Ghulam Hasnain
  • Patent number: 7939838
    Abstract: A semiconductor light emitting device includes a semiconductor layer having a recess extending downwardly from a top surface thereof along a pattern of a closed line so that said recess defines and encloses a region of the semiconductor layer that emits light, said semiconductor layer having a downward slope in at least a portion of its side end face located outside the closed line pattern of said recess; a first electrode on said downward slope of the side end face of the semiconductor layer and electrically in contact with a portion of said semiconductor layer, wherein said first electrode downwardly reflects light that is emitted by said semiconductor layer and that reaches the first electrode; and a second electrode electrically in contact with a portion of said semiconductor layer located inside the closed line pattern of said recess.
    Type: Grant
    Filed: November 30, 2006
    Date of Patent: May 10, 2011
    Assignee: Stanley Electric Co., Ltd.
    Inventors: Shinichi Tanaka, Naochica Horio, Munehiro Kato, Satoshi Tanaka
  • Publication number: 20110101390
    Abstract: An optoelectronic semiconductor body comprises a semiconductor layer sequence which is subdivided into at least two electrically isolated subsegments. The semiconductor layer sequence has an active layer in each subarea. Furthermore, at least three electrical contact pads are provided. A first line level makes contact with a first of the at least two subsegments and with the first contact pad. A second line level makes contact with the second of the at least two subsegments and with a second contact pad. A third line level connects the two subsegments to one another and makes contact with the third contact pad. Furthermore, the line levels are each arranged opposite a first main face, wherein the first main face is intended to emit electromagnetic radiation that is produced.
    Type: Application
    Filed: February 25, 2009
    Publication date: May 5, 2011
    Applicant: OSRAM Opio Semiconductors GmbH
    Inventors: Karl Engl, Frank Singer, Patrick Rode, Lutz Hoppel, Martin Strassburg
  • Publication number: 20110089443
    Abstract: A packaging structure of AC LEDs is provided, which comprises: a carrier containing a positive electrode connecting end, and a negative electrode connecting end; an AC LED module disposed on the carrier, wherein the AC LED module electrically connects to the positive electrode connecting end and the negative electrode connecting end of the carrier; and a die-bonding insulating layer disposed between the AC LED module and the carrier.
    Type: Application
    Filed: June 22, 2010
    Publication date: April 21, 2011
    Applicant: Forward Electronics Co., Ltd.
    Inventor: Hui-Wen Hsu
  • Publication number: 20110089444
    Abstract: A light emitting element includes a carrier, a conductive connecting structure disposed on the carrier, an epitaxial stack structure including at least a first lighting stack and a second lighting stack disposed on the conductive connecting structure, an insulation section disposed between the epitaxial stack structure and the conductive connecting structure, and at least a metal line laid on the surface of the light emitting element, wherein the first light emitting stack further includes two electrodes having different polarity formed thereon; the second lighting stack is electrically connected to the conductive connecting structure at the bottom thereof and includes an electrode formed thereon. The insulation section is disposed below the first lighting stack to make the first lighting stack be insulated from the conductive connecting structure. The metal lines and the conductive connecting structure are electrically connected to each of the lighting stacks in parallel connection or series connection.
    Type: Application
    Filed: December 27, 2010
    Publication date: April 21, 2011
    Applicant: EPISTAR CORPORATION
    Inventors: Chiu-Lin Yao, Min-Hsun Hsieh, Wen-Huang Liu
  • Patent number: 7928450
    Abstract: A pixel structure is disclosed. The pixel structure includes a substrate, a first data line having at least one end formed on the substrate, a first insulation layer overlying the first data line and exposing a part of the end of the first data line, a shielding electrode disposed on the first insulation layer and overlapped with the first data line, a second data line formed on the first insulation layer and electrically connected to the exposed end of the first data line, a second insulation layer overlying the shielding electrode and the second data line, and a pixel electrode formed on the second insulation layer and overlapped with the shielding electrode. The invention also provides a method for fabricating the pixel structure.
    Type: Grant
    Filed: March 28, 2007
    Date of Patent: April 19, 2011
    Assignee: Au Optronics Corp.
    Inventors: Hsiang-Lin Lin, Liu-Chung Lee, Kuo-Yu Huang