With Heterojunction Patents (Class 257/94)
  • Patent number: 10217914
    Abstract: A semiconductor light emitting device includes: a light emitting structure including a first conductivity-type semiconductor layer and a second conductivity-type semiconductor layer respectively providing a first surface and a second surface, opposite to each other, of the light emitting structure, and an active layer interposed between the first conductivity-type semiconductor layer and the second conductivity-type semiconductor layer, a region of the first conductivity-type semiconductor layer being open toward the second surface, and the first surface having a concavo-convex portion disposed thereon; a first electrode and a second electrode disposed on the region of the first conductivity-type semiconductor layer and a region of the second conductivity-type semiconductor layer, respectively; a transparent support substrate disposed on the first surface of the light emitting structure; and a transparent adhesive layer disposed between the first surface of the light emitting structure and the transparent sup
    Type: Grant
    Filed: May 24, 2016
    Date of Patent: February 26, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Nam Goo Cha, Wan Tae Lim, Yong Il Kim, Hye Seok Noh, Eun Joo Shin, Sung Hyun Sim, Hanul Yoo
  • Patent number: 10205060
    Abstract: Disclosed is a semiconductor light emitting device, including: a plurality of semiconductor layers; a non-conductive reflective film coupled to the plurality of the semiconductor layers; and one or more electrodes formed on the non-conductive reflective film and electrically connected to the plurality of semiconductor layers, in which the one or more electrodes respectively include a lower electrode layer for reflecting light generated in the active layer and then passed the non-conductive reflective film, and an upper electrode layer arranged on the lower electrode layer for preventing a foreign material from penetrating into the lower electrode layer.
    Type: Grant
    Filed: February 11, 2015
    Date of Patent: February 12, 2019
    Assignee: SEMICON LIGHT CO., LTD.
    Inventor: Soo Kun Jeon
  • Patent number: 10193096
    Abstract: An organic light-emitting diode (OLED) array substrate and a display apparatus are disclosed. The OLED array substrate includes a plurality of OLEDs. The OLED includes an anode, a light-emitting layer and a cathode which are provided in this order, and further includes an exciton barrier layer which is arranged between the anode and the light-emitting layer and is in contact with the light-emitting layer. A forming material of the light-emitting layer includes a host material and a guest material which is doped in the host material, and the light-emitting layers of the OLEDs are configured for emitting light of a plurality of colors. A forming material of the exciton barrier layer includes a host material of one light-emitting layer that has a maximum highest occupied molecular orbital energy level amongst the host materials of all light-emitting layers.
    Type: Grant
    Filed: November 28, 2014
    Date of Patent: January 29, 2019
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Xinwei Gao, Na Li
  • Patent number: 10177122
    Abstract: Solid-state transducer (“SST”) dies and SST arrays having electrical cross-connections are disclosed herein. An array of SST dies in accordance with a particular embodiment can include a first terminal, a second terminal and a plurality of SST dies coupled between the first and second terminals with at least a pair of the SST dies being coupled in parallel. The plurality of SST dies can individually include a plurality of junctions coupled in series with an interconnection between each individual junction. Additionally, the individual SST dies can have a cross-connection contact coupled to the interconnection. In one embodiment, the array can further include a cross-connection between the cross-connection contacts on the pair of the SST dies.
    Type: Grant
    Filed: October 2, 2015
    Date of Patent: January 8, 2019
    Assignee: Micron Technology, Inc.
    Inventor: Martin F. Schubert
  • Patent number: 10164154
    Abstract: The present invention provides a semiconductor light emitting device with a simple structure and capable of improving light extraction efficiency. The semiconductor light emitting device 1 includes a substrate 2, a metal layer 3 on the substrate 2, a light-transmitting conductive layer 4 on the metal layer 3, an insulation layer 30 on the light-transmitting conductive layer 4, and a III-V semiconductor structure 5 on the insulation layer 30. The III-V semiconductor structure 5 includes a light emitting layer 8, a p-type semiconductor layer 9, and an n-type semiconductor layer 10. A refractive index n1 of a p-type GaP contact layer 11 of the p-type semiconductor layer 9, a refractive index n2 of the insulation layer 30, and a refractive index n3 of the light-transmitting conductive layer 4 satisfy the relation: n1>n2<n3.
    Type: Grant
    Filed: August 1, 2017
    Date of Patent: December 25, 2018
    Assignee: ROHM CO., LTD.
    Inventors: Yohei Ito, Yoichi Mugino
  • Patent number: 10158046
    Abstract: A semiconductor element has a metal protective layer and a metal oxide protective layer formed on the substrate to prevent the Si substrate surface from forming an amorphous layer; and a transition layer to reduce lattice difference between the metal oxide protective layer and the III-V-group buffer layer, thus improving crystal quality of the III-V-group buffer layer. A fabrication method can avoid formation of amorphous layers and cracks surrounding the Si substrate surface. A light-emitting diode (LED) element or a transistor element can be formed by depositing a high-quality multi-layer buffer structure via PVD and forming a GaN, InGaN or AlGaN epitaxial layer thereon.
    Type: Grant
    Filed: May 28, 2017
    Date of Patent: December 18, 2018
    Assignee: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Zhibo Xu, Sheng-wei Chou, Chih-ching Cheng, Xiao Wang
  • Patent number: 10153344
    Abstract: Embodiments of mechanisms for forming dislocations in source and drain regions of finFET devices are provided. The mechanisms involve recessing fins and removing the dielectric material in the isolation structures neighboring fins to increase epitaxial regions for dislocation formation. The mechanisms also involve performing a pre-amorphous implantation (PAI) process either before or after the epitaxial growth in the recessed source and drain regions. An anneal process after the PAI process enables consistent growth of the dislocations in the source and drain regions. The dislocations in the source and drain regions (or stressor regions) can form consistently to produce targeted strain in the source and drain regions to improve carrier mobility and device performance for NMOS devices.
    Type: Grant
    Filed: September 18, 2017
    Date of Patent: December 11, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun Hsiung Tsai, Wei-Yuan Lu, Chien-Tai Chan, Wei-Yang Lee, Da-Wen Lin
  • Patent number: 10147843
    Abstract: A device includes a semiconductor structure comprising a light emitting layer disposed between an n-type region and a p-type region. The semiconductor structure is disposed between a window layer and a light-directing structure. The light-directing structure is configured to direct light toward the window layer; examples of suitable light-directing structures include a porous semiconductor layer and a photonic crystal. An n-contact is electrically connected to the n-type region and a p-contact is electrically connected to the p-type region. The p-contact is disposed in an opening formed in the semiconductor structure.
    Type: Grant
    Filed: July 24, 2008
    Date of Patent: December 4, 2018
    Assignee: LUMILEDS LLC
    Inventors: John Epler, James G. Neff, Oleg B. Shchekin
  • Patent number: 10141485
    Abstract: A lamp for a vehicle includes a light source unit configured to emit light. The light source unit includes a substrate that includes a wiring electrode, a plurality of semiconductor light emitting devices electrically connected to the wiring electrode, a plurality of phosphor layers that respectively cover the plurality of semiconductor light emitting devices and that are configured to convert wavelengths of light, and barrier ribs disposed on the substrate and configured to reflect light, the barrier ribs being interposed between the plurality of semiconductor light emitting devices. A height of each of the barrier ribs exceeds a height of each of the plurality of semiconductor light emitting devices in a thickness direction of the plurality of semiconductor light emitting devices.
    Type: Grant
    Filed: January 31, 2018
    Date of Patent: November 27, 2018
    Assignee: LG Electronics Inc.
    Inventors: Jihwan Hur, Sejoon You, Jongmoo Lee
  • Patent number: 10134956
    Abstract: A light emitting diode includes a support substrate; a light emitting structure including a second semiconductor layer, an active layer, and a first semiconductor layer; at least one groove formed on the lower surface of the light emitting structure; a second electrode located on at least the lower surface of the second semiconductor layer, and electrically connected with the second semiconductor layer; an insulating layer partially covering the second electrode and the lower surface of the light emitting structure, and including at least one opening corresponding to the at least one groove; and a first electrode electrically connected to the first semiconductor layer exposed to the at least one groove, and at least partially covering the insulating layer, wherein the second electrode includes a second contact layer including an ohmic contact layer, and the ohmic contact layer is disposed in the shape of a plurality of islands.
    Type: Grant
    Filed: August 24, 2015
    Date of Patent: November 20, 2018
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Jong Kyun You, Da Hye Kim, Chang Ik Kim
  • Patent number: 10126886
    Abstract: A transparent electrode pattern includes a first electrode including a first lower conductive layer and a first upper conductive layer located on the first lower conductive layer and a second electrode spaced apart from the first electrode and including a second lower conductive layer and a second upper conductive layer positioned on the second lower conductive layer. The first and second lower conductive layers may include a metal nanowire. The first and second upper conductive layers may include a transparent conductive material that is dry-etchable.
    Type: Grant
    Filed: May 15, 2015
    Date of Patent: November 13, 2018
    Assignee: Samsung Display Co., Ltd.
    Inventors: Shin Il Choi, Jae Neung Kim, Su Bin Bae, Yu-Gwang Jeong
  • Patent number: 10121663
    Abstract: A semiconductor device includes a GaN device provided with: a substrate made of a semi-insulating material or a semiconductor; a channel-forming layer including a GaN layer arranged on the substrate; a gate structure in which a gate-insulating film in contact with the GaN layer is arranged on the channel-forming layer, the gate structure having a gate electrode arranged across the gate-insulating film; and a source electrode and a drain electrode that are arranged on the channel-forming layer and on opposite sides interposing the gate structure. The donor element concentration at the interface between the gate-insulating film and the GaN layer and at the lattice position on the GaN layer side with respect to the interface is set to be less than or equal to 5.0×1017 cm?3.
    Type: Grant
    Filed: March 26, 2015
    Date of Patent: November 6, 2018
    Assignee: DENSO CORPORATION
    Inventors: Yoshinori Tsuchiya, Hiroyuki Tarumi, Shinichi Hoshi, Masaki Matsui, Kenji Itoh, Tetsuo Narita, Tetsu Kachi
  • Patent number: 10103516
    Abstract: A semiconductor laser device includes a semiconductor epitaxial structure, an electrode pad layer, and a transparent conductive layer. The semiconductor epitaxial structure includes a first semiconductor layer, a second semiconductor layer, and a light emitting layer. The light emitting layer is disposed between the first semiconductor layer and the second semiconductor layer, and the first semiconductor layer is disposed between the electrode pad layer and the light emitting layer. The transparent conductive layer is disposed between the electrode pad layer and the first semiconductor layer. The first semiconductor layer has a ridged structure on one side away from the light emitting layer. The electrode pad layer has at least one empty area, and an orthogonal projection of the at least one empty area along a direction perpendicular to the light emitting layer is overlapped with at least a portion of an orthogonal projection of the ridged structure along the direction.
    Type: Grant
    Filed: January 18, 2017
    Date of Patent: October 16, 2018
    Assignee: PlayNitride Inc.
    Inventors: Yen-Lin Lai, Jyun-De Wu
  • Patent number: 10084112
    Abstract: A method of fabricating a light emitting diode (LED) includes: sequentially stacking a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer on a substrate; and separating the substrate into unit chips, and at the same time, forming a concavo-convex structure having the shape of irregular vertical lines in a side surface of the unit chip.
    Type: Grant
    Filed: March 24, 2017
    Date of Patent: September 25, 2018
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Kyung Wan Kim, Tae Kyoon Kim, Yeo Jin Yoon, Ye Seul Kim, Sang Hyun Oh, Jin Woong Lee, In Soo Kim
  • Patent number: 10074772
    Abstract: The surface of a light emitting device is roughened to enhance the light extraction efficiency of the surface, but the amount of roughened area is selected to achieve a desired level of light extraction efficiency. Photo-lithographic techniques may be used to create a mask that limits the roughening to select areas of the light emitting surface. Because the amount of roughened area can be precisely controlled, the light extraction efficiency can be precisely controlled, substantially independent of the particular process used to roughen the surface. Additionally, the selective roughening of the surface may be used to achieve a desired light emission output pattern.
    Type: Grant
    Filed: January 3, 2013
    Date of Patent: September 11, 2018
    Assignee: Lumileds LLC
    Inventors: Maciej Benedict, Paul S. Martin, Boris Kharas
  • Patent number: 10050176
    Abstract: An LED die includes a substrate, a pre-growth layer, a first insulating layer and a light emitting structure. The pre-growth layer, the first insulating layer and the light emitting structure are formed on the structure that order. The substrate includes a first electrode, a second electrode and an insulating part. The insulating part is formed between the first electrode and the second electrode. The LED die further includes a second insulating layer and a metal layer which are formed around the pre-growth layer. The present disclosure includes a method for manufacturing the LED die.
    Type: Grant
    Filed: June 6, 2017
    Date of Patent: August 14, 2018
    Assignee: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: Ching-Hsueh Chiu, Ya-Wen Lin, Po-Min Tu, Shih-Cheng Huang
  • Patent number: 10050206
    Abstract: The present specification relates to an organic light emitting diode.
    Type: Grant
    Filed: October 21, 2014
    Date of Patent: August 14, 2018
    Assignee: LG Chem, Ltd.
    Inventors: Jungoh Huh, Dong Hoon Lee
  • Patent number: 10043952
    Abstract: Embodiments of the invention include a semiconductor light emitting device, a first wavelength converting member disposed on a top surface of the semiconductor light emitting device, and a second wavelength converting member disposed on a side surface of the semiconductor light emitting device. The first and second wavelength converting members include different wavelength converting materials.
    Type: Grant
    Filed: March 26, 2013
    Date of Patent: August 7, 2018
    Assignee: LUMILEDS LLC
    Inventors: Kenneth Vampola, Han Ho Choi
  • Patent number: 10026875
    Abstract: In a light-source device (10) of this invention, integrated light emission intensity from 460 nm to 500 nm is higher than integrated light emission intensity from 415 nm to 460 nm in an emission spectrum of white light. This allows provision of a light-source device which emits white light easy on a human eye.
    Type: Grant
    Filed: June 16, 2014
    Date of Patent: July 17, 2018
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hiroaki Onuma, Tomokazu Nada, Yuta Homma, Toshio Hata
  • Patent number: 10026757
    Abstract: A display device includes an array substrate, the bottom conductive lines, the micro light emitting devices, the conductive layers, the upper conductive lines, and a filling material. The bottom conductive lines are present on the array substrate. The conductive layers are respectively present between the micro light emitting devices and the bottom conductive lines. The upper conductive lines cross the bottom conductive lines at the micro light emitting devices. Each of the micro light emitting devices is present between at least one of the bottom conductive lines and at least one of the upper conductive lines. The filling material is present on the array substrate and has at least four openings to respectively expose the micro light emitting devices. The upper conductive lines are electrically connected to the micro light emitting devices respectively through the openings.
    Type: Grant
    Filed: March 12, 2017
    Date of Patent: July 17, 2018
    Assignee: MIKRO MESA TECHNOLOGY CO., LTD.
    Inventors: Chun-Yi Chang, Li-Yi Chen
  • Patent number: 10008648
    Abstract: Disclosed is a semiconductor light emitting device, including: a body, which has a bottom part with at least one hole formed therein, a side wall, and a cavity defined by the bottom part and the side wall; a semiconductor light emitting chip, which is placed in each hole and includes plural semiconductor layers adapted to generate light by electron-hole recombination and electrodes electrically connected to the plural semiconductor layers; and an encapsulating member provided at least to the cavity to cover the semiconductor light emitting chip, in which the electrodes of the semiconductor light emitting chip are exposed towards the lower face of the bottom part of the body.
    Type: Grant
    Filed: February 8, 2016
    Date of Patent: June 26, 2018
    Assignee: SEMICON LIGHT CO., LTD.
    Inventors: Eun Hyun Park, Soo Kun Jeon, Kyoung Min Kim, Dong So Jung, Kyeong Jea Woo
  • Patent number: 10008635
    Abstract: Disclosed is a semiconductor light emitting device including: a plurality of semiconductor layers; a non-conductive reflective film which is formed on the plurality of semiconductor layers; and first and second electrodes formed on the non-conductive reflective film, wherein a spacing between the first electrode and the second electrode is 80 ?m or greater, and a ratio of a combined area of the first and second electrodes to a planform area of the semiconductor light emitting device as seen on a top view is 0.7:1 or less.
    Type: Grant
    Filed: June 10, 2015
    Date of Patent: June 26, 2018
    Assignee: SEMICON LIGHT CO., LTD.
    Inventors: Soo Kun Jeon, Il Gyun Choi, Geun Mo Jin
  • Patent number: 9995458
    Abstract: Provided is a ceramic phosphor plate including a first phosphor layer containing a short-wave phosphor in a transparent ceramic matrix and a second phosphor layer containing a long-wave phosphor, thereby enabling the reduction of a production cost by reducing an amount used of the high-priced long-wave phosphor (red phosphor).
    Type: Grant
    Filed: January 12, 2015
    Date of Patent: June 12, 2018
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Jin Gyeong Park, Won Jin Kim, In Jae Lee
  • Patent number: 9997666
    Abstract: The disclosed light emitting device includes an intermediate layer interposed between the light emitting semiconductor structure and the substrate. The light emitting semiconductor structure includes a first conductivity-type semiconductor layer, a second conductivity-type semiconductor layer, and an active layer interposed between the first conductivity-type semiconductor layer and the second conductivity-type semiconductor layer, wherein the active layer has a multi quantum well structure including at least one period of a pair structure of a quantum barrier layer including AlxGa(1-x)N (0<x<1) and a quantum well layer including AlyGa(1-y)N (0<x<y<1), and at least one of the first conductivity-type semiconductor layer and the second conductivity-type semiconductor layer includes AlGaN. The intermediate layer includes AlN and has a plurality of air voids formed in the AlN. At least some of the air voids are irregularly aligned and the number of the air voids is 107 to 1010/cm2.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: June 12, 2018
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Hae Jin Park, Kyoung Hoon Kim, Dong Ha Kim, Kwang Chil Lee, Jae Hun Kim, Hwan Hui Yun
  • Patent number: 9991346
    Abstract: A semiconductor structure includes a buffer layer stack comprising a plurality of III-V material layers, and the buffer layer stack includes at least one layered substructure. Each layered substructure comprises a compressive stress inducing structure between a respective first buffer layer and a respective second buffer layer positioned higher in the buffer layer stack than the respective first buffer layer. A lower surface of the respective second buffer layer has a lower Al content than an upper surface of the respective first buffer layer. An active semiconductor layer of the III-V type is provided on the buffer layer stack. The surface of the respective relaxation layers is sufficiently rough to inhibit the relaxation of the respective second buffer layer, and comprises a Root Mean Square (RMS) roughness larger than 1 nm. A method is provided for producing the semiconductor structure.
    Type: Grant
    Filed: July 22, 2015
    Date of Patent: June 5, 2018
    Assignee: EPIGAN NV
    Inventors: Joff Derluyn, Stefan Degroote
  • Patent number: 9985172
    Abstract: In one embodiment, a light emitting device comprises a first light emitting part including at least one light emitting cell; a second light emitting part including a plurality of light emitting cells, wherein each of the light emitting cells include a light emitting structure and a first electrode layer disposed under the light emitting structure; a plurality of pads disposed on the light emitting cell of the first light emitting part, wherein the pads are electrically connected to each of the light emitting cells of the first and second light emitting parts; a plurality of connection layers, each connection layer extending from a region under the light emitting cell of the first light emitting part to a region under the plurality of light emitting cells of the second light emitting part; a second electrode layer disposed under the light emitting cells of the first and second light emitting parts; an insulating layer disposed between the first and second electrode layers; and at least one gap part disposed be
    Type: Grant
    Filed: June 22, 2015
    Date of Patent: May 29, 2018
    Assignee: LG INNOTEK CO., LTD.
    Inventor: Dae Hee Lee
  • Patent number: 9978904
    Abstract: InGaN-based light-emitting devices fabricated on an InGaN template layer are disclosed.
    Type: Grant
    Filed: October 15, 2013
    Date of Patent: May 22, 2018
    Assignee: Soraa, Inc.
    Inventors: Michael R. Krames, Mark P. D'Evelyn, Akinori Koukitu, Yoshinao Kumagai, Hisashi Murakami
  • Patent number: 9972750
    Abstract: Various embodiments include methods of fabricating light emitting diode (LED) devices, such as nanowire LED devices, that include forming a layer of a transparent, electrically conductive material over at least a portion of a non-planar surface of an LED device, and depositing a layer of a dielectric material over at least a portion of the layer of transparent conductive material, wherein depositing the layer of dielectric material comprises at least one of: (a) depositing the layer using a chemical vapor deposition (CVD) process, (b) depositing the layer at a temperature of 200° C. or more, and (c) depositing the layer using one or more chemically active precursors for the dielectric material.
    Type: Grant
    Filed: December 10, 2014
    Date of Patent: May 15, 2018
    Assignee: GLO AB
    Inventors: Scott Brad Herner, Daniel Bryce Thompson
  • Patent number: 9960353
    Abstract: Embodiments of forming an image sensor with an organic photodiode are provided. The organic photodiode uses dual electron-blocking layers formed next to the anode of the organic photodiode to reduce dark current. By using dual electron-blocking layers, the values of highest occupied molecular orbital (HOMO) for the neighboring anode layer and the organic electron-blocking layer are matched by one of the dual electron-blocking layers to form a photodiode with good performance. The values of the lowest occupied molecular orbital (LOMOs) of the dual electron-blocking layers are selected to be lower than the neighboring anode layer to reduce dark current.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: May 1, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chin-Wei Liang, Hsing-Lien Lin, Cheng-Yuan Tsai, Chia-Shiung Tsai
  • Patent number: 9960319
    Abstract: The surface of a light emitting device is roughened to enhance the light extraction efficiency of the surface, but the amount of roughened area is selected to achieve a desired level of light extraction efficiency. Photo-lithographic techniques may be used to create a mask that limits the roughening to select areas of the light emitting surface. Because the amount of roughened area can be precisely controlled, the light extraction efficiency can be precisely controlled, substantially independent of the particular process used to roughen the surface. Additionally, the selective roughening of the surface may be used to achieve a desired light emission output pattern.
    Type: Grant
    Filed: January 3, 2013
    Date of Patent: May 1, 2018
    Assignee: Lumileds LLC
    Inventors: Maciej Benedict, Paul S. Martin, Boris Kharas
  • Patent number: 9960321
    Abstract: A multi-layered contact to a semiconductor structure and a method of making is described. In one embodiment, the contact includes a discontinuous Chromium layer formed over the semiconductor structure. A discontinuous Titanium layer is formed directly on the Chromium layer, wherein portions of the Titanium layer extend into at least some of the discontinuous sections of the Chromium layer. A discontinuous Aluminum layer is formed directly on the Chromium layer, wherein portions of the Aluminum layer extend into at least some of the discontinuous sections of the Titanium layer and the Chromium layer.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: May 1, 2018
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Michael Shur, Alexander Dobrinsky
  • Patent number: 9954144
    Abstract: This disclosure related to surface mount devices, such as light emitting devices, and methods of manufacture thereof, including recessed contact pads with protruding contact bumps. Embodiments according to the present disclosure include a light emitting device, wherein the device comprises at least a contact pad, such that the contact pad is recessed in relation to a surface of the device. Contact bumps are formed in contact with the contact pads, such that the contact bumps protrude beyond the surface and may contact a surface of a submount that the device is meant to be mounted to. Methods of manufacture including methods utilizing virtual wafer structures are also disclosed.
    Type: Grant
    Filed: January 10, 2014
    Date of Patent: April 24, 2018
    Assignee: CREE, INC.
    Inventors: Chandan Bhat, Theodore Lowes
  • Patent number: 9929154
    Abstract: A fin shaped structure and a method of forming the same. The method includes providing a substrate having a first fin structure and a second fin structure. Next, an insulation material layer is formed on the substrate. Then, a portion of the first fin structure is removed, to form a first recess. Following this, a first buffer layer and a first channel layer are formed sequentially in the first recess. Next, a portion of the second fin structure is removed, to form a second recess. Then, a second buffer layer and a second channel layer are formed in the second recess sequentially, wherein the second buffer layer is different from the first buffer layer.
    Type: Grant
    Filed: November 13, 2014
    Date of Patent: March 27, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Wen-Yin Weng, Cheng-Tung Huang, Wei-Heng Hsu, Yu-Ming Lin, Ya-Ru Yang
  • Patent number: 9923105
    Abstract: A method for fabricating a photonic composite device for splitting functionality across materials comprises providing a composite device having a platform and a chip bonded in the platform. The chip is processed comprising patterning, etching, deposition, and/or other processing steps while the chip is bonded to the platform. The chip is used as a gain medium and the platform is at least partially made of silicon.
    Type: Grant
    Filed: October 8, 2014
    Date of Patent: March 20, 2018
    Assignee: Skorpios Technologies, Inc.
    Inventors: Stephen B. Krasulick, John Dallesasse, Amit Mizrahi, Timothy Creazzo, Elton Marchena, John Y. Spann
  • Patent number: 9917218
    Abstract: The present invention presents a process for preparing a quantum dot array comprising at least the steps of: (a) providing a crystalline semiconductor substrate surface; (b) depositing quantum dots on the said substrate surface by a process of successive ionic layer adsorption and reaction (SILAR). The steps can be repeated to build up a quantum dot superlattice structure.
    Type: Grant
    Filed: February 6, 2014
    Date of Patent: March 13, 2018
    Assignee: TOYOTA MOTOR EUROPE
    Inventors: Sachin Kinge, Enrique Canovas Diaz, Mischa Bonn
  • Patent number: 9911898
    Abstract: Disclosed is an ultraviolet light-emitting device. The light-emitting device includes: an n-type contact layer including a GaN layer; a p-type contact layer including an AlGaN or AlInGaN layer; and an active region of multiple quantum well structure positioned between the n-type contact layer and the p-type contact layer. In addition, the active region of multiple quantum well structure includes a GaN or InGaN layer with a thickness less than 2 nm, radiating an ultraviolet ray with a peak wavelength of 340 nm to 360 nm.
    Type: Grant
    Filed: January 12, 2017
    Date of Patent: March 6, 2018
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Hyo Shik Choi, Jung Hwan Hwang, Chang Suk Han
  • Patent number: 9911908
    Abstract: A light emitting device including a contact layer, a blocking layer over the contact layer, a protection layer adjacent the blocking layer, a light emitter over the blocking layer, and an electrode layer coupled to the light emitter. The electrode layer overlaps the blocking layer and protection layer, and the blocking layer has an electrical conductivity that substantially blocks flow of current from the light emitter in a direction towards the contact layer. In addition, the protection layer may be conductive to allow current to flow to the light emitter or non-conductive to block current from flowing from the light emitter towards the contact layer.
    Type: Grant
    Filed: October 8, 2013
    Date of Patent: March 6, 2018
    Assignee: LG Innotek Co., Ltd.
    Inventors: Kwang Ki Choi, Hwan Hee Jeong, Sang Youl Lee, June O Song
  • Patent number: 9911755
    Abstract: A semiconductor device includes a transistor including an insulating film, an oxide semiconductor film, a gate electrode overlapping with the oxide semiconductor film, and a pair of electrodes in contact with the oxide semiconductor film; a capacitor including a first light-transmitting conductive film over the insulating film, a dielectric film over the first light-transmitting conductive film, and a second light-transmitting conductive film over the dielectric film; an oxide insulating film over the pair of electrodes of the transistor; and a nitride insulating film over the oxide insulating film. The dielectric film is the nitride insulating film, the oxide insulating film has a first opening over one of the pair of electrodes, the nitride insulating film has a second opening over the one of the pair of electrodes, and the second opening is on an inner side than the first opening.
    Type: Grant
    Filed: December 16, 2013
    Date of Patent: March 6, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hiroyuki Miyake, Hideaki Shishido, Masahiro Katayama, Kenichi Okazaki
  • Patent number: 9911903
    Abstract: Systems and methods for improved light emitting efficiency of a solid state transducer (SST), for example light emitting diodes (LED), are disclosed. One embodiment of an SST die in accordance with the technology includes a reflective material disposed over electrical connectors on a front side of the die. The reflective material has a higher reflectivity than a base material of the connectors such that light traveling toward the connectors reflects back out of the device.
    Type: Grant
    Filed: September 19, 2016
    Date of Patent: March 6, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Martin F. Schubert, Vladimir Odnoblyudov
  • Patent number: 9887319
    Abstract: There is herein described light generating electronic components with improved light extraction and a method of manufacturing said electronic components. More particularly, there is described LEDs having improved light extraction and a method of manufacturing said LEDs.
    Type: Grant
    Filed: November 14, 2016
    Date of Patent: February 6, 2018
    Assignee: Oculus VR, LLC
    Inventors: James Ronald Bonar, Zheng Gong, James Small, Gareth John Valentine, Richard I. Laming
  • Patent number: 9876001
    Abstract: A method for producing an optoelectronic semiconductor chip is disclosed. In an embodiment, the method includes providing a semiconductor body with a pixel region including different subpixel regions, each subpixel region having a radiation exit face, applying an electrically conductive layer onto the radiation exit face of a subpixel region, wherein the electrically conductive layer is suitable at least in part for forming a salt with a protic reactant, and depositing a conversion layer on the electrically conductive layer using an electrophoresis process, wherein the deposited conversion layer comprises pores.
    Type: Grant
    Filed: March 17, 2017
    Date of Patent: January 23, 2018
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Britta Goeoetz, Ion Stoll, Norwin von Malm
  • Patent number: 9875996
    Abstract: The invention relates to a composite substrate for light emitting device and a LED module equipped with the composite substrate for light emitting device. The composite substrate for light emitting device includes a metal substrate, an insulating carrier and an electrode, the metal substrate and the insulating carrier respectively have a front side and a back side that are opposite, the insulating carrier is disposed on the periphery of the metal substrate and connected to the metal substrate, the electrode is disposed on the insulating carrier, the electrode penetrates the insulating carrier, the electrode has a front side and a back side that are opposite, the heights of the back sides of the insulating carrier and the electrode are less than that of the back side of the metal substrate. The present invention also provides a LED module. The composite substrate for light emitting device can reduce costs.
    Type: Grant
    Filed: October 12, 2015
    Date of Patent: January 23, 2018
    Assignee: KAISTAR LIGHTING (XIAMEN) CO., LTD.
    Inventors: Jing-qiong Zhang, Tzu-chi Cheng
  • Patent number: 9876146
    Abstract: An optoelectronic semiconductor device comprises a substrate; a semiconductor system including a first conductivity layer, a second conductivity layer, and a conversion unit between the first conductivity layer and the second conductivity layer, wherein the first conductivity layer is closer to the substrate than the second conductivity layer is to the substrate, and the second conductivity layer comprises a top surface perpendicular to a thickness direction of the semiconductor system, and in a top view of the semiconductor system, an outline of the first conductivity layer surrounds an outline of the second conductivity layer; a first electrical connector on the first conductivity layer of the semiconductor system; a second electrical connector comprising a shape formed on the second conductivity layer of the semiconductor system; and a contact layer formed on the top surface of the second conductivity layer and having an outer perimeter at an inner side of the outline of the second conductivity layer in th
    Type: Grant
    Filed: September 2, 2016
    Date of Patent: January 23, 2018
    Assignee: EPISTAR CORPORATION
    Inventors: Tsun-Kai Ko, Schang-Jing Hon, Chien-Kai Chung, Hui-Chun Yeh, An-Ju Lin, Chien-Fu Shen, Chen Ou
  • Patent number: 9871167
    Abstract: Embodiments of the invention include a semiconductor structure including a light emitting layer sandwiched between an n-type region and a p-type region. A growth substrate is attached to the semiconductor structure. The growth substrate has at least one angled sidewall. A reflective layer is disposed on the angled sidewall. A majority of light extracted from the semiconductor structure and the growth substrate is extracted through a first surface of the growth substrate.
    Type: Grant
    Filed: March 31, 2014
    Date of Patent: January 16, 2018
    Assignee: Koninklijke Philips N.V.
    Inventors: Brendan Jude Moran, Marc Andre de Samber, Grigoriy Basin, Norbertus Antonius Maria Sweegers, Mark Melvin Butterworth, Kenneth Vampola, Clarisse Mazuir
  • Patent number: 9865725
    Abstract: A transistor includes a stack of III-nitride semiconductor layers, the stack having a frontside and a backside, a source electrode in contact with the frontside of the stack, a drain electrode in contact with the backside of the stack, a trench extending through a portion of the stack, the trench having a sidewall, and a gate structure formed in the trench, including an AlN layer formed on the sidewall of the trench, an insulating cap layer formed on the AlN layer, and a gate electrode formed on the insulator cap layer and covering the sidewall of the trench.
    Type: Grant
    Filed: April 14, 2016
    Date of Patent: January 9, 2018
    Assignee: HRL Laboratories, LLC
    Inventor: Rongming Chu
  • Patent number: 9853416
    Abstract: We disclose a vertical-cavity surface-emitting laser (VCSEL) whose optical resonator can support multiple transverse resonator modes. The VCSEL has a plurality of electrodes that can apply individually controllable electrical currents to the active semiconductor region of the optical resonator and be configured to excite, e.g., a single selected transverse resonator mode or a desired linear combination of transverse resonator modes. In some embodiments, the VCSEL's optical resonator may have an effective lateral geometric shape that causes the excitable transverse resonator modes to correspond to the waveguide modes of a cylindrical optical fiber.
    Type: Grant
    Filed: January 11, 2016
    Date of Patent: December 26, 2017
    Assignee: Alcatel-Lucent USA Inc.
    Inventors: Haoshuo Chen, Nicolas K. Fontaine, Roland Ryf
  • Patent number: 9806238
    Abstract: Embodiments of the invention include a semiconductor light emitting device, a first wavelength converting member disposed on a top surface of the semiconductor light emitting device, and a second wavelength converting member disposed on a side surface of the semiconductor light emitting device. The first and second wavelength converting members include different wavelength converting materials.
    Type: Grant
    Filed: March 26, 2013
    Date of Patent: October 31, 2017
    Assignee: Koninklijke Philips N.V.
    Inventors: Kenneth Vampola, Han Ho Choi
  • Patent number: 9799798
    Abstract: A novel thermal source comprising a semiconductor hyperbolic metamaterial provides control of the emission spectrum and the angular emission pattern. These properties arise because of epsilon-near-zero conditions in the semiconductor hyperbolic metamaterial. In particular, the thermal emission is dominated by the epsilon-near-zero effect in the doped quantum wells composing the semiconductor hyperbolic metamaterial. Furthermore, different properties are observed for s and p polarizations, following the characteristics of the strong anisotropy of hyperbolic metamaterials.
    Type: Grant
    Filed: December 15, 2016
    Date of Patent: October 24, 2017
    Assignee: National Technology & Engineering Solutions of Sandia, LLC
    Inventors: Ting S. Luk, Salvatore Campione, Michael B. Sinclair
  • Patent number: 9793447
    Abstract: An optoelectronic semiconductor chip has a non-rectangular, parallelogram-shaped top surface and an active zone, which is at a distance from the top surface and runs parallel to the top surface at least in places. The top surface includes a radiation exit surface, through which electromagnetic radiation generated during operation in the active zone emerges. The radiation exit surface has at least four vertices. The top surface includes at least one triangular connection area via which the active zone is electrically connectable.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: October 17, 2017
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventor: Adam Bauer
  • Patent number: RE47241
    Abstract: A light emitting device includes a substrate having a surface region and a light emitting diode overlying the surface region. The light emitting diode is fabricated on a semipolar or nonpolar GaN containing substrate and emits electromagnetic radiation of a first wavelength. The diode includes a quantum well region characterized by an electron wave function and a hole wave function. The electron wave function and the hole wave function are substantially overlapped within a predetermined spatial region of the quantum well region. The device has a transparent phosphor overlying the light emitting diode. The phosphor is excited by the substantially polarized emission to emit electromagnetic radiation of a second wavelength.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: February 12, 2019
    Assignee: Soraa, Inc.
    Inventors: Mark P. D'Evelyn, Rajat Sharma, Eric M. Hall, Daniel F. Feezell