More Than Two Heterojunctions In Same Device Patents (Class 257/97)
  • Patent number: 8026525
    Abstract: A boron phosphide-based semiconductor light-emitting device includes a substrate of silicon single crystal, a first cubic boron phosphide-based semiconductor layer that is provided on a surface of the substrate and contains twins, a light-emitting layer that is composed of a hexagonal Group III nitride semiconductor and provided on the first cubic boron phosphide-based semiconductor layer and a second cubic boron phosphide-based semiconductor layer that is provided on the light-emitting layer, contains twins and has a conduction type different from that of the first cubic boron phosphide-based semiconductor layer.
    Type: Grant
    Filed: March 2, 2005
    Date of Patent: September 27, 2011
    Assignee: Showa Denko K.K.
    Inventor: Takashi Udagawa
  • Patent number: 8022386
    Abstract: In a vertical topology light emitting device, an adhesion layer or adhesion structure is provided between one of the electrodes and the metal contact pad associated with that electrode. The vertical topology light emitting device further comprises a support layer, a reflective structure, which also serves as the other electrode, over the support layer, and a semiconductor device including an n-type GaN-based layer, an active layer and a p-type GaN-based layer. In certain embodiments, the adhesion layer, or adhesion structure, may comprise two layers, for example, a Cr layer and an Au layer. In other embodiments, the vertical topology device may comprise an adhesion layer, or structure, between the reflective structure and the support structure.
    Type: Grant
    Filed: December 20, 2005
    Date of Patent: September 20, 2011
    Assignee: LG Electronics Inc.
    Inventor: Myung Cheol Yoo
  • Publication number: 20110180828
    Abstract: Solid state lighting devices and associated methods of manufacturing are disclosed herein. In one embodiment, a solid state light device includes a light emitting diode with an N-type gallium nitride (GaN) material, a P-type GaN material spaced apart from the N-type GaN material, and an indium gallium nitride (InGaN) material directly between the N-type GaN material and the P-type GaN material. At least one of the N-type GaN, InGaN, and P-type GaN materials has a non-planar surface.
    Type: Application
    Filed: January 25, 2010
    Publication date: July 28, 2011
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Niraj Rana, Zaiyuan Ren
  • Patent number: 7977693
    Abstract: A semiconductor light-emitting material includes a semiconductor substance including a matrix semiconductor whose constituent atoms are bonded to form a tetrahedral structure, an impurity atom S substituted for an atom in a lattice site of the matrix semiconductor, and an impurity atom I inserted in a interstitial site of the matrix semiconductor, the impurity atom S and the impurity atom I being bonded through charge transfer therebetween in a state that the impurity atom S has an electric charge coincident with that of the constituent atom of the matrix semiconductor and the impurity atom I has an electron configuration of a closed shell structure, in which the semiconductor substance is stretched in a direction of a bond forming the tetrahedral structure.
    Type: Grant
    Filed: September 13, 2006
    Date of Patent: July 12, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tatsuo Shimizu, Kazushige Yamamoto, Shigeru Haneda
  • Patent number: 7973326
    Abstract: The invention discloses a semiconductor structure combination for the epitaxy of a semiconductor optoelectronic device and manufacture thereof. The semiconductor structure combination according to the invention includes a substrate and a semiconductor material. The substrate has an upper surface and a recess formed on the upper surface. The sidewalls of the recess provide a first site for the growth of a plurality of first epitaxial crystals of the semiconductor material toward a first preferred orientation. A bottom of the recess provides a second site for the growth of a second epitaxial crystal of the semiconductor material toward the first preferred orientation. Flat regions adjacent to the recess provide a third site for the growth of a third epitaxial crystal of the semiconductor material toward the first preferred orientation.
    Type: Grant
    Filed: December 3, 2007
    Date of Patent: July 5, 2011
    Assignee: HUGA Optotech Inc.
    Inventors: Chih-Ching Cheng, Tzong-Liang Tsai
  • Patent number: 7968899
    Abstract: A light source and method for making the same are disclosed. The light source includes a substrate, a die, and a cup. The substrate has a plurality of electrical traces thereon and the die includes an LED that is connected to two of the traces. The cup overlies the substrate and is filled with an encapsulant material. The die is located within the cup and is encapsulated by the substrate and the encapsulant material. The cup and encapsulant material have substantially the same coefficient of thermal expansion. The cup can include reflective sidewalls positioned to reflect light leaving the die. The cup, encapsulant and substrate can be constructed from the same material.
    Type: Grant
    Filed: August 27, 2007
    Date of Patent: June 28, 2011
    Assignee: Avago Technologies ECBU IP (Singapore) Pte. Ltd.
    Inventors: Norfidathul Aizar Abdul Karim, Siew It Pang, Kheng Leng Tan, Tong Fatt Chew
  • Patent number: 7964887
    Abstract: A light emitting device includes a transparent substrate having first and second surfaces, a semiconductor layer provided on the first surface, a first light emission layer provided on the semiconductor layer and emitting first ultraviolet light including a wavelength corresponding to an energy larger than a forbidden bandwidth of a semiconductor of the semiconductor layer, a second light emission layer provided between the first light emission layer and the semiconductor layer, absorbing the first ultraviolet light emitted from the first light emission layer, and emitting second ultraviolet light including a wavelength corresponding to an energy smaller than the forbidden bandwidth of the semiconductor of the semiconductor layer, and first and second electrodes provided to apply electric power to the first light emission layer.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: June 21, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yasuo Ohba
  • Patent number: 7956365
    Abstract: An alternating current (AC) light emitting device is revealed. The AC light emitting device includes a substrate and a plurality of light emitting units arranged on the substrate. The light emitting unit consists of a first semiconductor layer, a light emitting layer, a second semiconductor layer, at least one electrode and at least one second electrode respectively arranged on the first semiconductor layer and the second semiconductor layer from bottom to top. The plurality of light emitting units is coupled to at least one adjacent light emitting unit by a plurality of conductors. By the plurality of conductors that connect light emitting units with at least one adjacent light emitting unit, an open circuit will not occur in the AC light emitting device once one of the conductors is broken.
    Type: Grant
    Filed: December 8, 2008
    Date of Patent: June 7, 2011
    Assignee: Formosa Epitaxy Incorporation
    Inventors: Hui Ching Feng, Kuo-Chin Huang, Shyi-Ming Pan, Hung-Li Pan
  • Patent number: 7955875
    Abstract: Methods of forming a light emitting device include selectively forming a wavelength conversion structure on a light emitting element using stereolithography. Selectively forming the wavelength conversion structure may include covering the light emitting element with a photo-curable liquid polymer containing a luminescent material, and exposing the liquid polymer to light for a time sufficient to at least partially cure the liquid polymer. Multiple layers of polymer can be selectively built up to form a wavelength conversion structure having a custom shape on the light emitting element.
    Type: Grant
    Filed: September 26, 2008
    Date of Patent: June 7, 2011
    Assignee: Cree, Inc.
    Inventor: Craig Hardin
  • Publication number: 20110127550
    Abstract: Provided is a light emitting device, which includes a second conductive type semiconductor layer, an active layer, a first conductive type semiconductor layer, and a intermediate refraction layer. The active layer is disposed on the second conductive type semiconductor layer. The first conductive type semiconductor layer is disposed on the active layer. The intermediate refraction layer is disposed on the first conductive type semiconductor layer. The intermediate refraction layer has a refractivity that is smaller than that of the first conductive type semiconductor layer and is greater than that of air.
    Type: Application
    Filed: November 12, 2010
    Publication date: June 2, 2011
    Inventor: Hyo Kun SON
  • Patent number: 7952109
    Abstract: An apparatus comprising a structure comprising a group III-nitride and a junction between n-type and p-type group III-nitride therein, the structure having a pyramidal shape or a wedge shape.
    Type: Grant
    Filed: July 10, 2006
    Date of Patent: May 31, 2011
    Assignee: Alcatel-Lucent USA Inc.
    Inventor: Hock Min Ng
  • Patent number: 7943942
    Abstract: A light-emitting device includes a substrate, a first doped semiconductor layer situated above the substrate, a second doped semiconductor layer situated above the first doped layer, and a multi-quantum-well (MQW) active layer situated between the first and the second doped layers. The device also includes a first electrode coupled to the first doped layer and a first passivation layer situated between the first electrode and the first doped layer in areas other than an ohmic-contact area. The first passivation layer substantially insulates the first electrode from edges of the first doped layer, thereby reducing surface recombination. The device further includes a second electrode coupled to the second doped layer and a second passivation layer which substantially covers the sidewalls of the first and second doped layers, the MQW active layer, and the horizontal surface of the second doped layer.
    Type: Grant
    Filed: March 25, 2008
    Date of Patent: May 17, 2011
    Assignee: Lattice Power (JIANGXI) Corporation
    Inventors: Fengyi Jiang, Junlin Liu, Li Wang
  • Patent number: 7939833
    Abstract: There is provided a nitride semiconductor light emitting device having high internal quantum efficiency by accelerating recombination radiation while employing a multiple quantum well structure in which each of well layers has a relatively large thickness. The nitride semiconductor light emitting device is provided with a nitride semiconductor lamination portion (6) provided on a substrate (1). The nitride semiconductor lamination portion (6) includes at least an active layer (4) in which a light emitting portion is formed. And the active layer is constituted with a multiple quantum well structure formed by laminating well layers (7) made of InxGa1-xN (0<x?1), and barrier layers (8) made of AlyInzGa1-y-zN (0?y<1, 0?z<1, 0?y+z<1, z<x) alternately.
    Type: Grant
    Filed: November 28, 2006
    Date of Patent: May 10, 2011
    Assignee: Rohm Co., Ltd.
    Inventor: Yukio Shakuda
  • Patent number: 7935970
    Abstract: A nitride semiconductor light emitting diode (LED) comprises an n-type nitride semiconductor layer; an electron emitting layer formed on the n-type nitride semiconductor layer, the electron emitting layer being composed of a nitride semiconductor layer including a transition element of group III; an active layer formed on the electron emitting layer; and a p-type nitride semiconductor layer formed on the active layer.
    Type: Grant
    Filed: October 24, 2008
    Date of Patent: May 3, 2011
    Assignee: Samsung LED Co., Ltd.
    Inventors: Sang-Yeob Song, Ji Hye Shim, Bum Joon Kim
  • Patent number: 7935974
    Abstract: The invention relates to a monolithic white light emitting device using wafer bonding or metal bonding. In the invention, a conductive submount substrate is provided. A first light emitter is bonded onto the conductive submount substrate by a metal layer. In the first light emitter, a p-type nitride semiconductor layer, a first active layer, an n-type nitride semiconductor layer and a conductive substrate are stacked sequentially from bottom to top. In addition, a second light emitter is formed on a partial area of the conductive substrate. In the second light emitter, a p-type AlGaInP-based semiconductor layer, an active layer and an n-type AlGaInP-based semiconductor layer are stacked sequentially from bottom to top. Further, a p-electrode is formed on an underside of the conductive submount substrate and an n-electrode is formed on a top surface of the n-type AlGaInP-based semiconductor layer.
    Type: Grant
    Filed: March 6, 2009
    Date of Patent: May 3, 2011
    Assignee: Samsung LED Co., Ltd.
    Inventors: Min Ho Kim, Masayoshi Koike, Kyeong Ik Min, Myong Soo Cho
  • Patent number: 7932526
    Abstract: An LED semiconductor body comprising a first radiation-generating active layer and a second radiation-generating active layer, the first active layer and the second active layer being arranged one above another in the vertical direction.
    Type: Grant
    Filed: December 13, 2006
    Date of Patent: April 26, 2011
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Reiner Windisch, Günther Grönninger, Peter Heidborn, Christian Jung, Walter Wegleiter
  • Patent number: 7928448
    Abstract: A semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region is grown over a porous III-nitride region. A III-nitride layer comprising InN is disposed between the light emitting layer and the porous III-nitride region. Since the III-nitride layer comprising InN is grown on the porous region, the III-nitride layer comprising InN may be at least partially relaxed, i.e. the III-nitride layer comprising InN may have an in-plane lattice constant larger than an in-plane lattice constant of a conventional GaN layer grown on sapphire.
    Type: Grant
    Filed: December 4, 2007
    Date of Patent: April 19, 2011
    Inventors: Jonathan J. Wierer, Jr., John E. Epler
  • Patent number: 7928454
    Abstract: Disclosed are a light emitting device and a method for manufacturing the same. A light emitting diode comprises a plurality of Un-GaN layers and a plurality of N-type semiconductor layers, an active layer on the N-type semiconductor layer, and a P-type semiconductor layer on the active layer, wherein at least two of the Un-GaN layers and at least two of the N-type semiconductor layers are alternatively stacked on each other.
    Type: Grant
    Filed: April 22, 2008
    Date of Patent: April 19, 2011
    Assignee: LG Innotek Co., Ltd.
    Inventor: Tae Yun Kim
  • Patent number: 7919786
    Abstract: A nanowire light emitting device is provided. The nanowire light emitting device includes a substrate, a first conductive layer formed on the substrate, a plurality of nanowires vertically formed on the first conductive layer, each nanowire comprising a p-doped portion and an n-doped portion, a light emitting layer between the p-doped portion and the n-doped portion, a second conductive layer formed on the nanowires, and an insulating polymer in which a light emitting material is embedded, filling a space between the nanowires. The color of light emitted from the light emitting layer varies according to the light emitting material.
    Type: Grant
    Filed: February 29, 2008
    Date of Patent: April 5, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-gu Jin, Sung-hoon Lee, Hyo-sug Lee, Byoung-lyong Choi, Jong-seob Kim
  • Patent number: 7915621
    Abstract: A light source and method for fabricating the same are disclosed. The light source includes a substrate and a light emitting structure. The substrate has a first surface and a second surface, the second surface including a curved, convex surface with respect to the first surface of the substrate. The light emitting structure includes a first layer of a material of a first conductivity type overlying the first surface, an active layer overlying the first layer, the active layer generating light when holes and electrons recombine therein, and a second layer includes a material of a second conductivity type overlying the active layer and a second surface opposite to the first surface. A mirror layer overlies the light emitting structure.
    Type: Grant
    Filed: May 13, 2010
    Date of Patent: March 29, 2011
    Assignee: Bridgelux, Inc.
    Inventor: Ghulam Hasnain
  • Patent number: 7915636
    Abstract: The present disclosure relates to a III-nitride semiconductor light emitting device which improves external quantum efficiency by using a p-type nitride semiconductor layer with a rough surface, the p-type nitride semiconductor layer including: a first nitride semiconductor layer with a first doping concentration, a second nitride semiconductor layer with a second doping concentration lower than the first doping concentration and with the rough surface, and a third nitride semiconductor layer with a higher doping concentration than a second doping concentration.
    Type: Grant
    Filed: August 21, 2008
    Date of Patent: March 29, 2011
    Assignee: Epivalley Co., Ltd.
    Inventor: Chang Myung Lee
  • Patent number: 7915623
    Abstract: A light emitting diode array in which, when viewed from the above, the shape of an almost square light emitting diode is square-chamfered or round-chamfered at the corners thereof in order to minimize light leakage at a reverse mesa surface to allow an electrode layer to surround the three directions of a light emitting unit, and part in the vicinity of the corner of the reverse mesa surface is extended up to a substrate unit to cover it. Accordingly, the light emitting diode array minimized in light leakage at the reverse mesa surface can be provided.
    Type: Grant
    Filed: March 18, 2005
    Date of Patent: March 29, 2011
    Assignees: Sanyo Electric Co., Ltd., Tottori Sanyo Electric Co., Ltd.
    Inventors: Hironori Yamamoto, Hajime Kimachi
  • Patent number: 7901960
    Abstract: A group III nitride substrate on which an epitaxially grown layer of good quality can be formed, and a method of manufacturing the same are obtained. A GaN substrate is one of the following: a group III nitride substrate, wherein the number of atoms of an acid material per square centimeter of a surface is not more than 2×1014, and the number of silicon atoms per square centimeter of the surface is not more than 3×1013; a group III nitride substrate, wherein the number of silicon atoms per square centimeter of a surface is not more than 3×1013, and a haze level of the surface is not more than 5 ppm; and a group III nitride substrate, wherein the number of atoms of an acid, material per square centimeter of a surface is not more than 2×1014, and a haze level of the surface is not more than 5 ppm.
    Type: Grant
    Filed: October 9, 2007
    Date of Patent: March 8, 2011
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keiji Ishibashi, Akihiro Hachigo, Masato Irikura, Seiji Nakahata
  • Publication number: 20110049544
    Abstract: Described herein is a method for manufacturing a nitride semiconductor layer by stacking, on a silicon nitride layer, the first nitride semiconductor layer having a surface inclined with respect to the surface of the silicon nitride layer and then stacking the second nitride semiconductor layer on the first nitride semiconductor layer, a nitride semiconductor element and a nitride semiconductor light-emitting element each including the nitride semiconductor layer; and a method for manufacturing the nitride semiconductor element.
    Type: Application
    Filed: August 3, 2010
    Publication date: March 3, 2011
    Applicant: Sharp Kabushiki Kaisha
    Inventor: Satoshi KOMADA
  • Patent number: 7893446
    Abstract: A nitride semiconductor light-emitting device comprises a substrate, and a first n-type nitride semiconductor layer, an emission layer, a p-type nitride semiconductor layer, a metal layer and a second n-type nitride semiconductor layer stacked on the substrate successively from the side closer to the substrate, with an electrode provided on the surface of the second n-type nitride semiconductor layer or above the surface of the second n-type nitride semiconductor layer. The metal layer is preferably made of a hydrogen-storage alloy.
    Type: Grant
    Filed: January 29, 2008
    Date of Patent: February 22, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Atsushi Ogawa, Akio Aioi, Satoshi Komada, Hiroshi Nakatsu
  • Patent number: 7893443
    Abstract: Disclosed herein is a nitride-based semiconductor light-emitting device. The nitride-based semiconductor light-emitting device comprises an n-type clad layer made of n-type Alx1Iny1Ga(1-x1-y1)N (where 0?x1?1, 0?y1?1, and 0?x1+y1?1), a multiple quantum well-structured active layer made of undoped InAGa1-AN (where 0<A<1) formed on the n-type clad layer, and a p-type clad layer formed on the active layer wherein the p-type clad layer includes at least a first layer made of p-type Iny2Ga1-y2N (where 0?y2<1) formed on the active layer and a second layer made of p-type Alx3Iny3Ga(1-x3-y3)N (where 0<x3?1, 0?y3?1, and 0<x3+y3?1) formed on the first layer.
    Type: Grant
    Filed: April 26, 2006
    Date of Patent: February 22, 2011
    Assignee: Samsung LED Co,; Ltd.
    Inventors: Je Won Kim, Jeong Tak Oh, Dong Joon Kim, Sun Woon Kim, Jin Sub Park, Kyu Han Lee
  • Patent number: 7888670
    Abstract: There is provided a nitride semiconductor light emitting device including: an n-type semiconductor region; an active layer formed on the n-type semiconductor region; a p-type semiconductor region formed on the active layer; an n-electrode disposed in contact with the n-type semiconductor region; a p-electrode formed on the p-type semiconductor region; and at least one intermediate layer formed in at least one of the n-type semiconductor region and the p-type semiconductor region, the intermediate layer disposed above the n-electrode, wherein the intermediate layer is formed of a multi-layer structure where at least three layers with different band gaps from one another are deposited, wherein the multi-layer structure includes one of an AlGaN layer/GaN layer/InGaN layer stack and an InGaN layer/GaN layer/AlGaN layer stack.
    Type: Grant
    Filed: April 14, 2008
    Date of Patent: February 15, 2011
    Assignee: Samsung LED Co., Ltd.
    Inventors: Sang Heon Han, Sang Won Kang, Jeong Tak Oh, Seung Beom Seo, Dong Joon Kim, Hyun Wook Shim
  • Patent number: 7888693
    Abstract: Provided is a semiconductor light emitting device and a method for manufacturing the same. The semiconductor light emitting device comprises: a first conductive type semiconductor layer; an active layer on the first conductive type semiconductor layer; an undoped semiconductor layer on the active layer; a first delta-doped layer on the undoped semiconductor layer; and a second conductive type semiconductor layer on the first delta-doped layer.
    Type: Grant
    Filed: March 1, 2010
    Date of Patent: February 15, 2011
    Assignee: LG Innotek Co., Ltd.
    Inventors: Tae Yun Kim, Hyo Kun Son
  • Patent number: 7884388
    Abstract: A light emitting diode (LED) and a method for fabricating the same, capable of improving brightness by forming a InGaN layer having a low concentration of indium, and whose lattice constant is similar to that of an active layer of the LED, is provided. The LED includes: a buffer layer disposed on a sapphire substrate; a GaN layer disposed on the buffer layer; a doped GaN layer disposed on the GaN layer; a GaN layer having indium disposed on the GaN layer; an active layer disposed on the GaN layer having indium; and a P-type GaN disposed on the active layer. Here, an empirical formula of the GaN layer having indium is given by In(x)Ga(1?x)N and a range of x is given by 0<x<2, and a thickness of the GaN layer having indium is 50-200 ?.
    Type: Grant
    Filed: November 23, 2009
    Date of Patent: February 8, 2011
    Assignee: LG Innotek Co., Ltd
    Inventor: Seong Jae Kim
  • Patent number: 7884351
    Abstract: In a nitride semiconductor light-emitting device (11), an emission region (17) has a quantum well structure (19), and lies between an n-type gallium nitride semiconductor region (13) and a p-type gallium nitride semiconductor region (15). The quantum well structure (19) includes a plurality of first well layers (21) composed of InxGa1-xN, one or a plurality of second well layers (23) composed of InyGa1-yN, and barrier layers (25). The first and second well layers (21) and (23) are arranged in alternation with the barrier layers (25). The second well layers (23) lie between the first well layers (21) and the p-type gallium nitride semiconductor region (15). The indium component y of the second well layers (23) is smaller than indium component x of the first well layers (21), and the thickness DW2 of the second well layers (23) is greater than the thickness DW1 of the first well layers (21).
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: February 8, 2011
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takashi Kyono, Katsushi Akita, Yusuke Yoshizumi
  • Publication number: 20110006283
    Abstract: A semiconductor light emitting device is provided. The semiconductor light emitting device includes a first conductive semiconductor layer; an active layer on the first conductive semiconductor layer; a first quantum dot layer on the active layer; and a second conductive semiconductor layer on the first quantum dot layer.
    Type: Application
    Filed: September 13, 2010
    Publication date: January 13, 2011
    Inventor: Kyung Jun KIM
  • Patent number: 7868337
    Abstract: Provided are a light emitting diode (LED) and a method for manufacturing the same. The LED includes an n-type semiconductor layer, an active layer, and a p-type semiconductor layer. The active layer includes a well layer and a barrier layer that are alternately laminated at least twice. The barrier layer has a thickness at least twice larger than a thickness of the well layer.
    Type: Grant
    Filed: June 11, 2008
    Date of Patent: January 11, 2011
    Assignee: Seoul Opto Device Co., Ltd.
    Inventors: Hwa Mok Kim, Duck Hwan Oh, Dae Won Kim, Dae Sung Kal
  • Patent number: 7863631
    Abstract: To increase the lattice constant of AlInGaP LED layers to greater than the lattice constant of GaAs for reduced temperature sensitivity, an engineered growth layer is formed over a substrate, where the growth layer has a lattice constant equal to or approximately equal to that of the desired AlInGaP layers. In one embodiment, a graded InGaAs or InGaP layer is grown over a GaAs substrate. The amount of indium is increased during growth of the layer such that the final lattice constant is equal to that of the desired AlInGaP active layer. In another embodiment, a very thin InGaP, InGaAs, or AlInGaP layer is grown on a GaAs substrate, where the InGaP, InGaAs, or AlInGaP layer is strained (compressed). The InGaP, InGaAs, or AlInGaP thin layer is then delaminated from the GaAs and relaxed, causing the lattice constant of the thin layer to increase to the lattice constant of the desired overlying AlInGaP LED layers. The LED layers are then grown over the thin InGaP, InGaAs, or AlInGaP layer.
    Type: Grant
    Filed: April 30, 2009
    Date of Patent: January 4, 2011
    Assignees: Koninklijke Philips Electronics N.V., Philips Lumileds Lighting Company, LLC
    Inventors: Michael R. Krames, Nathan F. Gardner, Frank M. Steranka
  • Patent number: 7855392
    Abstract: An optoelectronic semiconductor component includes a light-emitting chip for emitting light, and a reflective substrate. A plurality of linear indent structures is formed on the reflective substrate. The light-emitting chip is installed on the reflective substrate and located on a side of the plurality of linear indent structures. The plurality of linear indent structures is capable of reflecting the light emitted from the light-emitting chip.
    Type: Grant
    Filed: May 8, 2008
    Date of Patent: December 21, 2010
    Assignee: Lite-On Technology Corp.
    Inventors: Yung-Fu Wu, He-Feng Zhang
  • Patent number: 7852015
    Abstract: A solid state light module incorporating light emitting diodes (LEDs) disposed on a metal substrate, a solid state lighting system employing such modules, and method of replacing LEDs of the light modules are provided. The metal substrate may allow for lower LED junction temperature and, hence, a longer device lifetime. In addition, the metal substrate may allow for the potential omission of a heat sink, which may reduce light module size, when compared to conventional solid state light emitters.
    Type: Grant
    Filed: October 11, 2006
    Date of Patent: December 14, 2010
    Assignee: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: Jui-Kang Yen, Trung Tri Doan, Yung-Wei Chen, Ching-Tai Cheng
  • Patent number: 7846755
    Abstract: The present invention discloses a light emitting diode. The light emitting diode includes a plurality of light emitting cells arranged on a substrate, each light emitting cell including a first semiconductor layer and a second semiconductor layer arranged on the first semiconductor layer; a first dielectric layer arranged on each light emitting cell and including a first opening to expose the first semiconductor layer and a second opening to expose the second semiconductor layer; a wire arranged on the first dielectric layer to couple two of the light emitting cells; and a second dielectric layer arranged on the first dielectric layer and the wire. The first dielectric layer and the second dielectric layer comprise the same material and the first dielectric layer is thicker than the second dielectric layer.
    Type: Grant
    Filed: December 8, 2009
    Date of Patent: December 7, 2010
    Assignee: Seoul Semiconductor Co., Ltd.
    Inventors: Dae Sung Kal, Dae Won Kim, Won Cheol Seo, Kyung Hee Ye, Joo Woong Lee
  • Patent number: 7847304
    Abstract: An LED array includes a semiconductor substrate and a plurality of first LED portions formed integrally on a surface of the semiconductor substrate. The first LED portions emit light of a predetermined color. The LED array includes a plurality of second LED portions fixed to the semiconductor substrate and are disposed corresponding to the first LED portions. The second LED portions emit light whose color is different from the first LED portions. The second LED portions are so disposed that active layers of the second LED portions are substantially at the same height as active layers of the first LED portions.
    Type: Grant
    Filed: March 28, 2007
    Date of Patent: December 7, 2010
    Assignee: Oki Data Corporation
    Inventors: Masumi Taninaka, Masumi Koizumi, Hiroshi Hamano
  • Patent number: 7842956
    Abstract: On a nitride semiconductor layered portion formed on a substrate, there are formed an insulating film and a p-side electrode in this order. Furthermore, an end portion electrode protection layer is formed above the p-side electrode, around a position where cleavage will take place.
    Type: Grant
    Filed: December 11, 2006
    Date of Patent: November 30, 2010
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Susumu Ohmi, Kunihiro Takatani, Fumio Yamashita, Mototaka Taneya
  • Patent number: 7838890
    Abstract: A method for manufacturing an optical device comprises steps of: (a) laminating a first, a second, a third, a fourth, a fifth, and a sixth semiconductor layers; (b) patterning at least the third, fourth, fifth and sixth semiconductor layers, thereby forming a light emitting device section and a rectification section; (c) forming first and second electrodes for driving the light emitting device section; and (d) connecting the fourth and sixth semiconductor sections between the first and second electrodes in parallel with the light emitting device section so as to have a rectification action in a reverse direction with respect to the light emitting device section, wherein the step (b) includes conducting etching until a portion of a top surface of the third semiconductor layer is exposed.
    Type: Grant
    Filed: April 4, 2007
    Date of Patent: November 23, 2010
    Assignee: Seiko Epson Corporation
    Inventors: Tetsuo Nishida, Hijime Onishi
  • Publication number: 20100288998
    Abstract: A Group III nitride semiconductor light-emitting device comprises a substrate (1) and a light-emitting layer (5) having the multiple quantum well structure that comprises barrier layers (5a) and well layers (5b) formed of a gallium-containing Group III nitride semiconductor material provided on the substrate. Each of the well layers constituting the multiple quantum well structure is made of a Group III nitride semiconductor layer to which acceptor impurities are added, and which has thicknesses different from one another and the same conductivity type as that of the barrier layer. The present invention can provide a Group III nitride semiconductor white light-emitting device which can enhance luminous intensity, can obtain high color rendering properties has a simple structure that can be easily formed without fine adjustment of a composition of a phosphor.
    Type: Application
    Filed: August 28, 2008
    Publication date: November 18, 2010
    Applicant: SHOWA DENKO K.K.
    Inventors: Tomo Kikuchi, Takashi Udagawa
  • Patent number: 7821807
    Abstract: A photosensitive diode has an active region defining a majority carrier of a first conductivity type and a minority carrier of a second conductivity type. An extraction region is disposed on a first side of the active region and extracts minority carriers from the active region. It also has majority carriers within the extraction region flowing toward the active region in a condition of reverse bias. An exclusion region is disposed on a second side of the active region and has minority carriers within the exclusion region flowing toward the active region. It receives majority carriers from the active region. At least one of the extraction and exclusion region provides a barrier for substantially reducing flow of one of the majority carriers or the minority carriers, whichever is flowing toward the active region, while permitting flow of the other minority carriers or majority carriers flowing out of the active region.
    Type: Grant
    Filed: April 17, 2008
    Date of Patent: October 26, 2010
    Assignee: EPIR Technologies, Inc.
    Inventors: Silviu Velicu, Christoph H. Grein, Sivalingam Sivananthan
  • Patent number: 7821018
    Abstract: A GaN-based semiconductor light-emitting device 1 includes a stacked body 10A having the component layers 12 that include an n-type semiconductor layer, a light-emitting layer and a p-type semiconductor layer each formed of a GaN-based semiconductor, sequentially stacked and provided as an uppermost layer with a first bonding layer 14 made of metal and a second bonding layer 33 formed on an electroconductive substrate 31, adapted to have bonded to the first bonding layer 14 the surface thereof lying opposite the side on which the electroconductive substrate 31 is formed, made of a metal of the same crystal structure as the first bonding layer 14, and allowed to exhibit an identical crystal orientation in the perpendicular direction of the bonding surface and the in-plane direction of the bonding surface.
    Type: Grant
    Filed: February 16, 2007
    Date of Patent: October 26, 2010
    Assignee: Showa Denko K.K.
    Inventors: Hiroshi Osawa, Takashi Hodota
  • Patent number: 7821019
    Abstract: A heterostructure semiconductor device capable of emitting electromagnetic radiation and having a junction with opposite conductivity type materials on either side thereof supported on a substrate with an active layer therebetween comprising zinc oxide and having a band gap energy that is less than that of either of the opposite conductivity type materials.
    Type: Grant
    Filed: October 4, 2005
    Date of Patent: October 26, 2010
    Assignee: SVT Associates, Inc.
    Inventors: Andrei Vladimirovich Osinsky, Jianwei Dong, Mohammed Zahed Kauser, Brian James Hertog, Amir Massoud Dabiran
  • Patent number: 7812366
    Abstract: An AlGaN composition is provided comprising a group III-Nitride active region layer, for use in an active region of a UV light emitting device, wherein light-generation occurs through radiative recombination of carriers in nanometer scale size, compositionally inhomogeneous regions having band-gap energy less than the surrounding material. Further, a semiconductor UV light emitting device having an active region layer comprised of the AlGaN composition above is provided, as well as a method of producing the AlGaN composition and semiconductor UV light emitting device, involving molecular beam epitaxy.
    Type: Grant
    Filed: March 15, 2006
    Date of Patent: October 12, 2010
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventors: Anand Venktesh Sampath, Charles J. Collins, Gregory Alan Garrett, H. Paul Shen, Michael Wraback
  • Patent number: 7812358
    Abstract: A light-emitting device is provided in a light-emitting element with a bonding wire that is a fine metallic wire formed mainly of gold or copper and coated at least partly with a substance capable of heightening a reflection coefficient of a wavelength of light emitted from the light-emitting element.
    Type: Grant
    Filed: September 12, 2006
    Date of Patent: October 12, 2010
    Assignee: Showa Denko K.K.
    Inventor: Takaki Yasuda
  • Patent number: 7808010
    Abstract: A nitride semiconductor light emitting device comprises a first nitride semiconductor layer, an active layer of a single or multiple quantum well structure formed on the first nitride semiconductor layer and including an InGaN well layer and a multilayer barrier layer, and a second nitride semiconductor layer formed on the active layer. A fabrication method of a nitride semiconductor light emitting device comprises: forming a buffer layer on a substrate, forming a GaN layer on the buffer layer, forming a first electrode layer on the GaN layer, forming an InxGa1-xN layer on the first electrode layer, forming on the first InxGa1-xN layer an active layer including an InGaN well layer and a multilayer barrier layer for emitting light, forming a p-GaN layer on the active layer, and forming a second electrode layer on the p-GaN layer.
    Type: Grant
    Filed: August 19, 2005
    Date of Patent: October 5, 2010
    Assignee: LG Innotek Co., Ltd.
    Inventor: Suk Hun Lee
  • Patent number: 7807521
    Abstract: A nitride semiconductor light emitting device and a method of manufacturing the same are disclosed. The nitride semiconductor light emitting device comprises an n-type nitride semiconductor layer formed on a substrate, an active layer formed on the n-type nitride semiconductor layer, a p-type nitride semiconductor layer formed on the active layer, an undoped GaN layer formed on the p-type nitride semiconductor layer, an AlGaN layer formed on the undoped GaN layer to form a two-dimensional electron gas (2DEG) layer at a bonding interface between the AlGaN layer and the undoped GaN layer, and an n-side electrode and a p-side electrode respectively formed on the n-type nitride semiconductor layer and the AlGaN layer to be connected to each other. As a hetero-junction structure of GaN/AlGaN is formed on the p-type nitride semiconductor layer, contact resistance between the p-type nitride semiconductor layer and the p-side electrode is enhanced by virtue of tunneling effect through the 2DEG layer.
    Type: Grant
    Filed: January 17, 2008
    Date of Patent: October 5, 2010
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jae Hoon Lee, Jeong Tak Oh, Jin Sub Park
  • Patent number: 7800120
    Abstract: A semiconductor light emitting element comprising: a plurality of light-emitting-layer forming portions each of which includes a pn junction capable of emitting light of a certain wavelength, and which are separated from one another with a translucent resin formed on the side portions of the light-emitting-layer forming portions; a metal film disposed on first surfaces of the light-emitting-layer forming portions; a conductive substrate bonded to the metal film; a lower electrode formed on a surface of the conductive substrate, the surface being opposite to the surface to which the metal film is bonded; a transparent electrode which is connected to second surfaces, opposite to the first surfaces, of the light-emitting-layer forming portions, and which is substantially transparent to the certain wavelength; and an upper electrode formed above the second surfaces of the light-emitting-layer forming portions with the transparent electrode sandwiched in between.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: September 21, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Chisato Furukawa, Takafumi Nakamura
  • Publication number: 20100231487
    Abstract: This light-emitting device includes a first electrode, a second electrode disposed opposite to the first electrode and a phosphor layer which is sandwiched between the first electrode and the second electrode and constituted by dispersing n-type semiconductor particles in a p-type semiconductor medium. A light-emitting device in another embodiment includes a first electrode, a second electrode disposed opposite to the first electrode and a phosphor layer which is sandwiched between the first electrode and the second electrode wherein a p-type semiconductor is segregated among the n-type semiconductor particles.
    Type: Application
    Filed: August 15, 2007
    Publication date: September 16, 2010
    Inventors: Eiichi Satoh, Shogo Nasu, Reiko Taniguchi, Toshiyuki Aoyama, Masayuki Ono, Kenji Hasegawa, Masaru Odagiri
  • Patent number: RE42007
    Abstract: A vertical geometry light emitting diode is disclosed that is capable of emitting light in the red, green, blue, violet and ultraviolet portions of the electromagnetic spectrum. The light emitting diode includes a conductive silicon carbide substrate, an InGaN quantum well, a conductive buffer layer between the substrate and the quantum well, a respective undoped gallium nitride layer on each surface of the quantum well, and ohmic contacts in a vertical geometry orientation.
    Type: Grant
    Filed: April 24, 2008
    Date of Patent: December 28, 2010
    Assignee: Cree, Inc.
    Inventors: Kathleen Marie Doverspike, John Adam Edmond, Hua-shuang Kong, Heidi Marie Dieringer, David B. Slater, Jr.