Abstract: An ion implantation system and method, providing cooling of dopant gas in the dopant gas feed line, to combat heating and decomposition of the dopant gas by arc chamber heat generation, e.g., using boron source materials such as B2F4 or other alternatives to BF3. Various arc chamber thermal management arrangements are described, as well as modification of plasma properties, specific flow arrangements, cleaning processes, power management, eqillibrium shifting, optimization of extraction optics, detection of deposits in flow passages, and source life optimization, to achieve efficient operation of the ion implantation system.

Abstract: A method for manufacturing a light-emitting diode includes the steps of: growing a light-emitting diode structure-forming semiconductor layer of a compound semiconductor having a zincblende crystal structure on a first substrate formed of a compound semiconductor having a zincblende crystal structure and that has a principal surface tilted in a [110] direction with respect to a (001) plane; bonding the first substrate to a second substrate on the side of the semiconductor layer; removing the first substrate so as to expose the semiconductor layer; forming an etching mask on the exposed surface of the semiconductor layer in a rectangular planar shape so that a longer side extends in a [110] or [?1-10] direction, and that a shorter side extends in a [?110] or [1-10] direction; and patterning the semiconductor layer by wet etching using the etching mask.

Abstract: To provide a nitride semiconductor crystal, comprising: laminated homogeneous nitride semiconductor layers, with a thickness of 2 mm or more, wherein the laminated homogeneous nitride semiconductor layers are constituted so that a nitride semiconductor layer with low dopant concentration and a nitride semiconductor layer with high dopant concentration are alternately laminated by two cycles or more.

Abstract: One embodiment of depositing a gallium nitride (GaN) film on a substrate comprises providing a source of indium (In) and gallium (Ga) and depositing a monolayer of indium (In) on the surface of the gallium nitride (GaN) film. The monolayer of indium (In) acts as a surfactant to modify the surface energy and facilitate the epitaxial growth of the film by suppressing three dimensional growth and enhancing or facilitating two dimensional growth. The deposition temperature is kept sufficiently high to enable the indium (In) to undergo absorption and desorption on the gallium nitride (GaN) film without being incorporated into the solid phase gallium nitride (GaN) film. The gallium (Ga) and indium (In) can be provided by a single source or separate sources.

Abstract: Disclosed is an image sensor. The image sensor includes a semiconductor substrate including a lower interconnection, a plurality of upper interconnection sections protruding upward from the semiconductor substrate, a first trench disposed between the upper interconnection sections such that the upper interconnection sections are spaced apart from each other, a bottom electrode disposed on an outer peripheral surfaces of the upper interconnection sections, a first conductive layer disposed on an outer peripheral surface of the bottom electrode, an intrinsic layer disposed on the semiconductor substrate including the first conductive layer and the first trench, and having a second trench on the first trench, a second conductive layer disposed on the intrinsic layer and having a third trench on the second trench, a light blocking part disposed in the third trench, and a top electrode disposed on the light blocking part and the second conductive layer.

Abstract: A solid state energy conversion device and method of making is disclosed for converting energy between electromagnetic and electrical energy. The solid state energy conversion device comprises a wide bandgap semiconductor material having a first doped region. A thermal energy beam is directed onto the first doped region of the wide bandgap semiconductor material in the presence of a doping gas for converting a portion of the first doped region into a second doped region in the wide bandgap semiconductor material. A first and a second Ohmic contact are applied to the first and the second doped regions of the wide bandgap semiconductor material. In one embodiment, the solid state energy conversion device operates as a light emitting device to produce electromagnetic radiation upon the application of electrical power to the first and second Ohmic contacts.

Abstract: To provide a nitride semiconductor crystal, comprising: laminated homogeneous nitride semiconductor layers, with a thickness of 2 mm or more, wherein the laminated homogeneous nitride semiconductor layers are constituted so that a nitride semiconductor layer with low dopant concentration and a nitride semiconductor layer with high dopant concentration are alternately laminated by two cycles or more.

Abstract: A method for packaging solar cell module. The method includes providing a first substrate member and forming a plurality of thin film photovoltaic cells overlying the surface region of the first substrate member. A first connector member and a second connector member having a second thickness are operably coupled to each of the plurality of thin film photovoltaic cells. A first spacer element and a second spacer element overly portions of the surface region of the first substrate member. The method provides a laminating material overlying the plurality of thin film photovoltaic cells, the spacer elements, and the connector members. A second substrate member overlies the laminating material. A lamination process is performed to form the solar cell module by maintaining a spatial gap occupied by the laminating material between an upper surface regions of the connector members and the second substrate member using the spacer elements.

Abstract: A process for fabricating a III-nitride power semiconductor device which includes forming a gate structure while providing a protective body over areas that are to receive power electrodes.

Abstract: Disclosed is a method for fabricating a transistor of a semiconductor device, the method comprising the steps of: providing a semiconductor; forming a gate electrode; performing a low-density ion implantation process with respect to the substrate, thereby forming an LDD ion implantation layer; forming an insulation spacer on a sidewall of the gate electrode; forming a diffusion barrier; performing a high-density ion implantation process with respect to the substrate, thereby forming a source/drain; performing a first thermal treatment process with respect to a resultant structure, so as to activate impurities in the source/drain, and simultaneously causing a diffusion velocity of the impurities in the source/drain to be reduced by the diffusion barrier; and forming a salicide layer.