Abstract: A method for fabricating a semiconductor device utilizing the step of forming a first insulating film of a porous material over a substrate; the step of forming on the first insulating film a second insulating film containing a silicon compound containing Si—CH3 bonds by 30-90%, and the step of irradiating UV radiation with the second insulating film formed on the first insulating film to cure the first insulating film. Thus, UV radiation having the wavelength which eliminates CH3 groups is sufficiently absorbed by the second insulating film, whereby the first insulating film is highly strengthened with priority by the UV cure, and the first insulating film can have the film density increased without having the dielectric constant increased.

Abstract: A method of shortening a photoresist coating process for a plurality of wafers is provided, wherein the photoresist coating process includes a first coating operation to a first wafer using a first photoresist liquid and a second coating operation to a second wafer using a second photoresist liquid. The method includes performing a dummy dispense operation of the second photoresist liquid within the period of the backend part of the first coating operation that needs no nozzle.

Abstract: By introducing new concepts into a structure of a conventional organic semiconductor element and without using a conventional ultra thin film, an organic semiconductor element is provided which is more reliable and has higher yield. Further, efficiency is improved particularly in a photoelectronic device using an organic semiconductor. Between an anode and a cathode, there is provided an organic structure including alternately laminated organic thin film layer (functional organic thin film layer) realizing various functions by making an SCLC flow, and a conductive thin film layer (ohmic conductive thin film layer) imbued with a dark conductivity by doping it with an acceptor and a donor, or by the like method.

Abstract: This invention provides an organic thin film transistor, which can realize the modification of the surface of a gate insulating layer not only the case where the gate insulating layer is formed of an oxide, but also the case where the gate insulating layer is formed of a material other than the oxide and consequently can significantly improve transistor characteristics, and a method for surface modification of a gate insulating layer in the organic thin film transistor. In an organic thin film transistor comprising a gate insulating layer, an organic semiconductor layer stacked on the gate insulating layer, and an electrode provided on the organic semiconductor layer, a polyparaxylylene layer formed of a continuous polyparaxylylene film is formed on the surface of the gate insulating layer, between the gate insulating layer and the organic semiconductor layer, so as to face and contact with the organic semiconductor layer.

Abstract: A device for detecting biomolecules includes: a semiconductor substrate; a source region and a drain region separately provided at the substrate; a chamber formed at the substrate including a region between the source region and the drain region, the chamber configured to contain a sample including the biomolecules; and an electrode which applies a voltage to the sample in the chamber. The biomolecules are mobile with respect to the electrode and sample. Methods for detecting biomolecules are also disclosed.

Abstract: The manufacturing method of a substrate having a conductive layer has the steps of: forming an inorganic insulating layer over a substrate; forming an organic resin layer with a desired shape over the inorganic insulating layer; forming a low wettability layer with respect to a composition containing conductive particles on a first exposed portion of the inorganic insulating layer; removing the organic resin layer; and coating a second exposed portion of the inorganic insulating layer with a composition containing conductive particles and baking, thereby forming a conductive layer.

Abstract: A process for the formation of a capping layer on a conducting interconnect for a semiconductor device is provided, the process comprising the steps of: (a) providing one or more conductors in a dielectric layer, and (b) depositing a capping layer on an upper surface of at least some of the one or more conductors, characterised in that the process further includes: (c) the step of, prior to depositing the capping layer, reacting the dielectric layer with an organic compound in a liquid phase, the said organic compound having the following general formula: (I) where X is a functional group, R is an organic group or a organosiloxane group, Y1 is either a functional group or an organic group or organosiloxane group, and Y2 is either a functional group or an organic group or organosiloxane group, and where the functional group(s) is/are independently selected from the following: NH2, a secondary amine, a tertiary amine, acetamide, trifluoroacetamide, imidazole, urea, OH, an alkyoxy, acryloxy, acetate, SH, an alky

Abstract: A semiconductor manufacturing method comprises forming a leveling guard ring defining an interior area into which are fabricated one or more devices. In certain embodiments two or more matched devices, such as in a common centroid layout, are fabricated in the interior area. The guard ring is formed on at least one particular layer for a particular processing step. By the guard ring overwhelming the effect of local features' elevation differences, photoresist thereafter applied consequently has a more uniform height across the interior area, resulting in more uniform devices. In some embodiments, a plurality of guard rings enclosing respective arrays of matched devices are arranged over the surface of a semiconductor wafer, spaced apart so as to be not local to one another. Based on the equalizing effect by each of the guard rings, the respective devices arranged in the interior areas are more evenly matched to equivalent devices in far-spaced guard rings. Thus, both local and global matching are achieved.

Abstract: A method of manufacturing a semiconductor device includes forming an insulating layer, a first conductive layer, a dielectric layer and a capping conductive layer over a semiconductor substrate in which a cell region is defined. The capping conductive layer and the dielectric layer is etched to form contact holes in a first region of a drain select line and a source select line region of the cell region. A second conductive layer, a tungsten silicide layer and a hard mask layer are formed over the semiconductor substrate including the contact holes. The hard mask layer, the tungsten silicide layer, the second conductive layer, the capping conductive layer, the dielectric layer and the first conductive layer are etched to form a cell gate. The hard mask layer, the tungsten silicide layer, the second conductive layer and the first conductive layer of the first region are etched to form a drain select line and a source select line.

Abstract: A Lewis acid-base reaction is caused, in a solution, between a first monomer corresponding to a Lewis acid and a second monomer corresponding to a Lewis base, so as to generate a monomer adduct in which the first monomer and the second monomer are bonded to each other through weak electric interaction. Next, the solution including the monomer adduct is applied on a substrate so as to form a supramolecular solid thin film made of the monomer adduct. Then, the supramolecular solid thin film is heated so as to cause a polymerization reaction between the first monomer and the second monomer within the supramolecular solid thin film, thereby forming a polymer thin film.

Abstract: An organic light emitting display includes a substrate, a semiconductor layer arranged on the substrate, an organic light emitting diode arranged on the semiconductor layer, an encapsulant arranged on an top surface periphery of the substrate, which is an outer periphery of the semiconductor layer and the organic light emitting diode, an encapsulation substrate bonded to the encapsulant, and a bonding agent arranged on an under surface of the substrate which is opposite to the encapsulant.

Abstract: A method of forming a micro-pattern in a semiconductor device that is less than approximately 130 nm using the KrF exposure equipment. A method of forming a micro-pattern in a semiconductor device includes at least one of the following steps: Forming an etching layer, a hard mask layer, an organic bottom anti-reflection (BARC) layer, and/or a photoresist film on and/or over a semiconductor substrate. Forming a photoresist pattern by exposing and developing the photoresist film. Forming a BARC layer pattern using the photoresist pattern as a mask. Forming a hard mask layer pattern using the BARC layer pattern as an etch mask. Forming an etching layer pattern by using the hard mask layer pattern as an etch mask.

Abstract: A method of producing an organic-inorganic composite insulating material for electronic element comprises subjecting a mixture of an organic polymer or its solution and a metal alkoxide or its solution as a starting material to sol-gel reaction of the metal alkoxide in the presence of the organic polymer.

Abstract: Provided are example embodiments of the invention including a range of polymer structures suitable for incorporation in barrier compositions for use, for example, in immersion photolithography in combination with a suitable solvent or solvent system. These polymers exhibit a weight average molecular weight (Mw) of 5,000 to 200,000 daltons and may be generally represented by formula I: wherein the expressions (1+m+n)=1; 0.1?(1/(1+m+n))?0.7; 0.3?(m/(1+m+n))?0.9; and 0.0?(n/(1+m+n))?0.6 are satisfied; R1, R2 and R3 are C1 to C5 alkyl, C1 to C5 alkoxy and hydroxyl groups; and Z represents an alkene that includes at least one hydrophilic group. Barrier coating compositions will include an organic solvent or solvent system selected from C3 to C10 alcohol-based organic solvents, C4 to C12 alkane-based organic solvents and mixtures thereof.

Abstract: A dielectric layer on a semiconductor substrate is made porous by radiation with UV light. The dielectric material contains a photosensitive moiety that absorbs UV radiation and dissociates from the dielectric material. The UV-activated material then may be diffused to create pores in the dielectric layer, and to provide a dielectric layer having a low dielectric constant.

Abstract: Provided is an organic thin film transistor comprising a polymeric layer interposed between a gate dielectric and an organic semiconductor layer. Various homopolymers, copolymers, and functional copolymers are taught for use in the polymeric layer. An integrated circuit comprising a multiplicity of thin film transistors and methods of making a thin film transistor are also provided. The organic thin film transistors of the invention typically exhibit improvement in one or more transistor properties.

Abstract: A method for forming a mechanically robust dielectric film comprises depositing a dielectric film on a substrate and then inducing a compressive strain in a top surface of the dielectric film to form a compressive strained surface. The compressive strain may be induced using an ion implantation process that bombards the dielectric film with ions that become implanted in the top surface of the dielectric film. The damage caused during ion implantation, as well as the implanted ions themselves, causes an expansion of the top surface which induces a biaxial compressive residual stress, thereby forming a compressive strained surface. The compressive strain reduces the amount of surface flaws present on the top surface, thereby improving the toughness of the dielectric film. In addition, the ion implantation process may modify the plasticity of the top surface and reduce the likelihood of fracture mechanisms based on dislocation pileup for crack initiation.

Abstract: A method of manufacturing a semiconductor device, wherein an interlayer insulating layer, a lower barrier metal layer, a metal layer having a low resisvitity value, an upper barrier metal layer, a first oxynitride layer, a hard mask layer formed at low temperature, a second oxynitride layer, and an organic Bottom Anti-Reflective Coating (BARC) layer are formed over a semiconductor substrate. The BARC layer, the second oxynitride layer, and the hard mask layer are etched. The first oxynitride layer, the upper barrier metal layer, the metal layer, and the lower barrier metal layer are etched using the hard mask layer as a mask.

Abstract: The present invention is a process for forming an air gap within a substrate, the process comprising: providing a substrate; depositing a sacrificial material by deposition of at least one sacrificial material precursor; depositing a composite layer; removale of the porogen material in the composite layer to form a porous layer and contacting the layered substrate with a removal media to substantially remove the sacrificial material and provide the air gaps within the substrate; wherein the at least one sacrificial material precursor is selected from the group consisting of: an organic porogen; silicon, and a polar solvent soluble metal oxide and mixtures thereof.

Abstract: Disclosed is a method and apparatus for fabricating a patterned thin film layer within a flat panel display that employs a soft mold and heat treatment in place of a photolithographic process. The disclosed method may reduce process time as well as substantially minimize pattern deformities.

Abstract: A photoresist trimming gas compound is provided which will selectively remove a resist foot or scum from the lower portions of sidewalls of a photoresist. Additionally, the trimmer compound hardens or toughens an upper surface of the photoresist thereby strengthening the photoresist. The trimmer compound includes O2 and at least one other gaseous oxide and is typically utilized in a dry etching process after a trench has been formed in a photoresist. The other oxide gases, in addition to the O2 may include CO2, SO2 and NO2.

Abstract: A semiconductor device has a semiconductor substrate having first and second surface, a first resin film formed on the first surface of the semiconductor substrate and a second resin film formed on the second surface of the semiconductor substrate. A projection electrode or an interconnection is formed on the first surface of the semiconductor substrate, the second resin film is made of low elastic resin which is capable of absorbing an impact applied to the second surface of the semiconductor substrate and the second resin film is thinner than the semiconductor substrate.

Abstract: In a conductive layer fabrication method, a lower resist layer (210) is formed on a semiconductor substrate. A water soluble resin layer (212) is formed over the lower resist layer. Heat treatment is performed so as to produce a cross-linking layer (211) between the lower resist layer and the water soluble resin layer, the cross-linking layer being insoluble in an organic material. A resist containing a photosensitizing agent is applied to form an upper resist layer (214) over the cross-linking layer. The upper and lower resist layers are irradiated by a beam through a photomask. A portion of the upper resist layer and a portion of the cross-linking layer are removed through development to form an upper opening. A portion of the lower resist layer is removed using a developer to form a lower opening. Then a conductive layer (302) is formed on the semiconductor substrate through the upper and lower openings.

Abstract: The purpose of the invention is to provide a film formation apparatus capable of forming an EL layer with a high purity and a high density, and a cleaning method. The invention is a formation of an EL layer with a high density by heating a substrate 10 by a heating means for heating a substrate, decreasing the pressure of a film formation chamber with a pressure decreasing means (a vacuum pump such as a turbo-molecular pump, a dry pump, or a cryopump) connected to the film formation chamber to 5×10?3 Torr (0.665 Pa) or lower, preferably 1×10?3 Torr (0.133 Pa) or lower, and carrying out film formation by depositing organic compound materials from deposition sources. In the film formation chamber, cleaning of deposition masks is carried out by plasma.

Abstract: Embodiments of methods, apparatuses, devices, and/or systems for forming a component having dielectric sub-layers are described.

Abstract: Methods of processing films on substrates are provided. In one aspect, the methods comprise treating a patterned low dielectric constant film after a photoresist is removed form the film by depositing a thin layer comprising silicon, carbon, and optionally oxygen and/or nitrogen on the film. The thin layer provides a carbon-rich, hydrophobic surface for the patterned low dielectric constant film. The thin layer also protects the low dielectric constant film from subsequent wet cleaning processes and penetration by precursors for layers that are subsequently deposited on the low dielectric constant film.

Abstract: An ambipolar, light-emitting transistor comprising an organic semiconductive layer in contact with an electron injecting electrode and a hole injecting electrode separated by a distance L defining the channel length of the transistor, in which the zone of the organic semiconductive layer from which the light is emitted is located more than L/10 away from both the electron as well as the hole injecting electrode.

Abstract: A photoresist trimming gas compound is provided which will selectively remove a resist foot or scum from the lower portions of sidewalls of a photoresist. Additionally, the trimmer compound hardens or toughens an upper surface of the photoresist thereby strengthening the photoresist. The trimmer compound includes O2 and at least one other gaseous oxide and is typically utilized in a dry etching process after a trench has been formed in a photoresist The other oxide gases, in addition to the O2 may include CO2, SO2 and NO2.

Abstract: The present invention concerns a methods and compositions for preparing a multi layer composite device, such as a semiconductor device. Said method comprises (A) forming a dielectric layer on the surface of a composite material by bringing said surface into contact: a) either with a solution, comprising the diazonium salt of aniline, a diazonium salt bearing at least one functional group or an amine compound of formula H2N-A-X-Z as defined in claim 1: b) or with a first solution containing an aryl diazonium salt and successively a second solution containing a compound bearing at least one functional group and bearing at least one functional group capable of reacting with the aryl radical grafted on the surface of the composite material thanks to the aryl diazonium salt; (B) forming an overlayer on said surface of said composite material obtained in step (A), said overlayer consisting of a Si-containing dielectric Cu-Etch Stop Layer and/or copper diffusion barrier.

Abstract: A two-step process is disclosed for stripping photoresist material from a substrate, wherein the substrate includes a low k dielectric material underlying the photoresist material and a polymer film overlying both the photoresist material and the low k dielectric material. The first step of the two-step process uses an oxygen plasma to remove the polymer film. The second step of the two-step process uses an ammonia plasma to remove the photoresist material, wherein the second step commences after completion of the first step. Each step of the two-step photoresist stripping process is respectively defined by particular values for process parameters including chemistry, temperature, pressure, gas flow rate, radio frequency power and frequency, and duration.

Abstract: A semiconductor manufacturing method comprises forming a leveling guard ring defining an interior area into which are fabricated one or more devices. In certain aspects, two or more matched devices, such as in a common centroid layout, are fabricated in the interior area. The guard ring is formed on at least one particular layer for a particular processing step. By the guard ring overwhelming the effect of local features' elevation differences, photoresist thereafter applied consequently has a more uniform height across the interior area, resulting in more uniform devices. A plurality of guard rings may be used that enclose respective arrays of matched devices arranged over the surface of a semiconductor wafer. Based on the equalizing effect by each of the guard rings, the respective devices arranged in the interior areas are more evenly matched to equivalent devices in far-spaced guard rings. Thus, local and global matching are achieved.

Abstract: A method and apparatus for forming a barrier metal layer in semiconductor devices are disclosed. A disclosed method for forming a barrier metal layer in a semiconductor device forms an interlayer insulating layer on a front face of a semiconductor substrate having a contact area and patterns the interlayer insulating layer to open the contact area. The disclosed method further places the semiconductor substrate in a chamber, injects reactant gas and precursor into the chamber, transforms the gas into plasma gas and causes the plasma gas to react with the precursor to form a single TiSiN film covering the contact area.

Abstract: A method of forming trench openings in a dual damascene trench and via etch process by using a two component hard mask layer, termed a bi-layer, over different intermetal dielectrics, IMD, to solve dual damascene patterning problems, such as, fencing and sub-trench formation. Via first patterning in dual damascene processing is one of the major integration schemes for copper backend of line (BEOL) integration. Via first dual damascene scheme usually uses a hard mask layer deposited on top of an inter-metal dielectric (IMD) film stack. The dual damascene trench etch requires uniform trench depth across wafer after etch. In addition, via top corner profiles need to be well maintained without any fencing or faceting. The present method solves these problems by using a two component hard mask layer, termed a bi-layer, deposited directly on top of an inter-metal dielectric (IMD) film stack.

Abstract: An isotropic-diffusion filling method uses a thermal process on a result structure comprising a photoresist layer and an organic material layer to create a cross-linking layer there between, which minimizes step height differences between isolated and dense via-pattern regions for optimizing a subsequent trench process and simplifying process steps.

Abstract: A preferred embodiment of the invention provides a method of spin coating a liquid, such as a resist, onto a surface of a substrate. An embodiment of the invention comprises dispensing a liquid onto the surface; spinning the substrate at a first rotational velocity at least until the liquid forms a substantially uniform film on the surface of the substrate; and spinning the substrate at a second rotational velocity in an opposite direction at least until the liquid reforms a substantially uniform film on the surface of the substrate. Other embodiments include a first rotational acceleration for accelerating the substrate to the first rotational velocity, and a second rotational acceleration for accelerating the substrate to the second rotational velocity. Preferably, the second rotational acceleration is much larger than the first rotational acceleration. Still other embodiments include repeating the first velocity, second velocity sequence one or more times.

Abstract: A resist layer is deposited a resist layer on a first layer of a layered stack. The stack also includes a second layer below the first layer. The resist layer is processed with a lithographic method to achieve a first structured resist layer. At least a part of the first structured resist layer is trimmed to achieve a second structured resist layer having at least in parts a structure with a critical dimension smaller than obtainable by processing the resist with a lithographic method. The first layer is selectively removed from the second layer in the areas not covered by the second structured resist layer. The second layer is modified by implantation to become a layer with defined selectivity to the non-modified material. The remains of the first layer are removed. The non-modified structures of the second layer are removed to create a hardmask layer by the remaining layer. The layered stack is further structured with the hardmask layer.

Abstract: A method of planarizing a layer of an integrated circuit. In one embodiment, a liquid film is applied over the layer, using extrusion coating techniques. In another embodiment, the layer itself may be applied as a liquid film, using extrusion techniques.

Abstract: A method of forming a feature includes forming a mask of a first material on an underlying layer, the mask having an incorrect profile. The profile of the mask is corrected and a feature is formed in the underlying layer. A system for forming a feature is also disclosed.

Abstract: An advanced back-end-of-line (BEOL) interconnect structure having a hybrid dielectric is disclosed. The inter-layer dielectric (ILD) for the via level is preferably different from the ILD for the line level. In a preferred embodiment, the via-level ILD is formed of a low-k SiCOH material, and the line-level ILD is formed of a low-k polymeric thermoset material.

Abstract: A semiconductor device having: an underlie having a conductive region in the surface layer of the underlie; an insulating etch stopper film covering the surface of the underlie; an interlayer insulating film formed on the insulating etch stopper film; a wiring trench formed in the interlayer insulating film, the wiring trench having a first depth from the surface of the interlayer insulating film; a contact hole extending from the bottom surface of the wiring trench to the surface of the conductive region; and a dual damascene wiring layer embedded in the wiring trench and the contact hole, wherein the interlayer insulating film includes a first kind of an insulating layer surrounding the side wall and bottom surface of the wiring trench and a second kind of an insulating layer having etching characteristics different from the first kind of the insulating layer.

Abstract: The present invention generally relates to stable emissive aggregates of polymers. The aggregates are composed of various polymer molecules arranged in such a way as to allow extended electronic couplings between nearby polymer molecules, enhancing exciton transport, while minimizing the effects of quenching due to interchain interactions. For example, the polymer molecules may be arranged in a non-aligned, electronically-communicative manner (for example, at an oblique angle), stabilized by various methods such as chemical linkages or physical interactions. Within the aggregate, electronic interactions along the polymer molecule may extend to nearby polymer molecules, which may be observed as a shift in the absorption spectra relative to a random dispersion. Light emitted from the aggregate may be polarized in some cases, for example, linearly or circularly, which may be caused by chiral arrangements of polymers within the aggregate (the polymers themselves may or may not be chiral).