Abstract: Methods and apparatus for processing a substrate include cleaning and self-assembly monolayer (SAM) formation for subsequent reverse selective atomic layer deposition. An apparatus may include a process chamber with a processing volume and a substrate support including a pedestal, a remote plasma source fluidly coupled to the process chamber and configured to produce radicals or ionized gas mixture with radicals that flow into the processing volume to remove residue or oxides from a surface of the substrate, a first gas delivery system with a first ampoule configured to provide at least one first chemical into the processing volume to produce a SAM on the surface of the substrate, a heating system located in the pedestal and configured to heat a substrate by flowing gas on a backside of the substrate, and a vacuum system fluidly coupled to the process chamber and configured to control heating of the substrate.

Abstract: Methods for forming a coating over a surface are disclosed. A method includes directing a first source of barrier film material toward a substrate in a first direction at an angle ? relative to the substrate, wherein ? is greater than about 0° and less than about 85°. Additionally, a method of depositing a barrier film over a substrate includes directing a plurality of N sources of barrier film material toward a substrate, each source being directed at an angle ?N relative to the substrate, wherein for each ?N, ? is greater than about 0° and less than about 180°. For at least a first of the ?N, ?N is greater than about 0° and less than about 85°, and for at least a second of the ?N, ?N is greater than about 95° and less than about 180°.

Abstract: A thin film semiconductor device has a semiconductor layer including a mixture of an amorphous semiconductor ionic metal oxide and an amorphous insulating covalent metal oxide. A pair of terminals is positioned in communication with the semiconductor layer and define a conductive channel, and a gate terminal is positioned in communication with the conductive channel and further positioned to control conduction of the channel. The invention further includes a method of depositing the mixture including using nitrogen during the deposition process to control the carrier concentration in the resulting semiconductor layer.

Abstract: A method of forming (and an apparatus for forming) a metal-doped aluminum oxide layer on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process.

Abstract: Method for manufacturing a rigid power module with a layer that is electrically insulating and conducts well thermally and has been deposited as a coating, the structure having sprayed-on particles that are fused to each other, of at least one material that is electrically insulating and conducts well thermally, having the following steps: manufacturing a one-piece lead frame; populating the lead frame with semiconductor devices, possible passive components, and bonding corresponding connections, inserting the thus populated lead frame into a compression mold so that accessibility of part areas of the lead frame is ensured, pressing a thermosetting compression molding compound into the mold while enclosing the populated lead frame, coating the underside of the thus populated lead frame by thermal spraying in at least the electrically conducting areas and overlapping also the predominant areas of the spaces, filled with mold compound.

Abstract: A thin film transistor substrate for a liquid crystal display device includes a substrate, a metal layer on the substrate, and an aluminum complex oxide layer on the metal layer. The aluminum complex oxide layer comprises at least one selected from the group consisting of zirconium, tungsten, chromium and molybdenum. A passivation layer is formed on the aluminum complex oxide layer through a dipping process.

Abstract: A method for producing an electrically conducting metal contact on a semiconductor component having a coating on the surface of a semiconductor substrate. In order to keep transfer resistances low while maintaining good mechanical strength, the invention proposes applying a particle-containing fluid onto the coating, where the particles contain at least metal particles and glass frits, curing the fluid while simultaneously forming metal areas in the substrate through heat treatment, removing the cured fluid and the areas of the coating covered by the fluid, and depositing, for the purposes of forming the contact without using intermediate layers, electrically conducting material from a solution onto areas of the semiconductor component in which the coating is removed while at the same time conductively connecting the metal areas present in said areas on the substrate.

Abstract: A circuit board having a graphene circuit according to the present invention includes: a base substrate; a patterned aluminum oxide film formed on the base substrate, the patterned aluminum oxide film having an average composition of Al2?xO3+x (where x is 0 or more), the patterned aluminum oxide film having a recessed region whose surface has one or more cone-shaped recesses therein; a graphene film preferentially grown only on the patterned aluminum oxide film, the graphene film having one or more graphene atomic layers, the graphene film having a contact region that covers the recessed region, the graphene film growing parallel to a flat surface of the recessed region and parallel to an inner wall surface of each cone-shaped recess of the recessed region; and a patterned metal film, a part of the patterned metal film covering and having electrical contact with the contact region, the patterned metal film filling each recess covered by the graphene film.

Abstract: The present invention belongs to the technical field of semiconductor materials and specifically relates to a method for cleaning and passivizing gallium arsenide (GaAs) surface autologous oxide and depositing an Al2O3 dielectric. This method includes: use a new-type of sulfur passivant to react with the autologous oxide on the GaAs surface to clean it and generate a passive sulfide film to separate the GaAs from the outside environment, thus preventing the GaAs from oxidizing again; further cleaning the residuals such as autologous oxides and sulfides on the GaAs surface through the pretreatment reaction of the reaction source trimethyl aluminum (TMA) of the Al2O3 ALD with the GaAs surface, and then deposit high-quality Al2O3 dielectric through ALD as the gate dielectric which fully separates the GaAs from the outside environment. The present invention features a simple process and good effects, and can provide preconditions for manufacturing the GaAs devices.

Abstract: In a method for manufacturing a semiconductor device, a process of providing a semiconductor wafer having a wiring layer having conductive patterns and a plurality of insulation films containing a first insulation film surrounding side surfaces of the conductive patterns are provided. After the process of providing the semiconductor wafer, a process of removing some regions of the plurality of insulation films to form openings is provided. Herein, the first insulation film is disposed to a position closer to the circumference of the semiconductor wafer than a position closest to the outermost circumference of the wafer among the arrangement positions of the conductive patterns.

Abstract: A process of forming an electronic device can include forming a stack including a tunnel barrier layer. The tunnel barrier layer can have a ratio of the metal atoms to oxygen atoms of greater than a stoichiometric ratio, wherein the ratio has a particular value. The process can also include forming a gettering layer having a composition capable of gettering oxygen, and depositing an insulating layer over the gettering layer. The process can further include exposing the insulating layer to a temperature of at least approximately 60° C. In one embodiment, after such exposure, a portion of the gettering layer is converted to an insulating material. In another embodiment, an electronic device can include a magnetic tunnel junction and an adjacent insulating layer lying within an opening in another insulating layer.

Abstract: A method for forming a semiconductor device includes the following processes. An insulating film is formed over a semiconductor substrate. A hole is formed in the insulating film. A film including ZrAlO is formed over the insulating film and in the hole. Forming the film including ZrAlO may include, but is not limited to, the following processes. A first precursor including zirconium and a second precursor including aluminum are supplied into a reaction chamber at a supply amount ratio of the first precursor to the second precursor in the range from 2.5 to 3.5. The first precursor and the second precursor are exhausted from the reaction chamber. An oxidant is supplied into the reaction chamber to oxidize zirconium and aluminum. The oxidant is exhausted from the reaction chamber.

Abstract: Nonvolatile memory devices may be fabricated to include a switching device on a substrate and/or a storage node electrically connected to the switching device. A storage node may include a lower metal layer electrically connected to the switching device, a first insulating layer, a middle metal layer, a second insulating layer, an upper metal layer, a carbon nanotube layer, and/or a passivation layer stacked on the lower metal layer.

Abstract: A magnetoresistive element includes: a magnetization free layer having a first plane and a second plane located on the opposite side from the first plane, and having a variable magnetization direction; a magnetization pinned layer provided on the first plane side of the magnetization free layer, and having a pinned magnetization direction; a first tunnel barrier layer provided between the magnetization free layer and the magnetization pinned layer; a second tunnel barrier layer provided on the second plane of the magnetization free layer; and a non-magnetic layer provided on a plane on the opposite side of the second tunnel barrier layer from the magnetization free layer. The magnetization direction of the magnetization free layer is variable by applying current between the magnetization pinned layer and the non-magnetic layer, and a resistance ratio between the first tunnel barrier layer and the second tunnel barrier layer is in a range of 1:0.25 to 1:4.

Abstract: A method and system for forming a non-volatile memory structure. The method includes providing a semiconductor substrate and forming a gate dielectric layer overlying a surface region of the semiconductor substrate. A polysilicon gate structure is formed overlying the gate dielectric layer. The method subjects the polysilicon gate structure to an oxidizing environment to cause formation of a first silicon oxide layer overlying the polysilicon gate structure and formation of an undercut region underneath the polysilicon gate structure. An aluminum oxide material is formed overlying the polysilicon gate structure filling the undercut region. In a specific embodiment, the aluminum oxide material has a nanocrystalline silicon material sandwiched between a first aluminum oxide layer and a second aluminum oxide layer. The aluminum oxide material is subjected to a selective etching process while maintaining the aluminum oxide material in an insert region in a portion of the undercut region.

Abstract: A semiconductor device manufacturing method includes removing an insulating film on a semiconductor substrate by etching and subsequently oxidizing a surface of the substrate by using a liquid oxidation agent without exposing this surface to an atmosphere, thereby forming a first insulating film containing an oxide of a constituent element of the substrate on the surface of the substrate; forming a second insulating film containing an aluminum oxide on the first insulating film; forming a third insulating film containing a rare earth oxide on the second insulating film; forming a high-k insulating film on the third insulating film; introducing nitrogen into the high-k insulating film to thereby make it a fourth insulating film; and conducting heat treatment to change the first through third insulating films into an insulating film made of a mixture containing aluminum, a rare earth element, the constituent element of the substrate, and oxygen.

Abstract: A method for manufacturing a semiconductor device includes heating a substrate having an insulation film thereon to a first substrate temperature so that oxidizing species are emitted from the insulating film, the insulating film having a recessed portion formed in a surface thereof, forming a first metal film on the insulating film at a second substrate temperature lower than the first substrate temperature, oxidizing at least part of the first metal film with oxidizing species remaining in the insulating film, and forming a second metal film, which includes any of a high melting point metal and a noble metal, on the first metal film, the first metal film and the second metal film sharing different metallic material.

Abstract: The memory apparatus includes a memory device including a gate insulating layer formed on a silicon substrate by sequentially stacking a tunnel oxide layer, a charge trap layer, and a block oxide layer in this order, on the silicon substrate. In addition, a gate electrode is formed on the gate insulating layer. The block oxide layer is formed by stacking a first block oxide layer and a second block oxide layer, wherein the first block oxide layer is adjacent to the charge trap layer and the second block oxide layer is adjacent to the gate electrode. The second block oxide layer is formed of a dielectric material having higher permittivity than that of the first block oxide layer and having higher electron affinity than that of the first block oxide layer.

Abstract: A method of forming (and an apparatus for forming) a metal-doped aluminum oxide layer on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process.

Abstract: A method of fabricating a semiconductor device includes forming a lower device on a lower semiconductor substrate, and forming an interlayer insulating film on the lower device. An upper semiconductor substrate is formed on the interlayer insulating film such that the interlayer insulating film is between the lower and upper semiconductor substrates. Upper trenches are formed within the upper semiconductor substrate. An upper device isolating film is formed within the upper trenches. The upper device isolating film is irradiated with ultraviolet light having a wavelength configured to break chemical bonds of impurities in the upper device isolating film to reduce an impurity concentration thereof.

Abstract: Lanthanum-metal oxide dielectric layers and methods of fabricating such dielectric layers provide an insulating layer in a variety of structures for use in a wide range of electronic devices and systems. In an embodiment, a lanthanum aluminum oxide dielectric layer is formed using a trisethylcyclopentadionatolanthanum precursor and/or a trisdipyvaloylmethanatolanthanum precursor.

Abstract: A process to encapsulate electronic modules in a manner which is substantially resistant to water diffusion yet is carried out at moderate temperatures below 300° C., preferably below 150° C. is provided. The process forms a housing for electronic modules, in particular sensors, integrated circuits and optoelectronic components. The process includes the steps of: providing a substrate, of which at least a first substrate side is to be encapsulated; providing a vapor-deposition glass source; arranging the first substrate side in such a manner with respect to the vapor-deposition glass source that the first substrate side can be vapor-coated; and vapor-coating the first substrate side with a glass layer.

Abstract: An integrated circuit can be formed with a high-k dielectric layer. A first titanium oxide layer is deposited over a substrate using a first ALD process. A first metal oxide layer is also deposited over the substrate using a second ALD process. A second titanium oxide layer is deposited over the substrate using a third ALD process and a second metal oxide layer is deposited over the substrate using a fourth ALD process. The first and second metal oxides are preferably strontium oxide and/or aluminum oxide.

Abstract: Example embodiments are directed to methods of forming a metallic oxide film using Atomic Layer Deposition while controlling the power reflected by a reactor. The method may include feeding metallic source gases, for example, first and second metallic source gases, and/or a reactant gas including oxygen into the reactor individually. One of the metallic source gases may include an amino-group or an alkoxy-group and another metallic source gas may include neither an amino-group nor an alkoxy-group. A plasma may be produced in the reactor from the reactant gas.

Abstract: Methods are provided for treating germanium surfaces in preparation for subsequent deposition, particularly gate dielectric deposition by atomic layer deposition (ALD). Prior to depositing, the germanium surface is treated with plasma products or thermally reacted with vapor reactants. Examples of surface treatments leave oxygen bridges, nitrogen bridges, —OH, —NH and/or —NH2 terminations that more readily adsorb ALD reactants. The surface treatments avoid deep penetration of the reactants into the germanium bulk but improve nucleation.

Abstract: Aspects of the invention include a method and apparatus for processing a substrate using a multi-chamber processing system (e.g., a cluster tool) adapted to process substrates in one or more batch and/or single substrate processing chambers to increase the system throughput. In one embodiment, a system is configured to perform a substrate processing sequence that contains batch processing chambers only, or batch and single substrate processing chambers, to optimize throughput and minimize processing defects due to exposure to a contaminating environment. In one embodiment, a batch processing chamber is used to increase the system throughput by performing a process recipe step that is disproportionately long compared to other process recipe steps in the substrate processing sequence that are performed on the cluster tool. In another embodiment, two or more batch chambers are used to process multiple substrates using one or more of the disproportionately long processing steps in a processing sequence.

Abstract: Disclosed is a substrate processing apparatus, including a reaction tube to process a substrate therein, wherein the reaction tube includes an outer tube, an inner tube disposed inside the outer tube, and a support section to support the inner tube, the inner tube and the support section are made of quartz or silicon carbide, and a shock-absorbing member is provided between the support section and the inner tube.

Abstract: Germanium has higher mobility than silicon and therefore is considered to be a good alternative semiconductor for CMOS technology. Surface treatments a can facilitate atomic layer deposition (ALD) of thin films, such as high-k dielectric layers, on germanium substrates. Surface treatment can comprise the formation of a thin layer of GeOx or GeOxNy. After surface treatment and prior to deposition of the desired thin film, a passivation layer may be deposited on the substrate. The passivation layer may be, for example, a metal oxide layer deposited by ALD.

Abstract: Methods and apparatus for processing substrates are provided herein. In some embodiments, an apparatus for processing a substrate includes a flow equalizer configured to control the flow of gases between a process volume and an exhaust port of a process chamber. The flow equalizer includes at least one restrictor plate configured to be disposed in a plane proximate a surface of a substrate to be processed and defines an azimuthally non-uniform gap between an edge of the at least one restrictor plate and one of either a chamber wall or a substrate support when installed in the process chamber.

Abstract: A method of forming (and an apparatus for forming) a metal-doped aluminum oxide layer on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process.

Abstract: The present invention provides a method for dielectric passivating the surface of a solar cell by accumulation of negative fixed charges of a first type at the interface between semiconductor material and a passivating material. According to the invention the passivating material comprises an oxide system, for example a binary oxide system, comprising Al2O3 and at least one metal oxide or metalloid oxide which enhances the tetrahedral structure of Al2O3, for example, an (Al2O3)x(TiO2)1-x alloy. In this way it is possible to combine the desirable properties from at least two different oxides, while eliminating the undesirable properties of each individual material. The oxide system can be deposited onto the semiconductor surface by means of a sol-gel method, comprising the steps of formation of the metal oxide and/or metalloid oxide sol and the aluminum solution and then carefully mixing these together under stirring and ultrasonic treatment.

Abstract: The present invention generally provides methods and apparatuses that are adapted to form a high quality dielectric gate layer on a substrate. Embodiments contemplate a method wherein a metal plasma treatment process is used in lieu of a standard nitridization process to form a high dielectric constant layer on a substrate. Embodiments further contemplate an apparatus adapted to “implant” metal ions of relatively low energy in order to reduce ion bombardment damage to the gate dielectric layer, such as a silicon dioxide layer and to avoid incorporation of the metal atoms into the underlying silicon. In general, the process includes the steps of forming a high-k dielectric and then terminating the surface of the deposited high-k material to form a good interface between the gate electrode and the high-k dielectric material.

Abstract: Methods and apparatus are provided for magnetic tunnel junction (MTJ) devices and arrays, comprising metal-insulator-metal (M-I-M) structures with opposed first and second ferro-magnetic electrodes with alterable relative magnetization direction. The insulator is formed by depositing an oxidizable material (e.g., Al) on the first electrode, naturally oxidizing it, e.g., at about 0.03 to 10 milli-Torr for up to a few thousand seconds at temperatures below about 35° C., then further rapidly (e.g., plasma) oxidizing at a rate much larger than that of the initial natural oxidation. The second electrode of the M-I-M structure is formed on this oxide. More uniform tunneling properties result. A second oxidizable material layer is optionally provided after the initial natural oxidation and before the rapid oxidation step during which it is substantially entirely converted to insulating oxide. A second natural oxidation cycle may be optionally provided before the second layer is rapidly oxidized.

Abstract: Transistors that include multilayered dielectric films on a channel region are provided. The multilayered dielectric comprises a lower dielectric film that may have a thickness that is at least 50% the thickness of the multilayered dielectric film and that comprises a metal oxide, a metal silicate, an aluminate, or a mixture thereof, and an upper dielectric film on the lower dielectric film, the upper dielectric film comprising a Group III metal oxide, Group III metal nitride, Group XIII metal oxide or Group XIII metal nitride. A gate electrode is provided on the multilayered dielectric film.

Abstract: A method of forming (and an apparatus for forming) a metal-doped aluminum oxide layer on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process.

Abstract: A semiconductor device has a diffusion barrier formed between a doped glass layer and surface structures formed on a substrate. The diffusion barrier includes alumina and optionally a nitride, and has a layer thickness satisfying the high aspect ratio of the gaps between the surface structures, while adequately preventing dopants in doped glass layer from diffusing out of the doped glass layer to the surface structures and the substrate. Further, heavy water can be used during the formation of the alumina so that deuterium may be accomplished near the interface of surface structures and the substrate to enhance the performance of the device.

Abstract: A method for manufacturing a semiconductor device includes heating a substrate having an insulation film thereon to a first substrate temperature so that oxidizing species are emitted from the insulating film, the insulating film having a recessed portion formed in a surface thereof, forming a metal film on the insulating film at a second substrate temperature lower than the first substrate temperature, and oxidizing at least part of the metal film with oxidizing species remaining in the insulating film.

Abstract: Disclosed is a capacitor with a dielectric layer having a low equivalent oxide thickness compared to a HfO2 layer and capable of decreasing a level of a leakage current incidence and a method for fabricating the same. Particularly, the capacitor includes: a bottom electrode; a Hf1-xLaxO layer on the bottom electrode; and a top electrode on the Hf1-xLaxO layer, wherein x is an integer. The method includes the steps of: forming at least one bottom electrode being made of polysilicon doped with impurities; nitriding a surface of the bottom electrode; depositing the amorphous Hf1-xLaxO layer on the nitrided surface of the bottom electrode; performing a thermal process for crystallizing the amorphous Hf1-xLaxO layer and removing impurities existed within the Hf1-xLaxO layer; nitriding a surface of the crystallized Hf1-xLaxO layer; and forming the top electrode being made of polysilicon doped with impurities on the nitrided surface of the crystallized Hf1-xLaxO layer.

Abstract: The invention includes an atomic layer deposition method of forming a layer of a deposited composition on a substrate. The method includes positioning a semiconductor substrate within an atomic layer deposition chamber. On the substrate, an intermediate composition monolayer is formed, followed by a desired deposited composition from reaction with the intermediate composition, collectively from flowing multiple different composition deposition precursors to the substrate within the deposition chamber. A material adheres to a chamber internal component surface from such sequentially forming. After such sequentially forming, a reactive gas flows to the chamber which is different in composition from the multiple different deposition precursors and which is effective to react with such adhering material. After the reactive gas flowing, such sequentially forming is repeated. Further implementations are contemplated.

Abstract: A gate dielectric structure (201) fabrication process includes forming a transitional dielectric film (205) overlying a silicon oxide film (204). A high dielectric constant film (206) is then formed overlying an upper surface of the transitional dielectric film (205). The composition of the transitional dielectric film (205) at the silicon oxide film (204) interface primarily comprises silicon and oxygen. The high K dielectric (206) and the composition of the transitional dielectric film (205) near the upper surface primarily comprise a metal element and oxygen. Forming the transitional dielectric film (205) may include forming a plurality of transitional dielectric layers (207) where the composition of each successive transitional dielectric layer (207) has a higher concentration of the metal element and a lower concentration of silicon.

Abstract: For fabricating a memory device, spacers are formed to sides of word-line gates. In addition, aluminum oxide is formed as one of a liner layer or a cover layer to the spacers. The aluminum oxide has a chemical composition of Al2O3 for example. Such aluminum oxide may be used as an etch stop layer in a periphery region, a metal silicide block, and a hydrogen block for enhanced performance of the memory device.

Abstract: The present invention provides method of producing an annealed wafer wherein a silicon single crystal wafer produced by the Czochralski (CZ) method is subjected to a high temperature annealing in an atmosphere of an argon gas, a hydrogen gas, or a mixture gas thereof at a temperature of 1100–1350° C. for 10–600 minutes, during the annealing the silicon single crystal wafer is supported by a supporting jig only in a central side region of the wafer except for 5 mm or more from a peripheral end of the wafer, and before performing the high temperature annealing, a pre-annealing is performed at a temperature less than the temperature of the high temperature annealing to grow oxide precipitates. Thereby, there is provided a method of producing an annealed wafer wherein slip dislocations generated in a high temperature annealing can be suppressed even in the case of a silicon single crystal wafer having a large diameter of 300 mm or more, and provided the annealed wafer.

Abstract: A method of forming an aluminum containing film on a substrate includes providing a precursor having the chemical structure: Al(NR1R2)(NR3R4)(NR5R6); where each of R1, R2, R3, R4, R5 and R6 is independently selected from the group consisting of hydrogen and an alkyl group including at least two carbon atoms. The precursor is utilized to form a film on the substrate including at least one of aluminum oxide, aluminum nitride and aluminum oxy-nitride. Each of the R1–R6 groups can be the same or different and can by straight or branched chain alkyls. An exemplary precursor that has is useful in forming aluminum containing films is tris diethylamino aluminum.