Abstract: A description is given of a semiconductor component comprising a drift zone of a first conduction type and at least one Schottky metal zone arranged in the drift zone, and of a method for producing a semiconductor component.

Abstract: Cobalt silicide (CoSi2) Schottky diodes fabricated per the current art suffer from excess leakage currents in reverse bias. In this invention, an floating p-type region encircles each anode of a CoSi2 Schottky diode comprising of one or more CoSi2 anodes. The resulting p-n junction forms a depletion region under the Schottky junction that reduces leakage current through the Schottky diodes in reverse bias operation.

Abstract: A junction barrier Schottky device includes a semiconductor substrate with basal, drift, and channel regions doped to a first conductivity type. The channel region is more highly doped than the drift region, and a blocking region doped to a second conductivity type is disposed at least partly around the channel region. A Schottky barrier is formed on and in contact with the channel and blocking regions.

Abstract: A variable-resistance material memory (VRMM) device includes a container conductor disposed over an epitaxial semiconductive prominence that is coupled to a VRMM. A VRMM device may also include a conductive plug in a recess that is coupled to a VRMM. A VRMM array may also include a conductive plug in a surrounding recess that is coupled to a VRMM. Apparatuses include the VRMM with one of the diode constructions.

Abstract: A Schottky diode exhibiting low series resistance is efficiently fabricated using a substantially standard CMOS process flow by forming the Schottky diode using substantially the same structures and processes that are used to form a field effect transistor (FET) of a CMOS IC device. Polycrystalline silicon, which is used to form the gate structure of the FET, is utilized to form an isolation structure between the Schottky barrier and backside structure of the Schottky diode. Silicide (e.g., cobalt silicide (CoSi2)) structures, which are utilized to form source and drain metal-to-silicon contacts in the FET, are used to form the Schottky barrier and backside Ohmic contact of the Schottky diode. Heavily doped drain (HDD) diffusions and lightly doped drain (LDD) diffusions, which are used to form source and drain diffusions of the FET, are utilized to form a suitable contact diffusion under the backside contact silicide.

Abstract: The invention provides a Schottky barrier diode in which a forward voltage is low, a backward leakage current is small, and a withstanding voltage of an element is high, by improving both the forward voltage VF and the backward leakage current IR. A Schottky barrier diode of the invention includes a semiconductor substrate whose surface is provided with a semiconductor layer of first conduction type, a plurality of semiconductor layers of second conduction type provided as junction barriers at a predetermined depth from the surface of the semiconductor layer of first conduction type, an annular shape guard ring comprised of a semiconductor layer of second conduction type to surround the semiconductor layer of second conduction type on the surface of the semiconductor layer of first conduction type, and a metal layer disposed so as to contact the semiconductor layer of first conduction type and the semiconductor layer of second conduction type.

Abstract: In semiconductor devices and methods for their manufacture, the semiconductor devices are arranged as a trench-Schottky-barrier-Schottky diode having a pn diode as a clamping element (TSBS-pn), and having additional properties compared to usual TSBS elements which make possible adaptation of the electrical properties. The TSBS-pn diodes are produced using special manufacturing methods, are arranged in their physical properties such that they are suitable for use in a rectifier for a motor vehicle generator, and are also able to be operated as Z diodes.

Abstract: A method is provided for forming a metal/semiconductor/metal (MSM) back-to-back Schottky diode from a silicon (Si) semiconductor. The method deposits a Si semiconductor layer between a bottom electrode and a top electrode, and forms a MSM diode having a threshold voltage, breakdown voltage, and on/off current ratio. The method is able to modify the threshold voltage, breakdown voltage, and on/off current ratio of the MSM diode in response to controlling the Si semiconductor layer thickness. Generally, both the threshold and breakdown voltage are increased in response to increasing the Si thickness. With respect to the on/off current ratio, there is an optimal thickness. The method is able to form an amorphous Si (a-Si) and polycrystalline Si (polySi) semiconductor layer using either chemical vapor deposition (CVD) or DC sputtering. The Si semiconductor can be doped with a Group V donor material, which decreases the threshold voltage and increases the breakdown voltage.

Abstract: In an embodiment, a integrated semiconductor device includes a first Vertical Junction Field Effect Transistor (VJFET) having a source, and a gate disposed on each side of the first VJFET source, and a second VJFET transistor having a source, and a gate disposed on each side of the second VJFET source. At least one gate of the first VJFET is separated from at least one gate of the second VJFET by a channel. The integrated semiconductor device also includes a Junction Barrier Schottky (JBS) diode positioned between the first and second VJFETs. The JBS diode comprises a metal contact that forms a rectifying contact to the channel and a non-rectifying contact to at least one gate of the first and second VJFETs, and the metal contact is an anode of the JBS diode.

Abstract: An SiC semiconductor device is provided, which comprises: a substrate made of silicon carbide and having a principal surface; a drift layer made of silicon carbide and disposed on the principal surface; an insulating layer disposed on the drift layer and including an opening; a Schottky electrode contacting with the drift layer through the opening; a termination structure disposed around an outer periphery of the opening; and second conductivity type layers disposed in a surface part of the drift layer, contacting the Schottky electrode, surrounded by the termination structure, and separated from one another. The second conductivity type layers include a center member and ring members. Each ring member surrounds the center member and is arranged substantially in a point symmetric manner with respect to the center member.

Abstract: A junction barrier Schottky (JBS) rectifier device and a method of making the device are described. The device comprises an epitaxially grown first n-type drift layer and p-type regions forming p+-n junctions and self-planarizing epitaxially over-grown second n-type drift regions between and, optionally, on top of the p-type regions. The device may include an edge termination structure such as an exposed or buried P+ guard ring, a regrown or implanted junction termination extension (JTE) region, or a “deep” mesa etched down to the substrate. The Schottky contact to the second n-type drift region and the ohmic contact to the p-type region together serve as an anode. The cathode can be formed by ohmic contact to the n-type region on the backside of the wafer. The devices can be used in monolithic digital, analog, and microwave integrated circuits.

Abstract: A semiconductor device includes a substrate, a plurality of first columns having a first conductivity type, a plurality of second columns having a second conductivity type, a first electrode, and a second electrode. The first columns and the second columns are alternately arranged on the substrate to provide a super junction structure. The first electrode is disposed on the super junction structure, forms schottky junctions with the first columns, and forms ohmic junctions with the second columns. The second electrode is disposed on the substrate on an opposite side of the super junction structure. At least a part of the substrate and the super junction structure has lattice defects to provide a lifetime control region at which a lifetime of a minority carrier is controlled to be short.

Abstract: A Schottky barrier silicon carbide device has a Re Schottky metal contact. The Re contact 27 is thicker than 250 Angstroms and may be between 2000 and 4000 Angstroms. A termination structure is provided by ion milling an annular region around the Schottky contact.

Abstract: The invention provides a photodiode with an increased charge collection area, laterally spaced from an adjacent isolation region. Dopant ions of a first conductivity type with a first impurity concentration form a region surrounding at least part of the isolation region. These dopant ions are further surrounded by dopant ions of the first conductivity type with a second impurity concentration. The resulting isolation region structure increases the capacitance of the photodiode by allowing the photodiode to possess a greater charge collection region while suppressing the generation of dark current.

Abstract: A method for fabricating a field effect transistor includes: forming an insulating film provided on a semiconductor layer, the insulating film having an opening via which a surface of the semiconductor layer is exposed and including silicon oxide; forming a Schottky electrode on the insulating film and in the opening, the Schottky electrode having an overhang portion and having a first contact layer that is provided in a region contacting the insulating film and contains oxygen, and a second contact layer that is provided on the first contact layer and contains a smaller content of oxygen than that of the first contact layer; and removing the insulating film by a solution including hydrofluoric acid.

Abstract: A diode structure having a reduced on-resistance in the forward-biased condition includes semiconductor layers, preferably of silicon carbide. The anode and cathode of the device are located on the same side of the bottom semiconductor layer, providing lateral conduction across the diode body. The anode is positioned on a semiconductor mesa, and the sides of the mesa are covered with a nonconductive spacer extending from the anode to the bottom layer. An ohmic contact, preferably a metal silicide, covers the surface of the bottom layer between the spacer material and the cathode. The conductive path extends from anode to cathode through the body of the mesa and across the bottom semiconductor layer, including the ohmic contact. The method of forming the diode includes reacting layers of silicon and metal on the appropriate regions of the diode to form an ohmic contact of metal silicide.

Abstract: The structure for millimeter-wave frequency applications, includes a Schottky barrier diode (SBD) with a cutoff frequency (FC) above 1.0 THz formed on a SiGe BiCMOS wafer. A method is also contemplated for forming a Schottky barrier diode on a SiGe BiCMOS wafer, including forming a structure which provides a cutoff frequency (Fc) above about 1.0 THz. In embodiments, the structure which provides a cutoff frequency (Fc) above about 1.0 THz may include an anode having an anode area which provides a cutoff frequency (FC) above about 1.0 THz, an n-epitaxial layer having a thickness which provides a cutoff frequency (FC) above about 1.0 THz, a p-type guardring at an energy and dosage which provides a cutoff frequency (FC) above about 1.0 THz, the p-type guardring having a dimension which provides a cutoff frequency (FC) above about 1.0 THz, and a well tailor with an n-type dopant which provides a cutoff frequency (FC) above about 1.0 THz.

Abstract: A wide bandgap semiconductor device with surge current protection and a method of making the device are described. The device comprises a low doped n-type region formed by plasma etching through the first epitaxial layer grown on a heavily doped n-type substrate and a plurality of heavily doped p-type regions formed by plasma etching through the second epitaxial layer grown on the first epitaxial layer. Ohmic contacts are formed on p-type regions and on the backside of the n-type substrate. Schottky contacts are formed on the top surface of the n-type region. At normal operating conditions, the current in the device flows through the Schottky contacts. The device, however, is capable of withstanding extremely high current densities due to conductivity modulation caused by minority carrier injection from p-type regions.

Abstract: Under one aspect, a method of making a nanotube switch includes: providing a substrate having a first conductive terminal; depositing a multilayer nanotube fabric over the first conductive terminal; and depositing a second conductive terminal over the multilayer nanotube fabric, the nanotube fabric having a thickness, density, and composition selected to prevent direct physical and electrical contact between the first and second conductive terminals. In some embodiments, the first and second conductive terminals and the multilayer nanotube fabric are lithographically patterned so as to each have substantially the same lateral dimensions, e.g., to each have a substantially circular or rectangular lateral shape. In some embodiments, the multilayer nanotube fabric has a thickness from 10 nm to 200 nm, e.g., 10 nm to 50 nm. The structure may include an addressable diode provided under the first conductive terminal or deposited over the second terminal.

Abstract: Electron-hole production at a Schottky barrier has recently been observed experimentally as a result of chemical processes. This conversion of chemical energy to electronic energy may serve as a basic link between chemistry and electronics and offers the potential for generation of unique electronic signatures for chemical reactions and the creation of a new class of solid state chemical sensors. Detection of the following chemical species was established: hydrogen, deuterium, carbon monoxide, molecular oxygen. The detector (1b) consists of a Schottky diode between an Si layer and an ultrathin metal layer with zero force electrical contacts.

Abstract: A semiconductor device (20) comprising a trench MOS barrier Schottky diode having an integrated PN diode and a method for manufacturing same are described.

Abstract: A Schottky device and a semiconductor process of making the same are provided. The Schottky device comprises a substrate, a deep well, a Schottky contact, and an Ohmic contact. The substrate is doped with a first type of ions. The deep well is doped with a second type of ions, and formed in the substrate. The Schottky contact contacts a first electrode with the deep well. The Ohmic contact contacts a second electrode with a heavily doped region with the second type of ions in the deep well. Wherein the deep well has a geometry gap with a width formed under the Schottky contact, the first type of ions and the second type of ions are complementary, and the width of the gap adjusts the breakdown voltage.

Abstract: A clip structure for a semiconductor package is disclosed. The clip structure includes a major portion, at least one pedestal extending from the major portion, a downset portion, and a lead portion. The downset portion is between the lead portion and the major portion. The clip structure can be used in a MLP (micro-leadframe package).

Abstract: A fabrication process for a trench Schottky diode with differential oxide thickness within the trenches includes forming a first nitride layer on a substrate surface and subsequently forming a plurality of trenches in the substrate including, possibly, a termination trench. Following a sacrificial oxide layer formation and removal, sidewall and bottom surfaces of the trenches are oxidized. A second nitride layer is then applied to the substrate and etched such that the second nitride layer covers the oxide layer on the trench sidewalls but exposes the oxide layer on the trench bottom surfaces. The trench bottom surfaces are then re-oxidized and the remaining second nitride layer then removed from the sidewalls, resulting in an oxide layer of varying thickness being formed on the sidewall and bottom surfaces of each trench. The trenches are then filled with a P type polysilicon, the first nitride layer removed, and a Schottky barrier metal applied to the substrate surface.

Abstract: Embodiments of the invention provide a method of manufacturing a Schottky diode device. In one embodiment, the method includes: (a) providing a substrate; (b) sequentially forming a gate oxide layer and a polysilicon layer on the substrate; (c) partially oxidizing the polysilicon layer to form a poly oxide layer on the polysilicon layer; (d) forming and defining a photoresist layer on the poly oxide layer for exposing parts of the poly oxide layer; (e) etching the poly oxide layer, the polysilicon layer and the gate oxide layer via the photoresist layer for forming a poly oxide structure, a polysilicon structure and a gate oxide structure; and (f) removing the photoresist layer. The present invention introduces a poly oxide layer instead of the CVD oxide for preventing the photoresist lifting issue.

Abstract: An apparatus for stacking photonic devices is disclosed. The apparatus can include a base, first and second spaced apart rail portions disposed on the base, and a vacuum guide disposed on the base between the rail portions for forming a vacuum gradient that pulls a plurality of photonic devices and spacer bars together into a stack. Optionally, spaced apart photonic device supports can be placed on the base between the rail portions to lift the photonic devices off of the surface of the base. The apparatus can also include a clamping system to hold the stack in place so that a vapor deposition process can be used to apply coatings to the photonic devices. In one exemplary embodiment, the photonic devices can be laser bars.

Abstract: A silicon carbide-based device contact and contact fabrication method employ a layer of poly-silicon on a SiC substrate, with the contact's metal layer deposited on top of the poly-silicon. Both Schottky and ohmic contacts can be formed. The poly-silicon layer can be continuous or patterned, and can be undoped or doped to be n-type or p-type. The present contact and method provide excellent contact adhesion, and can be employed with a number of different device types, to provide electrical contacts for Schottky diodes, pn diodes, and transistors, for example.