Abstract: Methods and apparatuses to produce graphene and nanoparticle catalysts supported on graphene without the use of reducing agents, and with the concomitant production of heat, are provided. The methods and apparatuses employ radiant energy to reduce (deoxygenate) graphite oxide (GO) to graphene, or to reduce a mixture of GO plus one or more metals to to produce nanoparticle catalysts supported on graphene. Methods and systems to generate and utilize heat that is produced by irradiating GO, graphene and their metal and semiconductor nanocomposites with visible, infrared and/or ultraviolet radiation, e.g. using sunlight, lasers, etc. are also provided.

Abstract: A transistor including an oxide semiconductor with favorable electric characteristics and a manufacturing method thereof are provided. A semiconductor device includes a transistor. The transistor includes an oxide semiconductor film over a base insulating film, a gate electrode overlapping with the oxide semiconductor film with a gate insulating film interposed therebetween, and a pair of electrodes in contact with the oxide semiconductor film and serving as a source electrode and a drain electrode. The base insulating film includes a first oxide insulating film partly in contact with the oxide semiconductor film and a second oxide insulating film in the periphery of the first oxide insulating film. An end portion of the oxide semiconductor film which crosses the channel width direction of the transistor is located over the second oxide insulating film.

Abstract: Oxygen, silicon, germanium, carbon, or nitrogen is selectively implanted into a workpiece. The workpiece is annealed to incorporate the ions into the workpiece. A compound semiconductor is then formed on the workpiece. For example, gallium nitride may be formed on a silicon, silicon carbide, or sapphire workpiece. The width of the implanted regions can be configured to compensate for any shrinkage during annealing.

Abstract: The amount of water and hydrogen contained in an oxide semiconductor film is reduced, and oxygen is supplied sufficiently from a base film to the oxide semiconductor film in order to reduce oxygen deficiencies. A stacked base film is formed, a first heat treatment is performed, an oxide semiconductor film is formed over and in contact with the stacked base film, and a second heat treatment is performed. In the stacked base film, a first base film and a second base film are stacked in this order. The first base film is an insulating oxide film from which oxygen is released by heating. The second base film is an insulating metal oxide film. An oxygen diffusion coefficient of the second base film is smaller than that of the first base film.

Abstract: An object is to provide a highly reliable semiconductor device having stable electric characteristics by using an oxide semiconductor film having stable electric characteristics. Another object is to provide a semiconductor device having higher mobility by using an oxide semiconductor film having high crystallinity. A crystalline oxide semiconductor film is formed over and in contact with an insulating film whose surface roughness is reduced, whereby the oxide semiconductor film can have stable electric characteristics. Accordingly, the highly reliable semiconductor device having stable electric characteristics can be provided. Further, the semiconductor device having higher mobility can be provided.

Abstract: A method of fabricating MOTFTs on transparent substrates by positioning opaque gate metal on the substrate front surface and depositing gate dielectric material overlying the gate metal and a surrounding area and metal oxide semiconductor material on the dielectric material. Depositing selectively removable etch stop material on the semiconductor material and photoresist on the etch stop material to define an isolation area in the semiconductor material. Removing uncovered portions of the etch stop. Exposing the photoresist from the substrate rear surface using the gate metal as a mask and removing exposed portions leaving the etch stop material overlying the gate metal covered. Etching the semiconductor material to isolate the TFT. Selectively etching the etch stop layer to leave a portion overlying the gate metal defining a channel area. Depositing and patterning conductive material to form source and drain areas on opposed sides of the channel area.

Abstract: A method for fabricating a field-effect transistor having a gate electrode, a source electrode, a drain electrode, and an active layer forming a channel region, the active layer having an oxide semiconductor mainly containing magnesium and indium is disclosed. The method includes a deposition step of depositing an oxide film, a patterning step of patterning the oxide film by processes including etching to obtain the active layer, and a heat-treatment step of heat-treating the obtained active layer subsequent to the patterning step.

Abstract: In a process of manufacturing a transistor including an oxide semiconductor layer, an amorphous oxide semiconductor layer which includes a region containing excess oxygen as compared to a stoichiometric composition ratio of an oxide semiconductor in a crystalline state is formed over a silicon oxide film, an aluminum oxide film is formed over the amorphous oxide semiconductor layer, and then heat treatment is performed so that at least part of the amorphous oxide semiconductor layer is crystallized and an oxide semiconductor layer which includes a crystal having a c-axis substantially perpendicular to a surface of the oxide semiconductor layer is formed.

Abstract: The present invention provides a manufacturing method of a semiconductor device having a semiconductor nonvolatile memory element that is highly reliable and that can increase a variation of a threshold voltage. Further, the present invention provides a method for manufacturing a semiconductor device having a highly reliable semiconductor nonvolatile memory element using a large substrate. According to the present invention, sputtering using, as a target, a solid solution containing silicon that exceeds a solid solubility limit is conducted, so that a conductive film including a conductive layer of a metal element that is a main component of the solid solution and silicon particles is formed, and then, the conductive layer of the metal element is removed to expose silicon particles. Furthermore, a semiconductor device having a semiconductor nonvolatile memory element using the silicon particles as a floating gate electrode is manufactured.

Abstract: A system is provided for heating or cooling discrete, linearly conveyed substrates having a gap between a trailing edge of a first substrate and a leading edge of a following substrate in a conveyance direction. The system includes a chamber, and a conveyor operably configured within the chamber to move the substrates through at a conveyance rate. A plurality of individually controlled temperature control units, for example heating or cooling units, are disposed linearly within the chamber along the conveyance direction. A controller is in communication with the temperature control units and is configured to cycle output of the temperature control units from a steady-state temperature output as a function of the spatial position of the conveyed substrates within the chamber relative to the temperature control units so as to decrease temperature variances in the substrates caused by movement of the substrates through the chamber.

Abstract: One embodiment of the present invention provides a highly reliably display device in which a high mobility is achieved in an oxide semiconductor. A first oxide component is formed over a base component. Crystal growth proceeds from a surface toward an inside of the first oxide component by a first heat treatment, so that a first oxide crystal component is formed in contact with at least part of the base component. A second oxide component is formed over the first oxide crystal component. Crystal growth is performed by a second heat treatment using the first oxide crystal component as a seed, so that a second oxide crystal component is formed. Thus, a stacked oxide material is formed. A transistor with a high mobility is formed using the stacked oxide material and a driver circuit is formed using the transistor.

Abstract: An object is to provide a method for manufacturing a highly reliable semiconductor device including a transistor with stable electric characteristics. A method for manufacturing a semiconductor device includes the steps of: forming a gate electrode over a substrate having an insulating surface; forming a gate insulating film over the gate electrode; forming an oxide semiconductor film over the gate insulating film; irradiating the oxide semiconductor film with an electromagnetic wave such as a microwave or a high frequency; forming a source electrode and a drain electrode over the oxide semiconductor film irradiated with the electromagnetic wave; and forming an oxide insulating film, which is in contact with part of the oxide semiconductor film, over the gate insulating film, the oxide semiconductor film, the source electrode, and the drain electrode.

Abstract: The invention provides methods which can be applied during the epitaxial growth of two or more layers of semiconductor materials so that the qualities of successive layer are successively improved. In preferred embodiments, surface defects present in one epitaxial layer are capped with a masking material. A following layer is then grown so it extends laterally above the caps according to the known phenomena of epitaxial lateral overgrowth. The methods of the invention can be repeated by capping surface defects in the following layer and then epitaxially growing a second following layer according to ELO. The invention also includes semiconductor structures fabricated by these methods.

Abstract: In a first aspect, a vertical semiconductor diode is provided that includes (1) a first semiconductor layer formed above a substrate; (2) a second semiconductor layer formed above the first semiconductor layer; (3) a first native oxide layer formed above the first semiconductor layer; and (4) a third semiconductor layer formed above the first semiconductor layer, second semiconductor layer and first native oxide layer so as to form the vertical semiconductor diode that includes the first native oxide layer. Numerous other aspects are provided.

Abstract: Device structures with a reduced junction area in an SOI process, methods of making the device structures, and design structures for a lateral diode. The device structure includes one or more dielectric regions, such as STI regions, positioned in the device region and intersecting the p-n junction between an anode and cathode. The dielectric regions, which may be formed using shallow trench isolation techniques, function to reduce the width of a p-n junction with respect to the width area of the cathode at a location spaced laterally from the p-n junction and the anode. The width difference and presence of the dielectric regions creates an asymmetrical diode structure. The volume of the device region occupied by the dielectric regions is minimized to preserve the volume of the cathode and anode.

Abstract: A semiconductor element includes a semiconductor layer mainly composed of MgxZn1-xO (0<=x<1), in which manganese contained in the semiconductor layer as impurities has a density of not more than 1×1016 cm?3.

Abstract: A MTJ in an MRAM array is disclosed with a composite free layer having a lower crystalline layer contacting a tunnel barrier and an upper amorphous NiFeX layer for improved bit switching performance. The crystalline layer is Fe, Ni, or FeB with a thickness of at least 6 Angstroms which affords a high magnetoresistive ratio. The X element in the NiFeX layer is Mg, Hf, Zr, Nb, or Ta with a content of 5 to 30 atomic %. NiFeX thickness is preferably between 20 to 40 Angstroms to substantially reduce bit line switching current and number of shorted bits. In an alternative embodiment, the crystalline layer may be a Fe/NiFe bilayer. Optionally, the amorphous layer may have a NiFeM1/NiFeM2 configuration where M1 and M2 are Mg, Hf, Zr, Nb, or Ta, and M1 is unequal to M2. Annealing at 300° C. to 360° C. provides a high magnetoresistive ratio of about 150%.

Abstract: A metal oxide semiconductor structure and a production method thereof, the structure including: a substrate; a gate electrode, deposited on the substrate; a gate insulation layer, deposited over the gate electrode and the substrate; an IGZO layer, deposited on the gate insulation layer and functioning as a channel; a source electrode, deposited on the gate insulation layer and being at one side of the IGZO layer; a drain electrode, deposited on the gate insulation layer and being at another side of the IGZO layer; a first passivation layer, deposited over the source electrode, the IGZO layer, and the drain electrode; a second passivation layer, deposited over the first passivation layer; and an opaque resin layer, deposited over the source electrode, the second passivation layer, and the drain electrode.

Abstract: Provided are a composition for an oxide semiconductor, a preparation method of the composition, a method for forming an oxide semiconductor thin film using the composition, and a method for forming an electronic device using the composition. The composition for an oxide semiconductor includes a compound for an oxide thin film and a stabilizer for adjusting conductivity of the oxide thin film. The stabilizer is included with the mole number of two to twelve times larger than the total mole number of the compound.

Abstract: An apparatus and method for fabricating a polycrystalline silicon (poly-Si) thin film are provided. The apparatus includes a chamber, a substrate stage installed at a lower portion in the chamber and on which a substrate including a conductive layer is located, a power application unit installed at an upper portion in the chamber and including an electrode terminal applying power to the conductive layer, and a conductive pad interposed between the electrode terminal and the conductive layer. Thus, it is possible to form a uniform electric field on the conductive layer, and to form a good quality of poly-Si thin film.

Abstract: A method for fabricating a semiconductor device includes the steps of forming a SiC film, forming trenches at a surface of the SiC film, heat-treating the SiC film with silicon supplied to the surface of the SiC film, and obtaining a plurality of macrosteps to constitute channels, at the surface of the SiC film by the step of heat-treating. Taking the length of one cycle of the trenches as L and the height of the trenches as h, a relation L=h(cot ?+cot ?) (where ? and ? are variables that satisfy the relations 0.5??, ??45) holds between the length L and the height h. Consequently, the semiconductor device can be improved in property.

Abstract: A light emitting chip includes a substrate, a heat conducting layer formed on the substrate, a light emitting structure and a connecting layer connecting the heat conducting layer with the light emitting structure. The heat conducting layer includes a plurality of spaced catalyst areas on the substrate and a plurality of carbon nanotube islands vertically grown from the catalyst areas. The light emitting structure includes a first semiconductor layer, a light emitting layer and a second semiconductor layer. A first transparent conductive layer and a current conducting layer are sandwiched between the first semiconductor layer and the connecting layer. A second transparent conductive layer is formed on the second semiconductor layer.

Abstract: A semiconductor device for high power application in which a novel semiconductor material having high mass productivity is provided. An oxide semiconductor film is formed, and then, first heat treatment is performed on the exposed oxide semiconductor film in order to reduce impurities such as moisture or hydrogen in the oxide semiconductor film. Next, in order to further reduce impurities such as moisture or hydrogen in the oxide semiconductor film, oxygen is added to the oxide semiconductor film by an ion implantation method, an ion doping method, or the like, and after that, second heat treatment is performed on the exposed oxide semiconductor film.

Abstract: A method of fabrication of thin films for photovoltaic or electronic applications is provided. The method includes fabricating a nanocrystal precursor layer and selenizing the nanocrystal precursor layer in a selenium containing atmosphere. The nanocrystal precursor layer includes one of CuInS2, CuIn(Sy,Se1?y)2, CuGaS2, CuGa(Sy,Se1?y)2, Cu(InxGa1?x)S2, and Cu(InxGa1?x)(Sy,Se1?y)2 nanoparticles and combinations thereof, wherein 0?x?1 and 1?y?0.

Abstract: The present method of forming a metal oxide film can increase production efficiency while maintaining the low resistance of the metal oxide film. The present method of forming a metal oxide film includes first misting a solution containing a metallic element and ethylenediamine; meanwhile, heating a substrate; and then, supplying the misted solution onto a first main surface of the substrate.

Abstract: A multi-layer film body comprises a plastic substrate strip conveyed in a first direction in a roll-to-roll process for printing electronic organic components on the substrate. A first electrically conducting layer is on the substrate, a semiconductor layer is on the first layer, an insulator layer is on the semiconductor layer and a second electrically conducting layer is on the insulator layer, the layers comprising a first interconnection assembly portion and a second electronic assembly portion successively positioned in the first direction, each portion comprising a central zone and a respective conductor tract input zone and conductor tract output zone bordering the respective central zones, the input, central and output zones of each portion each comprising parallel conductor tracts in the first conducting layer. Electrical connectors in the second conducting layer interconnect selected ones of the conductor tracts in the two portions.

Abstract: Methods form epitaxial materials by forming at least two gate stacks on a silicon substrate and forming sidewall spacers on sides of the gate stacks. Such methods pattern a recess in the silicon substrate between adjacent ones of the gate stacks. The methods also provide a liner in a bottom of the recess, and epitaxially grow epitaxial material from sidewalls of the recess to fill the recess with the epitaxial material.

Abstract: It is an object to provide a semiconductor device including a thin film transistor with favorable electric properties and high reliability, and a method for manufacturing the semiconductor device with high productivity. In an inverted staggered (bottom gate) thin film transistor, an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, and a buffer layer formed using a metal oxide layer is provided between the semiconductor layer and a source and drain electrode layers. The metal oxide layer is intentionally provided as the buffer layer between the semiconductor layer and the source and drain electrode layers, whereby ohmic contact is obtained.

Abstract: A semiconductor device includes a ZnO thin film. The semiconductor device comprises a substrate and a ZnO thin film. The ZnO thin film includes at least two zones with different carrier types. The current invention also discloses a manufacturing method of a semiconductor device having ZnO thin film. A ZnO thin film doped with dopant is deposited on a substrate. Thereafter, a laser irradiates on the ZnO thin film to activate the dopant in the irradiated zone of the ZnO thin film to change the carrier type.

Abstract: A metal oxide semiconductor device including an active layer of metal oxide, a layer of gate dielectric, and a layer of low trap density material. The layer of low trap density material is sandwiched between the active layer of metal oxide and the layer of gate dielectric. The layer of low trap density material has a major surface parallel and in contact with a major surface of the active layer of metal oxide to form a low trap density interface with the active layer of metal oxide. A second layer of low trap density material can optionally be placed in contact with the opposed major surface of the active layer of metal oxide so that a low trap density interface is formed with both surfaces of the active layer of metal oxide.

Abstract: A semiconductor device and method of manufacture thereof wherein a PMOS source/drain region of a transistor within the substrate includes a first strained layer in the PMOS source/drain region and a first capping layer in contact with the first strained layer. Further, the semiconductor device and method provide for an NMOS source/drain region of a transistor within the substrate including a second strained layer in the NMOS source/drain region and a second capping layer in contact with the second strained layer.

Abstract: An object of the present invention is to provide a novel semiconductor device which is excellent in stability, uniformity, reproducibility, heat resistance, durability and the like, and can exert excellent transistor properties. The semiconductor device is a thin-film transistor, and this thin-film transistor uses, as an active layer, a polycrystalline oxide semiconductor thin film containing In and two or more metals other than In and having an electron carrier concentration of less than 1×1018/cm3.

Abstract: An amorphous oxide containing hydrogen (or deuterium) is applied to a channel layer of a transistor. Accordingly, a thin film transistor having superior TFT properties can be realized, the superior TFT properties including a small hysteresis, normally OFF operation, a high ON/OFF ratio, a high saturated current, and the like. Furthermore, as a method for manufacturing a channel layer made of an amorphous oxide, film formation is performed in an atmosphere containing a hydrogen gas and an oxygen gas, so that the carrier concentration of the amorphous oxide can be controlled.

Abstract: A semiconductor device includes a ZnO-containing substrate containing Li, a zinc silicate layer formed above the ZnO-containing substrate, and a semiconductor layer epitaxially grown relative to the ZnO-containing substrate via the zinc silicate layer.

Abstract: Provided are a method of manufacturing a transparent N-doped p-type ZnO semiconductor layer using a surface chemical reaction between precursors containing elements constituting thin layers, and a thin film transistor (TFT) including the p-type ZnO semiconductor layer. The method includes the steps of: preparing a substrate and loading the substrate into a chamber; injecting a Zn precursor and an oxygen precursor into the chamber, and causing a surface chemical reaction between the Zn precursor and the oxygen precursor using an atomic layer deposition (ALD) technique to form a ZnO thin layer on the substrate; and injecting a Zn precursor and an nitrogen precursor into the chamber, and causing a surface chemical reaction between the Zn precursor and the nitrogen precursor to form a doping layer on the ZnO thin layer.

Abstract: In an annealing process, a Kesterite film is provided on a substrate. The Kesterite film and the substrate are generally planar, have an interface, and have a substrate exterior side and a Kesterite exterior side. An additional step includes locating the cap adjacent the Kesterite exterior side. A further step includes applying sufficient heat to the Kesterite film and the substrate for a sufficient time to anneal the Kesterite film. The annealing is carried out with the cap adjacent the Kesterite exterior side. In another aspect, the film is not limited to Kesterite, and the cap is employed without any precursor layer thereon. Solar cell manufacturing techniques employing the annealing techniques are also disclosed.

Abstract: An oxide semiconductor layer is formed with a deposition apparatus including a transfer mechanism for a substrate, a first deposition chamber in which an oxide semiconductor is deposited, and a first heating chamber in which first heat treatment is performed. The first deposition chamber and the first heating chamber are sequentially provided along a path of the substrate transferred by the transfer mechanism. The substrate is held so that an angle formed by a deposition surface of the substrate and the vertical direction is in a range of greater than or equal to 1° and less than or equal to 30°. Without exposure to the air, the first heat treatment can be performed after a first film is formed over the substrate.

Abstract: A photolithography step and an etching step for forming an island-shaped semiconductor layer is omitted, and a liquid crystal display device is manufactured through the following four photolithography steps: a step for forming a gate electrode (including a wiring or the like formed from the same layer), a step for forming a source electrode and a drain electrode (including a wiring or the like formed from the same layer), a step for forming a contact hole (including removal of an insulating layer or the like in a region other than the contact hole), and a step for forming a pixel electrode (including a wiring or the like formed from the same layer). In the step of forming the contact hole, a groove portion in which the semiconductor layer is removed is formed, so that formation of parasitic channels is prevented.

Abstract: A device for depositing an organic material includes a substrate; a mask having an opening portion and a shield portion; a fixing member for fixing the substrate and the mask to each other; a deposition source comprising a plurality of nozzles arranged in a first direction and configured to spray the organic material; and a plurality of shield plates near the plurality of nozzles on the deposition source. An angle ? between the substrate and a line extended from a distal end of one of the nozzles to a center of a distal end of a corresponding one of the shield plates is greater than or equal to a taper angle ? of the shield portion of the mask.

Abstract: A linear cluster deposition system includes a plurality of reaction chambers positioned in a linear horizontal arrangement. First and second reactant gas manifolds are coupled to respective process gas input port of each of the reaction chambers. An exhaust gas manifold having a plurality of exhaust gas inputs is coupled to the exhaust gas output port of each of the plurality of reaction chambers. A substrate transport vehicle transports at least one of a substrate and a substrate carrier that supports at least one substrate into and out of substrate transfer ports of each of the reaction chambers. At least one of a flow rate of process gas into the process gas input port of each of the reaction chambers and a pressure in each of the reaction chambers being chosen so that process conditions are substantially the same in at least two of the reaction chambers.

Abstract: It is an object to manufacture a semiconductor device in which a transistor including an oxide semiconductor has normally-off characteristics, small fluctuation in electric characteristics, and high reliability. First, first heat treatment is performed on a substrate, a base insulating layer is formed over the substrate, an oxide semiconductor layer is formed over the base insulating layer, and the step of performing the first heat treatment to the step of forming the oxide semiconductor layer are performed without exposure to the air. Next, after the oxide semiconductor layer is formed, second heat treatment is performed. An insulating layer from which oxygen is released by heating is used as the base insulating layer.

Abstract: A film formation is performed using a target in which a material which is volatilized more easily than gallium when heated at 400° C. to 700° C., such as zinc, is added to gallium oxide by a sputtering method with high mass-productivity which can be applied to a large-area substrate, such as a DC sputtering method or a pulsed DC sputtering method. This film is heated at 400° C. to 700° C., whereby the added material is segregated in the vicinity of a surface of the film. Another portion of the film has a decreased concentration of the added material and a sufficiently high insulating property; therefore, it can be used for a gate insulator of a semiconductor device, or the like.

Abstract: Described are an apparatus and a method for depositing a thin film on a web. The method includes depositing a first layer of a composite metal onto a web. A first selenium layer is deposited onto the first layer and the web is heated to selenize the first layer. Subsequently, a second layer of the composite metal is deposited onto the selenized first layer and a second selenium layer is deposited onto the second layer. The web is then heated to selenize the second layer. The composition of each composite metal layer can be varied to achieve desired bandgap gradients and other film properties. Segregation of gallium and indium is substantially reduced or eliminated because each incremental layer is selenized before the next incremental layer is deposited. The method can be implemented in production systems to deposit CIGS films on metal and plastic foils.

Abstract: Described herein is a method and liquid-based precursor composition for depositing a multicomponent film. In one embodiment, the method and compositions described herein are used to deposit Germanium Tellurium (GeTe), Antimony Tellurium (SbTe), Antimony Germanium (SbGe), Germanium Antimony Tellurium (GST), Indium Antimony Tellurium (IST), Silver Indium Antimony Tellurium (AIST), Cadmium Telluride (CdTe), Cadmium Selenide (CdSe), Zinc Telluride (ZnTe), Zinc Selenide (ZnSe), Copper indium gallium selenide (CIGS) films or other tellurium and selenium based metal compounds for phase change memory and photovoltaic devices.

Abstract: Provided are an aqueous solution composition for fluorine doped metal oxide semiconductor, a method for manufacturing a fluorine doped metal oxide semiconductor using the same, and a thin film transistor including the same. The aqueous solution composition for fluorine doped metal oxide semiconductor includes: a fluorine compound precursor made of one or two or more selected from the group consisting of a metal compound containing fluorine and an organic material containing fluorine; and an aqueous solution containing water or catalyst. The method for manufacturing a fluorine doped metal oxide semiconductor, includes: preparing an aqueous solution composition for fluorine doped metal oxide semiconductor, coating a substrate with the aqueous solution composition; and performing heat treatment on the coated substrate to form the fluorine doped metal oxide semiconductor.

Abstract: The substrate is used for opto-electric or electrical devices and comprises a layer of nitride grown by means of vapor phase epitaxy growth wherein both main surfaces of the nitride substrate are substantially consisting of non N-polar face and N-polar face respectively and the dislocation density of the substrate is 5×105/cm2 or less. Therefore, the template type substrate has a good dislocation density and a good value of FWHM of the X-ray rocking curve from (0002) plane less than 80, so that the resulting template type substrate is very useful for the epitaxy substrate from gaseous phase such as MOCVD, MBE and HVPE, resulting in possibility of making good opto-electric devices such as Laser Diode and large-output LED and good electric devices such as MOSFET.

Abstract: A technique capable of forming an oxide semiconductor target with a high quality in a low cost is provided. In a step of manufacturing zinc tin oxide (ZTO target) used in manufacturing an oxide semiconductor forming a channel layer of a thin-film transistor, by purposely adding the group IV element (C, Si, or Ge) or the group V element (N, P, or As) to a raw material, excessive carriers caused by the group III element (Al) mixed in the step of manufacturing the ZTO target are suppressed, and a thin-film transistor having good current (Id)-voltage (Vg) characteristics is achieved.

Abstract: A method of thin film epitaxial growth using atomic layer deposition is provided by introducing a first deposition precursor and a second deposition precursor into a chamber after a vent valve connected between the chamber and a vacuum pump is closed. The chamber is maintained in a thermal equilibrium state and a constant pressure as a result of keeping the first deposition precursor and the second deposition precursor inside the chamber thereby reducing deposition precursors consumption and achieving thin film epitaxial growth on the substrate.

Abstract: A thin film transistor, which has a first passivation layer and a second passivation layer to maintain high reliability while preventing hydrogen from being induced to a semiconductor layer, and a method for fabricating the thin film transistor are provided. The method includes providing a substrate including an insulation substrate, forming a gate electrode on the substrate, forming a gate insulation layer on the substrate and the gate electrode, forming a semiconductor layer on the gate insulation layer, forming source/drain electrodes on the semiconductor layer to expose a portion of a top portion of the semiconductor layer, forming a first passivation layer to cover exposed top portions of the gate insulation layer, the semiconductor layer and the source/drain electrodes, and forming a second passivation layer on the first passivation layer, wherein the forming of the second passivation layer comprises performing deposition at a higher temperature than the forming of the first passivation layer.

Abstract: A manufacturing method of a nitride substrate includes the steps of: preparing a ground substrate; forming a mask on the ground substrate; placing the ground substrate in a reactor, and heating the ground substrate to a temperature of 850° C. to 1100° C. In the step of heating the ground substrate, HCl and NH3 are supplied into the reactor so that partial pressure PHCl satisfies (1.5+0.0005p) kPa?PHCl?(4+0.0005p) kPa and partial pressure PNH3 satisfies (15?0.0009p) kPa?PNH3?(26?0.0017p) kPa, whereby an AlxGayIn1-x-yN crystal (0?x<1, 0<y?1) is grown, and whereby a ridge-volley structure including a plurality of ridges and valleys parallel to one another is formed. The AlxGayIn1-x-yN crystal is grown so that the ridge-valley structure is not buried while a height of the volleys from the ground substrate is allowed to exceed 2.5 (p?s).