Abstract: A semiconductor device includes a gate electrode formed on a semiconductor layer, source and drain layers formed in the semiconductor layer and disposed on both sides of the gate electrode, and a field plate disposed at the back of the semiconductor layer with an insulating layer provided therebetween.

Abstract: With non-contact and contact IC chips becoming common, it is necessary to mass-produce enormous amount of IC chips, which are utilizable for human beings, animals and plants, commercial products, banknotes, and the like, at low cost. For example, it is necessary to manufacture IC chips to be applied to commercial products, banknotes, and the like at a cost of 1 to several yen per IC chip, preferably, at a cost less than 1 yen, and it is desired to realize a structure of an IC chip that can be mass-produced at low cost and a manufacturing process of the IC chip.

Abstract: The present invention is characterized in that a transistor with its L/W set to 10 or larger is employed, and that |VDS| of the transistor is set equal to or larger than 1 V and equal to or less than |VGS?Vth|. The transistor is used as a resistor so that the resistance of a light emitting element can be held by the transistor. This slows down an increase in internal resistance of the light emitting element and the resultant current value reduction. Accordingly, a change with time in light emission luminance is reduced and the reliability is improved.

Abstract: A bonded SOI substrate having an active layer which is free from crystal defects is obtained by adding more than 9×1018 atoms/cm3 of boron to a wafer for active layer (10). Since the boron concentration in the wafer for active layer is high, a silicon oxide film is formed at a high rate. Consequently, there can be obtained a Smart-Cut wafer with high throughput. Furthermore, damages to the active layer due to the ion implantation can be reduced, thereby improving the quality of the active layer.

Abstract: The present invention relates generally to a semiconductor device having a channel region comprising a semiconductor alloy of a first semiconductor material and a second, different material, and wherein atomic distribution of the second material in the channel region is graded along a direction that is substantially parallel to a substrate surface in which the semiconductor device is located. Specifically, the semiconductor device comprises a field effect transistor (FET) that has a SiGe channel with a laterally graded germanium content.

Abstract: A wafer and the manufacturing and reclaiming methods thereof are disclosed. The wafer includes a semiconductor substrate and a protective layer formed on the surface of the semiconductor substrate. The reclaiming method of the wafer includes providing a wafer having a semiconductor substrate, a protective layer formed on the semiconductor substrate, and a polysilicon layer formed on the protective layer; and removing the polysilicon layer. The wafer and the reclaiming method of the wafer can prevent the substrate of the wafer from being destroyed during the reclaiming process and increase the reclaiming rate of the wafer.

Abstract: A substrate having target transfer regions thereon is provided. A sacrificial wafer is coated with a polymer layer with low adhesion to metals. A conductive layer is coated on the polymer layer and covered with a photoresist layer which is patterned to provide openings to the conductive layer. Thin film and passive or active device structures are formed on the conductive layer within the openings. The substrate is bonded to the sacrificial wafer wherein the thin film and passive or active device structures and the photoresist layer provide the bonding and wherein the thin film and passive or active device structures contact the substrate at the target transfer regions. The photoresist is stripped in a high frequency agitation bath wherein the photoresist separates from the sacrificial wafer and wherein the thin film and passive or active device structures separate from the polymer layer to complete transfer bonding.

Abstract: In a liquid crystal display device, a field sequential liquid crystal display device includes a liquid crystal panel having an upper substrate, a lower substrate and a liquid crystal layer therebetween; a backlight device under the liquid crystal panel for irradiating light to the liquid crystal panel and having three color light sources; and an image signal processor controlling a sequential lighting order and combination of the three color light sources.

Abstract: The invention aims to provide a peeling method without damaging a peeled off layer and to allow separation of not only a peeled off layer having a small surface area but also the entire surface of a peeled off layer having a large surface area. Further, the invention aims to provide a lightweight semiconductor device by sticking a peeled off layer to a variety of substrates and its manufacturing method. Especially, the invention aims to provide a lightweight semiconductor device by sticking a variety of elements such as TFT to a flexible film and its manufacturing method. Even in the case a first material layer 11 is formed on a substrate and a second material layer 12 is formed adjacently to the foregoing first material layer 11, and further, layered film formation, heating treatment at 500° C.

Abstract: A semiconductor device includes a first semiconductor layer that is formed on a first insulating layer; a second insulating layer that is formed on the first semiconductor layer; a second semiconductor layer that is formed on the second insulating layer; a first gate electrode that is formed on the second semiconductor layer; first conductive-source and drain layers that are formed in the second semiconductor layer and are arranged at sides of the gate electrode; and a first wiring layer that connects the first gate electrode to the first semiconductor layer.

Abstract: A process manufactures a wafer using semiconductor processing techniques. A bonding layer is formed on a top surface of a first wafer; a deep trench is dug in a substrate of semiconductor material belonging to a second wafer. A top layer of semiconductor material is formed on top of the substrate so as to close the deep trench at the top and form at least one buried cavity. The top layer of the second wafer is bonded to the first wafer through the bonding layer. The two wafers are subjected to a thermal treatment that causes bonding of at least one portion of the top layer to the first wafer and widening of the buried cavity. In this way, the portion of the top layer bonded to the first wafer is separated from the rest of the second wafer, to form a composite wafer.

Abstract: A method for forming a relaxed or pseudo-relaxed useful layer on a substrate is described. The method includes growing a strained semiconductor layer on a donor substrate, bonding a receiver substrate to the strained semiconductor layer by a vitreous layer of a material that becomes viscous above a certain viscosity temperature to form a first structure. The method further includes detaching the donor substrate from the first structure to form a second structure comprising the receiver substrate, the vitreous layer, and the strained layer, and then heat treating the second structure at a temperature and time sufficient to relax strains in the strained semiconductor layer and to form a relaxed or pseudo-relaxed useful layer on the receiver substrate.

Abstract: Provided is a strained SOI structure and a method of manufacturing the strained SOI structure. The strained SOI structure includes an insulating substrate, a SiO2 layer formed on the insulating substrate, and a strained silicon layer formed on the SiO2 layer.

Abstract: In order to adjust thickness of a bonded silicon single crystal film 15 depending of thickness of an SOI layer 5 to be obtained, depth of formation d1+tx of a separatory ion implanted layer 4, measured from a first main surface J, in the separatory ion implanted layer formation step is adjusted through energy of the ion implantation. Dose of the ion implantation is set smaller as the depth of formation measured from the first main surface J becomes smaller. A smaller dose results in a smaller surface roughness of the separation surface, and makes it possible to reduce polishing stock removal of the separation surface of the bonded silicon single crystal film in the planarization step. Uniformity in the thickness of the SOI layer can consequently be improved even for the case where a thin SOI layer has to be formed.

Abstract: The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.

Abstract: A method for producing thin layers of a semiconductor material from a donor wafer, which comprises in succession forming a first weakened region in a donor wafer below a first face and at a depth corresponding substantially to the thickness of a first thin layer to be transferred, detaching the first thin layer having upper and lower boundaries defined by the first face and the first weakened region, forming a second weakened region in the donor wafer after detachment of the first thin layer and without conducting an intermediate recycling step, with the second weakened region formed below a second face of the donor wafer and at a depth corresponding substantially to the thickness of a second thin layer to be transferred, and detaching the second thin layer having upper and lower boundaries defined by the second face and the second weakened region. Resultant semiconductor-on-insulator structures are also included.

Abstract: A transferring method including providing a substrate, forming a transferred layer over the substrate, joining a transfer member to the transferred layer, and removing the transferred layer from the substrate. The transferring method further includes transferring the transferred layer to the transfer member and reusing the substrate for another transfer. The transferring method may also include providing a substrate, forming a separation layer over the substrate, forming a transferred layer over the separation layer, and partly cleaving the separation layer such that a part of the transferred layer is transferred to a transfer member in a given pattern. The transferring method may also include joining a transfer member to the transferred layer, removing the transferred layer from the substrate and transferring the transferred layer to the transfer member, these of which constitute a transfer process, the transfer process being repeatedly performed.

Abstract: A method of manufacturing a thin film integrated circuit device according to the present invention includes steps of forming a peel-off layer over a thermally oxidized silicon substrate, forming a plurality of thin film integrated circuit devices over the peel-off layer with a base film interposed therebetween, forming a groove between the plurality of thin film integrated circuit devices, and separating the plurality of thin film integrated circuit devices by introducing one of a gas and a liquid including halogen fluoride into the groove to remove the peel-off layer.

Abstract: By performing a wet chemical process after etching a via, contaminations may be removed and a thin passivation layer may be formed that may then be readily removed in a subsequent sputter etch process for forming a barrier/adhesion layer. In a particular embodiment, the wet chemical process may be performed on the basis of fluoric acid and triazole or a compound thereof.

Abstract: An SOI substrate which has a thick SOI layer is first prepared. Then, the SOI layer is thinned to a target film thickness using as a unit a predetermined thickness not more than that of one lattice. This thinning is performed by repeating a unit thinning step which includes an oxidation step of oxidizing the surface of the SOI layer by the predetermined thickness not more than that of one lattice and a removal step of selectively removing silicon oxide formed by the oxidation. The SOI layer of the SOI substrate is chemically etched by supplying a chemical solution to the SOI layer, and the film thickness of the etched SOI layer is measured. When the measured film thickness of the SOI layer has a predetermined value, a process of chemically etching the SOI layer ends.

Abstract: An object of the present invention is to prevent the thin film device formed by laser annealing from making, due to overheat, abnormal operations. Firstly, on a glass substrate 101. a heat insulating film, a silicon oxide film and an amorphous silicon film are formed in succession, and the amorphous silicon film is irradiated from above with a laser beam of an excimer laser. After being molten, the amorphous silicon film undergoes recrystallization to form a polycrystalline silicon film. Subsequently, using the polycrystalline silicon film as an active layer, a TFT is formed, and then a plastic substrate is bonded onto the TFT, and finally the glass substrate is peeled off by way of the heat insulating film, whereby a transfer of the TFT is completed. Because the heat insulating film is removed, abnormality caused by overheat at the time of operation is well prevented from occurring.

Abstract: A method of depositing a metal film on a substrate includes a supercritical preclean step, a supercritical desorb step, and a metal deposition step. Preferably, the preclean step comprises maintaining supercritical carbon dioxide and a chelating agent in contact with the substrate in order to remove an oxide layer from a metal surface of the substrate. More preferably, the preclean step comprises maintaining the supercritical carbon dioxide, the chelating agent, and an acid in contact with the substrate. Alternatively, the preclean step comprises maintaining the supercritical carbon dioxide and an amine in contact with the oxide layer. The desorb step comprises maintaining supercritical carbon dioxide in contact with the substrate in order to remove adsorbed material from the substrate.

Abstract: A method (and structure) of forming an interconnect on a semiconductor substrate, includes forming a relatively narrow first structure in a dielectric formed on a semiconductor substrate, forming a relatively wider second structure in the dielectric formed on the semiconductor substrate, forming a liner in the first and second structures such that the first structure is substantially filled and the second structure is substantially unfilled, and forming a metallization over the liner to completely fill the second structure.

Abstract: A wafer is provided having through-holes therein to form a through-hole via wafer. A substrate of a sacrificial wafer is provided. The substrate is coated with a polymer having low adhesion to metals. A conductive layer is deposited on the polymer. A photoresist layer is coated on the conductive layer. The through-hole via wafer is bonded to the sacrificial wafer wherein the photoresist layer provides the bonding. The photoresist exposed in the through-holes is developed away to expose the conductive layer. The through-holes are filled with a conductive material by electroplating the conductive layer. The photoresist is stripped in an ultrasonic bath wherein the photoresist separates from the through-hole wafer and wherein the filled through-holes separate from the polymer at an interface between the polymer and the conductive layer to complete separation of the through-hole via wafer from the sacrificial wafer.

Abstract: A process for producing a semiconductor substrate is provided which comprises steps of forming a porous layer on a first substrate, forming a nonporous monocrystalline semiconductor layer on the porous layer of the first substrate, bonding the nonporous monocrystalline layer onto a second substrate, separating the bonded substrates at the porous layer, removing the porous layer on the second substrate, and removing the porous layer constituting the first substrate.

Abstract: The object of the present invention is to provide a wafer having a structure of enabling an SiC wafer to be put to practical use as a wafer for monitoring a film thickness. For this purpose, an average surface roughness Ra of at least one surface of the SiC wafer is set to be substantially equivalent to a film thickness of a film to be deposited on an Si wafer to be measured. If several types are available to be deposited on an Si wafer to be measured, a minimum film thickness of the film among the several types is determined as an upper limit value, and the average surface roughness Ra of the film thickness measuring SiC wafer is set less than the upper limit value. More concretely, the surface roughness is set to be about 400 times as large as the average surface roughness of a product Si wafer, Ra being preferably set to be 0.08 ?m or less.