Abstract: The present disclosure relates to a method for manufacturing electronic chips. The method includes forming a plurality of trenches on a first face of a semiconductor substrate, in and on which a plurality of integrated circuits has been formed. The trenches delimit laterally a plurality of chips, and each of the chips includes a single integrated circuit. The method further includes electrically isolating flanks of each of the chips by forming an electrically isolating layer on lateral walls of the trenches.

Abstract: A photoelectric conversion panel includes: a thin film transistor; a first organic film formed in an upper layer with respect to the thin film transistor; a photoelectric conversion element formed in an upper layer with respect to the first organic film; and a first inorganic insulating film formed so as to cover at least a part of the first organic film, wherein the first inorganic insulating film has a through hole that exposes a part of the first organic film.

Abstract: An X-ray imaging panel includes: a photodiode that converts scintillation light that is obtained from an X-ray that passes through an object into a signal; a first thin-film transistor; a first insulating film that covers at least a part of the first thin-film transistor and that has a first opening above the first thin-film transistor; a lower electrode that is disposed below the photodiode, that covers at least a part of the first insulating film, that is formed in the first opening of the first insulating film, and that is connected to the first thin-film transistor in the first opening; and a second insulating film that is disposed above the lower electrode and that is formed in the first opening. The photodiode covers the first opening in which the second insulating film is formed, and the photodiode is connected to the lower electrode.

Abstract: A substrate for a medical device, a portion of which is brought into contact with or inserted into a subject. The substrate includes a patient circuit conductively connected to the portion that is configured to be brought into contact with or inserted into the subject, and a ground-side circuit configured to perform at least one of transmission of a signal, reception of a signal, and supply of electric power on the patient circuit. The ground-side circuit is grounded by a protective ground to ensure safety of a manipulator of the medical device. The substrate also includes an insulating layer between the patient circuit and the ground-side circuit providing insulation between the patient circuit and the ground-side circuit, and an isolated circuit provided apart from the patient circuit and the ground-side circuit on the insulating layer and having a different reference potential from the patient circuit and the ground-side circuit.

Abstract: Disclosed are a manufacturing method of an array substrate, an array substrate and a display device. The manufacturing method of the array substrate includes: providing a substrate; depositing and patterning a gate layer on the substrate; depositing a protective layer on the substrate covered with the gate layer by atomic layer deposition; and depositing and patterning an amorphous silicon layer and an ohmic contact layer on the protective layer. The uniform protective layer of the present disclosure reduces the influence on the field effect mobility of the thin film transistor, makes the display of the product more stable, and improves the display effect.

Abstract: A method for patterning an amorphous alloy is provided. The method includes forming a pattern for defining an amorphous alloy deposition region on a parent material, forming an amorphous alloy deposition layer on the parent material with the pattern formed thereon, and etching a region except for the amorphous alloy deposition region. A dome switch is provided. The dome switch includes a metal layer shaped like a dome, a central portion of which protrudes, and, in response to external force being received through the protruding central portion, the central portion contacting and electrically connected to a circuit board, and an amorphous alloy layer disposed on the metal layer. Accordingly, an amorphous alloy structure with enhanced durability and reliability is easily manufactured.

Abstract: A method of removing residual charge from a photoconductive material includes applying a first voltage to the photoconductive material to form an electrostatic field during a collection operation in which x-rays are irradiated onto the photoconductive material; and applying a second voltage to the photoconductor to reduce an amount of residual charge therein during a removal operation, the second voltage being different from the first voltage. In one or more example embodiments, the photoconductive material may include Mercury Iodine (Hgl2).

Abstract: A pixel structure disposed on a substrate is provided. The pixel structure includes a gate electrode, a first gate insulation layer, a pixel electrode, a second gate insulation layer, a channel layer, a source electrode, a drain electrode and a common electrode. The gate electrode is disposed on the substrate and covered by the first gate insulation layer. The pixel electrode is disposed on the first gate insulation layer and covered by the second gate insulation layer. The pixel electrode is located between the first and the second gate insulation layers. The second gate insulation layer has a first contact opening exposing a portion of the pixel electrode. The channel layer is disposed on the second gate insulation layer. The drain electrode electrically connected to the pixel electrode. The source electrode is disposed on the second gate insulation layer. The common electrode is disposed on the second gate insulation layer.

Abstract: In a manufacturing method of a solid-state image pickup device according to an embodiment, a transfer gate electrode is formed in a predetermined position on an upper surface of a first conductive semiconductor area, through a gate insulating film. A second conductive charge storage area is formed in an area adjacent to the transfer gate electrode in the first conductive semiconductor area. A sidewall is formed on a side surface of the transfer gate electrode. An insulating film is formed to extend from a circumference surface of the sidewall on a side of the charge storage area to a position partially covering the upper part of the charge storage area. A first conductive charge storage layer is formed in the charge storage area by implanting first conductive impurities from above, into the charge storage area which is partially covered with the insulating film.

Abstract: To fabricate an active matrix type display device integrated with an image sensor at a low cost and without complicating process, the image sensor includes a thin film transistor is in a pixel of a plurality of pixels, an insulating layer is over the thin film transistor, a plurality of first electrodes, which is a shielding layer, is over the insulating layer, a photoelectric conversion layer including a semiconductor film is over the plurality of the first electrodes, and a second electrode over the photoelectric conversion layer. The thin film transistor can include polycrystal silicon. The semiconductor film can include amorphous silicon.

Abstract: Techniques are here disclosed for a solar cell pre-processing method and system for annealing and gettering a solar cell semiconductor wafer having an undesirably high dispersion of transition metals, impurities and other defects. The process forms a surface contaminant layer on the solar cell semiconductor (e.g., silicon) wafer. A surface of the semiconductor wafer receives and holds impurities, as does the surface contaminant layer. The lower-quality semiconductor wafer includes dispersed defects that in an annealing process getter from the semiconductor bulk to form impurity cluster toward the surface contaminant layer. The impurity clusters form within the surface contaminant layer while increasing the purity level in wafer regions from which the dispersed defects gettered. Cooling follows annealing for retaining the impurity clusters and, thereby, maintaining the increased purity level of the semiconductor wafer in regions from which the impurities gettered.

Abstract: An example complementary metal oxide semiconductor (CMOS) image sensor includes an epitaxial layer, an array of pixels, and a trench capacitor. The array of pixels are formed on a front side of the epitaxial layer in an pixel array area of the image sensor. The array of pixels includes one or more shallow trench isolation structures disposed between adjacent pixels for isolating the pixels in the pixel array area. The trench capacitor is formed on the front side of the epitaxial layer in a peripheral circuitry area of the image sensor.

Abstract: An image sensor cell, wherein at least one of a plurality of transistors included in image sensor cell is a recess transistor having a channel region recessed into a substrate. The image sensor cell includes an image charge generating unit for generating an image charge corresponding to an image signal, and an image charge converting unit for converting the image charge into an electrical signal, wherein at least one of a plurality of transistors included in the image charge converting unit is a recess transistor including a channel region that is recessed into a substrate.

Abstract: Provided is an electrophoretic display device and a method of manufacturing and repairing the electrophoretic display device.

Abstract: Techniques are here disclosed for a solar cell pre-processing method and system for annealing and gettering a solar cell semiconductor wafer having an undesirably high dispersion of transition metals, impurities and other defects. The process forms a surface contaminant layer on the solar cell semiconductor (e.g., silicon) wafer. A surface of the semiconductor wafer receives and holds impurities, as does the surface contaminant layer. The lower-quality semiconductor wafer includes dispersed defects that in an annealing process getter from the semiconductor bulk to form impurity cluster toward the surface contaminant layer. The impurity clusters form within the surface contaminant layer while increasing the purity level in wafer regions from which the dispersed defects gettered. Cooling follows annealing for retaining the impurity clusters and, thereby, maintaining the increased purity level of the semiconductor wafer in regions from which the impurities gettered.

Abstract: The present application relates to the fabrication of an electronic component. The component comprises two, superposed integrated circuits: one of which is formed on the front side of a thinned first substrate, and the other of which is produced on the front side of a second substrate, with an insulating planarization layer interposed between the front sides of the two substrates. The silicon of the backside of the thinned substrate is opened locally above a first conducting area located in the thinned substrate and above a second conducting area located in the second substrate. A conducting layer portion, deposited on both areas, electrically connects them so as to provide the interconnection between the two circuits. The external connection pads may also be formed in this conducting layer.

Abstract: The invention provides a new class of photoconductive materials and devices, and methods for obtaining high internal photoconductive gain. The devices include a semiconductor or material with an electronic band gap provided in a confined geometry and which exhibits multi-exciton generation (MEG) when illuminated with photons with energies above the threshold for MEG. Due to carrier-carrier Coulombic interactions, multi-excitons within the confined material efficiently recombine via Auger recombination, in which a carrier from one exciton is excited to a higher energy level relative to the band edge. Carriers excited by Auger recombination are subsequently trapped by trap states that capture carriers excited high above the band edge more efficiently than carriers near the band edge. Carriers trapped by the trap states allow for the collection and recirculation of untrapped carriers of opposite charge when used as a photoconductive device, producing high internal photoconductive gain.

Abstract: To fabricate an active matrix type display device integrated with an image sensor at a low cost and without complicating process, an image sensor laminated with TFT and a light receiving unit is formed on a light receiving matrix, a display matrix is arranged with TFT and pixel electrodes on a matrix and formed with an electrode layer functioning as a black matrix, a lower electrode of the light receiving unit is formed by a starting film the same as that of the black matrix, a terminal for fixing potential of an upper electrode is formed by starting films the same as those of a signal line, the electrode layer or pixel electrodes and the terminals function also as shield electrodes for a side face of the light receiving unit since potential thereof is fixed.

Abstract: A pixel cell having a halogen-rich region localized between an oxide isolation region and a photosensor. The halogen-rich region prevents leakage from the isolation-region into the photosensor, thereby suppressing dark current in imagers.

Abstract: A first wire having sidewalls of an integrated circuit is tapered from the proximal end to the distal end to reduce width from the first width to the second width. A second wire, spaced apart from the first wire, the second wire has sidewalls. The first wire and the second wire are each horizontally disposed along side each other forming a part of a sidewall capacitor between facing sidewalls. The sidewall capacitor capacitance is progressively reduced responsive to the first wire taper.

Abstract: An image sensor and a method of forming an image sensor. The image sensor includes an array of pixel cells at a surface of a substrate. Each pixel cell has a photo-conversion device. At least one a micro-electro-mechanical system (MEMS) element including a photonic crystal structure is provided over at least one of the pixel cells. The MEMS-based photonic crystal element is supported by a support structure and configured to selectively permit electromagnetic wavelengths to reach the photo-conversion device upon application of a voltage. As such, the MEMS-based photonic crystal element of the invention can replace or compliment conventional filters, e.g., color filter arrays.

Abstract: A method used to form a cobalt metal layer on a silicon surface using an atomic layer deposition (ALD) process comprises a treatment of the silicon surface prior to cobalt formation. Treatment includes serial exposure to one or more cycles comprising a titanium nitride precursor or a tantalum nitride precursor, followed by an optional exposure to ammonia. After this treatment, the silicon surface is exposed to a metal organic cobalt such as cyclopentadienylcobalt dicarbonyl to form a cobalt precursor on the silicon surface, which is then exposed to hydrogen or ammonia to reduce the precursor to an ALD cobalt metal layer. Once this initial metal layer is formed, additional cobalt ALD layers may be completed to form a cobalt metal layer of a desired thickness.

Abstract: An image sensor has a substrate, a dielectric layer positioned on the substrate, a pixel array including a plurality of pixels defined on the substrate, a shield electrode positioned between any two adjacent pixel electrodes of the pixels, a photo conductive layer positioned on the shield electrode and the pixel electrodes, and a transparent conductive layer covering the photo conductive layer.

Abstract: An image sensor contains a semiconductor substrate, a plurality of pixels defined on the semiconductor substrate, a photo conductive layer and a transparent conductive layer formed on the pixel electrodes of the pixels in order, and a shield device positioned between any two adjacent pixel electrodes. The shield device has a shield electrode and an isolation structure surrounding the shield electrode so that the shield electrode is isolated from the pixel electrodes and the photo conductive layer by the isolation structure.

Abstract: The invention relates to the fabrication of an electronic component having a very high integration density, notably an image sensor. The component comprises two, superposed integrated circuits, one of which one (the image sensor) is formed on the front side of a thinned first silicon substrate (12) and the other of which is produced on the front side of a second substrate (30), with an insulating planarization layer (28, 48) interposed between the front sides of the two substrates. The silicon (12) of the backside of the thinned substrate is opened locally above a first conducting area (P1) located in the thinned substrate and above a second conducting area (P2) located in the second substrate. A conducting layer portion (50), deposited on both areas, electrically connects them so as to provide the interconnection between the two circuits. The external connection pads (PL1) may also be formed in this conducting layer (50).

Abstract: A gate wire including a gate line and a gate electrode is formed on a substrate and a gate insulating layer is formed on the substrate. A semiconductor pattern and an etching assistant pattern are formed on the gate insulating layer and a source/drain conductor pattern and an etching assistant layer are formed on the semiconductor pattern and the etching assistant pattern. A data wire including a data line and source and drain electrodes separated from each other is formed by removing the etching assistant layer and partly removing the source/drain conductor pattern. A pixel electrode connected to the drain electrodes is formed.

Abstract: In a radiation image pickup device including: a sensor element for converting radiation into an electrical signal; and a thin film transistor connected to the sensor element, an electrode of the sensor element connected to the thin film transistor is disposed above the thin film transistor, and that the thin film transistor has a top gate type structure in which a semiconductor layer, a gate insulating layer, and a gate electrode layer are laminated in this order on a substrate, so that a channel portion of the thin film transistor is protected by a gate electrode, thereby providing stable TFT characteristics without undesirable turning ON any of the TFT elements due to the back gate effect by the fluctuation in electric potentials corresponding to outputs from the sensor electrodes, and thereby greatly improving image quality.

Abstract: Image sensors and methods of fabricating the same are provided. An image sensor may include a substrate, a first pad provided on a front side of the substrate, a second pad provided on a backside of the substrate, one or more contacts, each of the contacts passing through the substrate and electrically connecting the first pad with the second pad, and one or more guard rings, each of the guard rings surrounding one or more contacts and having insulating characteristics.

Abstract: Disclosed are an image sensor and a method for manufacturing the same. The image sensor can include a substrate with a photodiode formed thereon. A metal interconnection and interlayer dielectric layer can be formed on the substrate, the interlayer dielectric layer having a recess structure formed by selectively removing a region of the interlayer dielectric layer corresponding to the photodiode. A clad layer can be provided on the interlayer dielectric layer, including along the walls and bottom of the recess structure, and a core layer can be formed on the clad layer.

Abstract: In an integrated circuit, a layer including a plurality of conductive wires is described. A first wire, having sidewalls, is tapered from a proximal end which has a first width to a distal end which has a second width, to reduce width from the first width to the second width, and the first wire also has a substantially vertical surface. A second wire, spaced apart from the first wire, also has a substantially vertical surface. The first wire and the second wire are each horizontally disposed along side each other forming a part of a sidewall capacitor between facing sidewalls. Capacitors are created between the first substantially vertical surface and the second substantially vertical surface, the capacitors are respectively associated with capacitances and with a plurality of loads, the plurality of loads is progressively reduced responsive to a progressive reduction of the capacitances as associated with the first wire taper.

Abstract: An image sensor with a vertically integrated thin-film photodiode includes a bottom doped layer of a PIN photodiode imbedded in a dielectric layer, wherein a bottom surface of the bottom doped layer completely contacts its corresponding underlying pixel electrode. The bottom doped layers of the PIN photodiodes are formed by a self-aligned and damascene method, therefore the pixel electrodes are not exposed to the I-type amorphous silicon layer of the PIN photodiodes. Moreover, the transparent electrode connects the PIN photodiodes to an external ground voltage power through a ground pad which is a portion of a top metal layer.

Abstract: A novel pixel sensor structure formed on a substrate of a first conductivity type includes a photosensitive device of a second conductivity type and a surface pinning layer of the first conductivity type. An isolation structure is formed adjacent to the photosensitive device pinning layer. The isolation structure includes a dopant region comprising material of the first conductivity type selectively formed along a sidewall of the isolation structure that is adapted to electrically couple the surface pinning layer to the underlying substrate. The corresponding method for forming the dopant region selectively formed along the sidewall of the isolation structure comprises an out-diffusion process whereby dopant materials present in a doped material layer formed along selected portions in the isolation structure are driven into the underlying substrate during an anneal.

Abstract: The invention relates to a dual masked spacer etch for improved dark current performance in imagers. After deposition of spacer material such as oxide, N-channel regions are first opened for N+ source/drain implant and P-channel regions are then opened for P+ source/drain implant. Prior to the N+ source/drain implant, the wafer receives a patterned first spacer etch. During this first spacer etch, the photosensor region is covered with resist. Prior to the P+ source/drain implant, a masked second spacer etch is performed. Again the photosensor region is protected with photoresist. In such a manner, spacers are formed on the gates of both the N-channel and P-channel transistors but in the photodiode region the spacer insulator remains.

Abstract: A transfer material comprising an organic thin film uniformly provided by a wet method, etc. with high productivity is used to efficiently produce an organic thin film device such as an organic EL device excellent in light-emitting efficiency, uniformity of light emission and durability.