Controllable By Variation Of Magnetic Field Applied To Device (epo) Patents (Class 257/E29.323)
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Patent number: 8687414Abstract: A magnetic memory cell includes: a magnetization recording layer; and a magnetic tunneling junction section. The magnetization recording layer includes a ferromagnetic layer with perpendicular magnetic anisotropy. The magnetic tunneling junction section is used for reading information in the magnetization recording layer. The magnetization recording layer includes two domain wall moving areas.Type: GrantFiled: December 24, 2009Date of Patent: April 1, 2014Assignee: NEC CorporationInventors: Kiyokazu Nagahara, Shunsuke Fukami, Nobuyuki Ishiwata, Tetsuhiro Suzuki, Norikazu Ohshima
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Patent number: 8685757Abstract: A method for fabricating a magnetic tunnel junction element includes forming a magneto resistance layer including a first magnetic layer, an insulation layer and a second magnetic layer on a substrate, forming a magnetic loss area by doping a magnetic loss impurity into a region of the magneto resistance layer to cause a magnetic loss, and etching the magnetic loss area to form a magnetic tunnel junction element.Type: GrantFiled: December 20, 2011Date of Patent: April 1, 2014Assignee: SK Hynix Inc.Inventors: Dong Ha Jung, Gyu An Jin, Su Ryun Min
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Patent number: 8686520Abstract: Magnetoresistive structures, devices, memories, and methods for forming the same are presented. For example, a magnetoresistive structure includes a first ferromagnetic layer, a first nonmagnetic spacer layer proximate to the first ferromagnetic layer, a second ferromagnetic layer proximate to the first nonmagnetic spacer layer, and a first antiferromagnetic layer proximate to the second ferromagnetic layer. For example, the first ferromagnetic layer may comprise a first pinned ferromagnetic layer, the second ferromagnetic layer may comprise a free ferromagnetic layer, and the first antiferromagnetic layer may comprise a free antiferromagnetic layer.Type: GrantFiled: May 29, 2009Date of Patent: April 1, 2014Assignee: International Business Machines CorporationInventor: Daniel Worledge
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Patent number: 8686523Abstract: A magnetoresistive device having a magnetic junction including a first fixed magnetic layer structure, a second fixed magnetic layer structure, and a free magnetic layer structure, wherein the first second and free magnetic layer structures are arranged one over the other. The first second and free magnetic layer structures have respective magnetization orientations configured to orient in a direction at least substantially perpendicular to a plane defined by an interface between the free magnetic layer structure and either one of the first fixed magnetic layer structure or the second fixed magnetic layer structure. The respective magnetization orientations of the first and the second fixed magnetic layer structures are oriented anti-parallel to each other, and the first fixed magnetic layer structure is a static fixed magnetic layer structure having a switching field that is larger than a switching field of the free magnetic layer structure.Type: GrantFiled: June 4, 2012Date of Patent: April 1, 2014Assignee: Agency for Science, Technology and ResearchInventors: Hao Meng, Rachid Sbiaa
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Publication number: 20140084398Abstract: Magnetic tunnel junctions (MTJ) suitable for spin transfer torque memory (STTM) devices, include perpendicular magnetic layers and one or more anisotropy enhancing layer(s) separated from a free magnetic layer by a crystallization barrier layer. In embodiments, an anisotropy enhancing layer improves perpendicular orientation of the free magnetic layer while the crystallization barrier improves tunnel magnetoresistance (TMR) ratio with better alignment of crystalline texture of the free magnetic layer with that of a tunneling layer.Type: ApplicationFiled: September 26, 2012Publication date: March 27, 2014Inventors: Kaan OGUZ, Mark L. DOCZY, Brian DOYLE, Uday SHAH, David L. KENCKE, Roksana GOLIZADEH MOJARAD, Robert S. CHAU
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Publication number: 20140084399Abstract: Spin transfer torque memory (STTM) devices with topographically smooth electrodes and methods of fabricating STTM devices with topographically smooth electrodes are described. For example, a material layer stack for a magnetic tunneling junction includes a topographically smooth bottom electrode, a topographically smooth dielectric layer disposed above the bottom electrode, and a free magnetic layer disposed above the topographically smooth dielectric layer.Type: ApplicationFiled: September 27, 2012Publication date: March 27, 2014Inventors: Mark L. Doczy, Kaan Oguz, Brian S. Doyle, Robert S. Chau
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Publication number: 20140084234Abstract: A semiconductor device includes a channel strain altering material formed over or in the source and drain regions of the device. The channel strain altering material may be used to alter the strain in a channel region of the device after manufacturing of the device (e.g., after the device is formed or during operable use of the device). Changes in one or more of material properties of the channel strain altering material may be used to change the strain in the channel region. Changes in the material properties of the channel strain altering material may change a physical size or structure of the channel strain altering material. The channel strain altering material may include materials such as phase change materials or ferromagnetic materials.Type: ApplicationFiled: September 27, 2012Publication date: March 27, 2014Applicant: APPLE INC.Inventor: Michael R Seningen
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Patent number: 8680632Abstract: A magnetoresistive element according to an embodiment includes: a base layer; a first magnetic layer formed on the base layer, and including a first magnetic film having an axis of easy magnetization in a direction perpendicular to a film plane, the first magnetic film including MnxGa100-x (45?x<64 atomic %); a first nonmagnetic layer formed on the first magnetic layer; and a second magnetic layer formed on the first nonmagnetic layer, and including a second magnetic film having an axis of easy magnetization in a direction perpendicular to a film plane, the second magnetic film including MnyGa100-y (45?y<64 atomic %). The first and second magnetic layers include different Mn composition rates from each other, a magnetization direction of the first magnetic layer is changeable by a current flowing between the first magnetic layer and the second magnetic layer via the first nonmagnetic layer.Type: GrantFiled: December 2, 2011Date of Patent: March 25, 2014Assignees: Kabushiki Kaisha Toshiba, WPI-AIMR, Tohoku UniversityInventors: Tadaomi Daibou, Junichi Ito, Tadashi Kai, Minoru Amano, Hiroaki Yoda, Terunobu Miyazaki, Shigemi Mizukami, Koji Ando, Kay Yakushiji, Shinji Yuasa, Hitoshi Kubota, Akio Fukushima, Taro Nagahama, Takahide Kubota
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Publication number: 20140077318Abstract: An improved PMA STT MTJ storage element, and a method for forming it, are described. By inserting a suitable oxide layer between the storage and cap layers, improved PMA properties are obtained, increasing the potential for a larger Eb/kT thermal factor as well as a larger MR. Another important advantage is better compatibility with high processing temperatures, potentially facilitating integration with CMOS.Type: ApplicationFiled: September 14, 2012Publication date: March 20, 2014Applicant: HEADWAY TECHNOLOGIES, INC.Inventors: Witold Kula, Guenole Jan, Ru-Ying Tong, Yu-Jen Wang
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Patent number: 8674465Abstract: A semiconductor device includes a magnetic tunnel junction (MTJ) storage element configured to be disposed in a common interlayer metal dielectric (IMD) layer with a logic element. Cap layers separate the common IMD layer from a top and bottom IMD layer. Top and bottom electrodes are coupled to the MTJ storage element. Metal connections to the electrodes are formed in the top and bottom IMD layers respectively through vias in the separating cap layers. Alternatively, the separating cap layers are recessed and the bottom electrodes are embedded, such that direct contact to metal connections in the bottom IMD layer is established. Metal connections to the top electrode in the common IMD layer are enabled by isolating the metal connections from the MTJ storage elements with metal islands and isolating caps.Type: GrantFiled: August 5, 2010Date of Patent: March 18, 2014Assignee: QUALCOMM IncorporatedInventors: Xia Li, Xiaochun Zhu, Seung H. Kang
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Publication number: 20140070342Abstract: Methods of forming memory cells, magnetic memory cell structures, and arrays of magnetic memory cell structures are disclosed. Embodiments of the methods include patterning a precursor structure to form a stepped structure including at least an upper discrete feature section and a lower feature section with a broader width, length, or both than the upper discrete feature section. The method uses patterning acts directed along a first axis, e.g., an x-axis, and then along a second axis, e.g., a y-axis, that is perpendicular to or about perpendicular to the first axis. The patterning acts may therefore allow for more unifoimity between a plurality of formed, neighboring cell core structures, even at dimensions below about thirty nanometers. Magnetic memory structures and memory cell arrays are also disclosed.Type: ApplicationFiled: September 13, 2012Publication date: March 13, 2014Applicant: MICRON TECHNOLOGY, INC.Inventors: Gurtej S. Sandhu, Witold Kula, Wayne I. Kinney
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Publication number: 20140070341Abstract: A synthetic antiferromagnetic (SAF) structure for a spintronic device is disclosed and has an AP2/antiferromagnetic (AF) coupling/CoFeB configuration. The SAF structure is thinned to reduce the fringing (Ho) field while maintaining high coercivity. The AP2 reference layer has intrinsic perpendicular magnetic anisotropy (PMA) and induces PMA in a thin CoFeB layer through AF coupling. In one embodiment, AF coupling is improved by inserting a Co dusting layer on top and bottom surfaces of a Ru AF coupling layer. When AP2 is (Co/Ni)4, and CoFeB thickness is 7.5 Angstroms, Ho is reduced to 125 Oe, Hc is 1000 Oe, and a balanced saturation magnetization-thickness product (Mst)=0.99 is achieved. The SAF structure may also be represented as FL2/AF coupling/CoFeB where FL2 is a ferromagnetic layer with intrinsic PMA.Type: ApplicationFiled: September 11, 2012Publication date: March 13, 2014Applicant: HEADWAY TECHNOLOGIES, INC.Inventors: Robert Beach, Guenole Jan, Yu-Jen Wang, Ru-Ying Tong
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Patent number: 8670268Abstract: According to one embodiment, a magnetoresistive element includes first and second magnetic layers and a first nonmagnetic layer. The first magnetic layer has an axis of easy magnetization perpendicular to a film plane, and a variable magnetization. The second magnetic layer has an axis of easy magnetization perpendicular to a film plane, and an invariable magnetization. The first nonmagnetic layer is provided between the first and second magnetic layers. The second magnetic layer includes third and fourth magnetic layers, and a second nonmagnetic layer formed between the third and fourth magnetic layers. The third magnetic layer is in contact with the first nonmagnetic layer and includes Co and at least one of Zr, Nb, Mo, Hf, Ta, and W.Type: GrantFiled: March 22, 2012Date of Patent: March 11, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Toshihiko Nagase, Eiji Kitagawa, Katsuya Nishiyama, Tadashi Kai, Koji Ueda, Daisuke Watanabe
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Patent number: 8669628Abstract: According to one embodiment, a magnetoresistive element includes the following configuration. First nonmagnetic layer is provided between the first magnetic layer (storage layer) and the second magnetic layer (reference layer). Third magnetic layer is formed on a surface of the storage layer, which is opposite to a surface on which the first nonmagnetic layer is formed. Fourth magnetic layer is formed on a surface of the reference layer, which is opposite to a surface on which the first nonmagnetic layer is formed. The third and fourth magnetic layers have a magnetization antiparallel to the magnetization of the storage layer. Second nonmagnetic layer is located between the storage and third magnetic layers. Third nonmagnetic layer is located between the reference and fourth magnetic layers. The thickness of the fourth magnetic layer is smaller than that of the third magnetic layer.Type: GrantFiled: March 19, 2012Date of Patent: March 11, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Koji Ueda, Katsuya Nishiyama, Toshihiko Nagase, Daisuke Watanabe, Eiji Kitagawa, Tadashi Kai
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Publication number: 20140061827Abstract: A magnetic thin film deposition is patterned and protected from oxidation during subsequent processes, such as bit line formation, by an oxidation-prevention encapsulation layer of SiN. The SiN layer is then itself protected during the processing by a metal overlayer, preferably of Ta, Al, TiN, TaN or W. A sequence of low pressure plasma etches, using Oxygen, Cl2, BCl3 and C2H4 chemistries provide selectivity of the metal overlayer to various oxide layers and to the photo-resist hard masks used in patterning and metal layer and thereby allow the formation of bit lines while maintaining the integrity of the SiN layer.Type: ApplicationFiled: August 29, 2012Publication date: March 6, 2014Applicant: HEADWAY TECHNOLOGIES, INC.Inventors: Kenlin Huang, Yuan-Tung Chin, Tom Zhong, Chyu-Jiuh Torng
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Patent number: 8664010Abstract: An MTJ element is formed in a wiring layer located in a lower tier and yet application of heat to the MTJ element is suppressed. A first insulating layer is formed over a substrate. Subsequently, the MTJ element is formed over the first insulating layer. After that a first wiring is formed over the MTJ element. Thereafter, a second insulating layer is formed over the first wiring. Then a second wiring is formed in the superficial layer of the second insulating layer. The second wiring is heat treated by photoirradiation. A shield conductor is formed at the step of forming the second wiring.Type: GrantFiled: February 28, 2011Date of Patent: March 4, 2014Assignee: Renesas Electronics CorporationInventor: Yoshihisa Matsubara
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Patent number: 8664731Abstract: In an embodiment, a micro-electromechanical device can include a substrate, a beam, and an isolation joint. The beam can be suspended relative to a surface of the substrate. The isolation joint can be between a first portion and a second portion of the beam, and can have a non-linear shape. In another embodiment, a micro-electromechanical device can include a substrate, a beam, and an isolation joint. The beam can be suspended relative to a surface of the substrate. The isolation joint can be between a first portion and a second portion of the beam. The isolation joint can have a first portion, a second portion, and a bridge portion between the first portion and the second portion. The first and second portions of the isolation joint can each have a seam and a void, while the bridge portion can be solid.Type: GrantFiled: February 14, 2011Date of Patent: March 4, 2014Assignee: Kionix, Inc.Inventors: Charles W. Blackmer, Scott G. Adams, Andrew S. Hocking, Kristin J. Lynch, Ashish A. Shah
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Publication number: 20140056060Abstract: A magnetic memory is described. The magnetic memory includes magnetic junctions and at least one spin-orbit interaction (SO) active layer. Each of the magnetic junctions includes a data storage layer that is magnetic. The SO active layer(s) are adjacent to the data storage layer of the magnetic junction. The at SO active layer(s) are configured to exert a SO torque on the data storage layer due to a current passing through the at least one SO active layer in a direction substantially perpendicular to a direction between the at least one SO active layer and the data storage layer of a magnetic junction of the plurality of magnetic junctions closest to the at least one SO active layer. The data storage layer is configured to be switchable using at least the SO torque.Type: ApplicationFiled: August 26, 2012Publication date: February 27, 2014Inventors: Alexey Vasilyevitch Khvalkovskiy, Dmytro Apalkov
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Patent number: 8659102Abstract: A nonvolatile magnetic memory device having a magnetoresistance-effect element includes: (A) a laminated structure having a recording layer in which an axis of easy magnetization is oriented in a perpendicular direction; (B) a first wiring line electrically connected to a lower part of the laminated structure; and (C) a second wiring line electrically connected to an upper part of the laminated structure, wherein a high Young's modulus region having a Young's modulus of a higher value than that of a Young's modulus of a material forming the recording layer is provided close to a side surface of the laminated structure.Type: GrantFiled: January 6, 2010Date of Patent: February 25, 2014Assignee: Sony CorporationInventor: Mitsuharu Shoji
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Patent number: 8659103Abstract: According to one embodiment, a magnetoresistive element includes the following configuration. A first magnetic layer has an invariable magnetization. A second magnetic layer has a variable magnetization. A nonmagnetic layer is provided between the first and the second magnetic layers. The first magnetic layer has a structure in which first, second and third magnetic material films and a nonmagnetic material film are stacked. The first magnetic material film is provided in contact with the nonmagnetic layer, the nonmagnetic material film is provided in contact with the first magnetic material film, the second magnetic material film is provided in contact with the nonmagnetic material film, and the third magnetic material film is provided in contact with the second magnetic material film. The second magnetic material film has a Co concentration higher than that of the first magnetic material film.Type: GrantFiled: March 19, 2012Date of Patent: February 25, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Daisuke Watanabe, Katsuya Nishiyama, Toshihiko Nagase, Koji Ueda, Tadashi Kai
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Patent number: 8659104Abstract: A field-effect magnetic sensor facilitates highly-sensitive magnetic field detection. In accordance with one or more example embodiments, current flow respectively between first and second source/drain terminals and a third source/drain terminal is controlled using inversion layers in separate channel regions for each of the first and second terminals. In response to a magnetic field, a greater amount of current is passed between the third source/drain terminal and one of the first and second source/drain terminals, relative to an amount of current passed between the third source/drain terminal and the other one of the first and second source/drain terminals.Type: GrantFiled: December 21, 2010Date of Patent: February 25, 2014Assignee: NXP B.V.Inventors: Gilberto Curatola, Victor Zieren, Anco Heringa
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Publication number: 20140048893Abstract: The present disclosure provides a semiconductor memory device. The device includes a pinning layer having an anti-ferromagnetic material and disposed over a first electrode; a pinned layer disposed over the pinning layer; a tunneling layer disposed over the pinned layer, a free layer disposed over the tunneling layer and a capping layer disposed over the free layer. The capping layer includes metal-oxide and metal-nitride materials.Type: ApplicationFiled: August 16, 2012Publication date: February 20, 2014Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Kuo-Ming Wu, Kai-Wen Cheng, Cheng-Yuan Tsai, Chia-Shiung Tsai
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Publication number: 20140050019Abstract: A Multi-Level Memory Cell (MLC) using multiple Magnetic Tunnel Junction (MTJ) structures having one or more layers with varying thickness is disclosed. The multiple MTJ structures, which are vertically stacked and arranged in series, may have substantially identical area dimensions to minimize fabrication costs because one mask can be used to pattern the multiple MTJ structures. Further, varying the thicknesses associated with the one or more layers may provide the multiple MTJ structures with different switching current densities and thereby increase memory density and improve read and write operations. In one embodiment, the layers with the varying thicknesses may include tunnel barriers or magnesium oxide layers associated with the multiple MTJ structures and/or free layers associated with the multiple MTJ structures.Type: ApplicationFiled: August 20, 2012Publication date: February 20, 2014Applicant: QUALCOMM INCORPORATEDInventors: Kangho Lee, Taehyun Kim, Jung Pill Kim, Seung H. Kang
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Patent number: 8648434Abstract: A magnetic memory device includes a magnetic pattern, a reference pattern, a tunnel barrier pattern interposed between the magnetic pattern and the reference pattern, and at least one magnetic segment disposed inside the magnetic pattern. The magnetic segment(s) is/are of magnetic material whose direction of magnetization has at least a component which lies in a plane perpendicular to the magnetization direction of the magnetic pattern.Type: GrantFiled: September 20, 2011Date of Patent: February 11, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Woojin Kim, Jangeun Lee, Sechung Oh, Younghyun Kim, Sukhun Choi, Woochang Lim
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Patent number: 8633037Abstract: A semiconductor device includes a substrate having a main surface and a rear surface, a transistor formed over a side of the main surface, an insulator layer formed over a side of the main surface, an inductor formed over the insulator layer and a side of the main surface, a tape overlapping the inductor and formed over a side of the main surface, and a bonding pad formed over the insulating layer and a side of the main surface. The tape is selectively formed over an area without the bonding pad.Type: GrantFiled: November 7, 2012Date of Patent: January 21, 2014Assignee: Renesas Electronics CorporationInventors: Masayuki Furumiya, Yasutaka Nakashiba
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Patent number: 8629518Abstract: A magnetic tunnel junction (MTJ) etching process uses a sacrifice layer. An MTJ cell structure includes an MTJ stack with a first magnetic layer, a second magnetic layer, and a tunnel barrier layer in between the first magnetic layer and the second magnetic layer, and a sacrifice layer adjacent to the second magnetic layer, where the sacrifice layer protects the second magnetic layer in the MTJ stack from oxidation during an ashing process. The sacrifice layer does not increase a resistance of the MTJ stack. The sacrifice layer can be made of Mg, Cr, V, Mn, Ti, Zr, Zn, or any alloy combination thereof, or any other suitable material. The sacrifice layer can be multi-layered and/or have a thickness ranging from 5 ? to 400 ?. The MTJ cell structure can have a top conducting layer over the sacrifice layer.Type: GrantFiled: July 1, 2010Date of Patent: January 14, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yu-Jen Wang, Ya-Chen Kao, Chun-Jung Lin
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Patent number: 8629519Abstract: A tunneling magnetoresistance sensor including a substrate, an insulating layer, a tunneling magnetoresistance component and an electrode array is provided. The insulating layer is disposed on the substrate. The tunneling magnetoresistance component is embedded in the insulating layer. The electrode array is formed in a single metal layer and disposed in the insulating layer either below or above the TMR component. The electrode array includes a number of separate electrodes. The electrodes are electrically connected to the tunneling magnetoresistance component to form a current-in-plane tunneling conduction mode. The tunneling magnetoresistance sensor in this configuration can be manufactured with a reduced cost and maintain the high performance at the same time.Type: GrantFiled: December 21, 2011Date of Patent: January 14, 2014Assignee: Voltafield Technology CorporationInventors: Chien-Min Lee, Kuang-Ching Chen, Fu-Tai Liou
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Patent number: 8629520Abstract: An integrated circuit can have a first substrate supporting a magnetic field sensing element and a second substrate supporting another magnetic field sensing element. The first and second substrates can be arranged in a variety of configurations. Another integrated circuit can have a first magnetic field sensing element and second different magnetic field sensing element disposed on surfaces thereof.Type: GrantFiled: June 2, 2010Date of Patent: January 14, 2014Assignee: Allegro Microsystems, LLCInventors: Michael C. Doogue, William P. Taylor, Vijay Mangtani
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Patent number: 8618590Abstract: A spin transistor includes a first ferromagnetic layer, a second ferromagnetic layer, a semiconductor layer between the first and second ferromagnetic layers, and a gate electrode on or above a surface of the semiconductor layer, the surface being between the first and second ferromagnetic layers. The first ferromagnetic layer comprises a ferromagnet which has a first minority spin band located at a high energy side and a second minority spin band located at a low energy side, and has a Fermi level in an area of the high energy side higher than a middle of a gap between the first and second minority spin bands.Type: GrantFiled: September 17, 2009Date of Patent: December 31, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Tomoaki Inokuchi, Takao Marukame, Mizue Ishikawa, Hideyuki Sugiyama, Yoshiaki Saito
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Publication number: 20130342196Abstract: A vertical Hall device includes a Hall effect region, a separator, a first plurality of contacts, and a second plurality of contacts. The Hall effect region includes a first straight section, a second straight section that is offset parallel to the first straight section, and a connecting section that connects the first straight section and the second straight section. The separator separates a portion of the first straight section from a portion of the second straight section. The first and second plurality of contacts are arranged in or at the surface of the first and second straight sections, respectively. With respect to a first clock phase of a spinning current scheme, the first plurality of contacts comprises a first supply contact and a first sense contact. The second plurality of contacts comprises a second supply contact and a second sense contact.Type: ApplicationFiled: June 22, 2012Publication date: December 26, 2013Applicant: INFINEON TECHNOLOGIES AGInventor: Udo Ausserlechner
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Publication number: 20130334631Abstract: Memory cells are disclosed. Magnetic regions within the memory cells include an alternating structure of magnetic sub-regions and coupler sub-regions. The coupler material of the coupler sub-regions antiferromagnetically couples neighboring magnetic sub-regions and effects or encourages a vertical magnetic orientation exhibited by the neighboring magnetic sub-regions. Neighboring magnetic sub-regions, spaced from one another by a coupler sub-region, exhibit oppositely-directed magnetic orientations. The magnetic and coupler sub-regions may each be of a thickness tailored to form the magnetic region in a compact structure. Interference between magnetic dipole fields emitted from the magnetic region on switching of a free region in the memory cell may be reduced or eliminated. Also disclosed are semiconductor device structures, spin torque transfer magnetic random access memory (STT-MRAM) systems, and methods of fabrication.Type: ApplicationFiled: June 19, 2012Publication date: December 19, 2013Applicant: MICRON TECHNOLOGY, INC.Inventors: Wayne I. Kinney, Witold Kula, Stephen J. Kramer
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Publication number: 20130334630Abstract: Methods of forming magnetic memory cells are disclosed. Magnetic and non-magnetic materials are formed into a primal precursor structure in an initial stress state of essentially no strain, compressive strain, or tensile strain. A stress-compensating material, e.g., a non-sacrificial, conductive material, is formed to be disposed on the primal precursor structure to form a stress-compensated precursor structure in a net beneficial stress state. Thereafter, the stress-compensated precursor structure may be patterned to form a cell core of a memory cell. The net beneficial stress state of the stress-compensated precursor structure lends to formation of one or more magnetic regions, in the cell core, exhibiting a vertical magnetic orientation without deteriorating a magnetic strength of the one or more magnetic regions. Also disclosed are memory cells, memory cell structures, semiconductor device structures, and spin torque transfer magnetic random access memory (STT-MRAM) systems.Type: ApplicationFiled: June 19, 2012Publication date: December 19, 2013Applicant: MICRON TECHNOLOGY, INC.Inventors: Witold Kula, Gurtej S. Sandhu, Stephen J. Kramer
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Patent number: 8609262Abstract: A STT-RAM MTJ is disclosed with a MgO tunnel barrier formed by natural oxidation and containing an oxygen surfactant layer to form a more uniform MgO layer and lower breakdown distribution percent. A CoFeB/NCC/CoFeB composite free layer with a middle nanocurrent channel layer minimizes Jc0 while enabling thermal stability, write voltage, read voltage, and Hc values that satisfy 64 Mb design requirements. The NCC layer has RM grains in an insulator matrix where R is Co, Fe, or Ni, and M is a metal such as Si or Al. NCC thickness is maintained around the minimum RM grain size to avoid RM granules not having sufficient diameter to bridge the distance between upper and lower CoFeB layers. A second NCC layer and third CoFeB layer may be included in the free layer or a second NCC layer may be inserted below the Ru capping layer.Type: GrantFiled: July 17, 2009Date of Patent: December 17, 2013Assignee: MagIC Technologies, Inc.Inventors: Cheng T. Horng, Ru-Ying Tong, Guangli Liu, Robert Beach, Witold Kula, Tai Min
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Patent number: 8604570Abstract: An embodiment of an integrated electronic device having a body, made at least partially of semiconductor material and having a top surface, a bottom surface, and a side surface, and a first antenna, which is integrated in the body and enables magnetic or electromagnetic coupling of the integrated electronic device with a further antenna. The integrated electronic device moreover has a coupling region made of magnetic material, which provides, in use, a communication channel between the first antenna and the further antenna.Type: GrantFiled: December 22, 2009Date of Patent: December 10, 2013Assignee: STMicroelectronics S.r.l.Inventors: Alberto Pagani, Giovanni Girlando
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Patent number: 8604571Abstract: The thermoelectric conversion efficiency of a thermoelectric conversion device is increased by increasing the figure of merit of a spin-Seebeck effect element. An inverse spin-Hall effect material is provided to at least one end of a thermal spin-wave spin current generating material made of a magnetic dielectric material so that a thermal spin-wave spin current is converted to generate a voltage in the above described inverse spin-Hall effect material when there is a temperature gradient in the above described thermal spin-wave spin current generating material and a magnetic field is applied using a magnetic field applying means.Type: GrantFiled: June 5, 2009Date of Patent: December 10, 2013Assignee: Tohoku UniversityInventors: Kenichi Uchida, Yosuke Kajiwara, Hiroyasu Nakayama, Eiji Saitoh
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Patent number: 8604572Abstract: A magnetic tunnel junction device comprises a fixed magnetic layer having a first side and a second side, the fixed magnetic layer having a magnetic anisotropy that is out of the film plane of the fixed magnetic layer; a stack of a plurality of bilayers adjacent to the first side of the fixed magnetic layer, each bilayer comprising a first layer comprising at least one of cobalt, iron, a CoFeB alloy, or a CoB alloy and a second layer in contact with the first layer, the second layer comprising palladium or platinum, wherein the plurality of bilayers has a magnetic anisotropy that is out of the film plane of each of the bilayers, wherein the fixed magnetic layer is exchange coupled to the stack of the plurality of bilayers, and a tunnel barrier layer in contact with the second side of the fixed magnetic layer.Type: GrantFiled: June 14, 2011Date of Patent: December 10, 2013Assignee: Regents of the University of MinnesotaInventors: Jian-Ping Wang, Md. Tofizur Rahman
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Patent number: 8598671Abstract: Disclosed herein is a storage element, including: a storage layer configured to retain information based on a magnetization state of a magnetic material; and a magnetization pinned layer configured to be provided for the storage layer with intermediary of a tunnel barrier layer, wherein the tunnel barrier layer has a thickness not less than or equal to 0.1 nm to not more than or equal to 0.6 nm and interface roughness less than 0.5 nm, and information is stored in the storage layer through change in direction of magnetization of the storage layer by applying a current in a stacking direction and injecting a spin-polarized electron.Type: GrantFiled: June 17, 2011Date of Patent: December 3, 2013Assignee: Sony CorporationInventors: Hiroyuki Uchida, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Yutaka Higo, Kazutaka Yamane
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Publication number: 20130313664Abstract: A resistive memory device capable of minimizing operation current and a fabrication method thereof are provided. The resistive memory device includes an access device, a heating electrode formed on the access device and serving as a magnetoresistance device, and a variable resistance material formed on the heating electrode.Type: ApplicationFiled: August 31, 2012Publication date: November 28, 2013Inventors: Ha Chang JUNG, Jung Taik CHEONG
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Patent number: 8592930Abstract: A magnetic memory element includes: a first magnetization free layer; a non-magnetic layer; a reference layer; a first magnetization fixed layer group; and a first blocking layer. The first magnetization free layer is composed of ferromagnetic material with perpendicular magnetic anisotropy and includes a first magnetization fixed region, a second magnetization fixed region and a magnetization free region. The non-magnetic layer is provided near the first magnetization free layer. The reference layer is composed of ferromagnetic material and provided on the non-magnetic layer. The first magnetization fixed layer group is provided near the first magnetization fixed region. The first blocking layer is provided being sandwiched between the first magnetization fixed layer group and the first magnetization fixed region or in the first magnetization fixed layer group.Type: GrantFiled: October 21, 2010Date of Patent: November 26, 2013Assignee: NEC CorporationInventors: Shunsuke Fukami, Tetsuhiro Suzuki, Kiyokazu Nagahara, Norikazu Ohshima, Nobuyuki Ishiwata
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Patent number: 8592927Abstract: A magnetic element is disclosed that has a composite free layer with a FM1/moment diluting/FM2 configuration wherein FM1 and FM2 are magnetic layers made of one or more of Co, Fe, Ni, and B and the moment diluting layer is used to reduce the perpendicular demagnetizing field. As a result, lower resistance x area product and higher thermal stability are realized when perpendicular surface anisotropy dominates shape anisotropy to give a magnetization perpendicular to the planes of the FM1, FM2 layers. The moment diluting layer may be a non-magnetic metal like Ta or a CoFe alloy with a doped non-magnetic metal. A perpendicular Hk enhancing layer interfaces with the FM2 layer and may be an oxide to increase the perpendicular anisotropy field in the FM2 layer. The magnetic element may be part of a spintronic device or serve as a propagation medium in a domain wall motion device.Type: GrantFiled: May 4, 2011Date of Patent: November 26, 2013Assignee: MagIC Technologies, Inc.Inventors: Guenole Jan, Ru Ying Tong, Witold Kula
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Patent number: 8592929Abstract: A spin transfer torque magnetic random access memory (STT-MRAM) device includes magnetic tunnel junctions (MTJs) with reduced switching current asymmetry. At least one switching asymmetry balance layer (SABL) near the free layer of the MTJ reduces a first switching current Ic(p-ap) causing the value of the first switching current to be nearly equal to the value of a second switching current Ic(ap-p) without increasing the average switching current of the device. The SABL may be a non-magnetic switching asymmetry balance layer (NM-SABL) and/or a magnetic switching asymmetry balance layer (M-SABL).Type: GrantFiled: January 27, 2012Date of Patent: November 26, 2013Assignee: QUALCOMM IncorporatedInventors: Wei-Chuan Chen, Kangho Lee, Xiaochun Zhu, Seung H. Kang
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Patent number: 8593862Abstract: A spin-torque transfer memory random access memory (STTMRAM) element includes a fixed layer formed on top of a substrate and a tunnel layer formed upon the fixed layer and a composite free layer formed upon the tunnel barrier layer and made of an iron platinum alloy with at least one of X or Y material, X being from a group consisting of: boron (B), phosphorous (P), carbon (C), and nitride (N) and Y being from a group consisting of: tantalum (Ta), titanium (Ti), niobium (Nb), zirconium (Zr), tungsten (W), silicon (Si), copper (Cu), silver (Ag), aluminum (Al), chromium (Cr), tin (Sn), lead (Pb), antimony (Sb), hafnium (Hf) and bismuth (Bi), molybdenum (Mo) or rhodium (Ru), the magnetization direction of each of the composite free layer and fixed layer being substantially perpendicular to the plane of the substrate.Type: GrantFiled: December 17, 2009Date of Patent: November 26, 2013Assignee: Avalanche Technology, Inc.Inventors: Rajiv Yadav Ranjan, Roger Klas Malmhall
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Publication number: 20130307098Abstract: Magnetoresistive elements, and memory devices including the same, include a pinned layer having a fixed magnetization direction, a free layer corresponding to the pinned layer, and a protruding element protruding from the free layer and having a changeable magnetization direction. The free layer has a changeable magnetization direction. The protruding element is shaped in the form of a tube. The protruding element includes a first protruding portion and a second protruding portion protruding from ends of the free layer facing in different directions.Type: ApplicationFiled: October 31, 2012Publication date: November 21, 2013Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sung-chul LEE, Ung-hwan PI, Kwang-seok KIM, Kee-won KIM, Young-man JANG
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Publication number: 20130307097Abstract: A magnetic memory cell comprises in-plane anisotropy tunneling magnetic junction (TMJ) and two fixed in-plane storage-stabilized layers, which splits on the both side of the data storage layer of the TMJ. The magnetizations of the said fixed in-plane storage-stabilized layers are all normal to that of the reference layer of TMJ but point to opposite direction. The existing of the storage-stabilized layers not only enhances the stability of the data storage, but also can reduce the critical current needed to flip the data storage layer via some specially added features.Type: ApplicationFiled: May 15, 2012Publication date: November 21, 2013Inventors: Ge Yi, Shaoping Li, Yunjun Tang, Zongrong Liu, Dujiang Wan
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Patent number: 8587044Abstract: A complementary logic device includes: an insulating layer formed on a substrate; a source electrode formed of a ferromagnetic body on the insulating layer; a gate insulating film; a gate electrode formed on the gate insulating film and controlling a magnetization direction of the source electrode; a channel layer formed on each of a first side surface and a second side surface of the source electrode and transmitting spin-polarized electrons from the source electrode; a first drain electrode formed on the first side surface of the source electrode; and a second drain electrode formed on the second side surface of the source electrode, wherein a magnetization direction of the first drain electrode and a magnetization direction of the second drain electrode are antiparallel to each other. Therefore, not only characteristics of low power and high speed but also characteristics of non-volatility and multiple switching by spin may be obtained.Type: GrantFiled: November 2, 2012Date of Patent: November 19, 2013Assignee: Korea Institute of Science and TechnologyInventors: Hyun Cheol Koo, Hyung Jun Kim, Joon Yeon Chang, Suk Hee Han, Hi Jung Kim
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Patent number: 8587043Abstract: According to one embodiment, a magnetoresistive random access memory includes a magnetoresistive element in a memory cell, the magnetoresistive element including a first metal magnetic layer, a second metal magnetic layer, and an insulation layer interposed between the first and second metal magnetic layers. An area of each of the first and second metal magnetic layers is smaller than an area of the insulation layer.Type: GrantFiled: March 18, 2011Date of Patent: November 19, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Katsuaki Natori, Koji Yamakawa, Daisuke Ikeno
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Patent number: 8575711Abstract: A storage element includes a storage layer configured to hold information by use of a magnetization state of a magnetic material, with a pinned magnetization layer being provided on one side of the storage layer, with a tunnel insulation layer, and with the direction of magnetization of the storage layer being changed through injection of spin polarized electrons by passing a current in the lamination direction, so as to record information in the storage layer, wherein a spin barrier layer configured to restrain diffusion of the spin polarized electrons is provided on the side, opposite to the pinned magnetization layer, of the storage layer; and the spin barrier layer includes at least one material selected from the group composing of oxides, nitrides, and fluorides.Type: GrantFiled: November 29, 2006Date of Patent: November 5, 2013Assignee: Sony CorporationInventors: Yutaka Higo, Masanori Hosomi, Kazuhiro Bessho, Tetsuya Yamamoto, Hiroyuki Ohmori, Kazutaka Yamane, Yuki Oishi, Hiroshi Kano
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Publication number: 20130277778Abstract: This description relates to a method for fabricating a magnetoresistive random access memory (MRAM) device having a plurality of magnetic tunnel junction (MTJ) units. The method includes forming a bottom conductive layer, forming an anti-ferromagnetic layer and forming a tunnel layer over the bottom conductive layer and the anti-ferromagnetic layer. The method further includes forming a free magnetic layer, having a magnetic moment aligned in a direction that is adjustable by applying an electromagnetic field, over the tunnel layer and forming a top conductive layer over the free magnetic layer. The method further includes performing at least one lithographic process to remove portions of the bottom conductive layer, the anti-ferromagnetic layer, the tunnel layer, the free magnetic layer and the top conductive layer that is uncovered by the photoresist layer until the bottom conductive layer is exposed and removing portions of at least one sidewall of the MTJ unit.Type: ApplicationFiled: April 20, 2012Publication date: October 24, 2013Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chern-Yow HSU, Shih-Chang LIU, Chia-Shiung TSAI
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Patent number: 8564079Abstract: A magnetic tunnel junction (MTJ) device for a magnetic random access memory (MRAM) in a semiconductor back-end-of-line (BEOL) process flow includes a first metal interconnect for communicating with at least one control device and a first electrode for coupling to the first metal interconnect through a via formed in a dielectric passivation barrier using a first mask. The device also includes an MTJ stack for storing data coupled to the first electrode, a portion of the MTJ stack having lateral dimensions based upon a second mask. The portion defined by the second mask is over the contact via. A second electrode is coupled to the MTJ stack and also has a same lateral dimension as defined by the second mask. The first electrode and a portion of the MTJ stack are defined by a third mask. A second metal interconnect is coupled to the second electrode and at least one other control device.Type: GrantFiled: January 19, 2009Date of Patent: October 22, 2013Assignee: QUALCOMM IncorporatedInventors: Seung H. Kang, Xia Li, Shiqun Gu, Kangho Lee, Xiaochun Zhu
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Publication number: 20130270661Abstract: A new magnetic memory cell comprises a perpendicular-anisotropy tunneling magnetic junction (TMJ) and a fixed in-plane spin-polarizing layer, which is separated from the perpendicular-anisotropy data storage layer of tunneling magnetic junction by a non-magnetic layer. The non-magnetic layer can be made of metallic or dielectric materials.Type: ApplicationFiled: April 16, 2012Publication date: October 17, 2013Inventors: Ge Yi, Shaoping Li, Yunjun Tang, Zongrong Liu