Device Characterized By Semiconductor Body (epo) Patents (Class 257/E33.002)
  • Publication number: 20100244054
    Abstract: A method for manufacturing a semiconductor device, includes: a step of etching a Si (111) substrate along a (111) plane of the Si (111) substrate to separate a Si (111) thin-film device having a separated surface along the (111) plane.
    Type: Application
    Filed: March 24, 2010
    Publication date: September 30, 2010
    Applicant: OKI DATA CORPORATION
    Inventors: Mitsuhiko OGIHARA, Tomohiko SAGIMORI, Takahito SUZUKI, Masataka MUTO
  • Patent number: 7795050
    Abstract: A nitride-based light emitting device is manufactured by using a single-crystal nitride-based semiconductor substrate. A seed material layer is deposited on a first substrate where organic residues including a natural oxide layer are removed from an upper surface of the first substrate. A multifunctional substrate is grown from the seed material layer. The single-crystal nitride-based semiconductor layer including a nitride-based buffer layer is formed on the multifunctional substrate. The seed material layer primarily assists the growth of the multifunctional substrate, which is essentially required for the growth of the single-crystal nitride-based semiconductor substrate. The multifunctional substrate is prepared in the form of a single-crystal layer or a poly-crystal layer having a hexagonal crystalline structure.
    Type: Grant
    Filed: April 1, 2009
    Date of Patent: September 14, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: June O Song
  • Publication number: 20100221858
    Abstract: To provide a semiconductor device with high performance and low cost and a manufacturing method thereof. A first region including a separated (cleavage) single-crystal semiconductor layer and a second region including a non-single-crystal semiconductor layer are provided over a substrate. It is preferable that laser beam irradiation be performed to the separated (cleavage) single-crystal semiconductor layer in an inert atmosphere, and laser beam irradiation be performed to the non-single-crystal semiconductor layer in an air atmosphere at least once.
    Type: Application
    Filed: May 18, 2010
    Publication date: September 2, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Hidekazu Miyairi
  • Publication number: 20100213437
    Abstract: The present invention provides a light emitting device that comprises a luminescent layer formed of a monomolecular film of quantum dots and has enhanced brightness and luminescence efficiency. A light emitting device 1 comprises at least an anode 3, a hole transport luminescent layer 5 formed of a material containing a hole transport material and quantum dots 11, an electron transport layer 7, and a cathode 4 provided in that order. The light emitting device 1 is constructed so that the hole mobility of the electron transport layer 7 is smaller than that of tris(8-quinolinolato)aluminum complex (Alq3), and, in the hole transport luminescent layer 5, excitons generated in the electron transport layer 7 migrate into the luminescent layer to emit light.
    Type: Application
    Filed: September 29, 2008
    Publication date: August 26, 2010
    Applicant: Dai Nippon Printing Co., Ltd.
    Inventors: Tomonori Akai, Masaya Shimogawara
  • Publication number: 20100213488
    Abstract: Provided are a light emitting device, a light emitting device package and a lighting system comprising the same. The light emitting device comprises a light emitting structure comprising a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer, and an anti-reflection region on a lateral surface of the light emitting structure.
    Type: Application
    Filed: February 19, 2010
    Publication date: August 26, 2010
    Inventors: Jeong Hyeon CHOI, Jae Wook Kim, Jeung Mo Kang, Du Hyun Kim
  • Publication number: 20100200850
    Abstract: Method of producing a partly or completely semi-insulating or p-type doped ZnO substrate from an n-type doped ZnO substrate, in which the n-type doped ZnO substrate is brought into contact with an anhydrous molten salt chosen from anhydrous molten sodium nitrate, lithium nitrate, potassium nitrate and rubidium nitrate. Partly or completely semi-insulating or p-type doped ZnO substrate, said substrate being in particular in the form of a thin layer, film or in the form of nanowires ; and said substrate being doped at the same time by an element chosen from Na, Li, K and Rb; by N; and by O; it being furthermore possible for ZnO or GaN to be epitaxially grown on this substrate. Electronic, optoelectronic or electro-optic device such as a light-emitting diode (LED) comprising this substrate.
    Type: Application
    Filed: August 6, 2009
    Publication date: August 12, 2010
    Inventors: Maurice Couchaud, CĂ©line Chevalier
  • Publication number: 20100201280
    Abstract: A light emitting device is provided having high luminous output while maintaining high wall plug efficiency, wherein the high thermal and electrical conductivity paths of the device are separated during the semiconductor wafer and die level manufacturing step. The device includes an electrical conducting mirror layer, which reflects at least 60% of generated light incident on it, and an isolation layer having electrical insulating properties and thermal conducting properties. A first electrode, which is not in contact with the main semiconductor layers of the device, is located on the mirror layer. A light emitting module, system and projection system incorporating the light emitting device are also described, as is a method of manufacture of the device.
    Type: Application
    Filed: September 12, 2008
    Publication date: August 12, 2010
    Applicant: PHOTONSTAR LED LIMITED
    Inventors: James Stuart McKenzie, Majd Zoorob
  • Publication number: 20100187545
    Abstract: The present invention is generally directed to methods of selectively doping a substrate and the resulting selectively doped substrates. The methods include doping an epilayer of a substrate with the selected doping material to adjust the conductivity of either the epilayers grown over a substrate or the substrate itself. The methods utilize lithography to control the location of the doped regions on the substrate. The process steps can be repeated to form a cyclic method of selectively doping different areas of the substrate with the same or different doping materials to further adjust the properties of the resulting substrate.
    Type: Application
    Filed: November 13, 2007
    Publication date: July 29, 2010
    Applicant: UNIVERSITY OF SOUTH CAROLINA
    Inventors: Asif Khan, Vinod Adivarahan
  • Patent number: 7759670
    Abstract: Techniques for controlling current flow in semiconductor devices, such as LEDs are provided. For some embodiments, a current guiding structure may be provided including adjacent high and low contact areas. For some embodiments, a second current path (in addition to a current path between an n-contact pad and a metal alloy substrate) may be provided. For some embodiments, both a current guiding structure and second current path may be provided.
    Type: Grant
    Filed: June 10, 2008
    Date of Patent: July 20, 2010
    Assignee: SemiLEDs Optoelectronics Co., Ltd.
    Inventors: Wen-Huang Liu, Chen-Fu Chu, Jiunn-Yi Chu, Chao-Chen Cheng, Hao-Chun Cheng, Feng-Hsu Fan, Yuan-Hsiao Chang
  • Patent number: 7751456
    Abstract: A method for manufacturing an laser diode includes: providing a wafer having thereon a semiconductor structure; depositing an SiO2 film; forming channels and a waveguide ridge between the channels in the wafer; forming an SiO2 film over the wafer; forming a resist pattern covering the SiO2 film in the channels such that the top surfaces of the resist pattern are lower than the top surface of the deposited SiO2 film on the top of the waveguide ridge, the resist pattern exposing the SiO2 film on the top of the waveguide ridge; removing the SiO2 film and the deposited SiO2 film by wet etching, using the resist pattern as a mask, to expose a p-GaN layer in the waveguide ridge; and forming an electrode layer on the top surface of the p-GaN layer.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: July 6, 2010
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazushige Kawasaki, Toshiaki Kitano, Takafumi Oka
  • Publication number: 20100167434
    Abstract: A method for fabricating a light emitting diode chip is provided. Firstly, a semiconductor device layer is formed on a substrate. Afterwards, a current spreading layer is formed on a portion of the semiconductor device layer. Then, a current blocking layer and a passivation layer are formed on a portion of the semiconductor device layer not covered by the current spreading layer. Finally, a first electrode is formed on the current blocking layer and the current spreading layer. Moreover, a second electrode is formed on the semiconductor device layer.
    Type: Application
    Filed: March 4, 2009
    Publication date: July 1, 2010
    Applicant: LEXTAR ELECTRONICS CORP.
    Inventors: Kuo-Lung Fang, Chien-Sen Weng, Chih-Wei Chao
  • Publication number: 20100163895
    Abstract: Provided is a compound light emitting device which facilitates easy connection of power supply lines, and has a high emission intensity in-plane uniformity. The light emitting device includes a first-conduction-type cladding layer, active layer structure, and second-conduction-type cladding layer each containing a III-V compound semiconductor. The first-conduction-type cladding layer and second-conduction-type cladding layer sandwich the active layer structure. The light emitting device includes a first-conduction-type-side electrode (7) for injecting carriers into the first-conduction-type cladding layer, and a second-conduction-type-side electrode (6) for injecting carriers into the second-conduction-type cladding layer. The first-conduction-type-side electrode (7) has an opening (7p).
    Type: Application
    Filed: January 26, 2007
    Publication date: July 1, 2010
    Applicant: Mitsubishi Chemical Corporation
    Inventor: Hideyoshi Horie
  • Publication number: 20100159625
    Abstract: A method for manufacturing a p-type gallium nitride-based (GaN) device is disclosed. In accordance with the method, an Mg in an MgNx layer disposed on p-type gallium nitride is diffused into the p-type gallium nitride by a heat treatment to dope the p-type gallium nitride with the Mg while activating the diffused Mg simultaneously, eliminating a need for an additional heat treatment for the activation and preventing a nitrogen in the p-type gallium nitride from being separated therefrom.
    Type: Application
    Filed: November 24, 2006
    Publication date: June 24, 2010
    Applicant: THELEDS CO., LTD.
    Inventor: Jong Hee Lee
  • Publication number: 20100140653
    Abstract: The present invention discloses a light emitting diode structure and a method for fabricating the same. In the present invention, a substrate is placed in a solution to form a chemical reaction layer on carved regions; the carved region is selectively etched to form a plurality of concave zones and form a plurality of convex zones; a semiconductor layer structure is epitaxially grown on the element regions and carved regions of the substrate; the semiconductor layer structure on the element regions is fabricated into a LED element with a photolithographic process.
    Type: Application
    Filed: February 19, 2010
    Publication date: June 10, 2010
    Inventors: Hung-Cheng LIN, Chia-Ming LEE, Jen-Inn CHYI
  • Publication number: 20100133543
    Abstract: Strands of active electronic devices (AEDs), such as field-effect transistors, are made by processing a semiconductor substrate so that it yields a number of elongate semiconductor members liberated from the starting substrate. The elongate semiconductor members are secured to wires or wire-like structures so as to form semiconductor-member-on-a-wire composites upon which the AEDs are formed using various deposition and etching techniques. The AED strands have many uses, including the creating of electronic components, including flexible, conformal, rigid and foldable electronics, such as displays and sensors.
    Type: Application
    Filed: February 9, 2010
    Publication date: June 3, 2010
    Inventor: Ajaykumar R. Jain
  • Publication number: 20100133564
    Abstract: The invention relates to a method for producing semiconductor components, wherein a layer composite (6) containing a semiconductor material is formed on a growth substrate (1), a flexible carrier layer is applied to the layer composite (6), the flexible carrier layer is cured to form a self-supporting carrier layer (2), and the growth substrate (1) is stripped away. As an alternative, the carrier layer (2) may have a base layer (2b) and an adhesion layer (2a) adhering on the layer composite.
    Type: Application
    Filed: August 4, 2006
    Publication date: June 3, 2010
    Inventors: Siegfried Herrmann, Berthold Hahn
  • Patent number: 7727865
    Abstract: To provide a method of controlling a conductivity of a Ga2O3 system single crystal with which a conductive property of a ?-Ga2O3 system single crystal can be efficiently controlled. The light emitting element includes an n-type ?-Ga2O3 substrate, and an n-type ?-AlGaO3 cladding layer, an active layer, a p-type ?-AlGaO3 cladding layer and a p-type ?-Ga2O3 contact layer which are formed in order on the n-type ?-Ga2O3 substrate. A resistivity is controlled to fall within the range of 2.0Ă—10?3 to 8Ă—102 ?cm and a carrier concentration is controlled to fall within the range of 5.5Ă—1015 to 2.0Ă—1019/cm3 by changing a Si concentration within the range of 1Ă—10?5 to 1 mol %.
    Type: Grant
    Filed: January 14, 2005
    Date of Patent: June 1, 2010
    Assignee: Waseda University
    Inventors: Noboru Ichinose, Kiyoshi Shimamura, Kazuo Aoki, Encarnacion Antonia Garcia Villora
  • Publication number: 20100123167
    Abstract: A light emitting device includes a gallium oxide based substrate, a gallium oxynitride based layer on the gallium oxide based substrate, a first conductivity-type semiconductor layer on the gallium oxynitride based layer, an active layer on the first conductivity-type semiconductor layer, and a second conductivity-type semiconductor layer on the active layer.
    Type: Application
    Filed: November 17, 2009
    Publication date: May 20, 2010
    Inventor: Yong Tae MOON
  • Publication number: 20100112741
    Abstract: A photonic semiconductor device and method are provided that ensure that the surface of the device upon completion of the SAG process is planar, or at least substantially planar, such that performance of the subsequent processes is facilitated, thereby enabling higher manufacturing yield to be achieved. A photonic semiconductor device and method are also provided that ensure that the isolation region of the device will have high resistance and low capacitance, without requiring the placement of a thick dielectric material beneath each of the contact pads. Eliminating the need to place thick dielectric materials underneath the contact pads eliminates the risk that the contact pads will peel away from the assembly.
    Type: Application
    Filed: January 12, 2010
    Publication date: May 6, 2010
    Applicant: Avago Technologies Fiber IP Pte. Ltd.
    Inventors: Marzia Rosso, Alessandro Stano, Ruiyu Fang, Paolo Valenti, Pietro Della Casa, Simone Codato, Cesare Rigo, Claudio Coriasso
  • Publication number: 20100098127
    Abstract: A method of manufacturing a nitride semiconductor light emitting element includes: forming a stacked layer body of a nitride semiconductor having a second conductive-type layer, a light emitting layer, and a first conductive-type layer stacked on a growth substrate in this order; forming a first Bragg reflector made of a dielectric multilayer film above the first conductive-type layer; forming a first electrode over the first Bragg reflector with the first electrode being electrically connected to the first conductive-type layer; bonding the stacked layer body to a supporting substrate via the first Bragg reflector and the first electrode; removing the growth substrate from the stacked layer body to expose the second conductive-type layer; and forming over the exposed second conductive-type layer a second electrode and a second Bragg reflector made of a dielectric multilayer film so that the second Bragg reflector faces the first Bragg reflector across the stacked layer body.
    Type: Application
    Filed: October 21, 2009
    Publication date: April 22, 2010
    Applicant: NICHIA CORPORATION
    Inventors: Yu HIGUCHI, Kunimichi OMAE
  • Patent number: 7700936
    Abstract: In one embodiment, a method of producing an optoelectronic nanostructure includes preparing a substrate; providing a quantum well layer on the substrate; etching a volume of the substrate to produce a photonic crystal. The quantum dots are produced at multiple intersections of the quantum well layer within the photonic crystal. Multiple quantum well layers may also be provided so as to form multiple vertically aligned quantum dots. In another embodiment, an optoelectronic nanostructure includes a photonic crystal having a plurality of voids and interconnecting veins; a plurality of quantum dots arranged between the plurality of voids, wherein an electrical connection is provided to one or more of the plurality of quantum dots through an associated interconnecting vein.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: April 20, 2010
    Assignee: University of Delaware
    Inventors: Janusz Murakowski, Garrett Schneider, Dennis W. Prather
  • Publication number: 20100084664
    Abstract: A semiconductor structure includes a substrate which may be formed from a ZnS single crystal of wurtzite (2H) structure with a predetermined crystal orientation, and which has a first surface and a second surface. The structure includes a layer of a group III-nitride crystalline material deposited as an epitaxial layer on the first surface of the substrate. In one embodiment, the group III-nitride deposit is epitaxially grown using a MOCVD (or MOVPE) technique or a HVPE technique or a combination thereof. There may be a mask and/or a buffer layer on the first surface and/or a protective layer on the second surface.
    Type: Application
    Filed: October 6, 2009
    Publication date: April 8, 2010
    Applicant: FAIRFIELD CRYSTAL TECHNOLOGY, LLC
    Inventor: Shaoping Wang
  • Patent number: 7692200
    Abstract: A nitride semiconductor light-emitting device wherein a substrate or nitride semiconductor layer has a defect concentration region and a low defect density region other than the defect concentration region. A portion including the defect concentration region of the nitride semiconductor layer or substrate has a trench region deeper than the low defect density region. Thus by digging the trench in the defect concentration region, the growth detection is uniformized, and the surface planarity is improved. The uniformity of the characteristic in the wafer surface leads to improvement of the yield.
    Type: Grant
    Filed: December 3, 2008
    Date of Patent: April 6, 2010
    Assignees: Sharp Kabushiki Kaisha, Sumitomo Electric Industries, Ltd.
    Inventors: Takeshi Kamikawa, Yoshika Kaneko, Kensaku Motoki
  • Publication number: 20100078657
    Abstract: An LED array chip (2), which is one type of a semiconductor light emitting device, includes an array of LEDs (6), a base substrate (4) supporting the array of the LEDs (6), and a phosphor film (48). The array of LEDs (6) is formed by dividing a multilayer epitaxial structure including a light emitting layer into a plurality of portions. The phosphor film (48) covers an upper surface of the array of the LEDs (6) and a part of every side surface of the array of LEDs (6). Here, the part extends from the upper surface to the light emitting layer.
    Type: Application
    Filed: November 10, 2009
    Publication date: April 1, 2010
    Inventor: Hideo Nagai
  • Patent number: 7683380
    Abstract: In one embodiment of an epitaxial LED device, a buffer layer (e.g. dielectric layer) between the current spreading layer and the substitute substrate includes a plurality of vias and has a refractive index that is below that of the current spreading layer. A reflective metal layer between the buffer layer and the substitute substrate is connected to the current spreading layer through the vias in the buffer layer. The buffer layer separates the current spreading layer from the reflective metal layer. In yet another embodiment, stress management is provided by causing or preserving stress, such as compressive stress, in the LED so that stress in the LED is reduced when it experiences thermal cycles.
    Type: Grant
    Filed: July 13, 2007
    Date of Patent: March 23, 2010
    Assignee: Dicon Fiberoptics, Inc.
    Inventors: Cheng Tsin Lee, Qinghong Du, Jean-Yves Naulin
  • Publication number: 20100038674
    Abstract: A light-emitting diode (LED) device is provided. The LED device has a lower LED layer and an upper LED layer with a light-emitting layer interposed therebetween. A current blocking layer is formed in the upper LED layer such that current passing between an electrode contacting the upper LED layer flows around the current blocking layer. When the current blocking layer is positioned between the electrode and the light-emitting layer, the light emitted by the light-emitting layer is not blocked by the electrode and the light efficiency is increased. The current blocking layer may be formed by converting a portion of the upper LED layer into a resistive region. In an embodiment, ions such as magnesium, carbon, or silicon are implanted into the upper LED layer to form the current blocking layer.
    Type: Application
    Filed: August 12, 2009
    Publication date: February 18, 2010
    Inventors: Ding-Yuan Chen, Chen-Hua Yu, Wen-Chih Chiou
  • Publication number: 20100034232
    Abstract: A laser amplification structure comprising an active medium and at least two electrodes disposed on either side of the active medium, the active medium comprising a first layer of a silicon oxide doped with rare earth ions, wherein the first silicon layer is co-doped with silicon nanograins and rare earth ions.
    Type: Application
    Filed: November 21, 2006
    Publication date: February 11, 2010
    Inventors: Fabrice Gourbilleau, David Bréard, Richard Rizk, Jean-Louis Doualan
  • Publication number: 20100025708
    Abstract: A lumped nanocircuit element design at IR and optical frequencies is provided that can effectively act as a lumped “diode” and a lumped “rectifier” for rectifying optical field displacement currents or optical electric field. The lumped nanocircuit element design can also act as a lumped second harmonic generator. The element is formed by juxtaposing an epsilon-negative nanoparticle with a nonlinear optical nanostructure.
    Type: Application
    Filed: October 10, 2007
    Publication date: February 4, 2010
    Applicant: The Trustees of the University of Pennsylvania
    Inventor: Nader Engheta
  • Publication number: 20100019251
    Abstract: A semiconductor light emitting device is provided. The semiconductor light emitting device comprises a substrate and a light emitting structure. The substrate comprises a plurality of discontinuous fusion spots on at least one side surface thereof. The light emitting structure comprises a plurality of compound semiconductor layers on the substrate.
    Type: Application
    Filed: July 21, 2009
    Publication date: January 28, 2010
    Inventors: SANG YOUL LEE, SUNG KYOON KIM, HEE SEOK CHOI
  • Publication number: 20100019247
    Abstract: A light emitting device is constituted by flip-chip mounting a GaN-based LED chip 100 of the following (a): (a) the a GaN-based LED chip 100 comprising a light-transmissive substrate 101 and GaN-based semiconductor layer L formed on the light-transmissive substrate 101, wherein the GaN-based semiconductor layer L has a laminate structure containing n-type layer 102, light emitting layer 103 and p-type layer 104 in this order from the light-transmissive substrate 101 side, wherein a positive electrode E101 is formed on the p-type layer 104, said electrode E101 containing a light-transmissive electrode E101a of an oxide semiconductor and a positive contact electrode E101b electrically connected to the light-transmissive electrode, and the area of the positive contact electrode E101b is less than ½ of the area of the upper surface of the p-type layer 104.
    Type: Application
    Filed: October 5, 2007
    Publication date: January 28, 2010
    Inventors: Takahide Joichi, Hiroaki Okagawa, Shin Hiraoka, Toshihiko Shima, Hirokazu Taniguchi
  • Publication number: 20100019260
    Abstract: A device includes a semiconductor structure comprising a light emitting layer disposed between an n-type region and a p-type region. The semiconductor structure is disposed between a window layer and a light-directing structure. The light-directing structure is configured to direct light toward the window layer; examples of suitable light-directing structures include a porous semiconductor layer and a photonic crystal. An n-contact is electrically connected to the n-type region and a p-contact is electrically connected to the p-type region. The p-contact is disposed in an opening formed in the semiconductor structure.
    Type: Application
    Filed: July 24, 2008
    Publication date: January 28, 2010
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.
    Inventors: John EPLER, James G. Neff, Oleg B. Schekin
  • Patent number: 7651927
    Abstract: A semiconductor device includes a substrate and a semiconductor layer formed on the substrate. The substrate has: a flat region provided in a main surface thereof; a first indentation region provided in a portion of the main surface different from the flat region and formed with first recesses; and a second indentation region provided between the first indentation region and the flat region, formed with second recesses, and having a lower probability of occurrence of growth nuclei than the first indentation region and a higher probability than the flat region in the case where a crystal of a semiconductor is grown on the main surface.
    Type: Grant
    Filed: November 28, 2006
    Date of Patent: January 26, 2010
    Assignee: Panasonic Corporation
    Inventor: Yuji Takase
  • Publication number: 20100001313
    Abstract: A light emitting device and a method of manufacturing the same are provided. The light emitting device comprises a first conductive type lower semiconductor layer, a current diffusion layer, a first conductive type upper semiconductor layer, an active layer, and a second conductive type semiconductor layer. The current diffusion layer is formed on the first conductive type lower semiconductor layer. The first conductive type upper semiconductor layer is formed on the current diffusion layer. The active layer is formed on the first conductive type upper semiconductor layer. The second conductive type semiconductor layer is formed on the active layer.
    Type: Application
    Filed: September 22, 2009
    Publication date: January 7, 2010
    Inventor: HYO KUN SON
  • Publication number: 20090321757
    Abstract: A light-emitting semiconductor component comprising a substrate which has a first interface between a first and a second silicon layer, whose lattice structures which are considered as ideal are rotated relative to each other through a twist angle about a first axis perpendicular to the substrate surface and are tilted through a tilt angle about a second axis parallel to the substrate surface, in such a way that a dislocation network is present in the region of the interface, wherein the twist angle and the tilt angle are so selected that an electroluminescence spectrum of the semiconductor component has an absolute maximum of the emitted light intensity at either 1.3 micrometers light wavelength or 1.55 micrometers light wavelength.
    Type: Application
    Filed: May 3, 2006
    Publication date: December 31, 2009
    Inventors: Martin Kittler, Manfred Reiche, Tzanimir Arguirov, Winfried Seifert
  • Publication number: 20090311817
    Abstract: A vertical nitride-based semiconductor LED comprises a structure support layer; a p-electrode formed on the structure support layer; a p-type nitride semiconductor layer formed on the p-electrode; an active layer formed on the p-type nitride semiconductor layer; an n-type nitride semiconductor layer formed on the active layer; an n-electrode formed on a portion of the n-type nitride semiconductor layer; and a buffer layer formed on a region of the n-type nitride semiconductor layer on which the n-electrode is not formed, the buffer layer having irregularities formed thereon. The surface of the n-type nitride semiconductor layer coming in contact with the n-electrode is flat.
    Type: Application
    Filed: August 20, 2009
    Publication date: December 17, 2009
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Sang Ho YOON, Su Yeol Lee, Doo Go Baik, Seok Beom Choi, Tae Sung Jang, Jong Gun Woo
  • Publication number: 20090305448
    Abstract: To provide a method for manufacturing a semiconductor light emitting device capable of providing sufficiently low operating voltage. The method for manufacturing a semiconductor light emitting device of the present invention includes: a semiconductor laminating step of laminating a plurality of nitride semiconductor layers of to form a semiconductor laminating structure; and an electrode forming step of forming n-side electrode and p-side electrodes on the n-type and p-type semiconductor layers. In the electrode forming step, after a first metallic layer including a Ni layer constituting a part of the n-side electrode is formed on a surface of a forming region of the n-side electrode, the first metallic layer is annealed in an atmosphere containing nitrogen and oxygen.
    Type: Application
    Filed: December 4, 2006
    Publication date: December 10, 2009
    Applicant: ROHM CO., LTD.
    Inventor: Yukio Shakuda
  • Publication number: 20090283693
    Abstract: Described herein is a field ionization and electron impact ionization device consisting of carbon nanotubes with microfabricated integral gates that is capable of producing short pulses of ions.
    Type: Application
    Filed: June 22, 2009
    Publication date: November 19, 2009
    Applicants: as represented by the Secretary of the Navy
    Inventors: David S.Y. Hsu, Jonathan L. Shaw
  • Publication number: 20090278163
    Abstract: A light-emitting device (1) is provided having a current blocking layer (9) of buried structure, a portion of the current blocking layer (9) having an oxygen concentration higher than that of a light-emitting layer, the current blocking layer being of a thickness of not less than 5 nm and not more than 100 nm. It includes an etching stop layer (24) below the current blocking layer (9), the etching stop layer being good in oxidation resistance. The light-emitting device (1) and its manufacturing method are provided such that the device has its current confinement effect improved and its output increased at lower forward voltage.
    Type: Application
    Filed: September 28, 2006
    Publication date: November 12, 2009
    Inventors: Ryo Sakamoto, Masatoshi Iwata, Susumu Tsujikawa, Yoshiyuki Kobayashi
  • Publication number: 20090272994
    Abstract: The embodiment discloses a semiconductor light emitting device. The semiconductor light emitting device comprises a first conductive semiconductor layer, an active layer on the first conductive semiconductor layer, a second conductive semiconductor layer on the active layer, a first electrode formed under the first conductive semiconductor layer and comprising a patterns of a predetermined shape, and a nitride semiconductor layer between the patterns of the first electrode.
    Type: Application
    Filed: April 29, 2009
    Publication date: November 5, 2009
    Inventor: Woo Sik LIM
  • Publication number: 20090272964
    Abstract: A light-emitting device and the method for making the same is disclosed. The light-emitting device is a semiconductor device, comprising a growth substrate, an n-type semiconductor layer, a quantum well active layer and a p-type semiconductor layer. It combines the holographic and the quantum well interdiffusion (QWI) to form a photonic crystal light-emitting device having a dielectric constant of two-dimensional periodic variation or a material composition of two-dimensional periodic variation in the quantum well active layer. The photonic crystal light-emitting devices can enhance the internal efficiency and light extraction efficiency.
    Type: Application
    Filed: May 1, 2009
    Publication date: November 5, 2009
    Applicant: Epistar Corporation
    Inventors: Chiu-Lin Yao, Ta-Cheng Hsu
  • Publication number: 20090268773
    Abstract: A surface emitting laser element that includes a cylindrical mesa post in which a plurality of semiconductor layers including an active layer is grown and that emits a laser light in a direction perpendicular to a substrate surface, the surface emitting laser element including a dielectric multilayer film on a top surface of the mesa post in at least a portion over a current injection area of the active layer; and a dielectric portion that includes layers fewer than layers of the dielectric multilayer film and that is arranged on a portion excluding the portion over the current injection area on the top surface of the mesa post and on at least part of a side surface of the mesa post.
    Type: Application
    Filed: April 24, 2008
    Publication date: October 29, 2009
    Applicant: THE FURUKAWA ELECTRIC CO.,LTD.,
    Inventors: Norihiro IWAI, Takeo Kageyama, Kinuka Tanabe
  • Publication number: 20090267083
    Abstract: A substrate for a light emitting diode (LED) can have one or more trenches formed therein so as to mitigate stress build up within the substrate due to mismatched thermal coefficients of expansion between the substrate and layers of material, e.g., semiconductor material, formed thereon. In this manner, the likelihood of damage to the substrate, such as cracking thereof, is substantially mitigated.
    Type: Application
    Filed: April 28, 2008
    Publication date: October 29, 2009
    Inventor: Jie Cui
  • Publication number: 20090250686
    Abstract: A yellow Light Emitting Diode (LED) with a peak emission wavelength in the range 560-580 nm is disclosed. The LED is grown on one or more III-nitride-based semipolar planes and an active layer of the LED is composed of indium (In) containing single or multi-quantum well structures. The LED quantum wells have a thickness in the range 2-7 nm. A multi-color LED or white LED comprised of at least one semipolar yellow LED is also disclosed.
    Type: Application
    Filed: April 6, 2009
    Publication date: October 8, 2009
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Hitoshi Sato, Hirohiko Hirasawa, Roy B. Chung, Steven P. DenBaars, James S. Speck, Shuji Nakamura
  • Publication number: 20090250695
    Abstract: A semiconductor device includes a substrate and a semiconductor layer having a channel region, the channel region is made from an oxide semiconductor which satisfies Vc/Va>4 where Vc is a volume ratio of a crystalline component and Va is a volume ratio of a non-crystalline component.
    Type: Application
    Filed: April 6, 2009
    Publication date: October 8, 2009
    Applicant: FUJIFILM Corporation
    Inventors: Atsushi TANAKA, Ken-ichi Umeda, Kohei Higashi, Maki Nangu
  • Publication number: 20090242907
    Abstract: To achieve enlargement and high definition of a display portion, a single crystal semiconductor film is used as a transistor in a pixel, and the following steps are included: bonding a plurality of single crystal semiconductor substrates to a base substrate; separating part of the plurality of single crystal semiconductor substrates to form a plurality of regions each comprising a single crystal semiconductor film over the base substrate; forming a plurality of transistors each comprising the single crystal semiconductor film as a channel formation region; and forming a plurality of pixel electrodes over the region provided with the single crystal semiconductor film and a region not provided with the single crystal semiconductor film. Some of the transistors electrically connecting to the pixel electrodes formed over the region not provided with the single crystal semiconductor film are formed in the region provided with the single crystal semiconductor film.
    Type: Application
    Filed: March 23, 2009
    Publication date: October 1, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Kunio HOSOYA, Saishi FUJIKAWA, Takahiro KASAHARA
  • Publication number: 20090242894
    Abstract: A thin-film-transistor (TFT) structure, a pixel structure and a manufacturing method thereof are provided. The TFT structure is formed in the pixel structure of a liquid crystal display (LCD). The TFT structure comprises a gate, a first dielectric layer, a patterned semiconductor layer, a second dielectric layer and a third dielectric layer stacked sequentially. The second dielectric layer and the third dielectric layer are formed on part of the patterned semiconductor layer to define a covered region and an uncovered region on the patterned semiconductor layer. The uncovered region of the second dielectric layer and the third dielectric layer jointly define an opening, which has at least one top lateral dimension and a bottom lateral dimension smaller than the top lateral dimension. Thereby, a lightly doped structure is formed in a portion of the covered region via the second dielectric layer after ion implantation.
    Type: Application
    Filed: December 12, 2008
    Publication date: October 1, 2009
    Applicant: AU Optronics Corp.
    Inventor: Yu-Cheng Chen
  • Publication number: 20090236607
    Abstract: An electronic circuit formed on an insulating substrate and having thin-film transistors (TFTs) comprising semiconductor layers. The thickness of the semiconductor layer is less than 1500 ?, e.g., between 100 and 750 ?. A first layer consisting mainly of titanium and nitrogen is formed on the semiconductor layer. A second layer consisting of aluminum is formed on top of the first layer. The first and second layers are patterned into conductive interconnects. The bottom surface of the second layer is substantially totally in intimate contact with the first layer. The interconnects have good contacts with the semiconductor layer.
    Type: Application
    Filed: June 2, 2009
    Publication date: September 24, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Minoru MIYAZAKI, Akane MURAKAMI, Baochun CUI, Mutsuo YAMAMOTO
  • Publication number: 20090230412
    Abstract: A multicolor electronic display is based on an array of luminescent semiconductor nanocrystals. Nanocrystals which emit light of different colors are grouped into pixels. The nanocrystals are optically pumped to produce a multicolor display. Different sized nanocrystals are used to produce the different colors. A variety of pixel addressing systems can be used.
    Type: Application
    Filed: May 26, 2009
    Publication date: September 17, 2009
    Inventors: Shimon Weiss, Michael C. Schlamp, A. Paul Alivisatos
  • Publication number: 20090195150
    Abstract: A top-emitting OLED display and fabrication method thereof are provided. The top-emitting OLED display includes providing a handling substrate. A composite layer is formed on the handling substrate. An organic light emitting unit is formed on the composite layer. A top electrode is formed on the organic light emitting unit. A reflective type display and fabrication method thereof are provided. The reflective type display includes providing a handling substrate. A composite layer is formed on the handling substrate, a thin film transistor array is formed on the composite layer.
    Type: Application
    Filed: January 22, 2009
    Publication date: August 6, 2009
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Liang-Hsiang Chen, Jing-Yi Yan, Jia Chong Ho
  • Publication number: 20090184326
    Abstract: A display substrate includes a base substrate, a gate line, a gate insulation layer, a data line, a thin-film transistor (TFT) and a pixel electrode. The gate line is extended in a first direction on the base substrate. The gate insulation layer is formed on the base substrate to cover the gate line. The data line is extended in a second direction and intersects the gate line at an intersecting portion. At the intersecting portion, the data line is separated from the gate line by an air gap. In another embodiment, the data line also includes at least one etching hole extending to the air gap. The TFT is electrically connected to the data and the gate lines. The pixel electrode is electrically connected to the TFT.
    Type: Application
    Filed: December 10, 2008
    Publication date: July 23, 2009
    Inventors: Woo-Geun Lee, Jae-Hyoung Youn, Ki-Won Kim, Jong-In Kim