Abstract: The present invention provides a liquid crystal display having excellent visibility. A thin film transistor array panel is provided, which includes: gate lines formed on an insulating substrate; data lines insulated from the gate lines and intersecting the gate lines; first pixel electrodes disposed on pixel areas defined by intersections of the gate lines and the data lines; first thin film transistors, each having three terminals connected to one of the gate lines, one of the data lines, and one of the first pixel electrodes; second pixel electrodes disposed on the pixel areas and capacitively coupled to the first pixel electrodes; and second thin film transistors, each having three terminals connected to a previous gate line, a storage electrode line or one of the data lines, and one of the second pixel electrodes.

Abstract: A display panel including a first substrate, a second substrate opposite to the first substrate and a display medium between the first substrate and the second substrate is provided. The first substrate has a scan line, a data line and an active device electrically connected to the scan line and the data line. The second substrate has a common electrode layer, an insulting layer covering the common electrode layer, a pixel electrode on the insulating layer and a contact structure on the insulating layer. More specifically, the contact structure is electrically connected to the pixel structure and electrically connected to the active device on the first substrate.

Abstract: In an organic light emitting display device and a method of manufacturing the same, the organic light emitting display device comprises: an active layer of a thin film transistor, which is formed on a substrate; a gate electrode formed on the active layer and a first insulating layer, and including a first transparent conductive layer and a first metal layer; source and drain electrodes formed on the gate electrode and a second insulating layer, and including a second metal layer connected to the active layer through a contact hole formed in the second insulating layer, a third metal layer formed on the second metal layer, and a second transparent conductive layer formed on the third metal layer; a pixel electrode formed on the first insulating layer, and including the first transparent conductive layer, the third metal layer, and the second transparent conductive layer; an intermediate layer disposed on the pixel electrode, and including an organic emission layer; and a counter electrode disposed so as to fa

Abstract: An exemplary embodiment of the present invention discloses a display substrate including a pixel connected to a first gate line and a data line. The pixel includes a first sub-pixel including a first liquid crystal capacitor and a first switching element including a gate electrode connected to the first gate line, a source electrode connected to the data line, and a drain electrode connected to the first liquid crystal capacitor. The pixel also includes a second sub-pixel including a second liquid crystal capacitor and a second switching element including a gate electrode connected to the first gate line, a source electrode connected to the data line, and a drain electrode connected to the second liquid crystal capacitor. The pixel further includes a controller including a control capacitor and a control switching element, the control switching element connected between a terminal of the control capacitor and the drain electrode of the second switching element.

Abstract: Disclosed is a method of manufacturing an organic light-emitting display device capable of improving efficiency of a laser generator used for crystallization of amorphous silicon. The method crystallizes amorphous silicon selectively to provide an organic light-emitting display device that includes channel area of a pixel contains polycrystalline silicon and storage area of the pixel contains amorphous silicon.

Abstract: A method of fabricating a TFT includes providing a substrate where a gate, an insulating layer, and a channel layer are formed. A conductive layer is formed on the substrate to cover the channel layer and the insulating layer. A photoresist layer is formed on the conductive layer. A photo mask is placed above the photoresist layer and has a data line pattern, a source pattern, and a drain pattern. A first width (W1) between the source pattern and the drain pattern and a second width (W2) of the data line pattern satisfy the following: if W1?1(um), then W2+a(um), and 0.3<a<0.7. An exposing process is performed by using the photo mask, and a development process is performed to pattern the photoresist layer. The conductive layer is patterned by using the photoresist layer as an etching mask to form a source, a drain, and a data line.

Abstract: Provided is a top gate thin film transistor, including on a substrate: a source electrode layer; a drain electrode layer; an oxide semiconductor layer; a gate insulating layer; a gate electrode layer including an amorphous oxide semiconductor containing at least one kind of element selected from among In, Ga, Zn, and Sn; and a protective layer containing hydrogen, in which: the gate insulating layer is formed on a channel region of the oxide semiconductor layer; the gate electrode layer is formed on the gate insulating layer; and the protective layer is formed on the gate electrode layer.

Abstract: An array substrate comprises a base substrate, a plurality of gate lines and a plurality of data lines which cross with each other on the base substrate to define a plurality of pixel units which are arranged in a matrix. Each pixel units are provided with a pixel electrode and a first thin film transistor as a pixel electrode switch. The gate lines control the first thin film transistors in the respective pixel unit rows. Second thin film transistors are provided for each pixel unit row, and the gate electrodes of the second thin film transistors in each pixel unit row are charged to turn on the second thin film transistors before the gate line controlling the first thin film transistors in the pixel unit row are charged. The source electrode and the drain electrode of each second thin film transistor are connected with the pixel electrodes in two adjacent pixel units in the respective pixel unit row, and the pixel electrode of each pixel unit is connected with only one second thin film transistor.

Abstract: A pixel unit of TFT-LCD array substrate and a manufacturing method thereof is disclosed. In the manufacturing method, besides a first insulating layer and a passivation layer, a second insulating layer is adopted to cover the gate island, and forms an opening on the gate island to expose the channel region, the source region and the drain region of the TFT. A gray tone mask and a photoresist lifting-off process are utilized to perform patterning, so that the TFT-LCD array substrate can be achieved with just three masks.

Abstract: A thin film transistor (TFT) for a liquid crystal display device includes a gate electrode, a source electrode, a drain electrode, an active region including a first semiconductor layer and a second semiconductor layer interposed within the first semiconductor layer, and an ohmic contact layer formed on the active region, wherein the source and drain electrodes are formed on the ohmic contact layer.

Abstract: A display device is provided with a pair of a first electrode and a second electrode at least one of which is transparent or translucent and a phosphor layer formed so as to be sandwiched between the first electrode and the second electrode, and the phosphor layer has a polycrystal structure made of a first semiconductor substance in which a second semiconductor substance different from the first semiconductor substance is segregated on a grain boundary of the polycrystal structure, and the phosphor layer has a plurality of pixel regions that are selectively allowed to emit light in a predetermined range thereof and non-pixel regions that divide at least one portion of the pixel regions.

Abstract: A display apparatus includes a first pixel including a first pixel electrode connected to first data and gate lines, a second pixel including a second pixel electrode connected to a second data and gate lines, a third pixel including a third pixel electrode connected to a third data line and the first gate line, a fourth pixel including a fourth pixel electrode connected to a fourth data line and the second gate line, a fifth pixel including a fifth pixel electrode connected to a fifth data line and the second gate line, a sixth pixel including a sixth pixel electrode connected to a sixth data line and the first gate line, a seventh pixel including a seventh pixel electrode connected to a seventh data line and the second gate line, and an eighth pixel including an eighth pixel electrode connected to an eighth data line and the first gate line.

Abstract: A method of manufacturing a display device is disclosed. In one embodiment, the method includes: i) forming a semiconductor layer where a plurality of crystallized areas and a plurality of noncrystallized areas are alternately arranged on a substrate, ii) aligning the substrate based on a difference in contrast ratio between the crystallized and noncrystallized areas and iii) performing a photo process or a photolithography process.

Abstract: One embodiment of the present invention provides a highly reliably display device in which a high mobility is achieved in an oxide semiconductor. A first oxide component is formed over a base component. Crystal growth proceeds from a surface toward an inside of the first oxide component by a first heat treatment, so that a first oxide crystal component is formed in contact with at least part of the base component. A second oxide component is formed over the first oxide crystal component. Crystal growth is performed by a second heat treatment using the first oxide crystal component as a seed, so that a second oxide crystal component is formed. Thus, a stacked oxide material is formed. A transistor with a high mobility is formed using the stacked oxide material and a driver circuit is formed using the transistor.

Abstract: In the array substrate where the display region has the non-quadrangle shape, a sub-capacitance line which forms a sub-capacitance is disposed at the pixel, a intersection region of the scanning lead-out line and a signal lead-out line is located at the frame region on the outside of the display region, a common lead-out line which connects the sub-capacitance line in common is disposed at the frame region side where the scanning lead-out line is disposed, the common lead-out line is not disposed in the intersection region, but disposed in a region between a region of the scanning lead-out line and a region of the signal lead-out line while intersecting any one of the scanning lead-out line and the signal lead-out line.

Abstract: A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors.

Abstract: A thin film transistor (TFT) substrate is provided in which a sufficiently large contact area between conductive materials is provided in a contact portion and a method of fabricating the TFT substrate. The TFT substrate includes a gate interconnection line formed on an insulating substrate, a gate insulating layer covering the gate interconnection line, a semiconductor layer arranged on the gate insulating layer, a data interconnection line including a data line, a source electrode and a drain electrode formed on the semiconductor layer, a first passivation layer formed on the data interconnection line and exposing the drain electrode, a second passivation layer formed on the first passivation film and a pixel electrode electrically connected to the drain electrode. An outer sidewall of the second passivation layer is positioned inside an outer sidewall of the first passivation layer.

Abstract: An organic light-emitting display device that may be easily manufactured and has an excellent display quality, the organic light-emitting display device including: an active layer of a thin-film transistor (TFT) formed on a substrate and including a semiconductor material; a lower electrode of a capacitor formed on the substrate and including a semiconductor material in which impurity ions are doped; a first insulating layer formed on the substrate so as to cover the active layer and the lower electrode; a gate electrode of the TFT formed on the first insulating layer and including a first gate electrode including silver (Ag) or an Ag alloy, a second gate electrode including a transparent conductive material, and a third gate electrode including metal that are sequentially stacked in the order stated; a plurality of pixel electrodes formed on the first insulating layer and including a first pixel electrode including Ag or an Ag alloy and a second pixel electrode including a transparent conductive material tha

Abstract: A gate electrode is provided on a layered structure formed by successively stacking a conductive layer and an insulating layer. A storage capacitor includes a lower electrode formed in a same layer and made of a same material as the conductive layer, a dielectric layer provided on the lower electrode, formed in a same layer and made of a same material as the insulating layer, and an upper electrode formed in a same layer and made of a same material as the gate electrode to overlap the lower electrode with the dielectric layer sandwiched therebetween. A contact hole for connection to the storage capacitor is continuously formed in the interlayer and gate insulating films. The dielectric layer and the upper electrode are formed to have a lower conductive layer forming the lower electrode partially exposed from the dielectric layer, the upper electrode, and the interlayer and gate insulating films.

Abstract: A thin film transistor is provided that includes a gate electrode, a source electrode, and a drain electrode, an oxide semiconductor active layer formed over the gate electrode, a fixed charge storage layer formed over a portion of the oxide semiconductor active layer, and a fixed charge control electrode formed over the fixed charged storage layer.

Abstract: A thin film transistor substrate and a method for fabricating the same are disclosed. A thin film transistor substrate includes a substrate comprising a plurality of grooves having different depths, respectively, to have a multi-step structure; gate and data lines alternatively crossed in the grooves to form a plurality of pixel areas; thin film transistors formed in the grooves of the substrate to be formed in cross portion of the gate and data lines, wherein active layers of the thin transistors are formed along the gate lines and gate electrodes, the active layers separated from active layers of neighboring pixel areas with the data line located there between.

Abstract: A flat panel display device having increased capacitance and a method of manufacturing the flat panel display device are provided. A flat panel display device includes: a plurality of pixel areas, each located at a crossing region of a gate line, a data line, and a common voltage line; a thin film transistor (TFT) located at a region where the gate line and the data line cross each other, the TFT including a gate electrode, a source electrode, and a drain electrode; and a storage capacitor located at a region where the common voltage line and the drain electrode cross each other, the storage capacitor including first, second, and a third storage electrodes.

Abstract: A method of manufacturing a flat panel display device includes: forming a semiconductor layer of a thin film transistor (TFT) on a substrate; forming a gate electrode on the semiconductor layer with a gate insulating layer between the gate electrode and the semiconductor layer, and doping source and drain regions of the semiconductor layer with ion impurities; sequentially forming a first conductive layer, a first insulating layer, and a second conductive layer, and forming a capacitor at a distance away from the TFT by patterning the first conductive layer, the first insulating layer, and the second conductive layer; forming a second insulating layer, and forming contact holes passing through the second insulating layer, the contact holes exposing portions of the source and drain regions and the second conductive layer; and forming source and drain electrodes that respectively contact the source and drain regions and the second conductive layer through the contact holes.

Abstract: An organic light-emitting display device and a method of manufacturing the same are disclosed. The organic light-emitting display device includes: a lower substrate including a display area and a non-display area, the lower substrate further including a power supply wiring unit disposed in the non-display area, the power supply wiring unit including at least one power supply wiring extending along an edge of the display area; an encapsulation substrate having an outer surface and an inner surface facing the lower substrate; a cavity formed into the inner surface of the encapsulation substrate in a region over the power supply wiring unit such that the cavity overlaps at least part of the power supply wiring when viewed in a direction perpendicular to the outer surface of the encapsulation substrate; and a polarizing plate disposed on the outer surface of the encapsulation substrate.

Abstract: A display panel including a first substrate, a second substrate opposite to the first substrate and a display medium between the first substrate and the second substrate is provided. The first substrate has a scan line, a data line and an active device electrically connected to the scan line and the data line. The second substrate has a common electrode layer, an insulting layer covering the common electrode layer, a pixel electrode on the insulating layer and a contact structure on the insulating layer. More specifically, the contact structure is electrically connected to the pixel structure and electrically connected to the active device on the first substrate.

Abstract: A method of fabricating an array substrate and a display device including the array substrate are discussed. According to an embodiment, the method includes forming a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, forming an oxide semiconductor layer and an etch prevention layer on the gate insulating layer using a single mask, forming source and drain electrodes on the etch prevention layer, and forming a passivation layer including a contact hole on the source and drain electrodes and on the gate insulating layer, and forming a pixel electrode on the passivation layer and through the contact hole.

Abstract: An embodiment of the present invention provides a TFT array substrate, in which TFT elements and pixel electrodes being correspondingly connected with the TFT elements are arrayed in matrix on an insulating substrate, the TFT array substrate including: gate bus lines made from a first metal material; source bus lines made from a second metal material; pixel electrodes made from a third metal material; a clock wiring made from the first metal material; a branch wiring made from the second metal material; and a connection conductor made from the third metal material, the connection conductor connecting the clock wiring and the branch wiring at a connection part in a periphery area, the connection part having a branch-wiring via hole, which exposes the branch wiring which is covered with the connection conductor, and overlaps the clock wiring at least partly in a plane view.

Abstract: A thin film transistor includes a channel layer including an amorphous 12CaO.7Al2O3 (C12A7) and a flat panel display device including the same. According to the present invention, the amorphous channel layer can be formed at a low temperature using C12A7. The thin film transistor including the amorphous channel layer has excellent electron mobility.

Abstract: A display substrate, a display device having the same and a method of manufacturing the display substrate are provided. The display substrate includes a base substrate having a pixels-populated area (PA) and a surrounding area (SA) outside the PA, a first contact pad portion formed in the surrounding area, a second contact pad portion formed in the surrounding area formed to be spaced apart from the first contact pad portion with a spacing region provided therebetween, an insulating layer formed in the spacing region between the first and second contact pad portions and having a thickness smaller than or equal to a thickness of each of the first and second contact pad portions, and a first conductive film formed on the first and second pad portions.

Abstract: An object is to reduce off-current of a thin film transistor. Another object is to improve electric characteristics of a thin film transistor. Further, it is still another object to improve image quality of a display device using the thin film transistor. An aspect of the present invention is a thin film transistor including a semiconductor film formed over a gate electrode and in an inner region of the gate electrode which does not reach an end portion of the gate electrode, with a gate insulating film interposed therebetween, a film covering at least a side surface of the semiconductor film, and a pair of wirings over the film covering the side surface of the semiconductor film; in which an impurity element serving as a donor is added to the semiconductor film.

Abstract: A system for displaying images includes a multi-gate thin film transistor (TFT) device including an active layer, first and second gate structures, and first and second light-shielding layers. The active layer is disposed on a substrate in a pixel region. The first and second gate structures are disposed on the active layer. The first and second light-shielding layers are disposed between the substrate and the active layer. The active layer includes first and second source/drain regions and first and second channel regions. The first light-shielding layer corresponds to a first lightly doped region and laterally extends under at least a portion of the first channel region. The second light-shielding layer corresponds to the second lightly doped region and laterally extends under at least a portion of the second channel region.

Abstract: One aspect of the present subject matter relates to a method for forming a transistor. According to an embodiment of the method, a pillar of amorphous semiconductor material is formed on a crystalline substrate, and a solid phase epitaxy process is performed to crystallize the amorphous semiconductor material using the crystalline substrate to seed the crystalline growth. The pillar has a sublithographic thickness. A transistor body is formed in the crystallized semiconductor pillar between a first source/drain region and a second source/drain region. A surrounding gate insulator is formed around the semiconductor pillar, and a surrounding gate is formed around and separated from the semiconductor pillar by the surrounding gate insulator. Other aspects are provided herein.

Abstract: A display device according to the present invention includes: a planarization layer for insulating between a gate electrode etc. and a data wiring, a drain electrode, or the like of the transistor; and a barrier layer that is formed on an upper surface or lower surface of the planarization layer and at the same time, adapted to suppress diffusion of moisture or degassing components from the planarization layer. The display device adopts a device structure effective in reducing the plasma damage on the planarization layer by devising a positional relationship between the planarization layer and the barrier layer. Also, in combination with a novel structure as a structure for a pixel electrode, effects such as an increase in luminance can be provided as well.

Abstract: A conventional setting voltage was a value with an estimated margin of a characteristic change of a light emitting element. Therefore, a voltage between the source and drain of a driver transistor Vds had to be set high (Vds?Vgs?VTh+a). This caused high heat generation and power consumption because a voltage applied to the light emitting element. The invention is characterized by feedbacking a change in a current value in accordance with the deterioration of a light emitting element and a power source voltage controller which modifies a setting voltage. Namely, according to the invention, the setting voltage is to be set in the vicinity of the boundary (critical part) between a saturation region and a linear region, and a voltage margin for the deterioration is not required particularly for an initial setting voltage.

Abstract: It is an object to provide a light-emitting device including a thin film transistor with high electric characteristics and high reliability, and a method for manufacturing the light-emitting device with high productivity. As for a light-emitting device including an inverted staggered thin film transistor of a channel stop type, the inverted staggered thin film transistor includes a gate electrode, a gate insulating film over the gate electrode, a microcrystalline semiconductor film including a channel formation region over the gate insulating film, a buffer layer over the microcrystalline semiconductor film, a channel protective layer which is provided over the buffer layer so as to overlap with the channel formation region of the microcrystalline semiconductor film, a source region and a drain region over the channel protective layer and the buffer layer, and a source electrode and a drain electrode over the source region and the drain region.

Abstract: An electro-optical device for performing time division gray scale display and which is capable of arbitrarily setting the amount of time during which light is emitted by EL elements is provided. From among n sustain periods Ts1, . . . , Tsn, the brightness of light emitted by the EL elements during at least one sustain period is set to be always lower than the brightness of light emitted by the EL elements during the other sustain periods, and the sustain periods are extended by the amount that the brightness has dropped. In accordance with the above structure, the sustain periods can be extended by lowering the setting of the brightness of light emitted by the EL elements.

Abstract: The present invention provides a circuit board that includes top gate TFTs and bottom gate TFTs formed on the same substrate and that can improve reliability of these TFTs.

Abstract: By providing appropriate TFT structures arranged in various circuits of the semiconductor device in response to the functions required by the circuits, it is made possible to improve the operating performances and the reliability of a semiconductor device, reduce power consumption as well as realizing reduced manufacturing cost and increase in yield by lessening the number of processing steps. An LDD region of a TFT is formed to have a concentration gradient of an impurity element for controlling conductivity which becomes higher as the distance from a drain region decreases. In order to form such an LDD region having a concentration gradient of an impurity element, the present invention uses a method in which a gate electrode having a taper portion is provided to thereby dope an ionized impurity element for controlling conductivity accelerated in the electric field so that it penetrates through the gate electrode and a gate insulating film into a semiconductor layer.

Abstract: A display device in which a plurality of gate wires and a plurality of drain wires that intersect the gate wires are provided, and thin film transistors connected to the gate wires and the drain wires are formed for respective pixel regions. At least one of the gate wires, the drain wires, and lead wires drawn from the gate wires or the drain wires is formed of a light-transmitting patterned conductive film. The light-transmitting patterned conductive film is formed of at least a first light-transmitting patterned conductive film, and a second light-transmitting patterned conductive film laminated on the first light-transmitting patterned conductive film. The second light-transmitting patterned conductive film is formed of a conductive film for coating only the surface of the first light-transmitting patterned conductive film including its side wall surface.

Abstract: A thin film transistor with favorable electric characteristics is provided, which includes a gate electrode layer; a first insulating layer covering the gate electrode layer; a pair of impurity semiconductor layers forming source and drain regions, which are provided with a distance therebetween and at least partly overlap with the gate electrode layer; a microcrystalline semiconductor layer which is provided over the first insulating layer in part of a channel formation region, and at least partly overlaps with the gate electrode layer and does not overlap with at least one of the pair of impurity semiconductor layers; a second insulating layer between and in contact with the first insulating layer and the microcrystalline semiconductor layer; and an amorphous semiconductor layer over the first insulating layer, covering the second insulating layer and the microcrystalline semiconductor layer. The first insulating layer is a silicon nitride layer and the second insulating layer is a silicon oxynitride layer.

Abstract: A pixel circuit substrate includes: a pixel electrode; a first drive element connected to one side of the pixel electrode; a second drive element that is connected to the first drive element in parallel and also is connected to the other side opposite to the one side of the pixel electrode.

Abstract: A thin film transistor including: an active layer formed on a substrate; a gate insulating layer pattern formed on a predetermined region of the active layer; a gate electrode formed on a predetermined region of the gate insulating layer pattern; an etching preventing layer pattern covering the gate insulating layer pattern and the gate electrode; and a source member and a drain member formed on the active layer and the etching preventing layer pattern.

Abstract: The present invention provides a liquid crystal display device having a large holding capacitance in the inside of a pixel. A liquid crystal display device includes a first substrate, a second substrate arranged to face the first substrate in an opposed manner, and liquid crystal sandwiched between the first substrate and the second substrate. The first substrate includes a video signal line, a pixel electrode, a thin film transistor having a first electrode thereof connected to the video signal line and a second electrode thereof connected to the pixel electrode, a first silicon nitride film formed above the second electrode, an organic insulation film formed above the first silicon nitride film, a capacitance electrode formed above the organic insulation film, and a second silicon nitride film formed above the capacitance electrode and below the pixel electrode. The second silicon nitride film is a film which is formed at a temperature lower than a forming temperature of the first silicon nitride film.

Abstract: An array substrate for a transflective liquid crystal display device includes: a substrate; a gate line and a data line on the substrate, the gate line and the data line crossing each other to define a pixel region including a transmissive area and a reflective area surrounding the transmissive area; a thin film transistor having a gate insulating layer, the thin film transistor electrically connected to the gate line and the data line; a first passivation layer having a drain contact hole exposing a drain electrode of the thin film transistor and a through hole exposing the substrate in the transmissive area; a pixel electrode on the first passivation layer, the pixel electrode contacting the substrate in the transmissive area through the through hole; and a reflective plate on the pixel electrode, the reflective plate being electrically connected to the drain electrode through the drain contact hole and to the pixel electrode.

Abstract: A light emitting diode having a transparent substrate and a method for manufacturing the same. The light emitting diode is formed by creating two semiconductor multilayers and bonding them. The first semiconductor multilayer is formed on a non-transparent substrate. The second semiconductor multilayer is created by forming an amorphous interface layer on a transparent substrate. The two semiconductor multilayers are bonded and the non-transparent substrate is removed, leaving a semiconductor multilayer with a transparent substrate.

Abstract: A method of producing a radiation-emitting thin film component includes providing a substrate, growing nanorods on the substrate, growing a semiconductor layer sequence with at least one active layer epitaxially on the nanorods, applying a carrier to the semiconductor layer sequence, and detaching the semiconductor layer sequence and the carrier from the substrate by at least partial destruction of the nanorods.

Abstract: A driving TFT for an organic light-emitting display device includes a gate electrode on a portion of a substrate, a gate insulation layer on an entire surface of the substrate including the gate electrode, a semiconductor layer on the gate insulation layer and covering the gate electrode, the semiconductor layer including an n-type impurity layer, and source and drain electrodes overlapping portions of the semiconductor layer at respective sides thereof.

Abstract: The present invention provides a manufacturing process using a droplet-discharging method that is suitable for manufacturing a large substrate in mass production. A photosensitive material solution of a conductive film is selectively discharged by a droplet-discharging method, selectively exposed to laser light, and developed or etched, thereby allowing only the region exposed to laser light to be left and realizing a source wiring and a drain wiring having a more microscopic pattern than the pattern itself formed by discharging. One feature of the source wiring and the drain wiring is that the source wiring and the drain wiring cross an island-like semiconductor layer and overlap it.

Abstract: It is an object to provide a light-emitting device in which plural kinds of circuits are formed over one substrate and plural kinds of thin film transistors corresponding to characteristics of the plural kinds of circuits are provided. An inverted coplanar thin film transistor in which an oxide semiconductor layer overlaps with a source electrode layer and a drain electrode layer is used for a pixel, and a channel-etched thin film transistor is used for a driver circuit. A color filter layer is provided between the pixel thin film transistor and a light-emitting element which is electrically connected to the pixel thin film transistor so as to overlap with the light-emitting element.

Abstract: Provided is a display device including first and second gate interconnections; a first pixel circuit disposed at one side of the first gate interconnection, the first pixel circuit including a first transistor, a gate electrode of the first transistor electrically connected to the first gate interconnection, a source electrode of the first transistor formed in a source layer, the source electrode including a first source electrode facing portion overlapping with the gate electrode; and a second pixel circuit disposed at the other side of the second gate interconnection, the second pixel circuit including a second transistor, a gate electrode of the second transistor electrically connected to the second gate interconnection, a source electrode of the second transistor formed in the source layer, the source electrode including a second source electrode facing portion overlapping with the gate electrode and stretched along the first source electrode facing portion.