Shape Or Structure (e.g., Shape Of Epitaxial Layer) (epo) Patents (Class 257/E33.005)
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Patent number: 8519412Abstract: A semiconductor light-emitting device and a method for manufacturing the same is disclosed, which improves light extraction efficiency by forming a plurality of protrusions on a surface of a substrate for growing a nitride semiconductor material thereon, the semiconductor light-emitting device comprising a substrate; one or more first protrusions on the substrate, each first protrusion having a recess through which a surface of the substrate is exposed planarly; a first semiconductor layer on the substrate including the first protrusions; an active layer on the first semiconductor layer; a second semiconductor layer on the active layer; a first electrode on a predetermined portion of the first semiconductor layer, wherein the active layer and second semiconductor layer are not formed on the predetermined portion of the first semiconductor layer; and a second electrode on the second semiconductor layer.Type: GrantFiled: July 15, 2010Date of Patent: August 27, 2013Assignee: LG Display Co., Ltd.Inventors: Su Hyoung Son, Kyoung Jin Kim, Eun Mi Ko, Ung Lee
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Patent number: 8519416Abstract: A nitride-based semiconductor light-emitting device capable of suppressing reduction of characteristics and a yield and method of fabricating the same is described. The method of fabricating includes the steps of forming a groove portion on a nitride-based semiconductor substrate by selectively removing a prescribed region of a second region of the nitride-based semiconductor substrate other than a first region corresponding to a light-emitting portion of a nitride-based semiconductor layer up to a prescribed depth and forming the nitride-based semiconductor layer having a different composition from the nitride-based semiconductor substrate on the first region and the groove portion of the nitride-based semiconductor substrate.Type: GrantFiled: October 9, 2009Date of Patent: August 27, 2013Assignee: Future Light, LLCInventors: Takashi Kano, Masayuki Hata, Yasuhiko Nomura
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Patent number: 8492787Abstract: This application discloses alight-emitting diode device, comprising an epitaxial structure having a light-emitting layer, a first-type conductivity layer, and a second-type conductivity layer wherein the thicknesses of the first-type conductivity confining layer is not equal to the second-type conductivity confining layer and the light-emitting layer is not overlapped with the portion of the epitaxial structure corresponding to the peak zone of the wave intensity distribution curve along the direction of the epitaxy growth.Type: GrantFiled: June 17, 2009Date of Patent: July 23, 2013Assignee: Epistar CorporationInventors: Ta-Cheng Hsu, Meng-Lun Tsai
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Patent number: 8487325Abstract: A light emitting diode includes a substrate, a plurality of pillar structures, a filler structure, a transparent conductive layer, a first electrode, and a second electrode. These pillar structures are formed on the substrate. Each of the pillar structures includes a first type semiconductor layer, an active layer, and a second type semiconductor layer. The first type semiconductor layers are formed on the substrate. The pillar structures are electrically connected with each other through the first type semiconductor layers. The filler structure is formed between the pillar structures. The filler structure and the second type semiconductor layers of the pillar structures are covered with the transparent conductive layer. The first electrode is in contact with the transparent conductive layer. The second electrode is in contact with the first type semiconductor layer.Type: GrantFiled: January 17, 2012Date of Patent: July 16, 2013Assignee: Opto Tech CorporationInventors: Chen-Yen Lin, Yung-Ming Lin, Po-Chun Yeh, Jeng-Wei Yu, Chih-Ming Lai, Lung-Han Peng
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Patent number: 8471239Abstract: Disclosed is a light emitting device. The light emitting device includes a support substrate; a planar layer over the support substrate; a wafer bonding layer over the planar layer; a current spreading layer over the wafer bonding layer; a second conductive semiconductor layer over the current spreading layer; an active layer over the second conductive semiconductor layer; a first conductive semiconductor layer over the active layer; a first electrode layer over the first conductive semiconductor layer; and a second electrode layer over the current spreading layer.Type: GrantFiled: April 23, 2009Date of Patent: June 25, 2013Assignee: LG Innotek Co., Ltd.Inventor: June O Song
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Publication number: 20130153856Abstract: An infrared LED device comprising a plurality of LED mesas; each mesa being approximately 25 to 500 microns separated by a gap of approximately 50 to 100 microns; each mesa having at least two indium contacts; a substrate; and a plurality of leads for connection to the contacts, whereby upon application of electrical power infrared light emission occurs. The method of making comprises providing a first substrate; using molecular beam epitaxy, growing a quantum well structure comprising alternating active and injection regions on the substrate; growing a thin p-type layer on the quantum well structure; etching the mesa area down to the substrate to form a plurality of mesas, forming first electrical contacts; deep etching to isolate each of the mesas; depositing first indium contacts on the mesas; providing a second substrate; depositing second electrical contacts; bonding the first and second substrates at the points of the electrical contacts.Type: ApplicationFiled: December 15, 2011Publication date: June 20, 2013Applicant: U.S. Government as represented by the Secretary of the AmryInventor: Naresh C. Das
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Publication number: 20130146838Abstract: A quantum dot device includes: a cathode layer; an anode layer; an active layer that is disposed between the cathode layer and the anode layer and includes a quantum layer; and an electron movement control layer that is disposed between the cathode layer and the anode layer and includes a different kind of quantum layer having an energy level different from that of the quantum layer comprised in the active layer.Type: ApplicationFiled: September 13, 2012Publication date: June 13, 2013Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Ji-yeon KU, Tae-ho KIM, Dae-young CHUNG, Kyung-sang CHO, Byoung-lyong CHOI
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Publication number: 20130146836Abstract: The carbon nanotube-based electronic and photonic devices are disclosed. The devices are united by the same technology as well as similar elements for their fabrication. The devices consist of the vertically grown semiconductor nanotube having two Schottky barriers at the nanotube ends and one Schottky barrier at the middle of the nanotube. Depending on the Schottky barrier heights and bias arrangements, the disclosed devices can operate either as transistors, CNT MESFET and CNT Hot Electron Transistor, or as a CNT Photon Emitter.Type: ApplicationFiled: December 7, 2011Publication date: June 13, 2013Inventor: Alexander Kastalsky
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Patent number: 8461569Abstract: A semiconductor device includes a quantum dot and a plurality of layers, wherein said plurality of layers includes: a first layer; a stressor layer; and a patterned layer wherein said stressor layer overlies said first layer and said patterned layer overlies said stressor layer; wherein said stressor layer has a substantially different lattice constant to said first layer and said patterned layer and has a pit provided in said layer; said quantum dot lying above said patterned layer aligned with said pit.Type: GrantFiled: May 10, 2011Date of Patent: June 11, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Joanna Krystyna Skiba-Szymanska, Andrew James Shields
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Patent number: 8460957Abstract: A method for manufacturing a high quality optical semiconductor device includes: (a) preparing a growth substrate; (b) forming a semiconductor layer on the growth substrate; (c) forming a metal support made of copper on the semiconductor layer by plating; (d) separating the growth substrate from the semiconductor layer to remove the growth substrate; and (e) carrying out a thermal treatment in order to even density distributions of crystal grains and voids in the copper forming the metal support.Type: GrantFiled: October 25, 2010Date of Patent: June 11, 2013Assignee: Stanley Electric Co., Ltd.Inventors: Tatsuma Saito, Yusuke Yokobayashi
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Patent number: 8455857Abstract: The present invention relates to semiconductor devices comprising semiconductor nanoelements. In particular the invention relates to devices having a volume element having a larger diameter than the nanoelement arranged in epitaxial connection to the nanoelement. The volume element is being doped in order to provide a high charge carrier injection into the nanoelement and a low access resistance in an electrical connection. The nanoelement may be upstanding from a semiconductor substrate. A concentric layer of low resistivity material forms on the volume element forms a contact.Type: GrantFiled: September 8, 2011Date of Patent: June 4, 2013Assignee: QuNano ABInventors: Lars Ivar Samuelson, Patrik Svensson, Jonas Ohlsson, Truls Lowgren
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Patent number: 8455322Abstract: Disclosed is an improved semiconductor structure (e.g., a silicon germanium (SiGe) hetero-junction bipolar transistor) having a narrow essentially interstitial-free SIC pedestal with minimal overlap of the extrinsic base. Also, disclosed is a method of forming the transistor which uses laser annealing, as opposed to rapid thermal annealing, of the SIC pedestal to produce both a narrow SIC pedestal and an essentially interstitial-free collector. Thus, the resulting SiGe HBT transistor can be produced with narrower base and collector space-charge regions than can be achieved with conventional technology.Type: GrantFiled: March 8, 2010Date of Patent: June 4, 2013Assignee: International Business Machines CorporationInventors: Oleg Gluschenkov, Rajendran Krishnasamy, Kathryn T. Schonenberg
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Publication number: 20130119345Abstract: A thin film transistor includes a gate electrode configured to receive a control voltage, a source electrode insulated from the gate electrode, and configured to receive an input voltage, a drain electrode insulated from the gate electrode, and configured to receive an output voltage, at least two carbon nanotube patterns formed in a channel region between the source electrode and the drain electrode, wherein the carbon nanotube patterns are separated from each other, and at least one floating electrode connecting the two carbon nanotube patterns to each other.Type: ApplicationFiled: June 13, 2012Publication date: May 16, 2013Inventors: Sang Ho PARK, Young Ki SHIN, Yoon Ho KHANG, Joo Hyung LEE, Hyung Woo LEE, Seung Hun HONG
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Patent number: 8441020Abstract: Several embodiments of light emitting diode packaging configurations including a substrate with a cavity are disclosed herein. A patterned wafer has a plurality of individual LED attachment sites, and an alignment wafer has a plurality of individual cavities. The patterned wafer and the alignment wafer are superimposed with the LED attachment sites corresponding generally to the cavities of the alignment wafer. At least one LED is placed in the cavities using the cavity to align the LED relative to the patterned wafer. The LED is electrically connected to contacts on the patterned wafer, and a phosphor layer is formed in the cavity to cover at least a part of the LED.Type: GrantFiled: March 10, 2010Date of Patent: May 14, 2013Assignee: Micron Technology, Inc.Inventor: Jonathon G. Greenwood
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Patent number: 8440996Abstract: The present invention relates to a GaN based nitride based light emitting device improved in Electrostatic Discharge (ESD) tolerance (withstanding property) and a method for fabricating the same including a substrate and a V-shaped distortion structure made of an n-type nitride semiconductor layer, an active layer and a p-type nitride semiconductor layer on the substrate and formed with reference to the n-type nitride semiconductor layer.Type: GrantFiled: January 25, 2012Date of Patent: May 14, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Sang Won Kang, Yong Chun Kim, Dong Hyun Cho, Jeong Tak Oh, Dong Joon Kim
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Patent number: 8436384Abstract: Disclosed are a semiconductor light emitting device and a method for manufacturing the same. The semiconductor light emitting device comprises a substrate, in which concave-convex patterns are in at least a portion of a backside of the substrate, and a light emitting structure on the substrate and comprising a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer.Type: GrantFiled: February 16, 2011Date of Patent: May 7, 2013Assignee: LG Innotek Co., Ltd.Inventor: Ho Sang Yoon
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Patent number: 8436368Abstract: A light emitting device includes a p-type semiconductor layer, an n-type semiconductor layer, and an active region between the n-type semiconductor layer and the p-type semiconductor layer. A non-transparent feature, such as a wire bond pad, is on the p-type semiconductor layer or on the n-type semiconductor layer opposite the p-type semiconductor layer, and a reduced conductivity region is in the p-type semiconductor layer or the n-type semiconductor layer and is aligned with the non-transparent feature. The reduced conductivity region may extend from a surface of the p-type semiconductor layer opposite the n-type semiconductor layer towards the active region and/or from a surface of the n-type semiconductor layer opposite the p-type semiconductor layer towards the active region.Type: GrantFiled: February 27, 2012Date of Patent: May 7, 2013Assignee: Cree, Inc.Inventors: David Todd Emerson, Kevin Haberern, Michael John Bergmann, David B. Slater, Jr., Matthew Donofrio, John Edmond
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Silicon light emitting diode, silicon optical transistor, silicon laser and its manufacturing method
Patent number: 8436333Abstract: A light-emitting device according to the present invention includes a first electrode unit for injecting an electron, a second electrode unit for injecting a hole, and light-emitting units and electrically connected to the first electrode unit and the second electrode unit respectively, wherein the light-emitting units and are formed of single-crystal silicon, the light-emitting units and having a first surface (topside surface) and a second surface (underside surface) opposed to the first surface, plane orientation of the first and second surfaces being set to a (100) plane, thicknesses of the light-emitting units and in a direction orthogonal to the first and second surfaces being made extremely thin.Type: GrantFiled: April 24, 2007Date of Patent: May 7, 2013Assignee: Hitachi, Ltd.Inventors: Shinichi Saito, Digh Hisamoto, Tadashi Arai, Takahiro Onai -
Publication number: 20130099205Abstract: An electrical device comprising (A) a substrate having a surface and (B) a nanohole superlattice superimposed on a portion of the surface is provided. The nanohole superlattice comprises a plurality of sheets having an array of holes defined therein. The array of holes is characterized by a band gap or band gap range. The plurality of sheets forms a first edge and a second edge. A first lead comprising a first electrically conductive material forms a first junction with the first edge. A second lead comprising a second electrically conductive material forms a second junction with the second edge. The first junction is a Schottky barrier with respect to a carrier. In some instances a metal protective coating covers all or a portion of a surface of the first lead. In some instances, the first lead comprises titanium, the second lead comprises palladium, and the metal protective coating comprises gold.Type: ApplicationFiled: October 19, 2012Publication date: April 25, 2013Applicant: University of Utah Research FoundationInventor: University of Utah Research Foundation
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Patent number: 8421104Abstract: A light emitting diode apparatus with enhanced luminous efficiency is disclosed in the present invention. The light emitting diode apparatus includes a light emitting diode chip for providing a first light beam; a substrate, having a cross-section of a trapezoid, for supporting the light emitting diode chip, which is transparent to the first light beam; and an encapsulating body, containing a phosphor and encapsulating the light emitting diode chip and the substrate, for fixing the light emitting diode chip and the substrate and providing a second light beam when the phosphor is excited by the first light beam. Due to the shape of the substrate, contact area of the substrate with the phosphor is enlarged. Luminous efficiency is enhanced as well.Type: GrantFiled: May 24, 2010Date of Patent: April 16, 2013Assignee: Walsin Lihwa CorporationInventors: Ming-teng Kuo, Jang-ho Chen, Ching-hwa Chang Jean
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Publication number: 20130087760Abstract: According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, and a light emitting layer provided between the first semiconductor layer and the second semiconductor layer and configured to emit a light having a peak wavelength of 440 nanometers or more. Tensile strain is applied to the first semiconductor layer. An edge dislocation density of the first semiconductor layer is 5×109/cm2 or less. A lattice mismatch factor between the first semiconductor layer and the light emitting layer is 0.11 percent or less.Type: ApplicationFiled: February 27, 2012Publication date: April 11, 2013Applicant: Kabushiki Kaisha ToshibaInventors: Hisashi Yoshida, Koichi Tachibana, Tomonari Shioda, Toshiki Hikosaka, Jongil Hwang, Hung Hung, Naoharu Sugiyama, Shinya Nunoue
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Patent number: 8415181Abstract: Provided is a light emitting element, a light emitting device including the same, and fabrication methods of the light emitting element and light emitting device. The light emitting device comprises a substrate, a light emitting structure including a first conductive layer of a first conductivity type, a light emitting layer, and a second conductive layer of a second conductivity type which are sequentially stacked, a first electrode which is electrically connected with the first conductive layer; and a second electrode which is electrically connected with the second conductive layer and separated apart from the first electrode, wherein at least a part of the second electrode is connected from a top of the light emitting structure, through a sidewall of the light emitting structure, and to a sidewall of the substrate.Type: GrantFiled: January 4, 2012Date of Patent: April 9, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Yu-Sik Kim, Seong-Deok Hwang, Seung-Jae Lee, Sun-Pil Youn
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Patent number: 8415555Abstract: Methods of fabricating dimensional silica-based substrates or structures comprising a porous silicon layers are contemplated. According to one embodiment, oxygen is extracted from the atomic elemental composition of a silica glass substrate by reacting a metallic gas with the substrate in a heated inert atmosphere to form a metal-oxygen complex along a surface of the substrate. The metal-oxygen complex is removed from the surface of the silica glass substrate to yield a crystalline porous silicon surface portion and one or more additional layers are formed over the crystalline porous silicon surface portion of the silica glass substrate to yield a dimensional silica-based substrate or structure comprising the porous silicon layer. Embodiments are also contemplated where the substrate is glass-based, but is not necessarily a silica-based glass substrate. Additional embodiments are disclosed and claimed.Type: GrantFiled: May 4, 2011Date of Patent: April 9, 2013Assignee: Corning IncorporatedInventors: Robert A. Bellman, Nicholas F. Borrelli, David A. Deneka, Shawn M. O'Malley, Vitor M. Schneider
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Publication number: 20130082237Abstract: Light emitting devices having an enhanced degree of polarization, PD, and methods for fabricating such devices are described. A light emitting device may include a light emitting region that is configured to emit light having a central wavelength, ?, and a degree of polarization, PD, where PD>0.006??b for 200 nm???400 nm, wherein b?1.5.Type: ApplicationFiled: December 16, 2011Publication date: April 4, 2013Applicant: PALO ALTO RESEARCH CENTER INCORPORATEDInventors: John E. Northrup, Christopher L. Chua, Michael Kneissl, Thomas Wunderer, Noble M. Johnson
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Publication number: 20130075692Abstract: A light emitting layer including a plurality of light emitting particles embedded within a host matrix material. Each of said light emitting particles includes a population of semiconductor nanoparticles embedded within a polymeric encapsulation medium. A method of fabricating a light emitting layer comprising a plurality of light emitting particles embedded within a host matrix material, each of said light emitting particles comprising a population of semiconductor nanoparticles embedded within a polymeric encapsulation medium. The method comprises providing a dispersion containing said light emitting particles, depositing said dispersion to form a film, and processing said film to produce said light emitting layer.Type: ApplicationFiled: September 21, 2012Publication date: March 28, 2013Applicant: NANOCO TECHNOLOGIES LTD.Inventor: NANOCO TECHNOLOGIES LTD.
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Patent number: 8405100Abstract: An organic electroluminescence display unit includes: a lower electrode for each device; a first hole injection/transport layer provided on the lower electrode for each device; a second organic light emitting layer of the first color provided on the first hole injection/transport layer for the second organic electroluminescence device; a second hole injection/transport layer provided on the entire surfaces of the second organic light emitting layer and the first hole injection/transport layer for the first organic electroluminescence device, and being made of a low molecular material; a blue first organic light emitting layer provided on the entire surface of the second hole injection/transport layer; and an electron injection/transport layer having at least one of electron injection characteristics and electron transport characteristics, and an upper electrode that are provided in sequence on the entire surface of first organic light emitting layer.Type: GrantFiled: April 1, 2011Date of Patent: March 26, 2013Assignee: Sony CorporationInventors: Toshiaki Matsumoto, Tomoyuki Higo, Tadahiko Yoshinaga, Toshiaki Imai
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Patent number: 8404042Abstract: III-nitride crystal composites are made up of especially processed crystal slices cut from III-nitride bulk crystal having, ordinarily, a {0001} major surface and disposed adjoining each other sideways, and of III-nitride crystal epitaxially on the bulk-crystal slices. The slices are arranged in such a way that their major surfaces parallel each other, but are not necessarily flush with each other, and so that the [0001] directions in the slices are oriented in the same way.Type: GrantFiled: August 2, 2012Date of Patent: March 26, 2013Assignee: Sumitomo Electric Industries, Ltd.Inventors: Naho Mizuhara, Koji Uematsu, Michimasa Miyanaga, Keisuke Tanizaki, Hideaki Nakahata, Seiji Nakahata, Takuji Okahisa
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Publication number: 20130069032Abstract: According to one embodiment, a semiconductor light emitting device includes a first layer of n-type and a second layer of p-type including a nitride semiconductor, a light emitting unit provided between the first and second layers, a first stacked structure provided between the first layer and the light emitting unit, and a second stacked structure provided between the first layer and the first stacked structure. The light emitting unit includes barrier layers and a well layer provided between the barrier layers. The first stacked structure includes third layers including a nitride semiconductor, and fourth layers stacked with the third layers and including GaInN. The fourth layers have a thinner thickness than the well layer. The second stacked structure includes fifth layers including a nitride semiconductor, and sixth layers stacked with the fifth layers and including GaInN. The sixth layers have a thinner thickness than the well layer.Type: ApplicationFiled: February 28, 2012Publication date: March 21, 2013Applicant: Kabushiki Kaisha ToshibaInventors: Mitsuhiro KUSHIBE, Yasuo OHBA, Hiroshi KATSUNO, Kei KANEKO, Shinji YAMADA
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Publication number: 20130056704Abstract: A single-photon generator contains nitrogen-vacancies or other color centers in diamond as emitters of single photons which are excited by the laser beam or another optical source and can work stably under normal conditions, the metamaterial with hyperbolic dispersion as enhancing environment, and photonic guiding structure to collect and transmit single photons further.Type: ApplicationFiled: April 30, 2012Publication date: March 7, 2013Inventors: Vladimir M. Shalaev, Eric Kochman, Andrey N. Smolyaninov
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Publication number: 20130052762Abstract: A new method for forming an array of high aspect ratio semiconductor nanostructures entails positioning a surface of a stamp comprising a solid electrolyte in opposition to a conductive film disposed on a semiconductor substrate. The surface of the stamp includes a pattern of relief features in contact with the conductive film so as to define a film-stamp interface. A flux of metal ions is generated across the film-stamp interface, and a pattern of recessed features complementary to the pattern of relief features is created in the conductive film. The recessed features extend through an entire thickness of the conductive film to expose the underlying semiconductor substrate and define a conductive pattern on the substrate. The stamp is removed, and material immediately below the conductive pattern is selectively removed from the substrate. Features are formed in the semiconductor substrate having a length-to-width aspect ratio of at least about 5:1.Type: ApplicationFiled: October 14, 2010Publication date: February 28, 2013Inventors: Xiuling Li, Nicholas X. Fang, Placid M. Ferreira, Winston Chern, Ik Su Chun, Keng Hao Hsu
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Publication number: 20130049015Abstract: A light emitting diode (LED) is disclosed. The LED includes a substrate, a first semiconductor layer, an active layer, a second semiconductor layer, and a patterned structure. The first semiconductor layer having first and second regions is positioned on the substrate, wherein the first region is thicker than the second region. The active layer is positioned on the first region of the first semiconductor layer. The second semiconductor layer is positioned on the active layer, wherein the first and second semiconductor layers have opposite conductivities. The patterned structure is formed on a sidewall of the first region of the first semiconductor layer or on a sidewall of the second semiconductor layer.Type: ApplicationFiled: August 22, 2012Publication date: February 28, 2013Applicant: LEXTAR ELECTRONICS CORPORATIONInventors: Kuo-Lung Fang, Jui-Yi Chu
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Publication number: 20130043457Abstract: Provided are a light emitting device, a method of manufacturing the same, a light emitting device package, and a lighting system. The light emitting device includes: a first conductive semiconductor layer; a superlattice layer on the first conductive semiconductor layer; an active layer on the superlattice layer; and a second conductive semiconductor layer on the active layer. The superlattice layer comprises InxGa(1?x)N(0<x<1) doped with an n-type dopant and undoped InyGa(1?y)N(0<y<1).Type: ApplicationFiled: April 30, 2012Publication date: February 21, 2013Inventors: Dong Hun KANG, Sang Hyun Lee, Sung Yi Jung, Jong Pil Jeong
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Publication number: 20130037778Abstract: A method of making a device comprises forming a layer comprising quantum dots over a substrate including a first electrode, fixing the layer comprising quantum dots formed over the substrate, and exposing at least a portion of, and preferably all, exposed surfaces of the fixed layer comprising quantum dots to small molecules. Also disclosed is a method of making a device, the method comprising forming a layer comprising quantum dots over a substrate including a first electrode, exposing the layer comprising quantum dots to small molecules and light flux. A method of making a film including a layer comprising quantum dots, and a method of preparing a device component including a layer comprising quantum dots are also disclosed. Devices, device components, and films are also disclosed.Type: ApplicationFiled: May 10, 2012Publication date: February 14, 2013Inventors: PETER T. KAZLAS, John Spencer Morris, Robert J. Nick, Zoran Popovic, Matthew Stevenson, Jonathan S. Steckel
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Patent number: 8372670Abstract: A method for making a light-emitting element assembly including a support substrate having a first surface, a second surface facing the first surface, a recessed portion, and a conductive material layer formed over the first surface and the inner surface of the recessed portion, and a light-emitting element. The light-emitting element has a laminated structure including a first compound semiconductor layer, a light-emitting portion, and a second compound semiconductor layer, at least the second compound semiconductor layer and the light-emitting portion constituting a mesa structure. The light-emitting element further includes an insulating layer formed, a second electrode, and a first electrode. The mesa structure is placed in the recessed portion so that the conductive material layer and the second electrode are in at least partial contact with each other, and light emitted from the light-emitting portion is emitted from the second surface side of the first compound semiconductor layer.Type: GrantFiled: July 22, 2010Date of Patent: February 12, 2013Assignee: Sony CorporationInventors: Rintaro Koda, Takahiro Arakida, Satoshi Taniguchi, Yuji Masui, Nobuhiro Suzuki, Tomoyuki Oki, Chiyomi Uchiyama, Kayoko Kikuchi
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Publication number: 20130032847Abstract: An LED device includes a strip-shaped electrode, a strip-shaped current blocking structure and a plurality of distributed current blocking structures. The current blocking structures are formed of an insulating material such as silicon dioxide. The strip-shaped current blocking structure is located directly underneath the strip-shaped electrode. The plurality of current blocking structures may be disc shaped portions disposed in rows adjacent the strip-shaped current blocking structure. Distribution of the current blocking structures is such that current is prevented from concentrating in regions immediately adjacent the electrode, thereby facilitating uniform current flow into the active layer and facilitating uniform light generation in areas not underneath the electrode. In another aspect, current blocking structures are created by damaging regions of a p-GaN layer to form resistive regions.Type: ApplicationFiled: August 4, 2011Publication date: February 7, 2013Applicant: Bridgelux, Inc.Inventors: Chih-Wei Chuang, Chao-Kun Lin
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Patent number: 8367450Abstract: A light emitting system is disclosed. The system comprises an active region having a stack of bilayer quantum well structures separated from each other by barrier layers. Each bilayer quantum well structure is formed of a first layer made of a first semiconductor alloy for electron confinement and a second layer made of a second semiconductor alloy for hole confinement, wherein a thickness and composition of each layer is such that a characteristic hole confinement energy of the bilayer quantum well structure is at least 200 meV.Type: GrantFiled: February 21, 2011Date of Patent: February 5, 2013Assignee: Technion Research & Development Foundation Ltd.Inventors: Gad Bahir, Dan Fekete, Asaf Albo
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Patent number: 8367462Abstract: In a method for growing a nanowire array, a photoresist layer is placed onto a nanowire growth layer configured for growing nanowires therefrom. The photoresist layer is exposed to a coherent light interference pattern that includes periodically alternately spaced dark bands and light bands along a first orientation. The photoresist layer exposed to the coherent light interference pattern along a second orientation, transverse to the first orientation. The photoresist layer developed so as to remove photoresist from areas corresponding to areas of intersection of the dark bands of the interference pattern along the first orientation and the dark bands of the interference pattern along the second orientation, thereby leaving an ordered array of holes passing through the photoresist layer. The photoresist layer and the nanowire growth layer are placed into a nanowire growth environment, thereby growing nanowires from the nanowire growth layer through the array of holes.Type: GrantFiled: April 21, 2011Date of Patent: February 5, 2013Assignee: Georgia Tech Research CorporationInventors: Zhong L. Wang, Suman Das, Sheng Xu, Dajun Yuan, Rui Guo, Yaguang Wei, Wenzhuo Wu
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Publication number: 20130028281Abstract: In at least one embodiment of the optoelectronic semiconductor chip (1), the latter is based on a nitride material system and comprises at least one active quantum well (2). The at least one active quantum well (2) is designed to generate electromagnetic radiation when in operation. Furthermore, the at least one active quantum well (2) comprises N successive zones (A) in a direction parallel to a growth direction z of the semiconductor chip (1), N being a natural number greater than or equal to 2. At least two of the zones (A) of the active quantum well (2) have mutually different average indium contents c. Furthermore the at least one active quantum well (2) fulfils the condition: 40??c(z)dz?2.5N?1.Type: ApplicationFiled: March 10, 2010Publication date: January 31, 2013Inventors: Adrian Avramescu, Désirée Queren, Cristoph Eichler, Matthias Sabathil, Stephen Lutgen, Uwe Strauss
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Publication number: 20130026447Abstract: The invention is directed to a surface emitting semiconductor light-emitting diode (LED) in which a reflector layer (4) of the first conductivity type is provided between a substrate (2) and a first barrier layer (5). A first contact layer (9) has at least one emitting surface (13) via which radiation emitted by an active layer (6) exits the LED. The emitting surfaces (13) are electrically and optically isolated from one another by surface implanted regions (11) in the first contact layer (9) which are irradiated with electric charge carriers. The areas of the layers located below the emitting surface (13) starting from the first contact layer (9) and proceeding as far as at least through the active layer (6) are electrically and optically isolated with respect to areas of the layers not located below the emitting surface (13) by means of first deep implanted regions (12.1) irradiated with electric charge carriers.Type: ApplicationFiled: March 31, 2011Publication date: January 31, 2013Inventors: Bernd Kloth, Vera Abrosimova, Torsten Trenkler
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Patent number: 8362498Abstract: A light emitting device array includes a first supporting member, at least two bonding layers disposed on the first supporting member, a second supporting member disposed on each of the at least two bonding layers, a light emitting structure disposed on the second supporting member, the light emitting structure comprising a first conductivity type semiconductor layer, a second conductivity type semiconductor layer and an active layer disposed between the first conductivity type semiconductor layer and the second conductivity type semiconductor layer, and a first electrode disposed on the light emitting structure.Type: GrantFiled: May 6, 2011Date of Patent: January 29, 2013Assignee: LG Innotek Co., Ltd.Inventor: Joo Yong Jeong
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Patent number: 8362494Abstract: An electro-optic device is disclosed. The electro-optic device includes an insulating layer, a first semiconducting region disposed above the insulating layer and being doped with doping atoms of a first conductivity type, a second semiconducting region disposed above the insulating layer and being doped with doping atoms of a second conductivity type and an electro-optic active region disposed above the insulating layer and between the first semiconducting region and the second semiconducting region. The electro-optic active region includes a first partial active region and a second partial active region and an insulating structure in between. The insulating structure extends perpendicular to the surface of the insulating layer such that there is no overlap of the first partial active region and the second partial active region in the direction perpendicular to the surface of the insulating layer. A method for manufacturing is also disclosed.Type: GrantFiled: August 8, 2007Date of Patent: January 29, 2013Assignee: Agency for Science, Technology and ResearchInventors: Guo-Qiang Patrick Lo, Kee-Soon Darryl Wang, Wei-Yip Loh, Mingbin Yu, Junfeng Song
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Patent number: 8358675Abstract: Provided is a nitride semiconductor laser device that is reduced in capacitance to have a better response. The nitride semiconductor laser device includes: an active layer; an upper cladding layer which is stacked above the active layer; a low dielectric constant insulating film which is stacked above the upper cladding layer; and a pad electrode which is stacked above the low dielectric constant insulating film.Type: GrantFiled: June 25, 2010Date of Patent: January 22, 2013Assignee: Sharp Kabushiki KaishaInventors: Kentaro Tani, Yoshihiko Tani, Toshiyuki Kawakami
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Publication number: 20130016313Abstract: In a pixel unit and a display panel having the pixel unit, the pixel unit includes a pixel portion configured to display a color, and a transmissive portion configured to transmit light. The pixel portion is disposed at a central portion of the pixel unit and the transmissive portion is disposed at a peripheral portion adjacent to the central portion, or the transmissive portion is disposed at the central portion of the pixel unit and the pixel portion is disposed at the peripheral portion adjacent to the central portion.Type: ApplicationFiled: February 29, 2012Publication date: January 17, 2013Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Woo-Sub SHIM, Sung-Woong KIM, Jang-Sub KIM, Yoon-Ho KANG
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Patent number: 8354663Abstract: An ultra-violet light-emitting diode (LED) array, 12, and method for fabricating same with an AlInGaN multiple-quantum-well active region, 500, exhibiting stable cw-powers. The LED includes a template, 10, with an ultraviolet light-emitting array structure on it. The template includes a first buffer layer, 321, then a second buffer layer, 421, on the first preferably with a strain-relieving layer in both buffer layers. Next there is a semiconductor layer having a first type of conductivity, 500, followed by a layer providing a quantum-well region, 600, with an emission spectrum ranging from 190 nm to 369 nm. Another semiconductor layer having a second type of conductivity is applied next, 800. A first metal contact, 980, is a charge spreading layer in electrical contact with the first layer and between the array of LED's. A second contact, 990, is applied to the semiconductor layer having the second type of conductivity, to complete the LED.Type: GrantFiled: August 13, 2008Date of Patent: January 15, 2013Assignee: Nitek, Inc.Inventors: Vinod Adivarahan, Asif Khan, Rubina Khan
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Patent number: 8354289Abstract: A method for manufacturing a gallium nitride (GaN) wafer is provided. In the method for manufacturing the GaN wafer according to an embodiment, an etch stop layer is formed on a substrate, and a first GaN layer is formed on the etch stop layer. A portion of the first GaN layer is etched with a silane gas, and a second GaN layer is formed on the etched first GaN layer. A third GaN layer is formed on the second GaN layer.Type: GrantFiled: February 1, 2011Date of Patent: January 15, 2013Assignee: LG Siltron Inc.Inventors: Yong-Jin Kim, Dong-Kun Lee, Doo-Soo Kim, Ho-Jun Lee, Kye-Jin Lee
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Publication number: 20130009131Abstract: A device including an emissive material comprising quantum dots is disclosed. In one embodiment, the device includes a first electrode and a second electrode, a layer comprising quantum dots disposed between the first electrode and the second electrodes, and a first interfacial layer disposed at the interface between a surface of the layer comprising quantum dots and a first layer in the device. In certain embodiments, a second interfacial layer is optionally further disposed on the surface of the layer comprising quantum dots opposite to the first interfacial layer. In certain embodiments, a device comprises a light-emitting device. Other light emitting devices and methods are disclosed.Type: ApplicationFiled: April 6, 2012Publication date: January 10, 2013Inventors: Peter T. Kazlas, Zhaogun Zhou, Yuhua Niu, Sang-Jin Kim, Benjamin S. Mashford
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Publication number: 20130011949Abstract: A method of manufacturing a light-emitting device comprising the steps of cutting a substrate by a laser beam to form a cavity in the substrate and generate a by-product directly on the substrate by the cutting, and removing the by-product by a chemical solution containing an acid under a predetermined cleaning temperature.Type: ApplicationFiled: September 14, 2012Publication date: January 10, 2013Applicant: Epistar CorporationInventors: Chien-Kai CHUNG, Ta-Cheng Hsu, Jung-Min Hwang, Min-Hsun Hsieh, Ya-Lan Yang, De-Shan Kuo, Tsun-Kai Ko, Chien-Fu Shen, Ting-Chia Ko, Schang-Jin Hon
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Patent number: 8349629Abstract: A semiconductor light-emitting element includes a first semiconductor layer having a first conduction type, a second semiconductor layer having a second conduction type, an active layer provided between the first and second semiconductor layers, a polarity inversion layer provided on the second semiconductor layer, and a third semiconductor layer having the second conduction type provided on the polarity inversion layer. Crystal orientations of the first through third semiconductor layers are inverted, with the polarity inversion layer serving as a boundary. The first and third semiconductor layers have uppermost surfaces made from polar faces having common constitutional elements. Hexagonal conical protrusions arising from a crystal structure are formed at outermost surfaces of the first and third semiconductor layers. The first through third semiconductor layers are made from a wurtzite-structure group III nitride semiconductor, and are layered along a C-axis direction of the crystal structure.Type: GrantFiled: September 2, 2009Date of Patent: January 8, 2013Assignee: Stanley Electric Co., Ltd.Inventors: Yusuke Yokobayashi, Satoshi Tanaka, Masahiko Moteki
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Publication number: 20130001594Abstract: A method of making an electronic device comprising a double bank well-defining structure, which method comprises: providing an electronic substrate; depositing a first insulating material on the substrate to form a first insulating layer; depositing a second insulating material on the first insulating layer to form a second insulating layer; removing a portion of the second insulating layer to expose a portion of the first insulating layer and form a second well-defining bank; depositing a resist on the second insulating layer and on a portion of the exposed first insulating layer; removing the portion of the first insulating layer not covered by the resist, to expose a portion of the electronic substrate and form a first well-defining bank within the second well-defining bank; and removing the resist. The method can provide devices with reduced leakage currents.Type: ApplicationFiled: December 6, 2010Publication date: January 3, 2013Applicant: CAMBRIDGE DISPLAY TECHNOLOGY LIMITEDInventors: Mark Crankshaw, Mark Dowling, Daniel Forsythe, Simon Goddard, Gary Williams, Ilaria Grizzi, Angela McConnell
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Patent number: 8344402Abstract: A semiconductor light emitting device including a substrate, an electrode and a light emitting region is provided. The substrate may have protruding portions formed in a repeating pattern on substantially an entire surface of the substrate while the rest of the surface may be substantially flat. The cross sections of the protruding portions taken along planes orthogonal to the surface of the substrate may be semi-circular in shape. The cross sections of the protruding portions may in alternative be convex in shape. A buffer layer and a GaN layer may be formed on the substrate.Type: GrantFiled: June 30, 2010Date of Patent: January 1, 2013Assignee: Nichia CorporationInventors: Isamu Niki, Motokazu Yamada, Masahiko Sano, Shuji Shioji