Packaging (epo) Patents (Class 257/E33.056)
  • Patent number: 8674394
    Abstract: A light emitting device package includes a base, a light emitting element, a mask, metal wires, an encapsulating layer and a cover layer. The base has a first surface bearing electrical structure thereon and an opposite second surface. The mask is arranged on the first surface to define a space receiving the light emitting element. Two openings are defined in the mask. The light emitting element has two pads exposed to an outside through the two openings respectively. The metal wires electrically connect the pads and the electrical structures. The encapsulating layer is filled in the space and two through holes in the base and encapsulates the light emitting element. The encapsulating layer is separated from the metal wires. The cover layer covers and protects the mask and the metal wires. A method of manufacturing the package is also provided.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: March 18, 2014
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Shiun-Wei Chan, Chih-Hsun Ke
  • Patent number: 8674397
    Abstract: A sealing film forming method is capable of forming a sealing film having high moisture permeability resistance in a shorter time and at lower cost. The sealing film forming method for forming a sealing film 13 that seals an EL device 12 includes forming a first inorganic layer 13a on a surface of the EL device 12; forming a hydrocarbon layer 13c on the first inorganic layer 13a; flattening the hydrocarbon layer 13c by softening or melting the hydrocarbon layer 13c; curing the hydrocarbon layer 13c; and forming a second inorganic layer 13e thicker than the first inorganic layer 13a on the hydrocarbon layer 13c after curing the hydrocarbon layer 13c.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: March 18, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Hiraku Ishikawa, Teruyuki Hayashi
  • Patent number: 8664683
    Abstract: A method for providing, on a carrier (40), an insulative spacer layer (26) which is patterned such that a cavity (27) is formed which enables connection of an optical semiconductor element (41) to the intended conductor structure (22) when placed inside the cavity (27). The cavity (27) is formed such that it, through its shape, extension and/or depth, accurately defines a location of an optical element (45; 61) in relation to the optical semiconductor element (41). Through the provision of such a patterned insulative spacer layer, compact and cost-efficient optical semiconductor devices can be mass-produced based on such a carrier without the need for prolonged development or acquisition of new and expensive manufacturing equipment.
    Type: Grant
    Filed: December 14, 2007
    Date of Patent: March 4, 2014
    Assignee: Koninklijke Philips N.V.
    Inventor: Gerardus Henricus Franciscus Willebrordus Steenbruggen
  • Patent number: 8664035
    Abstract: An object is to reduce variations in programming behavior from memory element to memory element. Furthermore, an object is to obtain a semiconductor device with excellent writing characteristics and in which the memory element is mounted. The memory element includes a first conductive layer, a metal oxide layer, a semiconductor layer, an organic compound layer, and a second conductive layer, where the metal oxide layer, the semiconductor layer, and the organic compound layer are interposed between the first conductive layer and the second conductive layer; the metal oxide layer is provided in contact with the first conductive layer; and the semiconductor layer is provided in contact with the metal oxide layer. By use of this kind of structure, variations in programming behavior from memory element to memory element are reduced.
    Type: Grant
    Filed: July 13, 2007
    Date of Patent: March 4, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mikio Yukawa, Nozomu Sugisawa
  • Publication number: 20140054616
    Abstract: The present disclosure involves a method of packaging a light-emitting diode (LED). According to the method, a group of metal pads and a group of LEDs are provided. The group of LEDs is attached to the group of metal pads, for example through a bonding process. After the LEDs are attached to the metal pads, each LED is spaced apart from adjacent LEDs. Also according to the method, a phosphor film is coated around the group of LEDs collectively. The phosphor film is coated on top and side surfaces of each LED and between adjacent LEDs. A dicing process is then performed to slice through portions of the phosphor film located between adjacent LEDs. The dicing process divides the group of LEDs into a plurality of individual phosphor-coated LEDs.
    Type: Application
    Filed: August 24, 2012
    Publication date: February 27, 2014
    Applicant: TSMC Solid State Lighting Ltd.
    Inventors: Chi-Xiang Tseng, Hsiao-Wen Lee, Min-Sheng Wu, Tien-Ming Lin
  • Patent number: 8657985
    Abstract: Encapsulated organic electronic devices including organic light emitting diodes are made using an adhesive component as a mask while the device is being constructed. An adhesive-coated liner can be applied to the device substrate and openings created therein by removing portions of the liner and adhesive, or a patterned adhesive layer having openings therein can be formed on the device substrate, followed by deposition of the device layers and application of a sealing layer.
    Type: Grant
    Filed: March 31, 2011
    Date of Patent: February 25, 2014
    Assignee: 3M Innovative Properties Company
    Inventors: Fred Boyle McCormick, Paul Frederic Baude, George David Vernstrom
  • Patent number: 8648356
    Abstract: A light emitting diode for harsh environments includes a substantially transparent substrate, a semiconductor layer deposited on a bottom surface of the substrate, several bonding pads, coupled to the semiconductor layer, formed on the bottom surface of the substrate, and a micro post, formed on each bonding pad, for electrically connecting the light emitting diode to a printed circuit board. An underfill layer may be provided between the bottom surface of the substrate and the top surface of the printed circuit board, to reduce water infiltration under the light emitting diode substrate. Additionally, a diffuser may be mounted to a top surface of the light emitting diode substrate to diffuse the light emitted through the top surface.
    Type: Grant
    Filed: April 8, 2013
    Date of Patent: February 11, 2014
    Assignee: Senseonics, Incorporated
    Inventors: Jason D. Colvin, Arthur E. Colvin, Jr., Andrew DeHennis, Jody L. Krsmanovic
  • Patent number: 8648365
    Abstract: Disclosed is a light emitting device package. The light emitting device package includes a package body including a cavity formed therein with first and second via holes, a first electrode extending from one side of the cavity to one side of a rear surface of the package body through the first via hole, a second electrode extending from an opposite side of the cavity to an opposite side of the rear surface of the package body through the second via hole, a light emitting device connected with the first and second electrodes, an insulating layer insulating the first and second electrodes from the package body, and a reflective layer disposed on the insulating layer having a structure in which first and second media having different refractive indexes are alternately stacked on each other.
    Type: Grant
    Filed: February 16, 2010
    Date of Patent: February 11, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventor: Jung Min Won
  • Patent number: 8648366
    Abstract: An LED can include a pair of electrode members, and an LED chip joined to a chip mount portion disposed at the extremity of one of the pair of electrode members. The LED chip can be electrically connected to the pair of electrode members. A transparent resin portion can include a wavelength conversion material mixed therein, the transparent resin portion formed in such a manner as to surround the LED chip, wherein the LED chip is positioned offset toward one side in the transparent resin portion, and wherein the wavelength conversion material mixed in the transparent resin portion has a higher density around the LED chip within the transparent resin portion.
    Type: Grant
    Filed: June 28, 2010
    Date of Patent: February 11, 2014
    Assignee: Stanley Electric Co., Ltd.
    Inventor: Kazuhiko Ueno
  • Patent number: 8643032
    Abstract: A light emitting diode (LED) package includes: an array substrate; a plurality of LEDs mounted on the array substrate and arranged in rows and columns; a plurality of wavelength conversion units disposed in a light path of light emitted from each of the plurality of LEDs to convert the wavelength thereof; a plurality of first inspection terminals formed on the array substrate and electrically connected to LEDs in the same rows, among the plurality of LEDs; and a plurality of second inspection terminals formed on the array substrate and electrically connected to LEDs in the same columns, among the plurality of LEDs.
    Type: Grant
    Filed: August 29, 2012
    Date of Patent: February 4, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Masami Nei
  • Patent number: 8637883
    Abstract: A light emitting diode (LED) device having a low index of refraction spacer layer separating the LED chip and a functional layer. The LED chip has a textured light emission surface to increase light extraction from the chip. The spacer layer has an index of refraction that is lower than both the LED chip and the functional layer. Most of the light generated in the LED chip passes easily into the spacer layer due to the textured surface of the chip. At the interface of the spacer layer and the functional layer the light sees a step-up in index of refraction which facilitates transmission. A portion of the light that has passed into the functional layer will be reflected or scattered back toward the spacer layer where some of it will experience total internal reflection. Total internal reflection at this interface may increase extraction efficiency by reducing the amount of light that re-enters the spacer layer and, ultimately, the LED chip where it may be absorbed.
    Type: Grant
    Filed: March 19, 2008
    Date of Patent: January 28, 2014
    Assignee: Cree, Inc.
    Inventor: Arpan Chakraborty
  • Patent number: 8637892
    Abstract: According to one embodiment, an LED package includes first and second lead frames, an LED chip and a resin body. The first and second lead frames are apart from each other. The LED chip is provided above the first and second lead frames, the LED chip includes a semiconductor layer which contains at least indium, gallium and aluminum, one terminal of the LED chip is connected to the first lead frame, and another terminal of the LED chip is connected to the second lead frame. The resin body covers the LED chip and an entire upper surface, a part of a lower surface, and parts of edge surfaces of each of the first and second lead frames, and the resin body exposes a rest of the lower surface and a rest of the edge surfaces. And, an appearance of the resin body is a part of an appearance of the LED package.
    Type: Grant
    Filed: September 21, 2010
    Date of Patent: January 28, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hidenori Egoshi, Hiroaki Oshio, Teruo Takeuchi, Kazuhiro Inoue, Iwao Matsumoto, Satoshi Shimizu
  • Patent number: 8633506
    Abstract: A semiconductor light emitting device includes a semiconductor light source, a resin package surrounding the semiconductor light source, and a lead fixed to the resin package. The lead is provided with a die bonding pad for bonding the semiconductor light source, and with an exposed surface opposite to the die bonding pad The exposed surface is surrounded by the resin package in the in-plane direction of the exposed surface.
    Type: Grant
    Filed: March 11, 2009
    Date of Patent: January 21, 2014
    Assignee: Rohm Co., Ltd.
    Inventors: Masahiko Kobayakawa, Kazuhiro Mireba, Shintaro Yasuda, Junichi Itai, Taisuke Okada
  • Patent number: 8630326
    Abstract: A hybrid integrated optical device includes a substrate comprising a silicon layer and a compound semiconductor device bonded to the silicon layer. The device also includes a bonding region disposed between the silicon layer and the compound semiconductor device. The bonding region includes a metal-semiconductor bond at a first portion of the bonding region. The metal-semiconductor bond includes a first pad bonded to the silicon layer, a bonding metal bonded to the first pad, and a second pad bonded to the bonding metal and the compound semiconductor device. The bonding region also includes an interface assisted bond at a second portion of the bonding region. The interface assisted bond includes an interface layer positioned between the silicon layer and the compound semiconductor device, wherein the interface assisted bond provides an ohmic contact between the silicon layer and the compound semiconductor device.
    Type: Grant
    Filed: October 12, 2010
    Date of Patent: January 14, 2014
    Assignee: Skorpios Technologies, Inc.
    Inventors: Stephen B. Krasulick, John Dallesasse
  • Patent number: 8628985
    Abstract: Light emitting devices with improved light extraction efficiency are provided. The light emitting devices have a stack of layers including semiconductor layers comprising an active region. The stack is bonded to a transparent lens having a refractive index for light emitted by the active region preferably greater than about 1.5, more preferably greater than about 1.8. A method of bonding a transparent lens to a light emitting device having a stack of layers including semiconductor layers comprising an active region includes elevating a temperature of the lens and the stack and applying a pressure to press the lens and the stack together. Bonding a high refractive index lens to a light emitting device improves the light extraction efficiency of the light emitting device by reducing loss due to total internal reflection. Advantageously, this improvement can be achieved without the use of an encapsulant.
    Type: Grant
    Filed: October 4, 2011
    Date of Patent: January 14, 2014
    Assignee: Philips Lumileds Lighting Company LLC
    Inventors: Michael D. Camras, Michael R. Krames, Wayne L. Snyder, Frank M. Steranka, Robert C. Taber, John J. Uebbing, Douglas W. Pocius, Troy A. Trottier, Christopher H. Lowery, Gerd O. Mueller, Regina B. Mueller-Mach
  • Publication number: 20140011308
    Abstract: The invention provides a method for making a laser module, comprising: Step 1: fixing a laser crystal and a nonlinear crystal through at least one spacing element to form a first structure; Step 2: assembling the first structure on a substrate; Step 3: removing the spacing element to form a first laser module. According to the invention, the laser crystal and the nonlinear crystal are separately fixed on a heat conductive substrate to form the laser module, thereby the size of the laser module is reduced.
    Type: Application
    Filed: July 5, 2012
    Publication date: January 9, 2014
    Applicants: NANJING CQ LASER TECHNOLOGIES CO., LTD., C2C LINK CORPORATION
    Inventors: Qingyang Xu, Yang Lu, Hongping Su, Xiangyang Li
  • Patent number: 8614109
    Abstract: A light-emitting apparatus has a light-emitting device and a supporting board. The light-emitting device has a pair of n-electrodes with a p-electrode therebetween, on the same plane. The supporting board includes an insulating substrate on which positive and negative electrodes are formed, opposing to the p- and n-electrodes of the light-emitting device, respectively. Bonding members bond the p- and n-electrodes with the positive and negative electrodes, respectively. The positive electrode on the supporting board is formed within the width region of the p-electrode and narrower in width than the width of the p-electrode, in a cross-section along a line extending through the pair of n-electrodes. The negative electrodes oppose to the n-electrodes, respectively, with the same widths, or with that side face of each of the negative electrodes which faces the positive electrode being retracted outwardly from that side face of each of the n-electrodes which faces the p-electrode.
    Type: Grant
    Filed: November 28, 2012
    Date of Patent: December 24, 2013
    Assignee: Nichia Corporation
    Inventors: Ryo Suzuki, Tadao Hayashi
  • Publication number: 20130334551
    Abstract: A light-emitting device comprising: a substrate having a first surface and a second surface, wherein the second surface is opposite to the first surface; a semiconductor structure formed on the first surface of the substrate, comprising a first type semiconductor layer, an active layer and a second type semiconductor layer; and an isolation region separating at least the active layer into a first part and a second part, wherein the first part is capable of generating the electromagnetic radiation, and the second part comprises a breakdown diode.
    Type: Application
    Filed: June 14, 2012
    Publication date: December 19, 2013
    Applicant: EPISTAR CORPORATION
    Inventors: Rong-Ren LEE, Cheng-Hong CHEN, Chih-Peng NI, Chun-Yu LIN
  • Publication number: 20130334561
    Abstract: A method for bonding an LED wafer, a method for manufacturing an LED chip, and a bonding structure are provided. The method for bonding an LED wafer includes the following steps. A first metal film is formed on an LED wafer. A second metal film is formed on a substrate. A bonding material layer whose melting point is lower than or equal to about 110° C. is formed on the surface of the first metal film. The LED wafer is placed on the substrate. The bonding material layer is heated at a pre-solid reaction temperature for a pre-solid time to perform a pre-solid reaction. The bonding material layer is heated at a diffusion reaction temperature for a diffusing time to perform a diffusion reaction, wherein the melting points of the first and the second inter-metallic layers after diffusion reaction are higher than about 110° C.
    Type: Application
    Filed: June 19, 2012
    Publication date: December 19, 2013
    Inventors: Hsiu-Jen LIN, Jian-Shian Lin, Shau-Yi Chen, Jen-Hui Tsai
  • Patent number: 8610166
    Abstract: According to one embodiment, a light emitting device includes a first lead, a light emitting element, a second lead and a molded body. The light emitting element is fixed on the first lead. The second lead is provided away from the first lead and electrically connected to the light emitting element via a metal wire. The, molded body made of a sealing resin covers the light emitting element, end portions of the first lead and the second lead, the light emitting element being fixed on the end portion of the first read, and the metal wire being bonded on the end portion of the second lead. The first groove is provided between first and second portions in a front surface of the second lead, the first portion being in contact with an outer edge of the molded body and the metal wire being bonded on the second portion.
    Type: Grant
    Filed: March 28, 2012
    Date of Patent: December 17, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Atsushi Takeshita, Yuichi Ikedo, Tetsuya Muranaka
  • Patent number: 8610145
    Abstract: A light emitting apparatus 10 includes an aluminum nitride co-fired substrate 11 and a light emitting device 12 arranged on a front surface of the co-fired substrate, in which the front surface of the aluminum nitride substrate 11 bearing the light emitting device 12 is mirror-polished so as to have a surface roughness of 0.3 ?m Ra or less, and the light emitting apparatus 10 further includes a vapor-deposited metal film 14 and via holes 15. The vapor-deposited metal film 14 is arranged on the front surface of the aluminum nitride substrate 11 around the light emitting device 12 and has a reflectivity of 90% or more with respect to light emitted from the light emitting device 12. The via holes 15 penetrates the aluminum nitride substrate 11 from the front surface bearing the light emitting device 12 to the rear surface to thereby allow conduction to the light emitting device 12 from the rear surface.
    Type: Grant
    Filed: September 29, 2004
    Date of Patent: December 17, 2013
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Materials Co., Ltd.
    Inventor: Keiichi Yano
  • Patent number: 8610164
    Abstract: A light emitting device includes a package equipped on a front face with a window for installing a light emitting element, and outer lead electrodes that protrude from a bottom face of the package. The package has, on the bottom face, two side face convex components provided on the side face sides and a center convex component provided at a center. The outer lead electrodes are housed in a concave components defined by the side face convex components and the center convex component. The side face convex component has groove provided on the side face.
    Type: Grant
    Filed: October 31, 2012
    Date of Patent: December 17, 2013
    Assignee: Nichia Corporation
    Inventor: Saiki Yamamoto
  • Patent number: 8610139
    Abstract: A solid state light source array including a transparent substrate and N rows of solid state light emitting element series is provided. Each row of the solid state light emitting element series includes M solid state light emitting elements connected in series, wherein N, M are integers and N?1, M?2. Each of the solid state emitting elements includes a first type electrode pad and a second type electrode pad. The first and the Mth solid state emitting elements of each row of the solid state light emitting element series are electrically connected to a first conductive line and a second conductive line located on the edges of the first surface via the first type electrode pad and the second type electrode pad, respectively. The first conductive line and the second conductive line are physically disconnected.
    Type: Grant
    Filed: April 17, 2012
    Date of Patent: December 17, 2013
    Assignee: Lextar Electronics Corporation
    Inventors: Chang-Chin Yu, Mong-Ea Lin
  • Patent number: 8610136
    Abstract: A LED Chip-on-Board (COB) module comprises a plurality of LED die arranged on a substrate in one or more radially concentric rings about a center point such that each LED die is azimuthally offset from neighboring LED die. The module includes thermal conduction pads each having lateral dimensions at least as large as the combined lateral dimensions of the LED die attached to it and a total surface area at least five times larger than the total surface area of all the LED die attached to it. At the same time, the total light emission area of the module is no greater than four times larger than the combined total surface emission area of all the individual LED die disposed on the substrate. A variety of configurations are possible subject to these criteria, which permit good packing density for enhanced brightness while ensuring optimal heat transfer. A method of manufacturing the module is also provided.
    Type: Grant
    Filed: August 5, 2009
    Date of Patent: December 17, 2013
    Assignee: PhotonStar LED Limited
    Inventors: Majd Zoorob, Thomas David Matthew Lee
  • Patent number: 8611388
    Abstract: A composite integrated optical device includes a substrate including a silicon layer and a waveguide disposed in the silicon layer. The composite integrated optical device also includes an optical detector bonded to the silicon layer and a bonding region disposed between the silicon layer and the optical detector. The bonding region includes a metal-assisted bond at a first portion of the bonding region. The metal-assisted bond includes an interface layer positioned between the silicon layer and the optical detector. The bonding region also includes a direct semiconductor-semiconductor bond at a second portion of the bonding region.
    Type: Grant
    Filed: March 3, 2011
    Date of Patent: December 17, 2013
    Assignee: Skorpios Technologies, Inc.
    Inventors: Stephen B. Krasulick, John Dallesasse
  • Patent number: 8598617
    Abstract: An LED array comprises a growth substrate and at least two separated LED dies grown over the growth substrate. Each of LED dies sequentially comprise a first conductive type doped layer, a multiple quantum well layer and a second conductive type doped layer. The LED array is bonded to a carrier substrate. Each of separated LED dies on the LED array is simultaneously bonded to the carrier substrate. The second conductive type doped layer of each of separated LED dies is proximate to the carrier substrate. The first conductive type doped layer of each of LED dies is exposed. A patterned isolation layer is formed over each of LED dies and the carrier substrate. Conductive interconnects are formed over the patterned isolation layer to electrically connect the at least separated LED dies and each of LED dies to the carrier substrate.
    Type: Grant
    Filed: July 25, 2012
    Date of Patent: December 3, 2013
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Chih-Kuang Yu, Chyi Shyuan Chern, Hsing-Kuo Hsia, Hung-Yi Kuo
  • Publication number: 20130314910
    Abstract: The present invention discloses a printed circuit board, a LED light strip and a method for making the LED light strip. A LED light source is disposed on the printed circuit board, and at least a portion thereof is covered with a layer of white heat dissipating paint. By way of this arrangement, the printed circuit board is partially deployed with a layer of heat dissipating material so as to increase the heat dissipation thereof. As a result, the heat built-up from LED light source on the printed circuit board can be effectively dissipated.
    Type: Application
    Filed: May 31, 2012
    Publication date: November 28, 2013
    Applicant: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO. LTD
    Inventors: Chong Huang, Yu-chun Hsiao, Yi-cheng Kuo
  • Patent number: 8592855
    Abstract: Disclosed is a light emitting device package. The light emitting device package includes a substrate comprising a recess, a light emitting chip on the substrate and a first conductive layer electrically connected to the light emitting chip. And the first conductive layer includes at least one metal layer electrically connected to the light emitting chip on an outer circumference of the substrate.
    Type: Grant
    Filed: January 10, 2012
    Date of Patent: November 26, 2013
    Assignee: LG Innotek Co., Ltd.
    Inventors: Geun Ho Kim, Yu Ho Won
  • Publication number: 20130307013
    Abstract: A light-emitting device having a plurality of leads, a body, a light source die, a dark layer, and a substantially transparent encapsulant is disclosed. The dark layer absorbs a substantial portion of ambient light. The light source die may be a top emitting die. The light-emitting devices may be suitable for applications such as a large scale electronic display where each pixel is represented by each light-emitting device. The dark layer may contribute towards high contrast ratio by absorbing substantial amount of ambient light falling thereon.
    Type: Application
    Filed: May 15, 2012
    Publication date: November 21, 2013
    Applicant: AVAGO TECHNLOGIES ECBU IP (SINGAPORE) PTE. LTD.
    Inventors: Bit Tie Chan, Keat Chuan Ng, Kiam Soon Ong
  • Publication number: 20130309791
    Abstract: A high resolution active matrix backplane is fabricated using techniques applicable to flexible substrates. A backplane layer including active semiconductor devices is formed on a semiconductor-on-insulator substrate. The backplane layer is spalled from the substrate. A frontplane layer including passive devices such as LCDs, OLEDs, photosensitive materials, or piezo-electric materials is formed over the backplane layer to form an active matrix structure. The active matrix structure may be fabricated to allow bottom emission and provide mechanical flexibility.
    Type: Application
    Filed: May 16, 2012
    Publication date: November 21, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Stephen W. Bedell, Bahman Hekmatshoartabari, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
  • Patent number: 8587001
    Abstract: An LED light module free of jumper wires has a substrate and multiple LED chips. The substrate has a positive side circuit, a negative side circuit, multiple first chip connection portions and multiple second connection portions. The first and second chip connection portions are respectively connected to the positive and negative side circuits, and are juxtaposedly and alternately arranged on the substrate so that a width between each first chip connection portion and a corresponding second chip connection portion is smaller than a width of each LED chip. Each LED chip can be directly mounted on corresponding first and second chip connection portions to electrically connect to the positive and negative side circuits. Accordingly, jumper wires for connecting the LED chips and the positive and negative side circuits can be removed to avoid broken jumper wires occurring when the LED light module is shipped or assembled.
    Type: Grant
    Filed: February 13, 2012
    Date of Patent: November 19, 2013
    Assignee: Unistar Opto Corporation
    Inventors: Chin-Lung Lin, Yen-Chang Tu, Pai-Ti Lin, Che-Chang Hu
  • Patent number: 8581278
    Abstract: A light-emitting diode packaging structure includes a thermally conductive substrate; a circuit layer provided on one surface of the substrate and having an electric connection element; at least one chip mounted on the circuit layer to electrically connect to the electric connection element; a light-reflective case enclosing at least part of the substrate and being formed of a window, via which light emitted by the chip is projected outward; and a light-pervious colloidal seal fitted in the window of the case to form a protection around the chip. With the above structure, heat produced by the chip during operation thereof may be effectively radiated and dissipated via the thermally conductive substrate.
    Type: Grant
    Filed: April 6, 2007
    Date of Patent: November 12, 2013
    Assignee: Kingbright Electronic Co., Ltd.
    Inventor: Wen-Joe Song
  • Patent number: 8581269
    Abstract: A modular LED array light source comprises an assembly of a plurality of solid-state LED array modules. Modules are abutted to provide a large area, high intensity and high-density array that provides substantially uniform irradiance. Preferably, in each module, a linear or rectangular array of groups of LED is provided in which the density of LED die in the array is higher at ends or edges of the modules abutting other modules, to provide improved uniformity of irradiance over the illuminated area between modules. Particular arrangements of clusters of LEDs are provided that reduce or overcome the discontinuity or dip in irradiance due to edge or wall effects caused by the spacing of LED die from edges of the substrate/packaging of each module. These arrangements are advantageous for hermetically sealed LED array modules, for example, which require a minimum wall thickness for an effective seal.
    Type: Grant
    Filed: February 10, 2010
    Date of Patent: November 12, 2013
    Assignee: Lumen Dynamics Group Inc.
    Inventors: Sola Anne Kuk, Yong Wang, James Francis Farrell
  • Patent number: 8580587
    Abstract: The present invention provides a light emitting device and a method for manufacturing a light emitting device. The light emitting device includes a base, an LED inversely mounted on the base. The LED includes an LED chip connected to the base and a buffer layer located on the LED. The buffer layer includes a plurality of depressions with complementary pyramid structure on a surface of the buffer layer not face the LED, the surface being a light-exiting surface of the LED. The buffer layer is made from silicon carbide. The light emitting device has a large area of the light-exiting surface and provides a reflecting film on a base, thus improving the luminous efficiency of the light emitting device. Inversely mounting mode is adopt, which is easy to implement.
    Type: Grant
    Filed: December 9, 2010
    Date of Patent: November 12, 2013
    Assignee: Enraytek Optoelectronics Co., Ltd.
    Inventors: Richard Rugin Chang, Deyuan Xiao
  • Patent number: 8569790
    Abstract: A light emitting diode (LED) package includes a substrate, a first LED chip and a second LED chip. The substrate includes first to fourth electrodes, and an interconnection electrode. A mounting area is defined at center of a top surface of the substrate. The first to fourth electrodes are respectively in four corners of the substrate out of the mounting area. The first interconnection electrode is embedded in the substrate to electrically connect the first and the third electrodes. The first LED chip and the second LED chip are arranged in the mounting area. Each LED chip includes an anode pad and a cathode pad. The first to fourth electrodes are respectively connected to the four pads of the first and the second LED chips via a plurality of metal wires, and no metal wire connection is formed between the first and the second LED chips.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: October 29, 2013
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Chao-Hsiung Chang, Pi-Chiang Hu
  • Patent number: 8563990
    Abstract: An electronic device comprising at least one die stack having at least a first die (D1) comprising a first array of light emitting units (OLED) for emitting light, a second layer (D2) comprising a second array of via holes (VH) and a third die (D3) comprising a third array of light detecting units (PD) for detecting light from the first array of light emitting units (OELD) is provided. The second layer (D2) is arranged between the first die (D1) and the third die (D3). The first, second and third array are aligned such that light emitted from the first array of light emitting units (OLED) passed through the second array of via holes (VH) and is detected by the third array of light detecting units (PD). The first array of light emitting units and/or the third array of light detecting units are manufactured based on standard semiconductor manufacturing processes.
    Type: Grant
    Filed: April 7, 2009
    Date of Patent: October 22, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Freddy Roozeboom, Herbert Lifka, Frederik Vanhelmont, Wouter Dekkers
  • Patent number: 8558255
    Abstract: A method of building a light-emitting diode (LED) based lighting product includes mounting a plurality of unpackaged LED chips or LEDs directly on conductors on a surface of a two-sided panel, integrating the panel with support structure to form the lighting product such that at least one surface of the panel forms an external surface of the lighting product, and coupling a diffuser, with a distance from the diffuser to the surface of the LED chips or LEDs being at least twice an average spacing between adjacent LED chips or LEDs. A method of building a an LED chip-based lighting product includes mounting unpackaged LED chips directly on conductors formed on a surface of a two-sided panel, and mounting a cover plate to the LED chips such that light emitted from the LED chips passes through the cover plate.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: October 15, 2013
    Assignee: Albeo Technologies, Inc.
    Inventor: Jeffrey Bisberg
  • Publication number: 20130264589
    Abstract: An LED wafer includes LED dies on an LED substrate. The LED wafer and a carrier wafer are joined. The LED wafer that is joined to the carrier wafer is shaped. Wavelength conversion material is applied to the LED wafer that is shaped. Singulation is performed to provide LED dies that are joined to a carrier die. The singulated devices may be mounted in an LED fixture to provide high light output per unit area.
    Type: Application
    Filed: September 10, 2012
    Publication date: October 10, 2013
    Inventors: Michael John Bergmann, David Todd Emerson, Joseph G. Clark, Christopher P. Hussell
  • Patent number: 8552554
    Abstract: A heat dissipation structure for an electronic device includes a body having a first surface and a second surface opposite to the first surface. A silicon-containing insulating layer is disposed on the first surface of the body. A chemical vapor deposition (CVD) diamond film is disposed on the silicon-containing insulating layer. A first conductive pattern layer is disposed on the silicon-containing insulating layer, wherein the first conductive pattern layer is enclosed by and spaced apart from the CVD diamond film. A method for fabricating a heat dissipation structure for an electronic device and an electronic package having the heat dissipation structure are also disclosed.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: October 8, 2013
    Assignee: Industrial Technology Research Institute
    Inventors: Ra-Min Tain, Ming-Ji Dai, Yon-Hua Tzeng
  • Patent number: 8552449
    Abstract: Provided is a package of a light emitting diode. The package according to an embodiment includes a package of a light emitting diode, the package comprising: a base layer including an entire top surface that is substantially flat; a light emitting diode chip on the base layer; a lead frame electrically connected to the light emitting diode chip; and a reflective coating layer comprising titanium oxide, wherein a top surface of the reflective coating layer is substantially parallel to a top surface of the base layer, and wherein ends of the reflective coating layer and base layer are aligned with each other.
    Type: Grant
    Filed: March 21, 2011
    Date of Patent: October 8, 2013
    Assignee: LG Innotek Co., Ltd.
    Inventor: Bo Geun Park
  • Patent number: 8546828
    Abstract: The device includes a first ceramic layer; a second ceramic layer on the first ceramic layer and having a light emitting element mounting area; a reflective layer so formed on a surface of the second ceramic layer that the reflective layer covers at least the mounting area; a protective layer which covers the reflective layer; a semiconductor light emitting element mounted on the protective layer positioned above the element mounting area; and at least one heat dissipation via passing through the first ceramic layer. The heat dissipation via is disposed in a position that does not overlap with the element mounting area in a direction in which the ceramic layers are stacked.
    Type: Grant
    Filed: May 16, 2011
    Date of Patent: October 1, 2013
    Assignee: Stanley Electric Co., Ltd.
    Inventors: Hiroyuki Takayama, Maiko Tanabe, Kaori Namioka
  • Publication number: 20130248914
    Abstract: A packaged optoelectronic device and a method for manufacturing is provided. The packaged optoelectronic device includes at least one optoelectronic device with two electrodes sandwiched between a first barrier layer and a second barrier layer. At least one of the barrier layers comprises at least one aperture. Further, the packaged device includes a plurality of thin electrically conductive connectors. Each of the thin connectors extends out through the at least one aperture and is coupled to the anode or the cathode. Further, the thin connectors are connected to an external power source to provide power to the anode and the cathode.
    Type: Application
    Filed: March 20, 2012
    Publication date: September 26, 2013
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Jeffrey Michael Youmans, Joseph John Shiang
  • Patent number: 8541795
    Abstract: An LED package includes a LED structure that outputs light in a pattern about an axis and an optical coupling device with a central axis. The coupling device is positioned relative to the LED structure and accepts light from the LED. The coupling device includes a first dielectric interface surface that is substantially cylindrical with respect to the central axis, and a reflecting surface. The first dielectric interface surface accepts a first portion of light from the LED structure and directs it toward the reflecting surface. The reflecting surface accepts the light from the first dielectric interface surface and directs it toward the first dielectric interface surface in a direction substantially perpendicular to the central axis.
    Type: Grant
    Filed: October 10, 2005
    Date of Patent: September 24, 2013
    Assignee: Cree, Inc.
    Inventors: Bernd Keller, Benjamin Jacobson, Robert Gengelbach
  • Patent number: 8541803
    Abstract: Disclosed re-emitting semiconductor constructions (RSCs) may provide full-color RGB or white-light emitting devices that are free of cadmium. Some embodiments may include a potential well that comprises a III-V semiconductor and that converts light of a first photon energy to light of a smaller photon energy, and a window that comprises a II-VI semiconductor having a band gap energy greater than the first photon energy. Some embodiments may include a potential well that converts light having a first photon energy to light having a smaller photon energy and that comprises a II-VI semiconductor that is substantially Cd-free. Some embodiments may include a potential well that comprises a first III-V semiconductor and that converts light having a first photon energy to light having a smaller photon energy, and a window that comprises a second III-V semiconductor and that has a band gap energy greater than the first photon energy.
    Type: Grant
    Filed: June 25, 2010
    Date of Patent: September 24, 2013
    Assignee: 3M Innovative Properties Company
    Inventors: Terry L. Smith, Michael A. Haase, Thomas J. Miller, Xiaoguang Sun
  • Patent number: 8541808
    Abstract: A semiconductor light-emitting device includes a lead frame, a semiconductor light-emitting element mounted on the top surface of the bonding region, and a case covering part of the lead frame. The bottom surface of the bonding region is exposed to the outside of the case. The lead frame includes a thin extension extending from the bonding region and having a top surface which is flush with the top surface of the bonding region. The thin extension has a bottom surface which is offset from the bottom surface of the bonding region toward the top surface of the bonding region.
    Type: Grant
    Filed: March 7, 2012
    Date of Patent: September 24, 2013
    Assignee: Rohm Co., Ltd.
    Inventor: Masahiko Kobayakawa
  • Publication number: 20130244355
    Abstract: An exemplary method for manufacturing an LED package includes following steps: providing a substrate; forming a reflector on the substrate with a receiving chamber defined in the reflector; providing an LED chip and mounting the LED chip on the substrate wherein the LED chip is received in the receiving chamber; providing a gelatinous phosphor layer and arranging the gelatinous phosphor layer on a top end of the reflector wherein the gelatinous phosphor layer covers the receiving chamber and phosphor powder is evenly distributed in the gelatinous phosphor layer; providing a pressing mold and arranging the pressing mold on a top end of the gelatinous phosphor layer; pressing the pressing mold toward the gelatinous phosphor layer to make the gelatinous phosphor layer fill in the receiving chamber; solidifying the gelatinous phosphor layer.
    Type: Application
    Filed: October 17, 2012
    Publication date: September 19, 2013
    Inventors: LUNG-HSIN CHEN, WEN-LIANG TSENG
  • Publication number: 20130244354
    Abstract: Methods for producing and placing wavelength converting structures for use in a solid state lighting assembly are disclosed. The wavelength converting structures may take the form of thin film converters including a substrate and one or more thin films of wavelength conversion material.
    Type: Application
    Filed: March 14, 2012
    Publication date: September 19, 2013
    Applicant: OSRAM SYLVANIA INC.
    Inventors: Darshan Kundaliya, Jeffery Serre
  • Patent number: 8536612
    Abstract: Disclosed is a light emitting device having a plurality of light emitting cells and a package having the same mounted thereon. The light emitting device includes a plurality of light emitting cells which are formed on a substrate and each of which has an N-type semiconductor layer and a P-type semiconductor layer located on a portion of the N-type semiconductor layer. The plurality of light emitting cells are bonded to a submount substrate. Accordingly, heat generated from the light emitting cells can be easily dissipated, so that a thermal load on the light emitting device can be reduced. Meanwhile, since the plurality of light emitting cells are electrically connected using connection electrodes or electrode layers formed on the submount substrate, it is possible to provide light emitting cell arrays connected to each other in series.
    Type: Grant
    Filed: June 3, 2011
    Date of Patent: September 17, 2013
    Assignee: Seoul Opto Device Co., Ltd.
    Inventors: Chung Hoon Lee, Lacroix Yves, Hyung Soo Yoon, Young Ju Lee
  • Patent number: 8536694
    Abstract: A semiconductor device having a structure that can reduce stress due to difference in coefficients of thermal expansion and prevent or suppress generation of cracks, and a semiconductor device manufacturing method, are provided. The semiconductor device includes a single crystal silicon substrate having a main face on which semiconductor elements are formed and a side face intersecting with the main face, and a sealing resin provided covering at least a portion of the side face. The side face covered by the sealing resin is equipped with a first face with a plane direction forming an angle of ?5° to +5° to the plane direction of the main face.
    Type: Grant
    Filed: August 5, 2010
    Date of Patent: September 17, 2013
    Assignee: Lapis Semiconductor Co., Ltd.
    Inventor: Daisuke Inomata
  • Patent number: RE44811
    Abstract: The invention relates to a high power LED package, in which a package body is integrally formed with resin to have a recess for receiving an LED chip. A first sheet metal member is electrically connected with the LED chip, supports the LED chip at its upper partial portion in the recess, is surrounded by the package body extending to the side face of the package body, and has a heat transfer section for transferring heat generated from the LED chip to the metal plate of the board and extending downward from the inside of the package body so that a lower end thereof is exposed at a bottom face of the package body thus to contact the board. A second sheet metal member is electrically connected with the LED chip spaced apart from the first sheet metal member for a predetermined gap, and extends through the inside of the package body to the side face of the package body in a direction opposite to the first sheet metal member. A transparent sealant is sealingly filled up into the recess.
    Type: Grant
    Filed: December 19, 2011
    Date of Patent: March 18, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seon Goo Lee, Chang Wook Kim, Kyung Taeg Han