Barrier Layer Or Semiconductor Device Making Patents (Class 29/25.01)
  • Patent number: 11315901
    Abstract: A method for bonding a first substrate to a second substrate on mutually facing contact surfaces of the substrates, wherein the first substrate is mounted on a first chuck and the second substrate is mounted on a second chuck, and wherein a plate is arranged between the second substrate and the second chuck, wherein the second substrate with the plate is deformed with respect to the second chuck before and/or during the bonding. Furthermore, the present invention relates to a corresponding device and a corresponding plate.
    Type: Grant
    Filed: September 21, 2017
    Date of Patent: April 26, 2022
    Assignee: EV Group E. Thallner GmbH
    Inventors: Dominik Zinner, Thomas Wagenleitner, Jurgen Markus Suss, Thomas Plach, Jurgen Mallinger
  • Patent number: 11289324
    Abstract: The inventive substrate treatment method includes: an organic solvent supplying step of supplying an organic solvent having a smaller surface tension than a rinse liquid to the upper surface of a substrate so that rinse liquid adhering to the upper surface of the substrate is replaced with the organic solvent; a higher temperature maintaining step of maintaining the upper surface of the substrate at a predetermined temperature higher than the boiling point of the organic solvent to thereby form a gas film of the organic solvent on the entire upper surface of the substrate including the gap of the minute pattern and to form a liquid film of the organic solvent on the gas film, the higher temperature maintaining step being performed after the organic solvent supplying step is started; and an organic solvent removing step of removing the organic solvent liquid film from the upper surface of the substrate.
    Type: Grant
    Filed: August 10, 2017
    Date of Patent: March 29, 2022
    Assignee: SCREEN HOLDINGS CO., LTD.
    Inventor: Manabu Okutani
  • Patent number: 11276992
    Abstract: A method for electrical wiring of electronic components in switchgear construction, the method comprising the steps: a. providing a plurality of electronic components which are mounted on a shared workpiece, in particular on a mounting plate; b. wiring the electronic components according to a predetermined circuit diagram and in a predetermined order by at least one robot, wherein a cable sequence of pre-assembled cables is fed to the at least one robot and the cables are arranged in the predetermined order in the cable sequence; wherein the wiring comprises gripping a free cable end of the cable sequence by a multifunctional end effector of the robot, feeding the free cable end to an electrical connection of one of the electronic components by the multifunctional end effector, and detaching the cable from the cable sequence by a separation unit of the multifunctional end effector.
    Type: Grant
    Filed: November 8, 2018
    Date of Patent: March 15, 2022
    Inventor: Andreas Michael B├Ąchler
  • Patent number: 11217474
    Abstract: A non-vacuum, non-contact spinner wafer chuck including: a basal member including; a fastener receiver that receives a fastener; a chuck collar including: an inner collar wall; and an outer collar wall; and an engagement surface that: receives and engages a wafer; a wafer engagement cam including: an engagement face that engages the wafer; an index cam disposed on the chuck collar and comprising: an index face that faces toward the fastener receiver and that engages the wafer; and a spinner engager disposed on the spinner-side surface of the basal member and comprising: a spinner arm receiver bounded by a wall and that receives a spinner of the wafer processing machine, wherein the wafer engagement cam and the index cam engage the wafer and maintains an orientation of the wafer with respect to the index cam in response to rotation of the wafer relative to the non-vacuum, non-contact spinner wafer chuck.
    Type: Grant
    Filed: December 6, 2019
    Date of Patent: January 4, 2022
    Assignee: GOVERNMENT OF THE UNITED STATES OF AMERICA, AS REPRESENTED BY THE SECRETARY OF COMMERCE
    Inventor: Glenn Emerson Holland
  • Patent number: 11208721
    Abstract: A substrate processing apparatus includes an inner tube configured to accommodate a plurality of substrates and having a first opening portion; an outer tube surrounding the inner tube; a movable wall movably provided in the inner tube or between the inner tube and the outer tube and having a second opening portion; a gas supply part configured to supply a processing gas into the inner tube; an exhaust part provided outside the movable wall and configured to exhaust the processing gas supplied into the inner tube through the first opening portion and the second opening portion; and a pressure detection part configured to detect a pressure inside the inner tube.
    Type: Grant
    Filed: March 5, 2018
    Date of Patent: December 28, 2021
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Kohei Fukushima, Tsuneyuki Okabe
  • Patent number: 11180853
    Abstract: There is disclosed a substrate processing apparatus which can align a center of a substrate, such as a wafer, with a central axis of a substrate stage with high accuracy. The substrate processing apparatus includes: an eccentricity detector configured to obtain an amount of eccentricity and an eccentricity direction of a center of the substrate, when held on a centering stage, from a central axis of the centering stage; and an aligner configured to perform a centering operation of moving and rotating the centering stage until the center of the substrate on the centering stage is located on a central axis of a processing stage. The aligner is configured to calculate a distance by which the centering stage is to be moved and an angle through which the centering stage is to be rotated, based on an initial relative position of the central axis of the centering stage with respect to the central axis of the processing stage, the amount of eccentricity, and the eccentricity direction.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: November 23, 2021
    Assignee: Ebara Corporation
    Inventors: Yu Ishii, Fong-Jie Du, Makoto Kashiwagi
  • Patent number: 11163918
    Abstract: A design assistance system includes a component information management server and a design terminal. The component information management server includes an issue/measure information memory and a priority index memory. The issue/measure information memory stores a component to be used in a design assistance tool, an issue on the component, and measures to address the issue in association with each other. Each measure is at least one of addition of an addition target component and removal of a removal target component. The priority index memory stores a priority index in association with the addition target component and the removal target component. The design terminal includes a measure display that displays measures to address an issue on a focused component in a format based on the priority index associated with at least one of the addition target component and the removal target component included in each measure.
    Type: Grant
    Filed: September 20, 2018
    Date of Patent: November 2, 2021
    Assignee: FUJIFILM Business Innovation Corp.
    Inventors: Takahiro Suzuki, Shinji Kawabata
  • Patent number: 11127614
    Abstract: A substrate transfer method includes: acquiring sensing information from a sensor by moving a substrate by a robot arm such that the substrate passes through a sensing region; calculating a center position of the substrate with respect to the robot arm based on the sensing information; detecting a marker indicating a reference direction of the substrate by the sensor by controlling the robot arm to rotate the substrate about the center position in a state where an edge of the substrate is located in the sensing region; calculating a direction of the substrate with respect to the robot arm based on a position of the marker; calculating a correction amount based on the center position and the direction of the substrate; and placing the substrate on the stage in the processing chamber such that the center position and the direction of the substrate are corrected according to the correction amount.
    Type: Grant
    Filed: May 9, 2019
    Date of Patent: September 21, 2021
    Assignee: TOKYO ELECTRON LIMITED
    Inventor: Atsushi Kawabe
  • Patent number: 11127617
    Abstract: A storage device for use with at least one batch furnace for batch treatment of wafers supported in a wafer boat is disclosed. The storage device comprises a cassette storage carousel for storing a plurality of wafer cassettes on rotatable platform stages. A carousel housing bounds a mini-environment chamber in which the platform stages are accommodated. A gas recirculation circuit of the storage device subsequently comprises a gas inlet channel, a gas inlet filter, the mini-environment chamber, a plurality of gas outlet openings in a bottom wall of the carousel housing, a plenum housing bounding a plenum chamber, a plenum chamber outlet, a gas circulation pump connecting the plenum chamber outlet to an inlet end of the gas inlet duct.
    Type: Grant
    Filed: November 26, 2018
    Date of Patent: September 21, 2021
    Assignee: ASM IP Holding B.V.
    Inventor: Adriaan Garssen
  • Patent number: 11114340
    Abstract: The invention relates to a method for producing an interconnection comprising a via (V) extending through a substrate (1), said method successively comprising: (a) the deposition of a layer (11) of titanium nitride or tantalum nitride on a main surface (1A) of the substrate and on the inner surface (10A, 10B) of at least one hole (10) extending into at least part of the thickness of said substrate; (b) the deposition of a layer (12) of copper on said layer (11) of titanium nitride or tantalum nitride; and (c) the filling of the hole (10) with copper, said method being characterized in that, during step (a), the substrate (1) is arranged in a first deposition chamber (100), and in that said step (a) comprises the injection of a titanium or tantalum precursor in a gaseous phase into the deposition chamber via a first injection path according to a first pulse sequence, and the injection of a nitrogen-containing reactive gas into the deposition chamber via a second injection path different from the first injectio
    Type: Grant
    Filed: January 16, 2017
    Date of Patent: September 7, 2021
    Inventors: Julien Vitiello, Fabien Piallat
  • Patent number: 11087998
    Abstract: A transfer chamber configured to be used during semiconductor device manufacturing is described. Transfer chamber includes at least one first side of a first width configured to couple to one or more substrate transfer units (e.g., one or more load locks or one or more pass-through units), and at least a second set of sides of a second width that is different than the first width, the second set of sides configured to couple to one or more processing chambers. A total number of sides of the transfer chamber is at least seven. Transfers within the transfer chamber are serviceable by a single robot. Process tools and methods for processing substrates are described, as are numerous other aspects.
    Type: Grant
    Filed: March 20, 2019
    Date of Patent: August 10, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Michael Robert Rice, Michael Meyers, John J. Mazzocco, Dean C. Hruzek, Michael Kuchar, Sushant S. Koshti, Penchala N. Kankanala, Eric A. Englhardt
  • Patent number: 11083534
    Abstract: A surgical robot comprising a base and an arm extending from a proximal end attached to the base to a distal end attachable to a surgical instrument via a series of links interspersed by articulations. The arm comprises a receiver, a proximity sensor and a controller. The receiver is configured to receive data from the surgical instrument over a short-range wireless communications link with the surgical instrument. The proximity sensor is configured to detect the proximal presence of the surgical instrument. The controller is configured to respond to the proximity sensor detecting the proximal presence of the surgical instrument by enabling the short-range wireless communications link between the receiver and a transmitter of the surgical instrument to be established.
    Type: Grant
    Filed: June 13, 2017
    Date of Patent: August 10, 2021
    Assignee: CMR Surgical Limited
    Inventor: Luke David Ronald Hares
  • Patent number: 11062924
    Abstract: A semiconductor packaging apparatus and methods of manufacturing semiconductor devices using the same. The semiconductor packaging apparatus includes a process unit, and a controller associated with the process unit. The process unit includes a bonding part that bonds a semiconductor substrate and a carrier substrate to each other to form a bonded substrate, a cooling part that cools the bonded substrate, and a detection part in the cooling part and configured to detect a defect of the bonded substrate. The controller is configured to control the process unit using data obtained from the detection part.
    Type: Grant
    Filed: October 2, 2018
    Date of Patent: July 13, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Junghyun Cho, Sang-Geun Park, Dongseok Baek, Jaehyuk Choi
  • Patent number: 11014039
    Abstract: The present invention relates to a novel integrated system for providing nitrogen (N2) to a variety of industrial service applications such as, for example, process unit drying, pipeline purging, reactor cooling, vessel inerting, pipeline displacement.
    Type: Grant
    Filed: July 6, 2018
    Date of Patent: May 25, 2021
    Assignee: PRAXAIR TECHNOLOGY, INC.
    Inventors: Richard M Kelly, Mahesh Biradar, Matthew J Thomas, George Cieutat
  • Patent number: 11017554
    Abstract: A method for securing a bonding product in a working region of a bonder via a clamping device. The bonding product and the clamping device are positioned in the working region of the bonder and a partial characteristic contour is captured to determine the position of the bonding product in the working region. The previously set clamping position of the clamping fingers is captured via a camera and a clamping position is calculated. A current position and orientation of clamping fingers and a new misalignment of the clamping fingers is calculated and displayed until the current position and orientation of the clamping fingers corresponds to a clamping finger reference position.
    Type: Grant
    Filed: August 2, 2019
    Date of Patent: May 25, 2021
    Assignee: HESSE GmbH
    Inventors: Hans-Juergen Hesse, Gregor Belting, Markus Riese
  • Patent number: 10991600
    Abstract: A process chamber and a substrate processing apparatus including the same are disclosed. The process chamber includes a first housing and a second housing on the first housing. The first housing includes a first outer wall, a first partition wall facing the first outer wall, and a first side wall connecting the first outer wall and the first partition wall. The second housing includes a second outer wall, a second partition wall between the second outer wall and the first partition wall, and a second side wall connecting the second outer wall and the second partition wall. Each of the first and second outer walls has a thickness greater than a thickness of the first partition wall and a thickness of the second partition wall.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: April 27, 2021
    Inventors: Yong-Jhin Cho, Young-Hoo Kim, Jihoon Jeong, Yungjun Kim, Jung-Min Oh, Kuntack Lee, Hyosan Lee
  • Patent number: 10978276
    Abstract: Embodiments of a method and apparatus for annealing a substrate are disclosed herein. In some embodiments, a substrate anneal chamber includes a chamber body having a chamber wall and an interior volume; a lamp assembly disposed in the interior volume and having a plurality of lamps configured to heat a substrate; a slit valve disposed through a wall of the chamber body and above the lamp assembly to allow the substrate to pass into and out of the interior volume; an annular lamp assembly having at least one lamp disposed in a processing volume in an upper portion of the substrate anneal chamber above the slit valve; and a top reflector disposed above the annular lamp assembly to define an upper portion of the processing volume and to reflect radiation downwards towards the lamp assembly, wherein a bottom surface of the top reflector is exposed to the interior volume.
    Type: Grant
    Filed: January 22, 2020
    Date of Patent: April 13, 2021
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Bharath Swaminathan, Hanbing Wu, John Mazzocco
  • Patent number: 10971382
    Abstract: A semiconductor manufacturing apparatus includes a loadlock module including a loadlock chamber in which a substrate container is received, wherein the loadlock module is configured to switch an internal pressure of the loadlock chamber between atmospheric pressure and a vacuum; and a transfer module configured to transfer a substrate between the substrate container received in the loadlock chamber and a process module for performing a semiconductor manufacturing process on the substrate, wherein the loadlock module includes a purge gas supply unit configured to supply a purge gas into the substrate container through a gas supply line connected to the substrate container; and an exhaust unit configured to discharge a gas in the substrate container through an exhaust line connected to the substrate container.
    Type: Grant
    Filed: January 11, 2019
    Date of Patent: April 6, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kwang-Nam Kim, Byeong-Hee Kim, Jeongryul Kim, Hae-Joong Park, Jong-Woo Sun, Sang-Rok Oh, Sung-Wook Jung, Nam-Young Cho, Jung-Pyo Hong
  • Patent number: 10936778
    Abstract: In an embodiment, a method for designing an integrated circuit with target characteristics uses a physical design graph. The physical design graph includes a plurality of physical design sub-configurations, each of the plurality of physical design sub-configurations including a placement of a group of physical cells and having annotated characteristics. The method includes partitioning an integrated circuit electrical design into a plurality of electrical design sub-configurations, including a specific electrical design sub-configuration requiring a specific group of the physical cells. The method includes selecting from the physical design graph, based on the required specific group of the physical cells and the target characteristics, a physical design sub-configuration including the specific group of the physical cells in a specific placement and having the target characteristics. The method includes determining an integrated circuit physical design for manufacturing the integrated circuit.
    Type: Grant
    Filed: November 9, 2018
    Date of Patent: March 2, 2021
    Assignee: Motivo, Inc.
    Inventors: Vito Dai, Edward Kah Ching Teoh, Ji Xu, Bharath Rangarajan
  • Patent number: 10872787
    Abstract: A semiconductor processing chamber is provided and may include a wafer transfer passage that extends through a chamber wall and has an inner passage surface defining an opening, an insert including an insert inner surface defining an insert opening, and a gas inlet. A first recessed surface of the wafer transfer passage extending at least partially around and outwardly offset from the inner passage surface, a first insert outer surface extending at least partially around and outwardly offset from the insert inner surface, and a first wall surface extending between the inner passage surface and the first recessed surface, at least partially define a gas distribution channel fluidically connected to the gas inlet, the first recessed surface is separated from the first insert outer surface by a first distance and an insert front surface faces and is separated from the first wall surface by a first gap distance.
    Type: Grant
    Filed: September 19, 2018
    Date of Patent: December 22, 2020
    Assignee: Lam Research Corporation
    Inventors: Panya Wongsenakhum, Peter Krotov
  • Patent number: 10854488
    Abstract: A wafer conveying apparatus conveying a wafer onto a supporting table in manufacturing a semiconductor. A first arm retains the wafer to move to an upper region of the supporting table, and is retracted from the upper region of the supporting table after the wafer is elevated. A second arm contacts the wafer by an opening provided in the supporting table to elevate the wafer, and lowers the wafer to place the wafer on the supporting table.
    Type: Grant
    Filed: July 26, 2019
    Date of Patent: December 1, 2020
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Fumiki Aiso, Ryota Fujitsuka, Kensei Takahashi, Takayuki Matsui, Tomohisa Iino
  • Patent number: 10847391
    Abstract: A transfer chamber for semiconductor device manufacturing includes (1) a plurality of sides that define a region configured to maintain a vacuum level and allow transport of substrates between processing chambers, the plurality of sides defining a first portion and a second portion of the transfer chamber and including (a) a first side that couples to two twinned processing chambers; and (b) a second side that couples to a single processing chamber; (2) a first substrate handler located in the first portion of the transfer chamber; (3) a second substrate handler located in the second portion of the transfer chamber; and (4) a hand-off location configured to allow substrates to be passed between the first portion and the second portion of the transfer chamber using the first and second substrate handlers. Method aspects are also provided.
    Type: Grant
    Filed: February 14, 2014
    Date of Patent: November 24, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Nir Merry, Michael Robert Rice, Sushant S. Koshti, Jeffrey C. Hudgens
  • Patent number: 10816574
    Abstract: A test socket and method for using the same are disclosed herein. In one embodiment, the test socket comprises a base having a top loading area, an actuator rotatably coupled to the base, and a pushing device rotatably coupled to the actuator, where the pushing device is pressed against a semiconductor device when the semiconductor device is placed onto the top loading area and the actuator is moved to a first position (e.g., a test position).
    Type: Grant
    Filed: January 10, 2018
    Date of Patent: October 27, 2020
    Assignee: YAMAICHI ELECTRONICS USA, INC.
    Inventors: Adam Cole, Jeffrey McCallion
  • Patent number: 10804842
    Abstract: A platform for testing a solar cell is disclosed. The platform includes a plate defining a conductive surface configured to electrically contact the solar cell, two or more first vacuum ports disposed along a first area of the conductive surface of the plate, and two or more second vacuum ports disposed along a second area of the conductive surface of the plate. The second area covers a larger portion of the conductive surface compared to the first area. The solar cell is sized to seat against the first area of the conductive surface. The platform also includes a valve-sensor unit in fluid communication with the first vacuum ports and the second vacuum ports and a control board connected to the valve-sensor unit. The control board executes instructions to monitor a first pressure in the first vacuum ports and a second pressure in the second vacuum ports by the valve-sensor unit.
    Type: Grant
    Filed: October 11, 2018
    Date of Patent: October 13, 2020
    Assignee: The Boeing Company
    Inventors: Ricardo Anaya, Dale H. Waterman
  • Patent number: 10793949
    Abstract: The present disclosure relates to a substrate processing apparatus and a substrate processing method using the same, and more particularly, to a substrate processing apparatus that is capable of improving a flow of a process gas that is participated in a substrate processing process and a substrate processing method using the same.
    Type: Grant
    Filed: October 10, 2016
    Date of Patent: October 6, 2020
    Assignee: EUGENE TECHNOLOGY CO., LTD.
    Inventors: Jun Jin Hyon, Sung Tae Je, Byoung Gyu Song, Yong Ki Kim, Kyong Hun Kim, Chang Dol Kim, Yang Sik Shin, Jae Woo Kim
  • Patent number: 10781530
    Abstract: A cleaning apparatus is provided. This cleaning apparatus includes an inlet, an outlet, a first conveyance path, a second conveyance path, a cleaning unit disposed on the first conveyance path and configured to clean the target object in a non-contacting manner, and a drying unit disposed on the first conveyance path and configured to dry the target object in a non-contacting manner. The first conveyance path and the second conveyance path are vertically arranged side by side. The second conveyance path is positioned above the first conveyance path and connected with the outlet at an end point. The second conveyance path functions as a stocker configured to temporarily store the target object.
    Type: Grant
    Filed: June 28, 2017
    Date of Patent: September 22, 2020
    Assignee: EBARA CORPORATION
    Inventor: Junitsu Yamakawa
  • Patent number: 10784138
    Abstract: There is provided a substrate processing system, including: a carrier transfer region in which a carrier that accommodates a substrate is transferred to a substrate processing apparatus, and a substrate transfer region in which the substrate accommodated in the carrier is transferred to a processing furnace, the substrate transfer region being partitioned from the carrier transfer region by a partition wall; a transfer port formed in the partition wall and through which the substrate is transferred between the carrier transfer region and the substrate transfer region; an opening/closing door configured to open and close the transfer port; and a pressure equalizing part configured to substantially equalize a pressure of the substrate transfer region and a pressure of a space surrounded by the carrier and the opening/closing door.
    Type: Grant
    Filed: February 9, 2018
    Date of Patent: September 22, 2020
    Assignee: TOKYO ELECTRON LIMITED
    Inventor: Takahiro Abe
  • Patent number: 10658222
    Abstract: A substrate processing system includes a processing chamber and a pedestal arranged in the processing chamber. An edge coupling ring is arranged adjacent to a radially outer edge of the pedestal. A first actuator is configured to selectively move the edge coupling ring to a raised position, relative to the pedestal to provide clearance between the edge coupling ring and the pedestal to allow a robot arm to remove the edge coupling ring from the processing chamber.
    Type: Grant
    Filed: May 6, 2015
    Date of Patent: May 19, 2020
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Haoquan Yan, Robert Griffith O'Neill, Raphael Casaes, Jon McChesney, Alex Paterson
  • Patent number: 10629445
    Abstract: A wafer processing method for processing a wafer having devices on the front side is provided. The wafer processing method includes a back grinding step of grinding the wafer to form a recess and an annular reinforcing portion surrounding the recess on the back side of the wafer, and a dividing step of cutting the wafer along division lines formed on the front side of the wafer. In the back grinding step, a taper surface is formed between the bottom surface of the recess and the annular reinforcing portion. The taper surface is inclined with respect to a direction perpendicular to the bottom surface of the recess. In the dividing step, a cutting blade is lowered to start cutting at a position radially inside the outer circumference of the wafer and is subsequently raised to stop cutting at another position radially inside the outer circumference of the wafer.
    Type: Grant
    Filed: June 27, 2018
    Date of Patent: April 21, 2020
    Assignee: DISCO CORPORATION
    Inventors: Katsuhiko Suzuki, Hisashi Arakida, Tomoaki Sugiyama
  • Patent number: 10612631
    Abstract: The integrated circuit chip programming apparatus comprises a fixing device, an actuating device and a flexible device. The fixing device comprises a supporting part and a cover. One end of the cover is coupled with one end of the supporting part and comprises an accommodation space for accommodating a chip therein. The cover selectively covers or uncovers the supporting part so as to close or expose the accommodation space. The flexible device is coupled between the fixing device and the actuating device. When a force is against the forced end, the actuating device is rotated to drive the cover to expose the accommodation space. When no force is against the forced end or the force against the forced end is stopped, the flexible device provides a recovery force to allow the actuating device to rotate to drive the cover to close the accommodation space of the supporting part.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: April 7, 2020
    Assignee: DEDIPROG TECHNOLOGY CO., LTD.
    Inventor: Chong-Yung Tsao
  • Patent number: 10553469
    Abstract: An electronic device manufacturing system is disclosed. The system includes a processing tool having one or more processing chambers each adapted to perform an electronic device manufacturing process on one or more substrates; a substrate carrier adapted to couple to the system and carry one or more substrates; and a component adapted to create a sealed environment relative to at least a portion of the substrate carrier and to substantially equalize the sealed environment with an environment within the substrate carrier. Methods of the invention are described as are numerous other aspects.
    Type: Grant
    Filed: January 15, 2018
    Date of Patent: February 4, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Michael Robert Rice, Jeffrey C. Hudgens
  • Patent number: 10508355
    Abstract: A plating apparatus enabling a user to conduct maintenance of a substrate holder while an operation of the plating apparatus is being performed is disclosed. The plating apparatus includes: a processing section for plating a substrate; a storage container configured to store the substrate holder for holding the substrate; a transport machine configured to transport the substrate holder between the processing section and the storage container; a maintenance area adjacent to the storage container; and a substrate-holder carrier supported by the storage container. The substrate-holder carrier is movable between the storage container and the maintenance area while supporting the substrate holder.
    Type: Grant
    Filed: July 27, 2017
    Date of Patent: December 17, 2019
    Assignee: EBARA CORPORATION
    Inventors: Akihiro Yazawa, Kenichi Kobayashi, Yasuyuki Miyasawa, Tsuyoshi Soma
  • Patent number: 10505515
    Abstract: A ladder filter includes a piezoelectric substrate, an antenna terminal, a transmission terminal, and ground terminals on the piezoelectric substrate, and IDT electrodes. Each of the IDT electrodes is disposed on the piezoelectric substrate and includes a plurality of electrode fingers and a pair of busbars to which first ends of the plurality of electrode fingers are connected commonly. The IDT electrodes define elastic wave resonators. The ladder filter further includes an interlayer insulating film disposed on at least one of the busbars and a thermally conductive member made of a material with thermal conductivity higher than that of the interlayer insulating film and disposed on the interlayer insulating film. The thermally conductive member is in contact with at least one of the antenna terminal, the transmission terminal, and the ground terminals.
    Type: Grant
    Filed: January 27, 2017
    Date of Patent: December 10, 2019
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Daisuke Ajima
  • Patent number: 10468278
    Abstract: A substrate transfer method of a substrate processing apparatus that includes a load lock chamber including a drive unit that is capable of forming, between a first opening at an atmospheric side and a second opening connected to a transfer chamber of a housing of the load lock chamber, each of a first space in which a single substrate is capable of being transferred, and a second space in which a plurality of substrates are capable of being transferred, the substrate transfer method including selecting either of the first space or the second space of the load lock chamber in accordance with process statuses of substrates at a plurality of processing chambers, and controlling the drive unit based on the selected result to form either of the first space or the second space.
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: November 5, 2019
    Assignee: Tokyo Electron Limited
    Inventor: Shigeru Ishizawa
  • Patent number: 10236406
    Abstract: A targeted-annealing system can automatically cure a conductive paste that may bind cascaded strips of a string. The targeted-annealing system can include a first heat-treating bar that may be heated to a first curing temperature, and can include a second heat-treating bar that may be heated to a second curing temperature. During operation, a controller of the targeted-annealing system can activate one or more actuators to conform the first heat-treating bar to a top surface of two cascaded strips, and conform the second heat-treating bar to a bottom surface of two cascaded strips. The first and second heat-treating bars may be aligned along an overlap portion between the two cascaded strips, and can heat the overlap portion to 160 degrees Celsius.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: March 19, 2019
    Assignee: SolarCity Corporation
    Inventors: Pablo Gonzalez, Bobby Yang
  • Patent number: 10230017
    Abstract: A string-forming system is described. The string-forming system may include at least a first cell-lifting mechanism and a second cell-lifting mechanism that can automatically arrange a set of strips of a photovoltaic structure into a cascaded formation. During operation, a controller can cause the first cell-lifting mechanism to lift a first strip from a first platform, and can cause the second cell-lifting mechanism to lift, from the first platform, a second strip that may follow the first strip on the first platform. The controller may then activate a first shifting actuator of the first cell-lifting mechanism or a second shifting actuator of the second cell-lifting mechanism to place a leading edge of the second strip above a trailing edge of the first strip.
    Type: Grant
    Filed: March 6, 2017
    Date of Patent: March 12, 2019
    Assignee: SolarCity Corporation
    Inventors: Pablo Gonzalez, Bobby Yang
  • Patent number: 10224151
    Abstract: A capacitor assembly that is capable of performing under extreme conditions, such as at high temperatures and/or high voltages, is provided. The ability to perform at high temperature is achieved in part by enclosing and hermetically sealing the capacitor element within a housing in the presence of a gaseous atmosphere that contains an inert gas, thereby limiting the amount of oxygen and moisture supplied to the solid electrolyte of the capacitor element. Furthermore, the present inventors have also discovered that the ability to perform at high voltages can be achieved through a unique and controlled combination of features relating to the formation of the anode, dielectric, and solid electrolyte. For example, the solid electrolyte is formed from a combination of a conductive polymer and a hydroxy-functional nonionic polymer.
    Type: Grant
    Filed: March 6, 2014
    Date of Patent: March 5, 2019
    Assignee: AVX Corporation
    Inventors: Martin Biler, Jan Petrzilek
  • Patent number: 10153184
    Abstract: A plurality of support pins that support a semiconductor wafer are located upright on a top surface of a susceptor. A condenser lens is located on a bottom surface of the susceptor opposite to the support pins with respect to the susceptor. The condenser lens is located such that its optical axis coincides with the central axis of the corresponding support pin. Of light emitted from halogen lamps from below, light entering the condenser lens is condensed at a contact portion between the corresponding support pin and the semiconductor wafer, so that the vicinity of the contact portion rises in temperature. The vicinity of the contact portion of the semiconductor wafer in contact with the support pin in which the temperature tends to drop is relatively intensely heated in order to suppress the temperature drop, and an in-plane temperature distribution of the semiconductor wafer during light irradiation can thus be made uniform.
    Type: Grant
    Filed: May 10, 2016
    Date of Patent: December 11, 2018
    Assignee: SCREEN Holdings Co., Ltd.
    Inventors: Kazuhiko Fuse, Yoshio Ito
  • Patent number: 10134613
    Abstract: A system and method for a cluster tool apparatus for processing a semiconductor product including processing modules located adjacent each other and configured to process a semiconductor module, loadlocks configured to retain and dispense unprocessed semiconductor products and each positioned adjacent one of the processing modules, a robot configured to load, transfer and unload a semiconductor product to and from the processing modules, a hardware controller in communication with the robot and executing a method to close down the cluster tool apparatus to an idle state, the method including determining a status of the processing modules, determining if a close down process is required based on the status or based on a close down signal, and, if required, determining a schedule for a close down process based on a semiconductor product residency parameter, and controlling the operation of the robot based on the schedule to perform the close down process.
    Type: Grant
    Filed: September 22, 2016
    Date of Patent: November 20, 2018
    Assignee: MACAU UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Yan Qiao, Mengchu Zhou, Naiqi Wu, Zhiwu Li, Qinghua Zhu
  • Patent number: 10062592
    Abstract: A substrate processing apparatus includes a substrate retaining mechanism; a detecting unit detecting a placed state of the substrate retained by the substrate retaining mechanism; a first determination unit comparing detection data of the substrate obtained by the detecting unit with master data that is a reference to determine if the detection data is within a first allowed value; a confirmation unit confirming substrate type; a second determination unit comparing the detection data of the substrate with the master data to determine if the detection data is within a second allowed value; and a transfer control unit controlling the substrate retaining mechanism depending on a determination result of the second determination unit when substrate type is confirmed as a predetermined type by the confirmation unit when it is determined that the detection data is not within the first allowed value as determined by the first determination unit.
    Type: Grant
    Filed: January 30, 2017
    Date of Patent: August 28, 2018
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Junichi Kawasaki, Hajime Abiko
  • Patent number: 10043693
    Abstract: Implementations described herein generally relate to a method and apparatus for processing substrates in a processing system. The method includes identifying, in a buffer chamber coupled to a transfer chamber of a processing system, a first substrate that has been in the buffer chamber longer than a predetermined duration and identifying a first destination chamber of the processing system for the first substrate. After identifying the first substrate, a buffer chamber time-out operation is performed. The buffer time out operation includes suspending movement of substrates from a load lock chamber to the transfer chamber and removing the first substrate from the buffer chamber.
    Type: Grant
    Filed: June 6, 2017
    Date of Patent: August 7, 2018
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Jaeyoung Kim, James Hoffman, Atsushi Kitani, Young Taek Kwon
  • Patent number: 10037869
    Abstract: A plasma processing device may include a plasma processing chamber, a plasma electrode assembly, a wafer stage, a plasma producing gas inlet, a plurality of vacuum ports, at least one vacuum pump, and a multi-port valve assembly. The multi-port valve assembly may comprise a movable seal plate positioned in the plasma processing chamber. The movable seal plate may comprise a transverse port sealing surface that is shaped and sized to completely overlap the plurality of vacuum ports in a closed state, to partially overlap the plurality of vacuum ports in a partially open state, and to avoid substantial overlap of the plurality of vacuum ports in an open state. The multi-port valve assembly may comprise a transverse actuator coupled to the movable seal plate and a sealing actuator coupled to the movable seal plate.
    Type: Grant
    Filed: October 9, 2015
    Date of Patent: July 31, 2018
    Assignee: Lam Research Corporation
    Inventors: Daniel A. Brown, Michael C. Kellogg, Leonard J. Sharpless, Allan K. Ronne, James E. Tappan
  • Patent number: 10007198
    Abstract: A method includes providing a semiconductor processing system that includes a plurality of units. Each unit has a configuration that defines a predetermined orientation of a wafer that is provided in the unit and includes a plurality of wafer handling elements. An arrangement of the plurality of wafer handling elements of the unit relative to the predetermined orientation of the wafer is adjustable. For each of the plurality of units, the arrangement of the plurality of wafer handling elements of the unit is adjusted relative to the predetermined orientation of the wafer. For each of the plurality of units, an arrangement of the plurality of wafer handling elements relative to the predetermined orientation of the wafer is provided that is different from the arrangement of the plurality of wafer handling elements relative to the predetermined orientation of the wafer in one or more other units of the plurality of units.
    Type: Grant
    Filed: June 8, 2016
    Date of Patent: June 26, 2018
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Heiko Wagner, Sidheswara Mahapatra
  • Patent number: 10001773
    Abstract: The scheduling problem of a multi-cluster tool with a tree topology whose bottleneck tool is process-bound is investigated. A method for scheduling the multi-cluster tool to thereby generate an optimal one-wafer cyclic schedule for this multi-cluster tool is provided. A Petri net (PN) model is developed for the multi-cluster tool by explicitly modeling robot waiting times such that a schedule is determined by setting the robot waiting times. Based on the PN model, sufficient and necessary conditions under which a one-wafer cyclic schedule exists are derived and it is shown that an optimal one-wafer cyclic schedule can be always found. Then, efficient algorithms are given to find the optimal cycle time and its optimal schedule. Examples are used to demonstrate the scheduling method.
    Type: Grant
    Filed: October 21, 2015
    Date of Patent: June 19, 2018
    Assignee: Macau University of Science and Technology
    Inventors: Naiqi Wu, Qinghua Zhu, Yan Qiao, Mengchu Zhou
  • Patent number: 9998095
    Abstract: A SAW filter includes a substrate, an upper bus bar arranged on the substrate, a lower bus bar arranged on the substrate so as to face the upper bus bar, a first finger IDT arranged so as to be connected to the upper bus bar at one end, a second finger IDT arranged so as to be connected to the lower bus bar at one end, a passivation part formed on the first finger IDT and the second finger IDT, a first metal part formed on the passivation part and including all area of the upper bus bar and a partial area of the first finger IDT, and a second metal part formed on the passivation part and including all area of the lower bus bar and a partial area of the second finger IDT.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: June 12, 2018
    Assignee: WISOL CO., LTD.
    Inventor: Dong Jun You
  • Patent number: 9972519
    Abstract: A substrate transporting apparatus includes a first light emitting sensor emitting a first sensing light in a first direction, a first light receiving sensor receiving the first sensing light, a second light emitting sensor emitting a second sensing light in a second direction different than the first direction, a second light receiving sensor receiving the second sensing light, a substrate transporting loader passing through traveling lines of the first sensing light and the second sensing light, a state information storage unit storing state information of the substrate transporting loader, and an operation information computing unit computing operation information of the substrate transporting loader based on the state information.
    Type: Grant
    Filed: January 14, 2015
    Date of Patent: May 15, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Nam-Su Yuk, Jae-Won Jeong, Ho-Youl Lee, Ju-No Park, Jae-Young Eom
  • Patent number: 9934992
    Abstract: A heater or cooler chamber for a batch of more than one workpiece includes a heat storage block. In the block a multitude of pockets are provided, whereby each of the pockets may be closed or opened by a controllably operated door. A heater or cooler arrangement is applied. The pockets are tailored to surround a workpiece applied therein in a non-contact closely spaced manner.
    Type: Grant
    Filed: December 10, 2015
    Date of Patent: April 3, 2018
    Assignee: EVATEC AG
    Inventor: Jurgen Weichart
  • Patent number: 9761471
    Abstract: A manufacturing line for a semiconductor device according to the invention is a manufacturing line for manufacturing a semiconductor device by circulating a workpiece along a conveyance route on which a plurality of treatment devices are arranged. The conveyance route includes a first route on which the treatment devices with a large number of times of treatment are arranged, and a second route on which the treatment devices with a small number of times of treatment are arranged. Besides, the conveyance route makes a changeover between the conveyance of the workpiece that has moved along the first route to the first route in a continuous manner, and the conveyance of the workpiece that has moved along the first route to the second route.
    Type: Grant
    Filed: June 12, 2015
    Date of Patent: September 12, 2017
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Daisuke Sugizaki
  • Patent number: 9728432
    Abstract: A method of degassing semiconductor substrates includes sequentially loading a plurality of semiconductor substrates into a degas apparatus, and degassing the semiconductor substrates in parallel, the degassing of each semiconductor substrate commencing at a different time related to the time at which the semiconductor substrate was loaded into the degas apparatus. The method further includes unloading a semiconductor substrate from the degas apparatus when the semiconductor substrate has been degassed, while semiconductor substrates which were loaded later in the sequence are still being degassed. The degassing of the semiconductor substrates is performed at pressure of less than 10?4 Torr, and the degas apparatus is pumped continuously during the degassing of the semiconductor substrates.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: August 8, 2017
    Assignee: SPTS TECHNOLOGIES LIMITED
    Inventors: Stephen R Burgess, Anthony Paul Wilby
  • Patent number: 9728431
    Abstract: The present invention provides a technique for improving the productivity of a processing apparatus including a plurality of process chambers. There is provided a technique including a method for manufacturing a semiconductor device including: (a) transferring a last remaining substrate stored in an xth storage unit of a plurality of storage units to an empty nth chamber in an mth processing unit of a plurality of processing units; and (b) transferring a first one of a plurality of substrates stored in an (x+1)th storage unit of the plurality of storage units to one of chambers in an (m+1)th processing unit of the plurality of processing units (where x, m and n are natural numbers).
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: August 8, 2017
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Naofumi Ohashi, Toshiyuki Kikuchi, Shun Matsui, Tadashi Takasaki