Data Storage Inductor Or Core Patents (Class 29/604)
  • Publication number: 20020095770
    Abstract: The invention relates to an inductor comprising a plurality of interconnected conductive segments interwoven with a substrate. The inductance of the inductor is increased through the use of coatings and films of ferromagnetic materials such as magnetic metals, alloys, and oxides. The inductor is compatible with integrated circuit manufacturing techniques and eliminates the need in many systems and circuits for large off chip inductors. A sense and measurement coil, which is fabricated on the same substrate as the inductor, provides the capability to measure the magnetic field or flux produced by the inductor. This on chip measurement capability supplies information that permits circuit engineers to design and fabricate on chip inductors to very tight tolerances.
    Type: Application
    Filed: March 18, 2002
    Publication date: July 25, 2002
    Applicant: Micron Technology, Inc.
    Inventors: Kie Y. Ahn, Leonard Forbes
  • Publication number: 20020095769
    Abstract: The invention relates to an inductor comprising a plurality of interconnected conductive segments interwoven with a substrate. The inductance of the inductor is increased through the use of coatings and films of ferromagnetic materials such as magnetic metals, alloys, and oxides. The inductor is compatible with integrated circuit manufacturing techniques and eliminates the need in many systems and circuits for large off chip inductors. A sense and measurement coil, which is fabricated on the same substrate as the inductor, provides the capability to measure the magnetic field or flux produced by the inductor. This on chip measurement capability supplies information that permits circuit engineers to design and fabricate on chip inductors to very tight tolerances.
    Type: Application
    Filed: March 18, 2002
    Publication date: July 25, 2002
    Applicant: Micron Technology, Inc.
    Inventors: Kie Y. Ahn, Leonard Forbes
  • Patent number: 6357107
    Abstract: The invention relates to an inductor comprising a plurality of interconnected conductive segments interwoven with a substrate. The inductance of the inductor is increased through the use of coatings and films of ferromagnetic materials such as magnetic metals, alloys, and oxides. The inductor is compatible with integrated circuit manufacturing techniques and eliminates the need in many systems and circuits for large off chip inductors. A sense and measurement coil, which is fabricated on the same substrate as the inductor, provides the capability to measure the magnetic field or flux produced by the inductor. This on chip measurement capability supplies information that permits circuit engineers to design and fabricate on chip inductors to very tight tolerances.
    Type: Grant
    Filed: March 29, 2001
    Date of Patent: March 19, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Kie Y. Ahn, Leonard Forbes
  • Publication number: 20020024413
    Abstract: A core (1) for use in a magnetic coil with a filled first gap (2) is realized through the provision of the first gap (2), filling of the first gap (2) with a curable synthetic resin (3), and curing of said resin (3). After curing, the synthetic resin is substantially homogeneously distributed over the first gap (2) and has a concave surface (17). The synthetic resin (3) may contain a filler, which preferably substantially consists of a magnetic material.
    Type: Application
    Filed: August 23, 2001
    Publication date: February 28, 2002
    Inventors: Martinus Johannes Maria De Graaf, Oscar Perez Cornejo, Ruediger Mauczok
  • Patent number: 6345434
    Abstract: A process for the production of an inductor device comprising the steps of forming a green sheet to form an insulating layer; forming a plurality of conductive coil pattern units on the surface of the green sheet in order that a plurality of unit sections each including a single coil pattern unit are arranged on the surface of the green sheet and each two coil pattern units adjoining in the substantially perpendicular direction to the longitudinal direction of the unit sections are arranged centro-symmetrically with respect to a center point of a boundary line of adjoining unit sections; stacking a plurality of green sheets formed with the plurality of coil pattern units arranged in centro-symmetry and connecting the upper and lower coil pattern units separated by the green sheets to form a coil shape; and sintering the stacked green sheets. It is possible to obtain an inductor device able to suppress the stack deviation without complicating the production process even if the device is made small in size.
    Type: Grant
    Filed: July 2, 1999
    Date of Patent: February 12, 2002
    Assignee: TDK Corporation
    Inventors: Toshiyuki Anbo, Fumio Uchikoba
  • Publication number: 20020005565
    Abstract: A spiral inductor fabricated above a semiconductor substrate provides a large inductance while occupying only a small surface area. Including a layer of magnetic material above and below the inductor increases the inductance of the inductor. The magnetic material also acts as barrier that confines electronic noise generated in the spiral inductor to the area occupied by the spiral inductor. Inductance in a pair of stacked spiral inductors is increased by including a layer of magnetic material between the stacked spiral inductors.
    Type: Application
    Filed: September 4, 2001
    Publication date: January 17, 2002
    Applicant: Micron Technology, Inc.
    Inventors: Leonard Forbes, Kie Y. Ahn
  • Publication number: 20010025410
    Abstract: The method may include joining together a bottom layer, a top layer and at least one intermediate layer therebetween, with the bottom and top layers including a non-magnetic material, and the at least one intermediate layer including a non-magnetic material. The method may also include dividing the joined together layers into a plurality of closed-shape cores each having at least one magnetic flux gap therein provided by the non-magnetic material. The closed-shape cores may be toroidal, for example. The method may also include winding at least one conductor on each closed-shape core to form the inductors. In some embodiments the joined together layers may be divided into a plurality of strips. The method may also include punching each strip to form a plurality of closed shape cores, with toroidal core having at least one magnetic flux gap therein provided by the non-magnetic material.
    Type: Application
    Filed: January 19, 2001
    Publication date: October 4, 2001
    Applicant: Steward, Inc.
    Inventors: Henry G. Paris, Richard W. Meadors, Dennis M. Daniels
  • Publication number: 20010023530
    Abstract: The invention relates to an inductor comprising a plurality of interconnected conductive segments interwoven with a substrate. The inductance of the inductor is increased through the use of coatings and films of ferromagnetic materials such as magnetic metals, alloys, and oxides. The inductor is compatible with integrated circuit manufacturing techniques and eliminates the need in many systems and circuits for large off chip inductors. A sense and measurement coil, which is fabricated on the same substrate as the inductor, provides the capability to measure the magnetic field or flux produced by the inductor. This on chip measurement capability supplies information that permits circuit engineers to design and fabricate on chip inductors to very tight tolerances.
    Type: Application
    Filed: May 31, 2001
    Publication date: September 27, 2001
    Applicant: Micron Technology, Inc.
    Inventors: Kie Y. Ahn, Leonard Forbes
  • Publication number: 20010022019
    Abstract: The invention relates to an inductor comprising a plurality of interconnected conductive segments interwoven with a substrate. The inductance of the inductor is increased through the use of coatings and films of ferromagnetic materials such as magnetic metals, alloys, and oxides. The inductor is compatible with integrated circuit manufacturing techniques and eliminates the need in many systems and circuits for large off chip inductors. A sense and measurement coil, which is fabricated on the same substrate as the inductor, provides the capability to measure the magnetic field or flux produced by the inductor. This on chip measurement capability supplies information that permits circuit engineers to design and fabricate on chip inductors to very tight tolerances.
    Type: Application
    Filed: May 31, 2001
    Publication date: September 20, 2001
    Applicant: Micron Technology, Inc.
    Inventors: Kie Y. Ahn, Leonard Forbes
  • Publication number: 20010018794
    Abstract: The invention relates to an inductor comprising a plurality of interconnected conductive segments interwoven with a substrate. The inductance of the inductor is increased through the use of coatings and films of ferromagnetic materials such as magnetic metals, alloys, and oxides. The inductor is compatible with integrated circuit manufacturing techniques and eliminates the need in many systems and circuits for large off chip inductors. A sense and measurement coil, which is fabricated on the same substrate as the inductor, provides the capability to measure the magnetic field or flux produced by the inductor. This on chip measurement capability supplies information that permits circuit engineers to design and fabricate on chip inductors to very tight tolerances.
    Type: Application
    Filed: March 29, 2001
    Publication date: September 6, 2001
    Applicant: Micron Technology, Inc.
    Inventors: Kie Y. Ahn, Leonard Forbes
  • Publication number: 20010016976
    Abstract: The invention relates to an inductor comprising a plurality of interconnected conductive segments interwoven with a substrate. The inductance of the inductor is increased through the use of coatings and films of ferromagnetic materials such as magnetic metals, alloys, and oxides. The inductor is compatible with integrated circuit manufacturing techniques and eliminates the need in many systems and circuits for large off chip inductors. A sense and measurement coil, which is fabricated on the same substrate as the inductor, provides the capability to measure the magnetic field or flux produced by the inductor. This on chip measurement capability supplies information that permits circuit engineers to design and fabricate on chip inductors to very tight tolerances.
    Type: Application
    Filed: May 7, 2001
    Publication date: August 30, 2001
    Applicant: Micron Technology, Inc.
    Inventors: Kie Y. Ahn, Leonard Forbes
  • Publication number: 20010002505
    Abstract: The present invention provides an electronic component provided with the terminal electrode having a three layer structure comprising a first layer, a second layer and a third layer successively formed on each end face of the main electronic component, the second layer being a porous structure to advantageously absorb the stress caused by expansion and shrinkage of the wiring board, thereby preventing the main electronic component from suffering the stress, and the non-porous first layer maintaining good electrical continuity with the inner electrode while the non-porous third layer serving for preventing permeation of the solder liquid along with maintaining good electrical continuity to the outside, thereby preventing the ceramic component from being mechanically damaged due to expansion and shrinkage applied from the wiring board when the ceramic electronic component is packaged on the wiring board.
    Type: Application
    Filed: December 11, 2000
    Publication date: June 7, 2001
    Applicant: Murata Manufacturing Co., Ltd.
    Inventor: Toshiaki Ozasa
  • Patent number: 6240622
    Abstract: The invention relates to an inductor comprising a plurality of interconnected conductive segments interwoven with a substrate. The inductance of the inductor is increased through the use of coatings and films of ferromagnetic materials such as magnetic metals, alloys, and oxides. The inductor is compatible with integrated circuit manufacturing techniques and eliminates the need in many systems and circuits for large off chip inductors. A sense and measurement coil, which is fabricated on the same substrate as the inductor, provides the capability to measure the magnetic field or flux produced by the inductor. This on chip measurement capability supplies information that permits circuit engineers to design and fabricate on chip inductors to very tight tolerances.
    Type: Grant
    Filed: July 9, 1999
    Date of Patent: June 5, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Kie Y. Ahn, Leonard Forbes
  • Patent number: 6124779
    Abstract: A multilayer-type inductor manufacturing method is provided which is capable of easily obtaining inductors having many different inductance values even if the pattern of a coil conductor is not changed for each inductance value. The coil conductor includes a line section of a predetermined pattern, a viahole connected at the end of the line section, and a pad. The viahole and the pad have a width greater than that of the line section and have an elongated shape. By deviating adjacent coil conductors in the direction of the length of the viahole and the pad, the inner area of a coil formed of the coil conductors is increased or decreased, thus varying the inductance value of an inductor.
    Type: Grant
    Filed: December 10, 1997
    Date of Patent: September 26, 2000
    Assignee: Murata Manufacturing Co. Ltd.
    Inventor: Shigekatsu Yamamoto
  • Patent number: 6023574
    Abstract: A method for designing and manufacturing a head suspension assembly having a side profile in the radius and rigid regions which is optimized for first and second torsion or other resonance characteristics.
    Type: Grant
    Filed: March 28, 1997
    Date of Patent: February 8, 2000
    Assignee: Hutchinson Technology Incorporated
    Inventor: John H. Tangren
  • Patent number: 5639566
    Abstract: A magnetic core obtained by laminating or winding a magnetic material ribbon and an electrical insulating material wherein the magnetic core has the relationship of 0.5 a.ltoreq.b<a in which the width of the magnetic material ribbon is "a", and the width of the electrical insulating material is "b".
    Type: Grant
    Filed: March 21, 1995
    Date of Patent: June 17, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masami Okamura, Takao Kusaka
  • Patent number: 5260893
    Abstract: Strips of fabric material are attached along the edges of an array of magnetic cores on a substrate with the strips having an upstanding ridge aligned parallel to the edges of the array. The material of the fabric serves as a guide for threading wires through the cores, and also serves as an attachment support for the wires to keep them from lifting free from the support after being inserted through the cores. The guide/supports are relatively simple, strong, durable, resistant to deterioration, and provide an inexpensive guide and support for the wires of the core memory.
    Type: Grant
    Filed: December 27, 1991
    Date of Patent: November 9, 1993
    Assignee: SCI Systems, Inc.
    Inventor: Mahmoud Ghaneei
  • Patent number: 4944270
    Abstract: An asymmetric excitation type magnetic device is provided with a composite magnetic body composed of a first magnetic layer having a relatively strong coercive force and a second magnetic layer having a relatively weak coercive force which layers are combined so as to have their respective magnetic anisotropy oriented in the same direction. To such a composite magnetic body are applied external positive and negative asymmetric magnetic fields in a specified order thereby to produce variations in magnetic flux due to an escpecially quick magnetization reversal and resultantly to generate steep pulse outputs across a detecting coil.
    Type: Grant
    Filed: March 31, 1988
    Date of Patent: July 31, 1990
    Inventors: Akira Matsushita, Susumu Abe
  • Patent number: 4918655
    Abstract: A component metallization interconnection system in a monolithic integrated circuit system for providing electrical interconnections between circuit components and for providing magnetic interaction regions for information storage.
    Type: Grant
    Filed: February 29, 1988
    Date of Patent: April 17, 1990
    Assignee: Honeywell Inc.
    Inventor: James M. Daughton
  • Patent number: 4767483
    Abstract: A method for manufacturing a magnetic recording medium comprising a first step in which a first magnetic layer, having a repetitive magnetization pattern formed by a magnetic head over its entire surfaces is formed on a base layer. The base layer and the first magnetic layer together form a first laminated body. In a second step, a second magnetic layer in which magnetic particles are oriented in a predetermined direction and which is thermally magnetizable is formed on a second base layer. The second base layer and the second magnetic layer form a second laminated body. In a third step, the second laminated body is bonded to the first laminated body.
    Type: Grant
    Filed: November 12, 1986
    Date of Patent: August 30, 1988
    Assignee: Fuji Xerox Co., Ltd.
    Inventors: Teruhiko Itami, Toshifumi Kimoto, Akira Yamasawa, Koichi Saitoh
  • Patent number: 4473892
    Abstract: A magnetic core stack is comprised of a laminate of individual layers of substantial thinness mounted on a common stiff base member to provide a rugged, low mass structure of high resonant frequency. Each of the individual layers is comprised of a plurality of magnetic cores held in place by soft, energy absorbing material such as silicone rubber coated on the surfaces of opposite ground plane forming materials such as very thin sheets of aluminum. The laminate is formed from a single layer of material which supports a layer of magnetic cores and which is folded over upon itself one or more times to form the separate layers of the laminate. In one embodiment, a sheet of aluminum coated with silicone rubber on both sides is inserted as the single layer of material is initially folded over to form a two layer stack in which each layer of cores is held between opposite sheets of aluminum by silicone rubber coated on the aluminum.
    Type: Grant
    Filed: June 2, 1981
    Date of Patent: September 25, 1984
    Assignee: Ampex Corporation
    Inventor: Thomas J. Gilligan
  • Patent number: 4272348
    Abstract: A single level masking process for producing microelectronic structures, such as magnetic bubble domain devices, which require very fine line widths. This is a subtractive dry process using a very thin, additively plated mask in order to obtain optimum lithographic resolution. Use of the very thin plated mask eliminates the need for a thick resist layer which would adversely affect resolution. In one example, a double layer metallurgy comprising a conductor layer (such as Au) and an overlying magnetically soft layer (such as NiFe) is patterned using a thin Ti (or Cr) mask. The Ti mask is subtractively patterned using a NiFe mask which is itself patterned by electroplating through a thin resist layer. The double layer NiFe/Au structure is patterned to provide devices having high aspect ratio, good pattern acuity, and uniform thicknesses, where the minimum feature is 1 micron or less.
    Type: Grant
    Filed: November 20, 1978
    Date of Patent: June 9, 1981
    Assignee: International Business Machines Corporation
    Inventors: Daniel E. Cox, Susan M. Kane, John V. Powers
  • Patent number: 4268584
    Abstract: A laminated conductor includes a lower thin film of nickel-X alloy or pseudo alloy deposited upon a substrate containing silicon or upon a substrate intended for use as a magnetic bubble storage device. Upon the film of nickel-X alloy, a thicker film of gold is deposited as the conductive portion of the conductor. On the upper surface of the gold layer is deposited a thin film of nickel-X alloy. Failure of the conductor because of electromigration is reduced dramatically as compared with use of molybdenum instead of nickel in the laminated structure. The nonmagnetic nickel-X alloy does not interfere with magnetic fields or produce unwanted magnetic fields.
    Type: Grant
    Filed: December 17, 1979
    Date of Patent: May 19, 1981
    Assignee: International Business Machines Corporation
    Inventors: Kie Y. Ahn, Christopher H. Bajorek, Paul S. Ho, Robert J. Miller, John V. Powers
  • Patent number: 4183092
    Abstract: A cubic magnetic core storage memory system which results in increased packing density of the core elements and more economical construction. Memory cores are bonded flat to carrier planes. The carrier planes are then stacked, forming a three dimensional array which is wired with X, Y and sense/inhibit lines. A parallel group (word) of binary digits is geometrically defined by a vertical line drawn through memory cores on the common intersection between an X and a Y coordinate wire on the successive carrier planes of the three dimensional array.
    Type: Grant
    Filed: July 31, 1978
    Date of Patent: January 8, 1980
    Assignee: Fabri-Tek Incorporated
    Inventor: Edward R. Sutich
  • Patent number: 4179795
    Abstract: A method for forming a drive wire hole in a ferrite toroid phase shifter pted to operate in the millimeter frequency range. The ferrite toroid is fabricated by the arc plasma spray process. A slab of boron nitride is initially bonded to the dielectric insert of the ferrite toroid and the ferrite powder is arc plasma sprayed on the composite boron nitride-dielectric structure. The formed ferrite toroid is then annealed, and during the annealing process, the boron nitride slab is completely sublimated to form the required drive wire hole.
    Type: Grant
    Filed: June 15, 1978
    Date of Patent: December 25, 1979
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventor: Richard W. Babbitt
  • Patent number: 4149301
    Abstract: A monolithic semiconductor integrated circuit - ferroelectric device is disclosed together with the method of manufacturing same. The ferroelectric device preferably consists of a layer of stable ferroelectric potassium nitrate disposed between electrical contacts positioned on opposite surfaces of the ferroelectric layer. The ferroelectric layer has a thickness of less than 110 microns, and preferably falling within a range of from 100 Angstrom units to 5,000 Angstrom units. The process of manufacturing the monolithic structure is multi-stepped and is particularly adapted for fabricating a potassium nitrate ferroelectric memory on a semiconductor integrated circuit.
    Type: Grant
    Filed: February 13, 1978
    Date of Patent: April 17, 1979
    Assignee: Ferrosil Corporation
    Inventor: Robert C. Cook
  • Patent number: 4149302
    Abstract: An improved monolithic semiconductor integrated circuit-ferroelectric device is disclosed together with the method of manufacturing the same. It was found that the preferred ferroelectric material, namely Phase III potassium nitrate, is extremely sensitive to moisture requiring unique processing steps to fabricate the structure. The process of manfacturing the monolithic structure is multi-stepped and is particularly adapted for fabricating a potassium nitrate ferroelectric memory on a semiconductor integrated circuit.
    Type: Grant
    Filed: June 8, 1978
    Date of Patent: April 17, 1979
    Assignee: Ferrosil Corporation
    Inventor: Robert C. Cook
  • Patent number: 4103417
    Abstract: A device for stringing a multiplicity of wires through a memory array in a plurality of directions having means for guiding the wires into the array and for capturing the wires leaving the array and means for providing tension on the wires and for directing and causing the wires to pass through the array in the plurality of directions. The guiding and capture means are adapted both to constrain the wires in a preselected configuration and to permit the wires to be easily removed therefrom.
    Type: Grant
    Filed: August 25, 1977
    Date of Patent: August 1, 1978
    Assignee: Dataproducts (Santa Clara), Inc.
    Inventors: Richard Ernest Hoffman, Maximiliaan Bruckner
  • Patent number: 4047288
    Abstract: A method of manufacturing triple coincidence access 3-D memories (requiring 3 inputs for memory access) which, according to the invention, consists in making a flat core matrix threaded along three directions of the Cartesian system, the matrix is then positioned opposite the place of manufacturing a subsequent flat matrix, every matrix is secured in the position provided for it in the 3-D memory being manufactured and in which the subsequent weaving procedure is carried out until the preset number of matrices for the 3-D memory is obtained.
    Type: Grant
    Filed: March 17, 1976
    Date of Patent: September 13, 1977
    Inventor: Jury Alexandrovich Burkin
  • Patent number: 4014092
    Abstract: A method of making a memory plane of a magnetic decoder comprising threading of transformers of a decoder memory plane by a single wire by means of stringing ferrite cores in a column on a wire which will serve as a bias winding of all transformers, and then arranging the transformers in a specified configuration to form a row extending in one coordinate direction, and threading primary windings of all transformers in one row by a single wire. Several rows are subsequently arranged in a strip of transformers which is threaded by a third wire in a second coordinate direction, and secondary windings are wound for each transformer separately.
    Type: Grant
    Filed: November 25, 1975
    Date of Patent: March 29, 1977
    Inventors: Jury Alexandrovich Burkin, Jury Valentinovich Metlyaev
  • Patent number: 4012723
    Abstract: Magnetic bubble chips are packaged along with X, Y and Z magnetic field generating means. The package is comprised of a metal lead frame upon which a magnetic bubble chip such as a memory chip device is mounted. Connectors are utilized to connect terminal pads on the bubble memory device to selected lead frame conductors. The lead frame includes selectively positioned terminal conductors which provide exterior terminals for X and Y magnetic field generating coils. The lead frame is plastic encapsulated with the plastic being formed to completely seal the magnetic bubble chip and connectors while providing mechanical support channels for X and Y magnetic field coils. Openings are provided in the plastic within the channels parallel to the plane of the lead frame on opposite sides thereof exposing the selectively positioned conductors so that the coils are electrically connected to the lead frame terminal conductors.
    Type: Grant
    Filed: May 29, 1975
    Date of Patent: March 15, 1977
    Assignee: Texas Instruments Incorporated
    Inventor: James G. Harper
  • Patent number: 3971126
    Abstract: A magnetic field drive coil arrangement includes a hollow rectangular coil form having a pair of rectangular openings at opposite lengthwise ends of the form, a first coil wound around the coil form such that the turns of the coil in the central region of the coil form are parallel to the longitudinal axis and a second coil wound over the central portion of the first coil. The portion of the turns of the first coil which are between the access openings and the second coil curve away from the longitudinal axis of the coil form so as not to interfere with the access openings. The access openings facilitate the access to the cylindrical domain memories disposed within the coil form and the flow of a coolant through the form. Advantageous methods of fabricating the coil arrangement are described.
    Type: Grant
    Filed: September 18, 1975
    Date of Patent: July 27, 1976
    Assignee: GTE Laboratories Incorporated
    Inventor: Carl F. Buhrer
  • Patent number: 3932253
    Abstract: A sheet of magnetic material is placed over a surface of a malleable carrier and stuck with a multi-projectioned punch. Each projection of the punch removes a wafer of the magnetic material from the sheet of magnetic material, and embeds the wafer into the carrier to form a pattern of magnetic material wafers in the surface of the carrier. The carrier is then positioned, wafer bearing side down, over an adhesive coated surface of a substrate, and a surface of the carrier, opposite from the wafer bearing surface, is struck with a multiprojectioned punch to force with each projection an individual one of the wafers out of the surface of the carrier and into the adhesive on the substrate. The malleable carrier is then peeled from the adhesive coated surface of the substrate and from the wafers secured thereto, to leave on the surface of the substrate the pattern of magnetic material wafers.
    Type: Grant
    Filed: June 3, 1974
    Date of Patent: January 13, 1976
    Assignee: Western Electric Company, Inc.
    Inventors: Paul F. Elarde, F. A. Klasek, George O. McCormick