Beam Lead Frame Or Beam Lead Device Patents (Class 29/827)
  • Patent number: 8065793
    Abstract: An application method for resin includes applying resin to a first electronic component in an application chamber under a first internal pressure, moving a second electronic component into an internal pressure adjustment chamber under a second internal pressure which is higher than the first internal pressure and adjusting an internal pressure of the internal pressure adjustment chamber from the second internal pressure to the first internal pressure, and moving the second electronic component into the application chamber while moving the first electronic component into the internal pressure adjustment chamber after the step of application of the resin has been completed.
    Type: Grant
    Filed: November 12, 2009
    Date of Patent: November 29, 2011
    Assignee: Fujitsu Limited
    Inventors: Kazuyuki Ikura, Junzou Une, Jun Matsueda
  • Patent number: 8050048
    Abstract: A lead frame has multiple regions having different wetting characteristics on its surface. For example, one region is formed to handle silver plating while another has less wetting ability. A boundary between the regions causes a wetting force difference that inhibits molten solder flow between regions during solder die bonding.
    Type: Grant
    Filed: March 24, 2008
    Date of Patent: November 1, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Xuesong Xu, Meijiang Song, Jinzhong Yao
  • Publication number: 20110254144
    Abstract: Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices are disclosed herein. In one embodiment, a packaged microelectronic device can include a support member and at least one die in a stacked configuration attached to the support member. The support member may include a leadframe disposed longitudinally between first and second ends and latitudinally between first and second sides. The leadframe includes a lead extending between the first end and the first side.
    Type: Application
    Filed: June 28, 2011
    Publication date: October 20, 2011
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Teck Kheng Lee, Voon Siong Chin, Ai Chie Wang
  • Publication number: 20110249375
    Abstract: A solid electrolytic capacitor includes a capacitor element, an anode lead frame, a cathode lead frame, and a mold resin portion. The anode lead frame includes an anode terminal portion and a rising portion, and the anode terminal portion is exposed at the bottom surface of the mold resin portion. The rising portion is formed integral with the anode terminal portion, and rises to the anode portion. In the rising portion, a through hole is formed. The cathode lead frame includes a cathode terminal portion, a pair of side surface portions and a step portion. Thus, a solid electrolytic capacitor allowing highly accurate and reliable attachment of the capacitor element to the lead frame without using any additional member is provided.
    Type: Application
    Filed: June 21, 2011
    Publication date: October 13, 2011
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Keiko MATSUOKA, Shoji UMEDA, Yoshiyuki FUSHIMI, Koji TEZUKA
  • Patent number: 8028397
    Abstract: The present invention uses a frame with one or more axial ribs extending from a spine onto which two or more discrete two-terminal electronic components, such as capacitors, resistors, or inductors, can be attached. The function of the frame is to align and space the electronic components in a single device or array that allows the two-terminals of each component to be separately contacted or soldered to a PC board during final assembly into a circuit. The frame may use friction or a bonding agent to hold the components to the frame. Additionally, the base of the frame forms a single surface for the pick and place equipment used in circuit board assembly. The frame and any bonding agent must be capable of sustaining high temperature soldering operations to form electrical contacts in the circuit assembly operation.
    Type: Grant
    Filed: April 22, 2008
    Date of Patent: October 4, 2011
    Assignee: Vishay Sprague, Inc.
    Inventor: John Bultitude
  • Patent number: 8028401
    Abstract: A method of fabricating a conducting crossover structure for a power inductor comprises stamping a first lead frame to define a first terminal and a second terminal; stamping a second lead frame to define a first terminal and a second terminal; and locating an insulating material between and in contact with the first and second lead frames to form a laminate.
    Type: Grant
    Filed: March 3, 2006
    Date of Patent: October 4, 2011
    Assignee: Marvell World Trade Ltd.
    Inventor: Sehat Sutardja
  • Patent number: 8024856
    Abstract: A method of manufacturing a printed circuit board is disclosed. A method of manufacturing a printed circuit board, which includes: forming at least one interlayer connector on a first carrier, stacking at least one insulation layer on the first carrier such that the interlayer connector is exposed, removing the first carrier, and forming at least one circuit pattern on the insulation layer such that the circuit pattern is electrically coupled with the interlayer connector, can be used to increase the density of circuit patterns, as the method can provide electrical connection between circuit patterns and vias without using lands.
    Type: Grant
    Filed: January 22, 2008
    Date of Patent: September 27, 2011
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventor: Jong-Jin Lee
  • Publication number: 20110215368
    Abstract: A wire-piercing light-emitting diode (LED) a lead frame having a first lead and a second lead. The first lead has a first transition portion and a first bottom portion with a first cutting member, and the second lead having a second transition portion and a second bottom portion with a second cutting member.
    Type: Application
    Filed: March 7, 2011
    Publication date: September 8, 2011
    Inventor: Johnny Chen
  • Patent number: 8011093
    Abstract: A method for manufacturing connectors comprises providing a carrier strip with a plurality of first alignment apertures and a plurality of contacts arranged in a row. The carrier strip is cut to desired lengths to form contact band pieces. The first alignment apertures are engaged with first protrusions on a carrier tape to mount each of the contact band pieces to the carrier tape. The first protrusions have a smaller outer diameter than an inner diameter of the first alignment apertures such that there is slight play there between. Resin is insert molded around the rows of the contacts to form a housing. The contacts are then cut from the carrier strip.
    Type: Grant
    Filed: November 29, 2005
    Date of Patent: September 6, 2011
    Assignee: Tyco Electronics Japan G.K.
    Inventor: Yoshio Nakamura
  • Patent number: 8012809
    Abstract: Advanced Smart Cards and similar form factors (e.g. documents, tags) having high quality external surfaces of Polyvinylchloride (PVC), Polycarbonate (PC), synthetic paper or other suitable material can be made with highly sophisticated electronic components (e.g. Integrated Circuit chips, batteries, microprocessors, Light Emitting Diodes, Liquid Crystal Displays, polymer dome switches, and antennae), integrated in the bottom layer of the card structure, through use of injection molded thermosetting or thermoplastic material that becomes the core layer of said Advanced Smart Cards. A lamination finishing process can provide a high quality lower surface, and the encapsulation of the electronic components in the thermosetting or thermoplastic material provides protection from the lamination heat and pressure.
    Type: Grant
    Filed: March 23, 2005
    Date of Patent: September 6, 2011
    Assignee: CardXX, Inc.
    Inventor: Paul Reed
  • Patent number: 8013428
    Abstract: A method of fabricating an interconnection between a region of copper material and a conducting region is disclosed. The method includes a step of forming a region of tin material and a step of forming a region of nickel material. The method also includes a step of melting the tin material to induce formation of a nickel/tin/copper intermetallic composition at an interface between the region of copper material and the conducting region. The region of tin material and the region of nickel material define the interface between the region of copper material and the conducting region.
    Type: Grant
    Filed: July 28, 2009
    Date of Patent: September 6, 2011
    Assignee: LSI Corporation
    Inventors: Kultaransingh N. Hooghan, John W. Osenbach, Brian Dale Potteiger, Poopa Ruengsinsub, Richard L. Shook, Prakash Suratkar, Brian T. Vaccaro
  • Patent number: 8006375
    Abstract: An apparatus for equalizing voltage across an electrical lighting system, particularly in low voltage landscape lighting systems. The apparatus consists of a plastic cylinder having open ends and containing two or more connectors for connecting a homerun wire from a transformer to wire leads from the various light fixtures in the lighting system. The wire leads are of uniform length to ensure that each light fixture is ecu distant from the transformer.
    Type: Grant
    Filed: March 6, 2003
    Date of Patent: August 30, 2011
    Inventor: Nate Mullen
  • Patent number: 7987580
    Abstract: A method of fabricating conducting crossover structures for power inductors comprises providing a first lead frame array including first lead frames, providing a second lead frame array including said second lead frames, stamping one side of a second lead frame array to define first and second terminals of said second lead frames, at least one of coating, spraying, applying and/or attaching an insulating material to said first lead frame array to form a first laminate, stamping said first laminate in a direction from said insulating material towards said first lead frame array to define first and second terminals of said first lead frames; and arranging said insulating material of said first laminate adjacent to and in contact with said one side of said second lead frame array to form a second laminate.
    Type: Grant
    Filed: March 23, 2007
    Date of Patent: August 2, 2011
    Assignee: Marvell World Trade Ltd.
    Inventor: Sehat Sutardja
  • Patent number: 7975375
    Abstract: A method for producing a portable electronic object having contact pads arranged on a plane with a thickness which differs from the thickness of a standard smartcard. The object is electrically connected to data transfer station connectors, by delivering a data transfer station having an electric probe connector and submitting the object to the data transfer station in such a way that the contact pads thereof are accessible to the electric probes in a direction perpendicular to the plane. Objects obtainable include UBS keys or PCMCIA cards or readers.
    Type: Grant
    Filed: June 16, 2006
    Date of Patent: July 12, 2011
    Assignee: Gemalto SA
    Inventors: Pierre-André Collet, Thierry Karlisch, François Moutel
  • Patent number: 7961470
    Abstract: An RF power amplifier including a single piece heat sink and an RF power transistor die mounted directly onto the heat sink.
    Type: Grant
    Filed: July 19, 2006
    Date of Patent: June 14, 2011
    Assignee: Infineon Technologies AG
    Inventors: Henrik Hoyer, Donald Fowlkes, Bradley Griswold
  • Patent number: 7958632
    Abstract: A first wiring board, which is a flexible printed-circuit board, is bonded to a second wiring board. A plurality of protruding member are formed on the surface of the second wiring board. An adhesive is deposited on the surface of the second wiring board such that there is a thinner layer of the adhesive on the protruding member than in other areas. Subsequently, the first wiring board is placed on the second wiring board so that a portion of the first wiring board to be used for the wire-bonding is positioned above at least one of the protruding members. The first wiring board gets bonded to the second wiring board due to the adhesive.
    Type: Grant
    Filed: October 30, 2006
    Date of Patent: June 14, 2011
    Assignee: Fujitsu Limited
    Inventors: Jun Matsui, Koji Terada, Hiroyuki Nobuhara
  • Patent number: 7954215
    Abstract: A method for manufacturing an acceleration sensing unit includes: providing an element support substrate in which a plurality of element supporting members is arranged so as to form a plane, each of the element supporting members being coupled to the other element supporting member through a supporting part and having a fixed part and a movable part that is supported by the fixed part through a beam, the beam having a flexibility with which the movable part is displaced along an acceleration detection axis direction when an acceleration is applied to the movable part; providing an stress sensing element substrate in which a plurality of stress sensing elements is arranged so as to form a plane, each of the stress sensing elements being coupled to the other stress sensing element through an element supporting part and having a stress sensing part and fixed ends that are formed so as to have a single body with the stress sensing part at both ends of the stress sensing part; disposing the stress sensing element
    Type: Grant
    Filed: January 25, 2008
    Date of Patent: June 7, 2011
    Assignee: Epson Toyocom Corporation
    Inventor: Yoshikuni Saito
  • Patent number: 7921540
    Abstract: A linkage assembly (140) is used for mechanically coupling an armature (124) and a diaphragm (118) of a balanced receiver (100), the linkage assembly (140) formed from a first linkage member (822) displaced from a strip of stock material (800) relative to the plane of the stock material (800) and a second linkage member (826) displaced from the strip (800) relative to the plane. The first and second linkage members (822, 826) are then joined while secured to the strip (800). At least one severable connecting member (870a-c) securing the linkage member to the strip (800) is severed to release the linkage member from the strip for assembly of the linkage member into the receiver. A method of forming a three-dimensional structure from flat stock is used to form the linkage assembly (140).
    Type: Grant
    Filed: October 24, 2006
    Date of Patent: April 12, 2011
    Assignee: Knowles Electronics, LLC
    Inventors: Mekell Jiles, David Earl Schafer
  • Patent number: 7891087
    Abstract: Disclosed are a method for connecting a bus bar of a capacitor, improving temperature characteristics and reliability of the capacitor by reducing inductance and impedance such that heat generation is restrained during use of the capacitor, and a product fabricated by the same. A pair of bus bars are insulatedly connected to sprayed surfaces on both sides of a plurality of capacitor devices, in such a manner that lead frames arranged alternately on a first bus bar are connected in contact with the sprayed surfaces facing in a diagonal direction, of neighboring capacitor devices. Other lead frames arranged alternately on a second bus bar are connected to the sprayed surfaces facing in another diagonal direction across the above diagonal direction in an X-shape. Then, the pair of bus bars are assembled to be insulated from each other and overlapped at one side of the capacitor device.
    Type: Grant
    Filed: June 5, 2009
    Date of Patent: February 22, 2011
    Assignee: Nuintek Co., Ltd.
    Inventors: Chang Hoon Yang, Dae Jin Park, Yong Won Jun, Chang Geun Park, Yun Rak Kim
  • Patent number: 7884006
    Abstract: Resilient spring contacts for use in wafer test probing are provided that can be manufactured with a very fine pitch spacing and precisely located on a support substrate. The resilient contact structures are adapted for wire bonding to an electrical circuit on a space transformer substrate. The support substrates with attached spring contacts can be manufactured together in large numbers and diced up and tested before attachment to a space transformer substrate to improve yield. The resilient spring contacts are manufactured using photolithographic techniques to form the contacts on a release layer, before the spring contacts are epoxied to the support substrate and the release layer removed. The support substrate can be transparent to allow alignment of the contacts and testing of optical components beneath. The support substrate can include a ground plane provided beneath the spring contacts for improved impedance matching.
    Type: Grant
    Filed: December 2, 2008
    Date of Patent: February 8, 2011
    Assignee: FormFactor, Inc.
    Inventors: Benjamin N. Eldridge, Bruce Jeffrey Barbara
  • Patent number: 7875228
    Abstract: An apparatus, system, and method are disclosed for maintaining orientation of a manufactured part during a manufacturing process. The apparatus, system, and method include uncoiling a carrier from at least one supply reel and feeding the carrier into a manufacturing machine used by a manufacturing process to form a manufactured part. The apparatus, system, and method include forming the manufactured part onto at least one prong protruding from the carrier. The at least one prong and the carrier maintain orientation of the manufactured part with respect to the carrier.
    Type: Grant
    Filed: May 26, 2006
    Date of Patent: January 25, 2011
    Assignee: SG Design Technologies
    Inventors: Bart J. Storrs, Michael A. Griffin
  • Patent number: 7868725
    Abstract: A conducting crossover structure for power inductors comprises a first lead frame array that includes a first feed strip, a first lead frames including first and second terminals, and first tab portions that releasably connect said first lead frames to said first feed strip.
    Type: Grant
    Filed: March 23, 2007
    Date of Patent: January 11, 2011
    Assignee: Marvell World Trade Ltd.
    Inventor: Sehat Sutardja
  • Patent number: 7861406
    Abstract: Methods and associated structures of forming a microelectronic device are described. Those methods may include amorphizing at least one contact area of a source/drain region of a transistor structure by implanting through at least one contact opening, forming a first layer of metal on the at least one contact area, forming a second layer of metal on the first layer of metal, selectively etching a portion of the second metal layer, annealing the at least one contact area to form at least one silicide, and removing the unreacted first metal layer and second metal layer from the transistor structure and forming a conductive material in the at least one contact opening.
    Type: Grant
    Filed: March 29, 2007
    Date of Patent: January 4, 2011
    Assignee: Intel Corporation
    Inventors: Saurabh Lodha, Pushkar Ranade, Christopher Auth
  • Patent number: 7856713
    Abstract: A combined terminal is made by combination of first and second terminals. The first terminal has a first plate portion. The second terminal has a second plate portion and a window portion formed in the second plate portion. The first and second terminals are combined so that the first and second plate portions are superposed while the first terminal remains to be linked to a frame by a link portion therebetween. The combined first and second terminals are removed from the frame by cutting the link portion through the window portion.
    Type: Grant
    Filed: December 8, 2008
    Date of Patent: December 28, 2010
    Assignee: Yazaki Corporation
    Inventors: Shinobu Suzuki, Kouichi Ohyama
  • Publication number: 20100301465
    Abstract: Lead frames and their fabricating method which reduce generation of defects in the process of fabricating semiconductor devices, in particular connection defects in wire bonding, thereby improving the product yield and reliability, and semiconductor devices using the lead frames and their fabricating method are provided. A method for fabricating a lead frame is characterized in including a process of forming a substrate equipped with a convex portion, and a metal layer having a first portion that overlaps a first surface included in the convex portion and a second portion that extends from the first portion and does not overlap the first surface, and a process of bending the metal layer such that the second portion of the metal layer overlaps a second surface included in the convex portion that intersects the first surface.
    Type: Application
    Filed: March 15, 2010
    Publication date: December 2, 2010
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Masanobu SHOJI, Toru FUJITA
  • Patent number: 7836590
    Abstract: A manufacturing method for a printed circuit board is disclosed. The method includes: forming a first circuit pattern on a metal layer of a conductive carrier, which has the metal layer stacked on one side, pressing the conductive carrier and a first insulation layer together with the first circuit pattern facing the first insulation layer, forming a via by selectively removing the conductive carrier, and removing the metal layer. Using this method, a high-density thin package can be manufactured with increased reliability, and the productivity of the manufacturing process can also be improved.
    Type: Grant
    Filed: February 1, 2008
    Date of Patent: November 23, 2010
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jee-Soo Mok, Jun-Heyoung Park
  • Patent number: 7832091
    Abstract: A method for manufacturing a conductive contact holder includes forming, from a conductive material, a substrate having a hollow portion to which a holder member for holding a plurality of conductive contacts can be fitted; fixing the substrate formed from the conductive material and an insulating member by fitting the substrate and the insulating member into the hollow portion of the substrate, the insulating member being a raw material of the holder member; polishing a surface of the fixed holder member and a surface of the substrate adjoining the surface so as to make the surfaces smooth; and forming a plurality of holder holes for containing the conductive contacts, respectively, the holder holes penetrating the holder member, the surface of which is polished. The fixing includes filling an insulating adhesive between the holder member and the substrate.
    Type: Grant
    Filed: October 27, 2006
    Date of Patent: November 16, 2010
    Assignee: NHK Spring Co., Ltd.
    Inventors: Toshio Kazama, Shigeki Ishikawa
  • Patent number: 7832092
    Abstract: A printed wiring board includes a plurality of conductor plates that includes at least one conductor plate that is used as a lead for electrical connection with an external circuit, the conductor plates being separated spatially from one another; an insulating layer formed on or across the conductor plates or both on and across the conductor plates; and a plurality of wiring patterns formed on the insulating layer. At least one of the conductor plates is electrically connected with at least one of the wiring patterns through a via-hole.
    Type: Grant
    Filed: March 3, 2008
    Date of Patent: November 16, 2010
    Assignee: The Furukawa Electric Co., Ltd.
    Inventors: Takehiro Shirai, Masayuki Iwase
  • Patent number: 7829982
    Abstract: A lead frame includes a frame body defining an internal region, a plurality of leads extending from the frame body, and first and second stages that are disposed in the internal region. The first and second stages are sloped and are parallel to a first line along which a primary stream of a molten resin runs, so that slope angles of the stages are not substantially changed by the injection of the molten resin into the cavity.
    Type: Grant
    Filed: February 16, 2006
    Date of Patent: November 9, 2010
    Assignee: Yamaha Corporation
    Inventors: Kenichi Shirasaka, Hiroshi Saitoh
  • Patent number: 7823281
    Abstract: An apparatus and method for crosstalk compensation in a jack of a modular communications connector includes a flexible printed circuit board connected to jack contacts and to connections to a network cable. The flexible printed circuit board includes conductive traces arranged as one or more couplings to provide crosstalk compensation.
    Type: Grant
    Filed: August 3, 2007
    Date of Patent: November 2, 2010
    Assignee: Panduit Corp.
    Inventors: Jack E. Caveney, Masud Bolouri-Saransar, Scott M. Lesniak
  • Patent number: 7788800
    Abstract: A semiconductor device has a leadframe with a structure made of a base metal (105), wherein the structure consists of a chip mount pad (402) and a plurality of lead segments (403). Covering the base metal are, consecutively, a nickel layer (301) on the base metal, and a continuous layer of noble metal, which consists of a gold layer (201) on the nickel layer, and an outermost palladium layer (202) on the gold layer. A semiconductor chip (410) is attached to the chip mount pad and conductive connections (412) span from the chip to the lead segments. Polymeric encapsulation compound (420) covers the chip, the connections, and portions of the lead segments. In QFN devices with straight sides (501), the compound forms a surface (421) coplanar with the outermost palladium layer (202) on the un-encapsulated leadframe surfaces.
    Type: Grant
    Filed: November 7, 2007
    Date of Patent: September 7, 2010
    Assignee: Texas Instruments Incorporated
    Inventor: Donald C Abbott
  • Patent number: 7779537
    Abstract: An ablation probe and method of manufacturing the ablation probe are provided. The probe comprises a probe shaft and a unibody electrode element. The unibody electrode element comprises a common electrode base located at the distal end of the shaft, and a plurality of electrode tines distally extending from the electrode base. The electrode element may be created by forming divisions (such as slits or slots) from a first end of an electrically conductive elongate member towards an opposing second end of the elongate member. Alternatively, the divisions can be formed from a first end of an electrically conductive sheet towards an opposing second end of the sheet, and then bent or rolled to form the elongate member. In either case, the common electrode base can either be separately mounted to a probe shaft, or the probe shaft can be formed from the elongate member, in which case, the electrode base will be integrated with the probe shaft as a unibody structure. The electrode tines can be optionally shaped, e.g.
    Type: Grant
    Filed: November 14, 2008
    Date of Patent: August 24, 2010
    Assignee: Boston Scientific Scimed, Inc.
    Inventors: Jeff W. Zerfas, Steve Pickett, James A. Teague, Martin G. Donofrio
  • Patent number: 7761983
    Abstract: The present invention relates to a method of assembling a probe for testing of integrated circuits or other microelectronic devices.
    Type: Grant
    Filed: October 18, 2007
    Date of Patent: July 27, 2010
    Assignee: Cascade Microtech, Inc.
    Inventors: Leonard Hayden, John Martin, Mike Andrews
  • Patent number: 7752746
    Abstract: In a method of partially attaching an additional attaching material for various types of printed circuit boards, the method attaches an additional attaching material partially onto circuit blocks after circuits of the circuit blocks are made on a flexible, rigid or mixed printed circuit board or an insulating layer is coated. The method sets an attaching material on a shaping material that covers the circuit blocks, uses a depth control tool to cut away areas not corresponding to those requiring to be attached onto the necessary circuit blocks, aligns the corresponding positions of the circuit blocks to perform pseudo attachment and pressing, and tears away the shaping material from the attaching material, so as to attach additional attaching materials properly onto the predetermined positions of the circuit blocks without requiring to attach the circuit blocks one by one, and achieve the effect of saving manufacturing time and avoiding misalignment.
    Type: Grant
    Filed: August 28, 2007
    Date of Patent: July 13, 2010
    Assignee: Unitech Printed Circuit Board Corp.
    Inventors: Yu-Jen Chen, Kai-Hsiang Chiang
  • Patent number: 7752745
    Abstract: A wired circuit board holding sheet that can permit easy judgment on whether a cutting notch formed has a predetermined depth, and a production method of the wired circuit board holding sheet that can produce the wired circuit board holding sheet simply and easily. In the wired circuit board holding sheet 1 comprising a sheet 2 holding therein a plurality of separable wired circuit boards 3, the respective wired circuit boards 3 are held in the sheet 2 via joints 4 to be cut, and cutting notches 6 to facilitate cutting of the joints 4 and marking notches 7 to indicate that the cutting notches 6 have a predetermined depth to cut the joints 4 are formed simultaneously in both front and back surfaces of the joints 4 by using punches having combination of a main punch portion 13 and a sub-punch portion 14.
    Type: Grant
    Filed: November 26, 2007
    Date of Patent: July 13, 2010
    Assignee: Nitto Denko Corporation
    Inventors: Naotaka Higuchi, Kenkichi Yagura
  • Patent number: 7739791
    Abstract: A method of producing an overmolded electronic assembly including a circuit board and a flexible circuit interconnect by fixturing the assembly in a mold cavity such that a portion of the flexible circuit protrudes from the mold, and providing a compressible elastomeric interface between the mold and the flexible circuit to seal off the mold cavity and protect the flexible circuit from damage due to the clamping force of the mold. The portion of the flexible circuit within the mold cavity is pre-coated with a material that ensures good adhesion with the molding compound, and a heat exchanger thermally coupled to the portion of the flexible circuit that protrudes from the mold protects the flexible circuit from damage due to thermal conduction from the mold and mold compound.
    Type: Grant
    Filed: October 26, 2007
    Date of Patent: June 22, 2010
    Assignee: Delphi Technologies, Inc.
    Inventors: Scott D. Brandenburg, David A Laudick, Gary E. Oberlin
  • Patent number: 7726011
    Abstract: In a chip transferring apparatus a wafer (44) and a lead frame (50) are positioned. A first chip (42) is picked up from the wafer (44) by a transfer head (14; 40a-40d) in a chip pick-up position, while bonding a second chip to the lead frame (50) by another transfer head in a chip bonding position. The first chip (42) is then transferred by said one of the transfer heads from the chip pick-up position to the chip bonding position. Next, the first chip (42) is bonded on the lead frame (50) by said one of the transfer heads (14; 40a-40d) in the chip bonding position, while another one of the transfer heads picks up a third chip from the wafer (44) in the chip pick-up position. Each transfer head (14; 40a-40d) comprises a collet (66a-66d) which, through a mechanical coupling, is coupled to another collet for compensating radial forces exerted on the collet relative to said axis of rotation.
    Type: Grant
    Filed: December 11, 2003
    Date of Patent: June 1, 2010
    Assignee: NXP B.V.
    Inventors: Johannes Wilhelmus Dorotheus Bosch, Wilhelmus Johannus Theodorus Derks, Antonius Hendrikus Jozef Kamphuis, Thomas Markus Kampschreur, Joep Stokkermans, Leon Wetzels
  • Publication number: 20100122454
    Abstract: A method for forming an isolated inner lead from a leadframe is revealed. The leadframe primarily comprises a plurality of leads, the isolated inner lead, and an external lead. Each lead has an inner portion having a finger. The isolated inner lead having two fingers is completely formed inside a molding area and is made of the same metal leadframe as the leads. One finger of the isolated inner lead and the fingers of the leads are linearly arranged. The other finger of the isolated inner lead is adjacent to a finger of the external lead. At least one of the inner portions divides the isolated inner lead from the external lead. The isolated inner lead is integrally connected to an adjacent one of the inner portions by a connecting block. A tape-attaching step is performed to mechanically connect the isolated inner lead where two insulating tapes are attached in a manner that the connecting block can be removed.
    Type: Application
    Filed: November 20, 2008
    Publication date: May 20, 2010
    Inventors: Wen-Jeng Fan, Yu-Mei Hsu
  • Patent number: 7719171
    Abstract: A method of fabricating a hermetic terminal having an annular ring, a lead arranged to penetrate through the ring in which one end side thereof is an inner lead portion electrically connected to a piezoelectric vibrating piece and the other end side thereof is an outer lead portion electrically connected to outside as the ring is between them, and a filler fixing the lead to the ring, wherein the hermetic terminal seals the piezoelectric vibrating piece inside a case, the method includes the steps of: applying plating to a hermetic terminal intermediate having the lead fixed in the ring with the filler to plate the ring and the lead; setting the hermetic terminal intermediate after subjected to plating on a holding member; and flattening an end part of an inner lead portion in the lead to form a stair portion in the hermetic terminal intermediate set on the holding member.
    Type: Grant
    Filed: August 18, 2008
    Date of Patent: May 18, 2010
    Assignee: Seiko Instruments Inc.
    Inventors: Sadao Oku, Mitsuo Akiba
  • Patent number: 7719650
    Abstract: The proceeding of peeling of a conductive layer in the vicinity of terminals is prevented. A display panel includes a conductive layer extending to the outside of terminals, and the conductive layer has slits extending in directions from one end face to the other end face alternately at two end faces along the extending direction of the conductive layer.
    Type: Grant
    Filed: July 7, 2006
    Date of Patent: May 18, 2010
    Assignee: Hitachi Displays, Ltd.
    Inventors: Saori Sugiyama, Yasuko Gotoh
  • Patent number: 7691680
    Abstract: The present disclosure suggests various microelectronic component assembly designs and methods for manufacturing microelectronic component assemblies. In one particular implementation, a microelectronic component assembly includes a microelectronic component, at least two leads, and at least two bond wires. Each of the leads may have a reduced-thickness inner length adjacent terminals of the microelectronic component and a body having an outer surface spaced farther from the microelectronic component than a bond surface of the inner length. Each of the bond wires couples the microelectronic component to one of the leads and has a maximum height outwardly from the microelectronic component that is no greater than the height of the outer surface of the lead.
    Type: Grant
    Filed: April 23, 2008
    Date of Patent: April 6, 2010
    Assignee: Micron Technologies, Inc.
    Inventors: Chee Peng Neo, Hock Chuan Tan, Beng Chye Chew, Yih Ming Chai, Kian Shing Tan
  • Patent number: 7688097
    Abstract: The present invention relates to a probe tip assembly for testing of integrated circuits or other microelectronic devices. The probe tip assembly may include a plurality of independently flexible contact fingers extending from a support, each contact finger spaced apart from the other contact fingers, and each contact finger terminating in free space at an end distal from the support. A probe may be constructed by attaching the free ends of the contact fingers to electrical contacts on a circuit board and then removing the support from the contact fingers.
    Type: Grant
    Filed: April 26, 2007
    Date of Patent: March 30, 2010
    Assignee: Cascade Microtech, Inc.
    Inventors: Leonard Hayden, John Martin, Mike Andrews
  • Patent number: 7665205
    Abstract: Disclosed are a method for manufacturing a laminated lead frame and a laminated lead frame manufactured thereby, wherein lead frame single plates to be laminated one on top of the other can be reliably bonded together with a relatively light load. Under the method for manufacturing a laminated lead frame by means of stacking and bonding lead frame single plates 10 and 11, each of which has been processed into a predetermined shape, a plurality of protuberance sections 12 are formed in at least one of mutually-opposing surfaces of the lead frame single plates 10 and 11 that vertically pair up with each other. The mutually-opposing lead frame single plates 11, 12 are bonded together via the protuberance sections 12.
    Type: Grant
    Filed: November 9, 2006
    Date of Patent: February 23, 2010
    Assignee: Mitsui High-Tec, Inc.
    Inventors: Kiyoshi Matsunaga, Chikaya Mimura, Takao Shioyama
  • Patent number: 7657993
    Abstract: A shim coil for use in magnetic resonance imaging spectroscopy (MRIS) is formed by cutting or punching in a sheet of electrically conductive material the required coil pattern. The pattern can be punched using a CNC punch or stamping machine.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: February 9, 2010
    Assignee: Tesla Engineering Limited
    Inventor: Michael Colin Begg
  • Patent number: 7640656
    Abstract: A method for manufacturing a pre-molding leadframe strip with compact components is disclosed. The method forms a leadframe strip with an array of component regions, each component region including two metal parts for using as a chip-attached portion, a wire-bonded portion and two external electrical connection conductors. Next, the leadframe strip is plated with a metal layer having high conductivity and die bonding adhesion. Finally, a pre-molded structure on each of the component regions is formed to surround all the other portions of the leadframe strip with an exception of only the two external electrical connection conductors through a multiplicity of pre-molding processes, each pre-molding process molding the leadframe strip at an interval of one or more than one component regions.
    Type: Grant
    Filed: August 16, 2007
    Date of Patent: January 5, 2010
    Assignee: SDI Corporation
    Inventor: Jau-Shyong Chen
  • Publication number: 20090325401
    Abstract: A connector includes a contact pin in which a free end projecting from a supporting member comes into contact with an electrode of a first object and a second object, and a bending part is provided onto a base end such that the connector has an inclination against the first object and the second object. The rigidity of the bending parts is selectively set to be high by selectively increasing a thickness of the bending part.
    Type: Application
    Filed: September 3, 2009
    Publication date: December 31, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Makoto Sakairi, Nobutaka Itoh, Yoshiteru Ochi, Yoko Kobayashi
  • Publication number: 20090315160
    Abstract: A prefabricated lead frame to bond a chip and a substrate, and a bonding method using the prefabricated lead frame. The prefabricated lead frame includes an inner ring, an outer ring, and a plurality of wires, wherein inner ends and outer ends of the wires are respectively connected to the inner ring and the outer ring, and the prefabricated lead frame has a wire shape corresponding to a chip and a substrate to be bonded. The prefabricated lead frame may be manufactured in batch production to increase the manufacturing efficiency of semiconductor devices, and the prefabricated lead frame may be used instead of a general wire bonding process.
    Type: Application
    Filed: June 18, 2009
    Publication date: December 24, 2009
    Applicant: Samsung Electronics Co., Ltd
    Inventors: Lei Wang, Jin-Sung Lee, Qian Wang, Zhenging Zhao
  • Patent number: 7622332
    Abstract: A method of making a lead frame and a partially patterned lead frame package with near-chip scale packaging (CSP) lead-counts is accomplished by performing a major portion of the manufacturing process steps with a partially patterned strip of metal formed into a web-like lead frame on one side, so that the web-like lead frame, which is solid and flat on the other side is also rigid mechanically and robust thermally to perform without distortion or deformation during the chip-attach and wire bond processes, both at the chip level and the package level. The bottom side of the metal lead frame is patterned to isolate the chip-pad and the wire bond contacts only after the front side, including the chip and wires, is encapsulated. The resultant package being electrically isolated enables strip testing and reliable singulation without having to cut into any additional metal.
    Type: Grant
    Filed: August 4, 2005
    Date of Patent: November 24, 2009
    Assignee: Unisem (Mauritius) Holdings Limited
    Inventors: Shafidul Islam, Romarico Santos San Antonio
  • Patent number: 7617595
    Abstract: The present invention relates to an apparatus for producing a comb-like capacitor element member including a guide member and a plurality of rectangular metal foil pieces bonded to the guide member, comprising an automatic feed mechanism for feeding tape-like metal foil by a constant length toward the guide member, a bonding mechanism for bonding the metal foil to the guide member, and a cutting mechanism for cutting the bonded metal foil. According to the apparatus of the present invention, a comb-like capacitor element member having a plurality of rectangular metal foil pieces bonded can be produced efficiently, by bonding the elongated tape-like metal foil without damaging it.
    Type: Grant
    Filed: May 9, 2008
    Date of Patent: November 17, 2009
    Assignee: Showa Denko K.K.
    Inventors: Hiroshi Nitoh, Toshihiro Okabe, Kenji Ishii, Atsushi Sakai
  • Publication number: 20090247242
    Abstract: A continuous housing (100) and integral user interface (101) is disclosed. The housing comprising a continuous housing having a cavity (117) to receive an electrical component and to surround the component on a plurality of sides. The housing further comprises, an integral user interface portion incorporated into a continuous housing portion.
    Type: Application
    Filed: March 25, 2008
    Publication date: October 1, 2009
    Applicant: MOTOROLA INC
    Inventors: JASON P. WOJACK, Joseph L. Allore, Gary R. Weiss