And Shaping, E.g., Cutting Or Bending, Etc. Patents (Class 29/835)
  • Patent number: 7752738
    Abstract: Systems and methods are provided for fabricating compliant spring contacts for use in, for example, IC packaging and interconnection between multi-layers in stacked IC packages and electronic components. Internal stresses generated within an formed film are released to cause the film to buckle and/or bow away from a supporting terminal. A thin stressed metal film layer is selectively broken away from the substrate of the supporting terminal allowing the stressed metal film to take on a bowed and/or spring-like shaped through minute deformation based on a release of the internal stresses. The resultant thin compliant spring contact can deform a small amount as the spring contact is then pressed against a compatible mating contact surface in an overlying layer.
    Type: Grant
    Filed: January 24, 2005
    Date of Patent: July 13, 2010
    Assignee: Palo Alto Research Center Incorporated
    Inventor: Thomas H. DiStefano
  • Publication number: 20100122456
    Abstract: A method for bonding includes providing a first die and a second die; scanning at least one of the first die and the second die to determine thickness variations of the at least one of the first die and the second die; placing the second die facing the first die with a first surface of the first die facing a second surface of the second die; aligning the first surface and the second surface parallel to each other using the thickness variations; and bonding the second die onto the first die. The step of aligning the first surface and the second surface includes tilting one of the first die and the second die.
    Type: Application
    Filed: November 17, 2008
    Publication date: May 20, 2010
    Inventors: Chen-Hua Yu, Wen-Chih Chiou, Weng-Jin Wu
  • Patent number: 7653990
    Abstract: A manufacturing method of printed circuit board print is disclosed. A method of manufacturing a PCB which includes providing an imprinting stamper with a relievo pattern formed in correspondence with a circuit pattern data using the circuit pattern data, forming an intaglio pattern corresponding to the relievo pattern by pressing the imprinting stamper on an insulation layer, and forming a circuit pattern by printing conductive ink in the intaglio pattern by an ink-jet method using the circuit pattern data, allows the forming of a circuit pattern to a required thickness by injecting conductive ink in a groove processed by the imprint method, and prevents the spreading of ink and the distortion of the pattern shape in the curing process for conductive ink containing metal Also, the circuit pattern CAD data used in the manufacturing of an imprinting stamper can be utilized again in the ink-jet printing process.
    Type: Grant
    Filed: April 13, 2007
    Date of Patent: February 2, 2010
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Choon-Keun Lee, Myeong-Ho Hong, Senug-Hyun Ra
  • Patent number: 7656259
    Abstract: A method is proposed to manufacture a precise multi-pole magnetic component for using in magnetic encoders. A special layout of the circuit pattern is designed and formed on a printed circuit board (PCB). Alternate and regular magnetic field is induced according to Ampere's law after a current flowing through the circuit on the PCB. The multi-pole magnetic component with fine magnetic pole pitch is achieved by forming the high-density circuit patterns on a substrate using the PCB technology.
    Type: Grant
    Filed: August 5, 2005
    Date of Patent: February 2, 2010
    Assignee: Industrial Technology Research Institute
    Inventors: Kuo-Chi Chiu, Der-Ray Huang, Han-Ping Shieh
  • Patent number: 7631423
    Abstract: A method is provided for fabricating a multilayer printed circuit board, including embedded electrically conductive elements formed as part of the fabrication of the layers of the printed circuit board. An insulating layer and a conductive layer are then pressed over the electrically conductive elements such that the electrically conductive elements protrude from the surface of the conductive layer. A mechanical process is the applied to remove these protrusions to expose the embedded electrically conductive elements. An electrically conductive undercoat may be applied over the surface of the conductive layer and a second circuit pattern is formed over the electrically conductive undercoat.
    Type: Grant
    Filed: February 13, 2006
    Date of Patent: December 15, 2009
    Assignee: Sanmina-Sci Corporation
    Inventors: Lim Siong San, Neo Mok Choon, Kevin Lim, Kelvin Yeow, Tan Kwang Chiah
  • Patent number: 7617600
    Abstract: An electronic circuit formed by removing only a baseboard from an electronic module. The electronic circuit may be formed by providing a baseboard made of a water-soluble material, applying a water-soluble polymer as an insulating material to the baseboard, and forming an electronic module by mounting electronic parts to wires formed on the baseboard. The formation of the electronic circuit may also include removing the baseboard from the electronic module by dissolving the baseboard in water and deforming and resin-encapsulating the electronic module, which includes the electronic parts and wires in the state of lacking the baseboard.
    Type: Grant
    Filed: May 28, 2004
    Date of Patent: November 17, 2009
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Yasutaka Takeuchi, Hironao Hayashi
  • Patent number: 7610679
    Abstract: There is disclosed a method of producing an inkjet printhead including a cavity unit having therein ink passages and formed by stacking a plurality of kinds of flat plates each of which has a specific ink-passage pattern for constituting the ink passages.
    Type: Grant
    Filed: November 10, 2005
    Date of Patent: November 3, 2009
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventor: Atsushi Ito
  • Patent number: 7596851
    Abstract: The shape of a crotch portion of a tuning fork of a quartz piece is controlled such that main surfaces of two sheets of original plates, which are made of quartz crystal and the main surfaces thereof are orthogonal to the direction of the Z axis, which is a crystal axis, are bonded so that the plus/minus directions of the X axis, which is another crystal axis, are made in a reverse relation to each other to form a quartz substrate, and masks for forming the outer shape, through which the surfaces of the quartz substrate are exposed, are formed on both front and back surfaces of the quartz substrate in a manner that the mask follows along the outer shape of the quartz piece and the width direction of the outer shape agrees with the X axis, and the quartz substrate is etched to form the outer shape of the quartz piece.
    Type: Grant
    Filed: October 29, 2007
    Date of Patent: October 6, 2009
    Assignee: Nihon Dempa Kogyo Co., Ltd.
    Inventor: Takehiro Takahashi
  • Patent number: 7594307
    Abstract: A method of manufacturing a piezoelectric resonator includes forming first electrodes larger than vibrating electrodes in an area D1 including the vibrating electrodes on obverse and reverse surfaces of a piezoelectric substrate, and measuring the resonant frequency fr1 of a resonator including the first electrodes. The thickness of a metallic thin film required for frequency adjustment is determined based on the measured resonant frequency. Then, second electrodes formed of the metallic thin film having the determined thickness are formed in an area D2 including at least the vibrating electrodes of the piezoelectric substrate. By removing unnecessary portions of the first and second electrodes, a pattern of the resulting vibrating electrodes is formed. Thus, high-accuracy frequency adjustment can be achieved without the need for complicated positioning.
    Type: Grant
    Filed: July 25, 2005
    Date of Patent: September 29, 2009
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Tetsuya Morimura, Yoshihiro Ikeda, Makoto Irie, Motonori Matsushita
  • Patent number: 7584539
    Abstract: A method of manufacturing an inkjet printer component and an inkjet printer component electropolishing device are provided. The method includes positioning an electrode in a fluid passageway of an inkjet printer component, the electrode including a conductive face and a nonconductive face; polishing a side of the fluid passageway by: biasing the nonconductive face of the electrode toward a side of the fluid passageway such that the conductive face of the electrode does not contact any portion of the fluid passageway; providing an electrolytic fluid to the fluid passageway of the inkjet printer component; and applying a voltage between the electrode and the inkjet printer component.
    Type: Grant
    Filed: October 16, 2006
    Date of Patent: September 8, 2009
    Assignee: Eastman Kodak Company
    Inventors: James E. Harrison, Francis T. Galbraith, Kevin P. Egan, Bruce A. Bowling, Richard W. Sexton
  • Patent number: 7528682
    Abstract: In an electronic apparatus comprising a digital display portion and first and second oscillators comprising first and second oscillating circuits, each of the first and second oscillating circuits having a resonator, an amplifier, a plurality of capacitors, and at least one resistor, a mode of vibration of the resonator of the first oscillating circuit being the same as that of the resonator of the second oscillating circuit, an output signal being output from each of the first and second oscillating circuits, the output signal of one of the first and second oscillating circuits being a clock signal for use in operation of the electronic apparatus to display time information at the digital display portion.
    Type: Grant
    Filed: August 29, 2006
    Date of Patent: May 5, 2009
    Assignee: Piedek Technical Laboratory
    Inventor: Hirofumi Kawashima
  • Patent number: 7523544
    Abstract: In a method for manufacturing compact keypad, a first molding die with bottom surface of smooth face, matted face or patterned layer is prepared. Colloid is injected into the first molding die and a first carrier covers the surface of the colloid. A rolling wheel presses the first carrier and the colloid evenly into the first molding die. The colloid is cured by UV light to form a keypad layer attached on the first carrier. A background color layer, a functional color layer and a textual color layer are formed on the first carrier. A second carrier is prepared and a reflection layer is printed on the surface of the second carrier. The second carrier and silicon rubber are placed into a second molding die and thermally pressed therein to form a resilient layer. The resilient layer is adhered with the keypad layer to form the keypad panel.
    Type: Grant
    Filed: April 25, 2007
    Date of Patent: April 28, 2009
    Assignee: Ichia Technologies Inc.
    Inventor: Chih-Ho Hsu
  • Patent number: 7507346
    Abstract: A method for manufacturing an electronic component includes preparing an element substrate having a function section for providing a function of an electronic component, and an external-connection electrode; bonding a low-sandblast-resistant case plate to the element substrate through a high-sandblast-resistant adhesive layer; forming, by sandblast processing, a hole in the case plate above the external-connection electrode so that the adhesive layer is exposed to the outside; removing, by etching, an adhesive layer portion that is exposed in the hole; forming an electrode film so as to be electrically connected to the exposed external-connection electrode; and forming, by mechanical machining, a projection having a leading end surface on which a terminal electrode resulting from the electrode film is defined.
    Type: Grant
    Filed: January 28, 2008
    Date of Patent: March 24, 2009
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Muneharu Yamashita, Atsushi Mikado
  • Publication number: 20090013526
    Abstract: An exemplary inner substrate for manufacturing multilayer printed circuit boards is provided. The inner substrate has a number of substrate units and a number of transverse folding portions alternately arranged along a longitudinal direction of the inner substrate. Each of the substrate units is configured for forming a unitary printed circuit board. Each of the folding portions is interconnected between neighboring substrate units. Each of the folding portions defines at least one line weakness perpendicular to the longitudinal direction of the inner substrate for facilitating folding and unfolding the neighboring substrate units to each other. An exemplary method for manufacturing multilayer printed circuit boards using the inner substrate is also provided. The method can improve efficiency of manufacturing multilayer printed circuit boards.
    Type: Application
    Filed: December 18, 2007
    Publication date: January 15, 2009
    Applicant: FOXCONN ADVANCED TECHNOLOGY INC.
    Inventors: CHIH-KANG YANG, CHENG-HSIEN LIN
  • Patent number: 7464466
    Abstract: A method of fabricating a plurality of inkjet nozzles on a substrate. The method comprises the steps of: (a) providing a substrate having a plurality of trenches corresponding to ink inlets; (b) depositing sacrificial material so as fill the trenches and form a scaffold on the substrate; (c) defining openings in the sacrificial material; (d) depositing roof material over the sacrificial material to form nozzle chambers and filter structures simultaneously; (e) etching nozzle apertures through the roof material; and (f) removing the sacrificial material.
    Type: Grant
    Filed: October 11, 2005
    Date of Patent: December 16, 2008
    Assignee: Silverbrook Research Pty Ltd
    Inventor: Kia Silverbrook
  • Publication number: 20080295328
    Abstract: In a method of manufacturing an electronic component package, first, a plurality of sets of external connecting terminals corresponding to a plurality of electronic component packages are formed by plating on a top surface of a substrate to thereby fabricate a wafer. The wafer includes a plurality of pre-base portions that will be separated from one another later to become bases of the respective electronic component packages. Next, at least one electronic component chip is bonded to each of the pre-base portions of the wafer. Next, electrodes of the electronic component chip are connected to the external connecting terminals. Next, the electronic component chip is sealed. Next, the wafer is cut so that the pre-base portions are separated from one another and the plurality of bases are thereby formed.
    Type: Application
    Filed: May 29, 2007
    Publication date: December 4, 2008
    Applicants: HEADWAY TECHNOLOGIES, INC., SAE MAGNETICS (H.K.) LTD.
    Inventors: Yoshitaka Sasaki, Tatsushi Shimizu
  • Patent number: 7444733
    Abstract: Alignment precision enhancement of electronic component process on flexible substrate device and method thereof the same is proposed. The process step of a flexible substrate is put on a substrate holder, wherein the flexible substrate is fixed by a polymer tape. A plural of alignment marks is making for lithography process. An unstressed cut is separated the flexible substrate and substrate holder when the electronic component is made.
    Type: Grant
    Filed: November 30, 2005
    Date of Patent: November 4, 2008
    Assignee: Industrial Technology Research Institute
    Inventors: Jia-Chong Ho, Tarng-Shiang Hu, Hsiang-Yuan Cheng
  • Patent number: 7446412
    Abstract: Some aspects include a heat sink base, an upper metal cladded to an upper surface of the heat sink base, the upper metal defining at least one groove, and a heat sink fin disposed in the groove and secured to the upper metal. Some aspects may also include a lower metal cladded to a lower surface of the heat sink base, and a pedestal secured to the lower cladding.
    Type: Grant
    Filed: March 28, 2006
    Date of Patent: November 4, 2008
    Assignee: Intel Corporation
    Inventor: Paul J Gwin
  • Publication number: 20080218289
    Abstract: A nonreciprocal circuit device includes permanent magnets, a ferrite to which a direct current magnetic field is applied by the permanent magnets, first and second central electrodes arranged on the ferrite, and a circuit substrate. A ferrite-magnet assembly mounted on the circuit substrate is covered with a resin layer. The resin layer includes an innermost layer made of a non-magnetic resin material and a magnetic resin layer having a magnetic filler mixed therein.
    Type: Application
    Filed: May 28, 2008
    Publication date: September 11, 2008
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventor: Takaya WADA
  • Patent number: 7418772
    Abstract: In a manufacturing method for a SAW apparatus a first insulating layer is formed on the entire surface of a piezoelectric LiTaO3 substrate. By using a resist pattern used for forming an IDT electrode, the first insulating layer in which the IDT electrode is to be formed is removed. An electrode film made of a metal having a density higher than Al or an alloy primarily including such a metal is disposed in the area in which the first insulating layer is removed so as to form the IDT electrode. The resist pattern remaining on the first insulating layer is removed. A second insulating layer is formed to cover the first insulating layer and the IDT electrode.
    Type: Grant
    Filed: May 3, 2007
    Date of Patent: September 2, 2008
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kenji Nishiyama, Takeshi Nakao, Michio Kadota
  • Patent number: 7401405
    Abstract: A method of fabricating a plurality of inkjet nozzles on a substrate, each nozzle comprising a nozzle chamber having a roof spaced apart from said substrate and sidewalls extending from said roof to said substrate, said chamber having an entrance for receiving ink from at least one ink inlet defined in said substrate, said at least one ink inlet having at least one priming feature extending from a respective rim thereof, said method comprising the steps of: (a) providing a substrate having a plurality of trenches corresponding to said ink inlets; (b) depositing sacrificial material on said substrate so as fill said trenches and form a scaffold on said substrate; (c) defining openings in said sacrificial material, said openings being positioned to form said chamber sidewalls and said at least one priming feature when filled with roof material; (d) depositing roof material over said sacrificial material to form simultaneously said nozzle chambers and said at least one priming feature; (e) etching nozzle aper
    Type: Grant
    Filed: October 11, 2005
    Date of Patent: July 22, 2008
    Assignee: Silverbrook Research Pty Ltd
    Inventor: Kia Silverbrook
  • Patent number: 7392583
    Abstract: Tooling fixtures and methods are described for securing a solid-matrix panel for cutting. In one embodiment, a tooling fixture includes a first clamping system and a second clamping system. The first clamping system receives a solid-matrix panel of PCBs and secures the solid-matrix panel for cutting of the solid-matrix panel along a first axis. Once secured, a cutting apparatus cuts the solid-matrix panel along the first axis between the PCBs to cut the solid-matrix panel into a plurality of strips. The second clamping system then moves into a position relative to the strips of the solid-matrix panel and secures the strips for cutting of the strips along a second axis. When secured by the second clamping system, the cutting apparatus cuts the individual PCBs from the strips.
    Type: Grant
    Filed: November 10, 2004
    Date of Patent: July 1, 2008
    Inventors: Bob Allen Williams, Kurt John Hill, Allen W. Duck, Carl Raymond Byers, Travis Wayne Groves, Dion Joe Casto
  • Patent number: 7383630
    Abstract: A method for making a circuit plate includes: forming first holes in an insulating layer; forming a conductive layer on the insulating layer such that a portion of the conductive layer fills the first holes; grinding the conductive layer such that the portion of the conductive layer remains in the first holes to form a pattern of conductive traces; forming a dielectric protective layer that covers the insulating layer and the conductive traces; forming a pattern of second holes in the protective layer such that a portion of each of the conductive traces is accessible through a respective one of the second holes; and forming conductive bumps that are respectively connected to the conductive traces.
    Type: Grant
    Filed: June 24, 2005
    Date of Patent: June 10, 2008
    Inventor: Yu-Nung Shen
  • Patent number: 7383628
    Abstract: Disclosed is a punch tool which is used to create apertures at any desired location in a raceway duct. The punch tool has two opposed jaws. A first jaw has an angularly-truncated tubular blade. The other jaw has a tube-shaped blade receiving device which receives the blade when it cuts through the wall. The use of this tool with the methods of the present invention enables the user to make cable drops at any position along the duct in order to reach computing equipment below.
    Type: Grant
    Filed: November 18, 2004
    Date of Patent: June 10, 2008
    Assignee: Sprint Communications Company L.P.
    Inventors: Dough Robinett, Todd Daugherty
  • Patent number: 7370396
    Abstract: An electronic component includes a substrate; a piezoelectric material layer supported directly or indirectly by the substrate; a first electrode arranged on a surface of the piezoelectric material layer on an opposite side of the substrate; and a second electrode arranged on a surface of the piezoelectric material layer on the substrate side. The piezoelectric material layer is sandwiched between the first electrode and the second electrode. The first electrode has a smaller surface area than the piezoelectric material layer. A portion where the piezoelectric material layer is exposed from the first electrode includes a portion that is thinner than a thickness of the piezoelectric material layer between the first electrode and the second electrode.
    Type: Grant
    Filed: November 28, 2006
    Date of Patent: May 13, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Akihiko Namba, Keiji Onishi, Katsu Takeda
  • Patent number: 7353592
    Abstract: Method for fabricating a textured dielectric substrate (400) for an RF circuit. The method can include the step (104) of selecting a plurality of dielectric substrate materials, each having a distinct combination or set of electrical properties that is different from the combination of electrical properties of every other one of dielectric substrate materials. Selecting a textured substrate patter (106) which is comprised of at least two types of distinct areas respectively having the distinct sets of electrical properties, with each distinct area dimensioned much smaller than a wavelength at a frequency of interest. Cutting the dielectric substrate materials (202, 204) into a size and shape consistent with the distinct areas of the selected pattern so as to form a plurality of dielectric pieces (206, 208). Arranging the dielectric pieces on a base plate (302) in accordance with the selected pattern to form the textured dielectric substrate.
    Type: Grant
    Filed: January 11, 2007
    Date of Patent: April 8, 2008
    Assignee: Harris Corporation
    Inventors: Dennis Tebbe, Thomas Smyth, Terry Provo, Dara Ruggiero
  • Patent number: 7340831
    Abstract: A method for making a liquid discharge head including liquid discharge openings, a liquid channel having pressure chambers communicating with the liquid discharge openings, and piezoelectric elements corresponding to the pressure chambers and arranged in the form of teeth of a comb includes the steps of filling gaps between the piezoelectric elements with a filler; forming a liquid channel pattern on a flat surface including the end faces of the piezoelectric elements and the filler filling the gaps between the piezoelectric elements; forming a coating layer on the liquid channel pattern; and removing the liquid channel pattern to form the pressure chambers.
    Type: Grant
    Filed: July 12, 2004
    Date of Patent: March 11, 2008
    Assignee: Canon Kabushiki Kaisha
    Inventors: Nobuhito Yamaguchi, Akihiro Mouri
  • Patent number: 7322104
    Abstract: An ink jet head includes a substrate having a flow path construction member constructing a plurality of discharge ports for discharging ink and a plurality of ink flow paths corresponding thereto, and a plurality of energy generating elements corresponding to the plurality of discharge ports. The substrate has an ink supply port for supplying ink to the ink flow paths. The ink supply port includes a first liquid chamber disposed on a plane on which the energy generating elements are formed, and having a grooves with island-shaped columns left, and a second liquid chamber disposed on the opposed plane, and having a plurality of through holes partitioned at positions corresponding to the island-shaped columns. In the ink jet head, the island-shaped columns and a partition wall for the through holes are left as a beam construction section, thereby improving a mechanical strength of a semiconductor substrate.
    Type: Grant
    Filed: June 21, 2005
    Date of Patent: January 29, 2008
    Assignee: Canon Kabushiki Kaisha
    Inventors: Shuji Koyama, Shingo Nagata, Kenji Fujii, Masaki Osumi, Jun Yamamuro
  • Patent number: 7299529
    Abstract: A process comprising, in a vacuum, depositing a bottom electrode layer and a piezoelectric layer over a cavity in a substrate, the cavity being filled with a sacrificial material, patterning and etching the piezoelectric layer and the bottom electrode layer to expose one or more edges of the bottom electrode layer and the piezoelectric layer, treating some or all of the one or more edges to prevent electrical contact between the bottom electrode layer and a top electrode layer, and depositing and etching the top electrode layer.
    Type: Grant
    Filed: June 16, 2005
    Date of Patent: November 27, 2007
    Assignee: Intel Corporation
    Inventors: Eyal Ginsburg, Dora Etgar-Diamant, Li-Peng Wang
  • Patent number: 7288722
    Abstract: An electronic part mounting structure includes a printed circuit board, a plurality of electronic parts mounted on the printed circuit board, a folded portion of the printed circuit board bent and layered between the electronic parts, through holes formed in both sides of the folded portion, and a wiring connecting the electronic parts via the through holes and connecting the electronic parts to the through holes.
    Type: Grant
    Filed: February 4, 2005
    Date of Patent: October 30, 2007
    Assignee: Fujitsu Limited
    Inventor: Shunji Baba
  • Patent number: 7288739
    Abstract: A method of forming an opening or cavity in a substrate, for receiving an electronic component, consists of or includes providing a patterned opaque masking layer on or adjacent a first major surface of the substrate, the masking layer having an opening overlying the position where the cavity is to be made, removing material from the substrate by laser ablation through the opening thereby forming an opening or cavity of a suitable size for receiving said electronic component.
    Type: Grant
    Filed: March 2, 2005
    Date of Patent: October 30, 2007
    Assignee: STS ATL Corporation
    Inventor: John Gregory
  • Patent number: 7269897
    Abstract: A manufacturing process of a stacked semiconductor device, comprising the following steps: integrating a plurality of electronic devices in a plurality of active areas realized in a semiconductor wafer; distributing an adhesive layer on active areas, splitting the semiconductor wafer into a plurality of first dies, each one comprising at least one of the active areas; mounting the plurality of first dies, which are already equipped with the adhesive layer, on a support; and mounting a plurality of second dies on the adhesive layer.
    Type: Grant
    Filed: December 23, 2003
    Date of Patent: September 18, 2007
    Assignee: STMicroelectronics S.r.l.
    Inventor: Giovanni Frezza
  • Patent number: 7260888
    Abstract: A keypad assembly including a substrate, a metal layer, a patterned light-shielding layer, a light-transparent material layer and a keypad circuit module is provided. Said substrate has a first surface and a second surface and the metal layer is disposed on the first surface of the substrate. In addition, the patterned light-shielding layer is disposed on the metal layer to define a light-transparent area and a light-shielding area, wherein the patterned light-shielding layer corresponds to the light-transparent area. In the meantime, the light-transparent material layer is disposed on the second surface of the substrate and corresponds to the light-transparent area. Further, the keypad circuit module is disposed on the patterned light-shielding layer.
    Type: Grant
    Filed: November 7, 2005
    Date of Patent: August 28, 2007
    Assignee: Speed Tech Corp.
    Inventors: Ming-Yuan Hsu, Dean-Kuo Liu
  • Patent number: 7254890
    Abstract: A method of making a micro-fluid ejection head structure for a micro-fluid ejection device. The method includes applying a removable mandrel material to a semiconductor substrate wafer containing fluid ejection actuators on a device surface thereof. The mandrel material is shaped to provide fluid chamber and fluid channel locations on the substrate wafer. A micro machinable material is applied to the shaped mandrel and the device surface of the wafer to provide a nozzle plate and flow feature layer on the shaped mandrel and wafer. A plurality of nozzle holes are formed in the nozzle plate and flow feature layer. The shaped mandrel material is then removed from the device surface of the substrate wafer to provide fluid chambers and fluid channels in the nozzle plate and flow feature layer.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: August 14, 2007
    Assignee: Lexmark International, Inc.
    Inventors: Johnathan L. Barnes, Craig M. Bertelsen, Brian C. Hart, Gary R. Williams, Sean T. Weaver, Girish S. Patil
  • Patent number: 7254888
    Abstract: A method of fabricating a heat sink includes preparing a surface of a graphite-based substrate and removing particulate matter generated from the preparation of the surface of the substrate. A metal-based coating is applied at the surface of the prepared substrate. The prepared substrate having the metal-based coating is arranged to form a heat sink structure.
    Type: Grant
    Filed: April 7, 2005
    Date of Patent: August 14, 2007
    Assignee: International Business Machines Corporation
    Inventors: Richard C. Chu, Michael J. Ellsworth, Jr., Egidio Marotta, Prabjit Singh
  • Patent number: 7251872
    Abstract: A chip package is formed which has an array of leads, wherein successive leads are staggered in all three dimensions (X, Y, and Z) relative to one another to permit a large number of leads available in a confined space while maintaining the minimum separation necessary between adjacent leads. The leads are formed by placing asymmetric top and bottom masks on a lead frame, and partially etching the top of the lead frame, while partially and over etching the bottom of the lead frame. Although the resulting leads are staggered in three dimensions, no additional processing steps are needed beyond those used to fabricate conventional packages.
    Type: Grant
    Filed: August 16, 2004
    Date of Patent: August 7, 2007
    Assignee: International Business Machines Corporation
    Inventors: Elie Awad, Paul J. Panaccione
  • Patent number: 7246431
    Abstract: A microelectronic package is fabricated by a process which includes folding a substrate. A substrate is folded by engaging a folding portion of the substrate with a die so that the folding portion pivots with respect to a first portion of the substrate.
    Type: Grant
    Filed: September 3, 2003
    Date of Patent: July 24, 2007
    Assignee: Tessera, Inc.
    Inventors: Kyong-Mo Bang, Teck-Gyu Kang
  • Patent number: 7240433
    Abstract: A method for fabricating a thermal inkjet head equipped with a symmetrical heater and the head fabricated by the method are provided. The method incorporates two thick photoresist deposition processes and a nickel electroplating process. The first thick photoresist deposition process is carried out to form an ink chamber in fluid communication with a funnel-shaped manifold and an injector orifice. The second thick photoresist deposition process forms a mold for forming an injector passageway that leads to the injector orifice. The nickel electroplating process provides an orifice plate on top of the inkjet head through which an injector passageway that leads to the injector orifice is provided for injecting ink droplets.
    Type: Grant
    Filed: August 11, 2005
    Date of Patent: July 10, 2007
    Assignee: Industrial Technology Research Institute
    Inventors: Chen-Kuei Chung, Chun-Jun Lin, Chung-Chu Chen
  • Patent number: 7237319
    Abstract: First, a sheet member which is being unwound and conveyed from a winding body, and in which a conductive film is stuck on a support sheet, is stamped in such a shape that a coil portion, a frame portion defined around the coil portion, and a joining portion connecting the coil portion to the frame portion are left unstamped. Next, a protective sheet which is made sticky, is stuck onto a surface of the stamped structure where the conductive film is stuck, and then the support sheet is peeled off. Next, an insulative support sheet which is being unwound and conveyed from a winding body, is stuck onto a surface of the structure with the protective sheet stuck thereon where the stamped conductive film is stuck, and then the protective sheet is peeled off.
    Type: Grant
    Filed: April 28, 2004
    Date of Patent: July 3, 2007
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Tetsuichiro Kasahara, Hitoshi Yoshikawa
  • Patent number: 7228622
    Abstract: A method and machine-readable medium are described for a flexible tape constructed of a material suitable to convey electronic devices through an entire manufacturing process without removing the electronic packages from the tape. According to one embodiment, part receiving areas are located within the tape. Each part receiving area is suitable to hold an electronic device. A retention channel encompasses each part receiving area. The retention channel extends substantially an entire length along each edge of each part receiving area. The retention channel comprises an upper tab and a lower tab wherein the upper tab is flush with an upper surface of the flexible tape and extends into the part receiving area and the lower tab extends below a lower surface of the flexible tape and into the part receiving area.
    Type: Grant
    Filed: August 11, 2004
    Date of Patent: June 12, 2007
    Assignee: Intel Corporation
    Inventor: Jeffrey Watson
  • Patent number: 7223316
    Abstract: A method for manufacturing an electronic component includes the steps of inserting tabs of a cover into through holes formed in a circuit board having mounting elements on the front surface thereof, disposing a print mask having openings at positions corresponding to the through holes on the back surface of the circuit board, and supplying solder cream to the through holes through the openings by placing the solder cream on the print mask and moving the solder cream in a predetermined direction with a squeegee. The print mask is provided with projections which project upstream in the moving direction of the solder cream in openings of the print mask, and the openings are shifted upstream in the moving direction of the solder cream. In addition, the tabs are inserted into the through holes such that the width direction of the tabs is along the moving direction of the solder cream.
    Type: Grant
    Filed: January 13, 2004
    Date of Patent: May 29, 2007
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Tomohiko Murase
  • Patent number: 7207107
    Abstract: A method and apparatus for through-contacting flexible substrates 1, in particular circuit boards, having electrically conductive contact zones 4, 41 present on two opposing surfaces 1a, 1b of the substrate provides that a cut 11 is produced obliquely to the surfaces of the substrate in the area of the contact zones, and the two substrate areas 20, 30 adjoining the oblique cut are moved past each other until they lock behind each other. Moving them past each other is effected by a ram 12, by the action of compressed air 13, by applying a vacuum 14 or by a driving hook 15 fixed to the cutting tool. The two steps of producing the cut and moving the two substrate areas adjoining the cut past each other are effected in a common processing station, preferably in a single operation.
    Type: Grant
    Filed: November 14, 2002
    Date of Patent: April 24, 2007
    Assignee: Giesecke & Devrient GmbH
    Inventors: Juergen Usner, Ando Welling
  • Patent number: 7200924
    Abstract: A method of fabricating electronic parts includes the steps of: mounting electronic elements in regular cavities that are two-dimensionally arranged on a baseboard on which dummy cavities are provided so as to surround the regular cavities, and covering a top of the baseboard with a resin sheet.
    Type: Grant
    Filed: February 13, 2004
    Date of Patent: April 10, 2007
    Assignee: Fujitsu Media Devices Limited
    Inventor: Shingo Masuko
  • Patent number: 7185425
    Abstract: By forming a terminal at a tip of a lead part of a lead frame, and by fixing this terminal and a connecting pad which was formed on an upper surface of a first printed circuit board, the lead frame is attached to the first printed circuit board. By cutting off a frame part and a tie bar part from the lead frame which was attached to the first printed circuit board, the lead part is separated, and forming is applied to the lead part so as for its tip to be extended over the first printed board. After the lead part which is expanded upward is inserted into a through-hole which was opened in a second printed circuit board, by soldering the lead part and the through-hole, the first printed circuit board and the second printed circuit board are electrically connected.
    Type: Grant
    Filed: October 9, 2003
    Date of Patent: March 6, 2007
    Assignees: Fujitsu Ten Limited, Toyota Jidosha Kabushiki Kaisha
    Inventors: Takashi Ohta, Kazuaki Yamada, Kiyoshi Tsujii, Hidekazu Manabe
  • Patent number: 7181834
    Abstract: Method for fabricating a textured dielectric substrate (400) for an RF circuit. The method can include the step (104) of selecting a plurality of dielectric substrate materials, each having a distinct combination or set of electrical properties that is different from the combination of electrical properties of every other one of dielectric substrate materials. Selecting a textured substrate pattern (106) which is comprised of at least two types of distinct areas respectively having the distinct sets of electrical properties, with each distinct area dimensioned much smaller than a wavelength at a frequency of interest. Cutting the dielectric substrate materials (202, 204) into a size and shape consistent with the distinct areas of the selected pattern so as to form a plurality of dielectric pieces (206, 208). Arranging the dielectric pieces on a base plate (302) in accordance with the selected pattern to form the textured dielectric substrate.
    Type: Grant
    Filed: October 27, 2003
    Date of Patent: February 27, 2007
    Assignee: Harris Corporation
    Inventors: Dennis Tebbe, Thomas Smyth, Terry Provo, Dara Ruggiero
  • Patent number: 7178230
    Abstract: An electrical connector having a seamless metal housing and a method for manufacturing the same. The electrical connector includes a plastic base and a metal housing. The housing shields a connection portion of the plastic base and is integrally formed with a top surface and a plurality of circumferential surfaces to define a chamber having an opened bottom end. At least one surface among the circumferential surfaces and the top surface is formed with an opening to expose the connection portion of the plastic base. No seam is formed between any adjacent two surfaces among the top surface and the circumferential surfaces.
    Type: Grant
    Filed: February 7, 2005
    Date of Patent: February 20, 2007
    Inventor: Chou Hsuan Tsai
  • Patent number: 7152289
    Abstract: A method for forming a device on a substrate of <110> silicon includes forming a first conductive layer onto the substrate, and forming a piezoelectric layer on the first portion of a first conductive layer. A second electrode is formed on the piezoelectric layer, and a backside portion of the substrate under the piezoelectric layer and the first conductive layer is removed using a crystal orientated dependent etch.
    Type: Grant
    Filed: September 25, 2002
    Date of Patent: December 26, 2006
    Assignee: Intel Corporation
    Inventors: Li-Peng Wang, Qing Ma, Israel Yankovich
  • Patent number: 7146695
    Abstract: A surface acoustic wave device has superior electrical power resistance that is obtained by improving stress migration resistance of electrodes. In order to form at least one electrode, for example, on a ? rotation Y-cut (?=36° to 42°) LiTaO3 piezoelectric substrate, an underlying electrode layer including Ti or Cr as a primary component is formed, and an Al electrode layer including Al as a primary component is then formed on this underlying electrode layer. The Al electrode layer is an oriented film grown by epitaxial growth and is also a polycrystalline thin film having a twin structure in which a diffraction pattern observed in an X-ray diffraction pole figure has a plurality of symmetry centers.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: December 12, 2006
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Osamu Nakagawara, Masahiko Saeki, Kazuhiro Inoue
  • Patent number: 7143504
    Abstract: A method of manufacturing a display structure includes the steps of arranging at least a display area, an extension area, and an IC mounting area on a display substrate, connecting a flexible tape substrate to the extension area of the display substrate, separating a part of the display substrate by cutting at a cutting portion which is a part under the flexible tape substrate on the extension area of the display substrate, and disposing a cutting substrate which is the separated part, on a back side which is opposite to a side where a display is mounted, of the display substrate.
    Type: Grant
    Filed: October 6, 2003
    Date of Patent: December 5, 2006
    Assignee: Seiko Epson Corporation
    Inventor: Shuichi Tanaka
  • Patent number: 7143487
    Abstract: A matrix type ultrasonic probe is disclosed, which has a backing material, and a plurality of piezoelectric elements having upper and lower face electrodes, respectively, and arrayed in two-dimensional directions on the backing material. The ultrasonic probe further has first mounts provided for every piezoelectric element and fixedly secured to the backing material, signal lines provided for every piezoelectric element and embedded in the backing material to be exposed on the surface of the respective first mounts, and second mounts provided for every piezoelectric element to be fixedly secured to the lower face of the piezoelectric element and formed therein with through-holes. The first and second mounts are fixedly secured to one another by means of conductive adhesive, and the signal lines and the lower face electrodes are electrically connected to one another by means of the conductive adhesive.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: December 5, 2006
    Assignee: Nihon Denpa Kogyo Co., Ltd.
    Inventors: Manabu Kikuchi, Yoshihiro Tahara