Abstract: Some embodiments include apparatus and methods having a node to provide a signal, and a control unit arranged to control a value of an output voltage at an output node on an output path based on a duty cycle of the signal and a value of an input voltage. The control unit can also be arranged to cause a change in a resistance on the output path in order to determine a value of a current on the output path based at least on the change in the resistance.

Abstract: A controller used in a multi-phase switching converter, including: a bias current generator that generates a plurality of bias current signals; a temperature balance modulating circuit that generates a plurality of on time signals based on the plurality of the bias current signals; and a logic circuit that generates a plurality of control signals based on the plurality of on time signals. The plurality of the control signals is used to control a plurality of switching circuits of the multi-phase switching converter.

Abstract: Compensation capacitor voltages of DC-to-DC converters are pre-set without switching to enable smooth transition from sleep mode to active mode. Appropriate compensation capacitor voltages are set regardless of the length of no-switching sleep period or input voltage change. Therefore the converter can always start with appropriate error amplifier and duty conditions, and avoid output voltage disturbance when the PWM control loop takes over in active mode the control of buck converter. The appropriate capacitor voltages are enabled by creating a local PWM feedback loop of a PWM control loop without enabling the output stage. This local PWM feedback loop works intermittently and always sets the appropriate voltage for the error amplifier and compensation capacitor.

Abstract: A voltage converter can be switched among two or more modes to produce an output voltage tracking a reference voltage that can be of an intermediate level between discrete levels corresponding to the modes. One or more voltages generated from a power supply voltage, such as a battery voltage, can be compared with the reference voltage to determine whether to adjust the mode. The reference voltage can be independent of the power supply voltage.

Abstract: A voltage converter including a constant turned-on time signal generator, a first transistor, a second transistor, an inductor, a ripple signal compensator, and a ripple injection circuit is provided. The ripple signal compensator is coupled to an output terminal of the voltage converter and a second terminal of the first transistor, and generates an adjusted ripple signal according to a switching voltage on a second terminal of the first transistor and an output signal of the voltage converter. The ripple rejection circuit generates a ripple injection signal according to the adjusted ripple signal. Wherein, the constant turned-on time signal generator generates a first and second driving signals for respectively driving the first and second transistors according to the ripple injection signal.

Abstract: A switching regulator includes a load determination circuit. The load determination circuit feeds, to an offset voltage generation circuit, a different load determination signal at the time of light load or at the time of heavy load. The offset voltage generation circuit applies an offset voltage corresponding to whether a load is light or heavy to the inverting input terminal of a PWM comparator to acquire the responsiveness and the stability of the switching regulator.

Abstract: An apparatus and method for a voltage reference circuit and oscillator which operates for a low voltage power supply. The voltage reference circuit is used in an “always on” mode of operation, and have low power usage. The operational range is 1.1V to 3.6 V, and must allow for sub-bandgap voltage conditions as well as voltage tolerant for higher voltages. The circuit minimizes the number of current branches by avoiding complexity of operational amplifiers and comparator networks. The circuit avoids stacking of more than 2 devices to allow for low voltage operation.

Abstract: Apparatuses and methods for providing output power are disclosed. In an example method, a control signal is received at an output stage. The control signal may be provided by a control circuit. The method further includes providing a first power to a filter responsive to the received control signal having a first value, and providing a second power to the filter responsive to the received control signal having a second value. The method further includes decoupling the first power and second power from the filter responsive to the received control signal having a third value.

Abstract: The present invention discloses a voltage conversion apparatus and a power-ON reset (POR) circuit and a control method thereof. The voltage conversion apparatus includes: a conversion circuit, an input status detection circuit, an output status detection circuit, a status feedback circuit, and a POR circuit. The POR circuit generates a POR signal according to an input status signal, an output status signal, and a feedback signal, to indicate whether a POR procedure is completed. The POR circuit includes: a logic circuit, for generating a reset signal indicating whether both the input and output voltages are ready; and a delay circuit, for generating the POR signal by delaying a predetermined time period according to the reset signal and a feedback signal related to the POR signal.

Abstract: A current mode control buck-boost converter with improved performance utilizes separate buck and boost pulses. The buck-boost converter utilizes a buck/boost decision method with continuous control voltage for buck and boost mode, therefore eliminating transients in the control loop between operation modes and preventing voltage overshoots. If switching in Boost mode and the buck duty cycle is smaller than a set duty cycle, then in the next cycle Buck mode switching will occur. It is possible to track a Buck comparator output and the related duty cycle during Boost mode operation. Thus a mode change decision will only be dependent on a single input. A control loop will incorporate a single loop filter and error amplifier, wherein control voltages for Buck comparator and Boost comparator will be related.

Abstract: A buck converting controller, adapted to control a DC-DC buck converting circuit to convert an input voltage into an output voltage, is disclosed. The buck converting controller comprises a feedback control circuit, an off-time determination circuit and a load control circuit. The feedback control circuit turns on and off a high-side transistor and a low-side transistor of the DC-DC buck converting circuit in response to a feedback signal indicative of the output voltage. The off-time determination circuit determines a preset off-time period according to the input voltage and the output voltage and generates an off notice signal according to the preset off-time period. The load control circuit is coupled to the DC-DC buck converting circuit and determines whether to release an electronic energy stored in the DC-DC buck converting circuit according to the off notice signal.

Abstract: A power circuit, control method, power system, and package structure of power circuit are disclosed. The power circuit includes a quasi-cascade power unit. The quasi-cascade power unit includes a normally-on switch, normally-off switch, control unit, first switch unit and second switch unit. The normally-off switch is electrically connected to the normally-on switch in series. The first end and the third end of the control unit are electrically connected to the control end of the normally-off switch and the control end of the normally-on switch, respectively. The first end and the second end of the first switch unit are electrically connected to the control end of the normally-on switch and the second end of the normally-off switch, respectively. The first end and the control end of the second switch unit are electrically connected to the second end of the control unit and the second end of the normally-on switch, respectively.

Abstract: A system for managing changes in current demand, including one or more processors, a memory coupled to at least one of the processors, a clock generation circuit coupled to the memory and configured to output a clock, one or more functional blocks, a power supply, configured to output a plurality of voltage levels, and a power management unit. The power management unit may be configured to set the power supply output to a first voltage level and then detect indications of an impending change in current demand within the SoC. If an indication of an impending change in current demand is detected, then the power management unit may be configured to adjust the power supply output to a second voltage level. After determining the impending change in current demand has occurred, the power management unit may be configured to adjust the power supply output back to the first voltage level.

Abstract: The invention relates to a switched mode power supply comprising at least one switch and at least one inductor, the at least one switch being arranged to connect one terminal of the at least one inductor to one of a plurality of supply voltages, the other terminal of the at least one inductor providing a supply output, and further comprising a capacitor connected in parallel with the at least one inductor.

Abstract: An electronic component includes a switching device comprising a source, a gate, and a drain, the switching device having a predetermined device switching rate. The electronic component further includes a gate driver electrically connected to the gate and coupled between the source and the gate of the switching device, the gate driver configured to switch a gate voltage of the switching device at a gate driver switching rate. The gate driver is configured such that in operation, an output current of the gate driver cannot exceed a first current level, wherein the first current level is sufficiently small to provide a switching rate of the switching device in operation to be less than the predetermined device switching rate.

Abstract: A voltage converting device includes a feedback module, for generating a comparing signal according to a feedback voltage and a reference voltage; a pulse-width-modulation module, for generating a driving signal according to comparing signal; a voltage-converting module including a low-side switch for controlling a connection between a node and ground according to driving signal, a high-side switch for controlling a connection between the node and an output end according to a control signal, an inductor coupled between the node and an input end, a feedback-voltage-generating unit for generating feedback voltage according to an output voltage of output end and a ratio, an adaptive current-generating unit for generating a current signal according to an adjusting signal, and a control unit for selecting driving signal or current signal as the control signal according to output voltage and an input voltage; and a current-adjusting module for generating adjusting signal according to comparing signal.

Abstract: A hold-up circuit coupled to a first node to receive an input voltage and to provide a hold-up voltage includes an inductor, a constant on-time buck-boost control circuit configured to drive a high-side power switch and a low-side power switch to operate in a buck mode and a boost mode of operation, and an energy storage capacitor. When the input voltage is greater than a predetermined threshold, the buck-boost control circuit is configured to drive the power switches in the boost mode to charge the capacitor to a capacitor voltage greater than the input voltage. When the input voltage is less than the predetermined threshold, the buck-boost control circuit is configured to drive the power switches in the buck mode to supply the energy stored on the capacitor to the inductor to provide a regulated voltage less than the capacitor voltage as the hold-up voltage to the first node.

Abstract: According to one embodiment, a system is provided that includes at least one power gated component and two or more power switch transistors configured to provide one or more conductive paths between a common power supply rail, the at least one power gated component, and a ground. The two or more power switch transistors each include a source terminal, a drain terminal, and a gate terminal configured to control current flow between the source and drain terminals. The system also includes a rotating voltage control coupled to the gate terminals and configured to apply a sequence of control signals rotating between an on-state and an off-state to each of the gate terminals while the at least one power gated component is turned on. A switch activation ratio level is programmable to set a number of power switch transistors in the on-state relative to a total number of power switch transistors.

Abstract: A switch mode power supply having an output terminal configured to provide an output voltage which is regulated to an output target, the switch mode power supply has a first switch and a control circuit. When the output voltage increases to a first threshold voltage, the control circuit is configured to turn OFF the first switch until a time period expires.

Abstract: An apparatus such as a level shift circuit includes a first signal output device configured to output a first level shifting signal, a second signal output device configured to output a second level shifting signal, and first and second detector devices. The level shifting signals are to control an output switching element of a high potential side of an output device that includes a power source and a load. The first and second detector devices are respectively configured to compare the first and second level shifting signals to a reference signal and output respective first and second comparison result signals. The first and second comparison result signals are configured to at least partly control switching of the first and second level shifting signals based at least in part on the presence of a parasitic resistance.

Abstract: The present disclosure includes systems and methods for 100% duty cycle in switching regulators. A switching regulator circuit includes a ramp generator to produce a ramp signal having a period and a comparator to receive the ramp signal and an error signal, and in accordance therewith, produce a modulation signal. In a first mode of operation, the ramp signal increases to intersect the error signal, and in accordance therewith, changes a state of a switching transistor during each period of the ramp signal. In a second mode of operation, the error signal increase above a maximum value of the ramp signal, and in accordance therewith, the switching transistor is turned on for one or more full periods of the ramp signal.

Abstract: A voltage converting controller is applied to a switching voltage converting circuit, in which the voltage converting controller periodically operates a high-side power switch and a low-side power switch in the switching voltage converting circuit with a high-side control signal and a low-side control signal, respectively, so as to convert an input voltage into an output voltage via an inductor. Defining an ideal duty cycle as the rating value of the output voltage divided by the value of the input voltage, when the ideal duty cycle is less than one threshold duty cycle, then the period of the high-side control signal is a constant; and when the ideal duty cycle is greater than the threshold duty cycle, the period of the high-side control signal and the period of the ideal duty cycle are positively correlated.

Abstract: There is provided a regulator circuit capable of increasing the capacity of the output transistor for supplying current, stably generating an internal power supply voltage and adapting to the reduction of a power supply voltage. The regulator circuit includes an output transistor which is supplied with an external power supply voltage and supplies dropped voltage to an internal circuit, a differential amplifier for outputting a gate potential applied to the gate of the output transistor, a reference voltage generating circuit for supplying a reference voltage to the differential amplifier, and a cut-off transistor for turning off the output transistor to stop supplying power to the internal circuit. The output transistor is comprised of a depression NMOS transistor whose threshold voltage is a negative voltage. The regulator circuit further includes substrate potential control means for controlling the substrate potential of the depression NMOS transistor.

Abstract: A constant on time control circuit, configured to control a converting circuit to transform an input voltage into a stable output voltage, is disclosed. The constant on time control circuit comprises a comparing circuit and a logic circuit. The comparing circuit compares a reference signal and a voltage signal indicative of the output voltage and accordingly outputs a compared result signal. The logic circuit periodically controls the converting circuit to perform voltage transformation and makes a time period of a duty cycle in every cycle being substantially constant. A start point in time of every cycle is determined according to the compared result signal. The comparing circuit comprises a differential pair, a base current source and an extra current source. The base current source provides a bias current to the differential pair. The extra current source provides a substantial ramp current to one channel in the differential pair.

Abstract: An integrated circuit for converting a high voltage level to a low voltage level comprises a high side driver, a low side driver electrically coupled with the high side driver, a circuit electrically coupled with the high side driver and a first node between the high side driver and the low side driver, and a false signal filter electrically coupled with the circuit. The circuit is configured to substantially turn off the high side driver if the high side driver leaves a cutoff region of the high side driver during a tri-state mode. The false signal filter is configured to screen signals that are outside of the tri-state mode.

Abstract: A controller for use in a power converter includes a drive circuit coupled to generate a drive signal to control switching of a power switch to control a transfer of energy from a power converter input to a power converter output. The controller also includes an input for receiving an enable signal including enable events responsive to the power converter output. The drive circuit is coupled to turn ON the power switch in response to the enable events and turn OFF the power switch in response to a power switch current reaching a current limit threshold. A current limit threshold generator is coupled to receive the drive signal from the enable events of the enable signal. The current limit threshold may be a ramp signal and the ramp signal along with the time between enable events may be used to modulate the drive signal.

Abstract: An electronic control device includes a turn-on restriction section capable of performing a restriction operation to restrict a turn-on speed of a switching element. The turn-on restriction section includes a comparator. The comparator receives a voltage of a main terminal of the switching element connected to a smoothing circuit and determines whether the voltage of the main terminal of the switching element reaches a threshold voltage. The turn-on restriction section performs the restriction operation for a predetermined time from a start of a turn-on period in which the switching element is turned on. The turn-on restriction section stops the restriction operation after the predetermined time has elapsed. The predetermined time is set to a time from the start of the turn-on period until the voltage of the main terminal of the switching element reaches the threshold voltage.

Abstract: Systems and methods are disclosed to control a buck converter with a first switching circuit including a first upper power transistor coupled to a first lower power transistor at a first junction; a second upper power transistor coupled to a second lower power transistor at a second junction; an inductor coupled to the first and second junctions; and a load coupled to the second junction.

Abstract: A DC-DC converter according to the present invention includes a power supply control circuit—that generates pulse signals, an output transistor that is controlled to be turned on and off based on the pulse signal, a rectification transistor—that is controlled to be turned on and of based on a control signal, a coil provided between a node between the output transistor and the rectification transistor, and an external output terminal, a comparator that compares a voltage of the node—with a reference voltage, a first control circuit that generates a control signal based on a comparison result of the comparator, and a second control circuit that generates the control signal based on a backward-current detection timing and a reference timing.

Abstract: A motor drive apparatus comprises: a position signal generation portion that generates a position signal corresponding to a rotor position of a brushless DC motor; and a logic portion that when starting the brushless DC motor, disposes a non-energizing period immediately after starting forced commutation at a phase switchover timing corresponding to a predetermined forced commutation frequency and performs energizing control of the brushless DC motor such that usual commutation is started at a phase switchover timing corresponding to the position signal that is generated during an inertial rotation of the rotor.

Abstract: The present application discloses various implementations of a power management unit (PMU) suitable for use in a mobile device. In one exemplary implementation, such a PMU includes a gain control block configured to control an oscillator coupled to the PMU. The gain control block is further configured to control a clock output stage of the PMU. The PMU also includes a signal protection circuit coupled to an input of the gain control block. The signal protection circuit is configured to preserve clock signals produced by the clock output stage during a transition to a standby mode.

Abstract: A voltage regulation apparatus comprises a plurality of individually switchable current sources coupled to an output for coupling the voltage regulation apparatus to an external load. The output is monitored using a bridge divider and a comparator. The bridge divider generates a feedback voltage, that is compared with a reference voltage, representative of a target voltage to be maintained at the output, when loaded. A digital sequencer unit is coupled to the comparator and responds to the comparator to increase or decrease a number of the plurality of individually switchable current sources activated, thereby causing a collective current generated by the activated number of the plurality of individually switchable current sources to converge on a load current, demanded by the external load.

Abstract: A power transforming apparatus implements a transformation of an energy signal and comprises a control unit, a pulse width modulation (PWM) unit, a transformation unit, and a slope compensation unit. The control unit outputs a target power signal. The PWM unit is coupled with the control unit and generates a switch signal. The transformation unit is coupled with the PWM unit, and implements a power transforming of the energy signal to output an energy transformation signal according to the switch signal. The slope compensation unit is coupled with the control unit and the PWM unit, and implements a slope compensation, according to the target power signal and a feedback signal, to output a compensation signal to the PWM unit. The switch signal is generated according to the target power signal and the compensation signal.

Abstract: A power generator includes a booster that boosts an input voltage supplied from a power supply unit and that supplies a boosted input voltage to an output terminal, a selector that selects one of the input voltage and a voltage at the output terminal as a selected voltage and supplies the selected voltage as an output voltage, a reference voltage generator that generates a reference voltage based on the output voltage, a comparator that compares a feedback voltage supplied from the booster and the reference voltage with each other, and a controller that controls the booster to output a chosen voltage from the output terminal according to a comparison result of the comparator.

Abstract: A method for regulating a clocked buck/boost converter, wherein a buck converter switching element is driven at a common clock frequency with a first pulse-width-modulated switching signal and a boost converter switching element is driven with a second pulse-width-modulated switching signal to convert an input voltage into a regulated output voltage, and a regulator signal from an output voltage regulator is used to generate the first and second pulse width modulated switching signals such that the buck converter is operated in a discontinuous mode with quasi-resonant switching, where the inductor current or the current through the buck converter switching element is detected and compared with a reference current, where the regulator signal is amplified to the extent that the reference current is reached, in terms of time, before a turn-off pulse of the first pulse-width-modulated switching signal, and where the second pulse-width-modulated switching signal is generated using the amplified regulator signal.

Abstract: The present invention refers to high-voltage generators, in particular to a step-down DC-to-DC converter circuit (buck converter) for supplying a DC output voltage Uout which may e.g. be used in a voltage supplying circuitry of an X-ray radio-graphic imaging system. According to the invention, the peak value of the buck converter's storage inductor current IL is controlled by a control circuit ?C? which regulates the on-time ?ton of a semiconductor switch S in the feeding line of this storage inductor L. As a result thereof, an output current sensor CS, which is commonly used in today's buck converter designs, becomes redundant.

Abstract: A method for driving a capacitive load using a target voltage waveform having a peak voltage and an average rise and fall slew rate, wherein the average rise and fall slew rates comprise at least one voltage step, the method comprising supplying power from an input to an output for charging a capacitive load to obtain a peak voltage and average rise slew rate in response to the target waveform; discharging the capacitive load to obtain an average fall slew rate in response to the target waveform, and returning the discharged power from the capacitive load to the input.

Abstract: A DC/DC converter configurable for operating as a multiphase DC/DC. A controller produces a master drive signal for controlling a primary power switch to produce the output DC signal at a desired level. Multiple secondary power stages are coupled between the input and the output nodes for producing an output DC signal. Each of the multiple secondary power stages has at least one secondary power switch responsive to the input DC signal for producing the output DC signal. An expander system configures the DC/DC converter for operation in a multiphase DC/DC conversion mode. The expander system is responsive to the master drive signal for producing multiple slave drive signals respectively supplied to the multiple secondary power stages for controlling secondary power switches. The slave drive signals have phases shifted with respect to the master drive signal and with respect to each other.

Abstract: A method and arrangement of determining starting conditions of a solar converter in a photovoltaic system. The photovoltaic system includes a photovoltaic panel system having one or more photovoltaic panels. The method includes determining an open circuit voltage of the photovoltaic panel system, and determining beforehand limit values for the starting conditions, where the limit values include an open circuit voltage value and a temperature value, with which values the solar converter can be started. The method also includes determining beforehand the temperature dependency of the open circuit voltage of the panel system, determining a temperature of the panel system, and setting a criterion for starting the converter. The criterion includes determining, by using the determined temperature dependency and the determined limit values for the starting conditions, whether the determined temperature and the determined open circuit voltage enable the starting of the converter.

Abstract: An operational transconductance amplifier used in conjunction with a multiple chip voltage feedback technique allows multiple strings of LEDs and current sinks to be efficiently powered by a simple feedback oriented voltage regulator within an appliance. A connected series of differential amplifiers or multiplexors are used to monitor the voltages between the connected LEDs and the current sinks, in order to progressively determine the lowest voltage. The operational transconductance amplifier compares this voltage to a reference voltage and injects or removes current from the feedback node of a voltage regulator, thereby altering the voltage present at the feedback node. This causes the voltage regulator to adjust its output, ensuring that the current sinks of the LED strings have adequate voltage with which to function, even as the LEDs have different forward voltages and the strings are asynchronously enabled and disabled.

Abstract: A power supply system of the present invention aims to achieve optimization of the efficiency and therefore includes: z (z is a natural number equal to or larger than 2) power supplies (PS-1 to PS-z) connected in parallel; and a controller (8) for the number of power supplies in operation which controls the number of power supplies in operation among the power supplies (PS-1 to PS-z).

Abstract: In one embodiment, a zero-crossing detection circuit for a synchronous step-down converter, can include: (i) a state determination circuit configured to compare a drain voltage of a synchronous transistor of the synchronous step-down converter against a reference voltage, and to generate a state digital signal indicative of whether a body diode of the synchronous transistor is turned on; (ii) a logic circuit configured to convert the state digital signal into a counting instruction signal; (iii) a plus-minus counter configured to generate a numerical signal in response to the counting instruction signal; (iv) a DAC configured to generate a correction analog signal based on the numerical signal; and (v) a zero-crossing comparator configured to receive the correction analog signal and the drain voltage of the synchronous transistor, and to provide a zero-crossing comparison signal to a driving circuit of the synchronous step-down converter.

Abstract: A power supply control apparatus includes a first adder configured to generate a difference signal based on a target value and a feedback signal; a compensator having a first transfer function Wc(z) and configured to generate a control signal based on the difference signal; a control target having a second transfer function Wp(z) and configured to output an output signal generated in response to the control signal; a disturbance canceller having a third transfer function {l+Wc(z)·Wp(z)}/{Wc(z)·Wp(z)} and configured to generate a disturbance cancelling signal based on the output signal corresponding to a control amount y; a second adder configured to generate a differential disturbance signal based on an output of the first adder and the disturbance cancelling signal; and a filter circuit which generates the feedback signal based on the differential disturbance signal.

Abstract: There is provided a power converter that is operated by using a power supply of one system and effectively using a current flowing in a load. A charging operation that supplies a charging current and the like to a load 13 and a discharging operation that outputs a discharging current from the load 13 are performed by switching each semiconductor switch of a full-bridge circuit 12. A control section 15 controls all semiconductor switches of the full-bridge circuit 12 to be in an OFF state while switching the charging operation and the discharging operation, makes an inertia current generated by energy accumulated in inductors 27 and 28 flow from a circulation diode of the semiconductor switch that is in OFF-state to a first connection point of the full-bridge circuit 12, and supplies the inertia current to a control power supply section 14 or a DC fan 16 by the reverse flow prevention diode 18.

Abstract: A variable resistance device may be used in a dimmer compatibility circuit to reduce power dissipation in an integrated circuit of the dimmer compatibility circuit. For example, the integrated circuit may include switches coupled to resistors external to the integrated circuit. The integrated circuit may operate the switches to commutate among the external resistors and select a voltage drop that reduces a voltage at a drain voltage of the switches. The reduced drain voltage reduces power dissipation in the switches and instead dissipates the power in the external resistors.

Abstract: A method according to an exemplary aspect of the present disclosure includes, among other things, controlling a power supply system to avoid an over-voltage event across one or more switching devices of the power supply system, the controlling step based on switching overlap information that includes instructions for either advancing or retarding a switching signal associated with at least one of the switching devices.

Abstract: In one embodiment, a method of controlling a switching power supply can include: (i) generating an ideal on time signal according to an input voltage and an output voltage of the switching power supply; (ii) generating a ripple voltage signal having a predetermined constant value when a power switch of the switching power supply is on, and a linearly decreasing value when the power switch is off; (iii) generating a regulating voltage signal according to an output voltage sense signal and the ripple voltage signal; (iv) generating a regulating control signal by comparing the regulating voltage signal against a first reference signal; (v) generating an on time control signal according to the regulating control signal and the ideal on time signal; and (vi) generating a driving signal according to the on time control signal for driving the power switch.

Abstract: A device (200) includes a circuit (202) and a driver stage (204) therefor. The circuit includes two sub-circuits (231 and 232). The driver stage includes switcher logic (206) that produces signals that control switching on and off of the sub-circuits. The switcher logic also produces other signals in advance of the signals that control the switching of the sub-circuits. The driver stage includes delay compensations circuits (221 and 222), coupled to the switcher logic and to the circuit, that produce timing signals for the switcher logic. The timing signals are closely aligned with moments that a changing voltage at a node between the sub-circuits passes through threshold voltages. The timing signals compensate for all delays of signals through the device such that a period that both sub-circuits are off is minimized, while ensuring that both sub-circuits are not on at a same time.

Abstract: The invention relates to a system for eliminating current surges that includes a first voltage regulator (7) having a current limit programmable to a value (I(limit)) that depends on the value of the intermittent current surges (IO(surge)) required by the intermittent load (3) and the relationship thereof to the work cycle, a second voltage regulator (9), a condenser (4) connected between the first and second regulators (7, 9), that loads when the current is no longer required and that unloads when there is a need for output current to provide current to the second regulator (9) which absorbs the changes in voltage produced by the loading/unloading of the condenser and provides a constant voltage for any value of the required output current surge, independently of voltage changes in the condenser (4), and a control loop between a sensor for the output current provided to the load and an input limit (15) for the input current (II) in the first regulator (7).

Abstract: Systems and methods that provide control circuits having multiple sub-control inputs that control operation of a power electronics device (e.g., a power converter). Each of the multiple sub-control inputs are output from a separate sub-control circuit that includes a feedback circuit having an input tied to a common control node. The common control node is coupled to an input of a controller (e.g., a PWM controller). Outputs of each of the sub-control circuits are coupled to the common control node by a respective switch (e.g., diode, transistor, etc.) so that each of the sub-control circuits may be selectively coupled to the common control node to provide a control signal to a controller. Since components of each of the feedback compensations circuits are biased at a regulation voltage instead of a higher power supply voltage, the control circuit may switch between control modes with minimal delay.