Digitally Controlled Patents (Class 323/283)
  • Patent number: 12027977
    Abstract: A feedback loop circuit of a voltage regulator includes a voltage extraction circuit and a loop filter circuit. The voltage extraction circuit receives an error voltage signal that is indicative of difference between an output voltage signal and a reference voltage of the voltage regulator, and generates a voltage extraction signal by extracting one representative voltage for one switching cycle of the voltage regulator according to the error voltage signal. The loop filter circuit applies filtering to the voltage extraction signal to set a feedback signal, and output the feedback signal to a controller circuit of the voltage regulator for regulating the output voltage signal.
    Type: Grant
    Filed: April 12, 2022
    Date of Patent: July 2, 2024
    Assignee: MediaTek Singapore Pte. Ltd.
    Inventors: Man Pun Chan, Hao-Ping Hong, Yung-Chih Yen
  • Patent number: 12027964
    Abstract: An embodiment circuit comprises first and second output nodes with an inductor arranged therebetween, and first and second switches coupled to opposing ends of the inductor. The switches are switchable between non-conductive and conductive states to control current flow through the inductor and produce first and second output voltages. The current intensity through the inductor is compared with at least one reference value. Switching control circuitry is coupled with the first and second switches, the first and second output nodes, and current sensing circuitry, which is configured to control the switching frequency of the first and second switches as a function of the output voltages and a comparison at the current sensing circuitry. The switching control circuitry is configured to apply FLL-FFWD processing to produce the reference values as a function of a timing signal, targeting maintaining a constant target value for the converter switching frequency.
    Type: Grant
    Filed: August 3, 2023
    Date of Patent: July 2, 2024
    Assignee: STMicroelectronics S.r.l.
    Inventors: Maurizio Ricci, Marco Sautto, Simone Bellisai, Eleonora Chiaramonte, Luigi Arpini, Davide Betta
  • Patent number: 12027904
    Abstract: System and method for charging or discharging one or more batteries. For example, a battery management system for charging or discharging one or more batteries includes: a first transistor including a first transistor terminal, a second transistor terminal, and a third transistor terminal, the second transistor terminal being configured to receive a first drive signal; a second transistor including a fourth transistor terminal, a fifth transistor terminal, and a sixth transistor terminal, the fifth transistor terminal being configured to receive a second drive signal; a burst mode detector configured to receive the first drive signal and generate a burst-mode detection signal based at least in part on the first drive signal; and a drive signal generator configured to receive the burst-mode detection signal and generate the first drive signal and the second drive signal based at least in part on the burst-mode detection signal.
    Type: Grant
    Filed: December 9, 2022
    Date of Patent: July 2, 2024
    Assignee: On-Bright Electronics (Shanghai) Co., Ltd.
    Inventors: Qiang Luo, Lieyi Fang
  • Patent number: 12021454
    Abstract: A control circuit for a multiphase buck converter includes a regulator circuit and a plurality of phase control circuits. The regulator circuit generates a regulation signal based on a feedback signal and a reference signal, and each phase control circuit receives a current sense signal and generates a respective PWM signal based on the respective current sense signal and the regulation signal. The control circuit includes a first selector circuit and a second selector circuit configured to receive a selection signal and selectively connect each phase control circuit of a subset of the phase control circuits to a PWM signal for driving a respective stage of the multiphase buck converter, and to a current sense signal provided by the respective stage of the multiphase buck converter. A selection control circuit generates the selection signal in order to connect the phase control circuits to different stages of the multiphase buck converter.
    Type: Grant
    Filed: April 27, 2022
    Date of Patent: June 25, 2024
    Assignee: STMicroelectronics S.r.l.
    Inventors: Gerardo Castellano, Leonardo Pedone, Filippo Minnella, Marcello Raimondi
  • Patent number: 11996761
    Abstract: A current detection circuit includes: a detection resistor provided between an output of a driver circuit and a load; a power supply circuit configured to operate between a first power supply and a virtual ground potential, and generate a second power supply having a predetermined voltage difference from the virtual ground potential; and a signal processing circuit configured to operate between the second power supply and the virtual ground potential, and generate a detection signal corresponding to a voltage generated at the detection resistor. A virtual ground line for supplying the virtual ground potential is connected between the output of the driver circuit and the detection resistor.
    Type: Grant
    Filed: February 2, 2022
    Date of Patent: May 28, 2024
    Assignee: MAZDA MOTOR CORPORATION
    Inventors: Tadao Yamaguchi, Masahito Sonehara
  • Patent number: 11990837
    Abstract: A power converter includes a voltage control unit, a current control unit and a hysteresis control unit. The voltage control unit generates a first current command. The hysteresis control unit couples the voltage control unit with the current control unit and is configured to: in the first mode, decouple the voltage control unit and the current control unit and generate a second current command to be transmitted to the current control unit when the detection current reaches the first threshold value, and couple the voltage control unit with the current control unit and transmit the first current command generated by the voltage control unit to the current control unit when the first current command reaches a second threshold value for switching to a second mode from the first mode. The current control unit outputs a mode control signal according to the first current command and the second current command.
    Type: Grant
    Filed: May 4, 2022
    Date of Patent: May 21, 2024
    Assignee: LITE-ON TECHNOLOGY CORPORATION
    Inventor: Jing-Hsiao Chen
  • Patent number: 11990827
    Abstract: A multi-rail power converter assembly includes first and second interleaved power converters configured to output first and second rail currents. A control driver circuit includes first and second control outputs configured to output first and second control signals configured to control power conversion in the first and second power converters to generate the first and second rail currents. A first PWM generator receives a compensator control signal and generates the first control signal based on the compensator control signal. A second PWM generator receives a first modified compensator control signal and generates the second control signal based on the first modified compensator control signal. The control driver circuit is configured to generate the first modified compensator control signal based on an average of the first rail current and the second rail current.
    Type: Grant
    Filed: January 24, 2022
    Date of Patent: May 21, 2024
    Assignee: AES Global Holdings PTE Ltd.
    Inventors: Antonio Remetio Soleno, Jessica Cabiles Magsino
  • Patent number: 11967900
    Abstract: An embodiment voltage converter includes a first transistor connected between a first node of the converter and a second node configured to receive a power supply voltage, a second transistor connected between the first node and a third node configured to receive a reference potential, a first circuit configured to control the first and second transistors, and a comparator including first and second inputs. The first input is configured to receive, during a first phase, a first voltage ramp and, during a second phase, a set point voltage. The second input is configured to receive, during the first phase, the set point voltage and, during the second phase, a second voltage ramp.
    Type: Grant
    Filed: July 2, 2021
    Date of Patent: April 23, 2024
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Sebastien Ortet, Olivier Lauzier
  • Patent number: 11967359
    Abstract: Methods, systems, and devices for varying a time average for feedback of a memory system are described. An apparatus may include a voltage supply, a memory array, and a regulator coupled with the voltage supply and memory array and configured to supply a first voltage received from the voltage supply to the memory array. The apparatus may also include a voltage sensor configured to measure a second voltage of the memory array and a digital feedback circuit coupled with the memory array and regulator and configured to generate feedback comprising information averaged over a duration based at least in part on the second voltage measured by the voltage sensor and to transmit an analog signal to the regulator based at least in part on the feedback.
    Type: Grant
    Filed: March 10, 2023
    Date of Patent: April 23, 2024
    Assignee: Micron Technology, Inc.
    Inventor: Fuad Badrieh
  • Patent number: 11955879
    Abstract: In described examples, a controller includes a converter. The converter generates a first signal responsive to an input signal. A summing block is coupled to the converter. The summing block receives the first signal and generates a second signal. A limiter is coupled to the summing block and generates a third signal responsive to the second signal and a code signal. A logic block generates a target signal responsive to the third signal. The third signal transitions to an intermediate level at a first slew rate and the third signal transitions from the intermediate level to the target signal at a second slew rate.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: April 9, 2024
    Assignee: Texas Instruments Incorporated
    Inventors: Venkatesh Wadeyar, Vikas Lakhanpal, Preetam Charan Anand Tadeparthy
  • Patent number: 11955877
    Abstract: A method to operate a DC-DC power converter in a low power burst mode, the method including sampling an output voltage of the DC-DC power converter with a sampling frequency to determine when to initiate a burst for the low power burst mode; and adapting the sampling frequency based on the output voltage.
    Type: Grant
    Filed: July 28, 2021
    Date of Patent: April 9, 2024
    Assignee: STMicroelectronics S.r.l.
    Inventors: Alessandro Nicolosi, Giovanni Sicurella
  • Patent number: 11934248
    Abstract: Power management in a computing device. A driver is registered with an operating system (OS) executing on the computing device to receive information about a position of a user interface control. If the user interface control is moved, the driver receives a notification of the user interface control position and determines a power management intervention based on the position The driver transmits the power management intervention to power control circuitry which sets a power setting of the computing device based on the intervention.
    Type: Grant
    Filed: September 27, 2021
    Date of Patent: March 19, 2024
    Assignee: ATI Techologies ULC
    Inventors: Alexander S. Duenas, Omer Irshad, Sishanthy Balachandran, Arpit Nitinbhai Patel, Andrew Savio D'Souza, Oleksandr Khodorkovsky
  • Patent number: 11930568
    Abstract: A controller for controlling a light source module including a first LED array and a second LED array includes a first driving terminal and a second driving terminal. The controller is operable for turning on a switch between a power converter and the first LED array by the first driving terminal to deliver electric power from the power converter to the first LED array in a first sequence of discrete time slots, and for turning on a second switch between the power converter and the second LED array by the second driving terminal to deliver electric power from the power converter to the second LED array in a second sequence of discrete time slots, where the first sequence of discrete time slots and the second sequence of discrete time slots are mutually exclusive.
    Type: Grant
    Filed: May 6, 2021
    Date of Patent: March 12, 2024
    Assignee: O2Micro Inc.
    Inventors: Rong Hu, Yung-Lin Lin, Naoyuki Fujita
  • Patent number: 11923836
    Abstract: An example includes a circuit including a first AND gate including a first input terminal, a second input terminal, and an output terminal, a second AND gate including a first input terminal, a second input terminal, and an output terminal, and a third AND gate including a first input terminal, a second input terminal, and an output terminal. The circuit also includes an OR gate including a first input terminal coupled to the output terminal of the first AND gate, a second input terminal coupled to the output terminal of the second AND gate, a third input terminal coupled to the output terminal of the third AND gate, and an output terminal.
    Type: Grant
    Filed: June 25, 2020
    Date of Patent: March 5, 2024
    Assignee: Texas Instruments Incorporated
    Inventors: Venkateswar Reddy Kowkutla, Chunhua Hu, Erkan Bilhan, Sumant Dinkar Kale
  • Patent number: 11899515
    Abstract: A point-of-sale (POS) device includes a processor, a battery, a transaction object reader, a printer with a printer controller, and optionally a temperature sensor. The processor determines a present power discharge capability rate of the battery, optionally based on a temperature measured by the temperature sensor. The processor also calculates a first estimated power draw rate based on a first setting value for at least one of the components of the POS device, such as the printer. If the first estimated power draw rate is dangerously close to the present power discharge capability rate of the battery, a second estimated power draw rate is calculated based on a second setting value for the one or more components. If the second estimated power draw rate is no longer dangerously close to the present power discharge capability rate of the battery, the components are set to the second settings value.
    Type: Grant
    Filed: December 16, 2022
    Date of Patent: February 13, 2024
    Assignee: Block, Inc.
    Inventors: Cory Douthat, Jeremy Wade, Matthew H Maibach
  • Patent number: 11901819
    Abstract: An embodiment voltage converter includes a first transistor connected between a first node of the converter and a second node configured to receive a power supply voltage, a second transistor connected between the first node and a third node configured to receive a reference potential, a first circuit configured to control the first and second transistors, and a comparator including first and second inputs. The first input is configured to receive, during a first phase, a first voltage ramp and, during a second phase, a set point voltage. The second input is configured to receive, during the first phase, the set point voltage and, during the second phase, a second voltage ramp.
    Type: Grant
    Filed: July 2, 2021
    Date of Patent: February 13, 2024
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Sebastien Ortet, Olivier Lauzier
  • Patent number: 11888393
    Abstract: A multiphase controller includes an integrator enable terminal, a pulse width modulator, an error integrator, an open drain driver, and an integrator enable circuit. The integrator enable terminal is adapted to be coupled to the integrator enable terminal of a different instance of the multiphase controller. The pulse width modulator is configured to modulate a power stage. The error integrator is configured to control the pulse width modulator. The open drain driver is coupled to the integrator enable circuit. The integrator enable circuit is coupled to the pulse width modulator, the error integrator, the open drain driver, and the integrator enable terminal. The integrator enable circuit is configured to activate the open drain driver responsive to generation of a power stage control pulse by the pulse width modulator, and activate the error integrator responsive to a logic low signal at the integrator enable terminal.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: January 30, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Muthusubramanian Venkateswaran, Rohit Narula, Preetam Charan Anand Tadeparthy, Matthew John Ascher Schurmann, Rajesh Venugopal
  • Patent number: 11888389
    Abstract: A power converter incudes a power factor correction circuit and a controller. The power factor correction circuit is configured to convert an input single-phase electrical power to a first DC electrical power. An active phase of the input single-phase electrical power is received in parallel through two of four conductors. A return phase of the input single-phase electrical power is received in parallel through two others of the four conductors. The power factor correction circuit is also configured to convert an input three-phase electrical power to the first DC electrical power. Three active phases of the input three-phase electrical power are received through three of the four conductors. The return phase is received through a fourth of the four conductors. The controller is configured to control the power factor correction circuit to operate in the single-phase input mode and the three-phase input mode in response to a control signal.
    Type: Grant
    Filed: August 24, 2022
    Date of Patent: January 30, 2024
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Fiona E. Meyer-Teruel, Julien Payan, Kai Zhuang, Tao Wang
  • Patent number: 11881768
    Abstract: A direct current (DC) to DC (DC-DC) converter includes a comparator configured to set a pulse width of a signal pulse, the pulse width corresponding to a voltage level of an output voltage of the DC-DC converter; a digital delay line (DDL) operatively coupled to the comparator, the DDL configured increase the pulse width of the signal pulse by linearly introducing delays to the signal pulse; a multiplexer operatively coupled to the DDL, the multiplexer configured to selectively output a delayed version of the signal pulse; and a logic control circuit operatively coupled to the multiplexer and the DDL, the logic control circuit configured to adaptively adjust a precision of the DC-DC converter in accordance with a duty cycle of the DC-DC converter and a setpoint of the DC-DC converter.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: January 23, 2024
    Assignee: STMicroelectronics S.r.l.
    Inventors: Juri Giovannone, Valeria Bottarel, Stefano Corona
  • Patent number: 11881779
    Abstract: In an embodiment a DC-DC switching power converter includes a switching circuitry including switches, the switching circuitry configured to receive a DC input voltage and generate a DC output voltage via switching the switches, a switching control circuitry configured to control switching of the switches with a switching signal having a corresponding switching frequency with a corresponding duty cycle, the DC output voltage generated by the switching circuitry depending on the duty cycle, wherein the switching control circuitry is configured to set the duty cycle based on a difference between the DC output voltage and a reference voltage in a closed loop configuration and a compensation network configured to provide stability to an operation of the DC-DC switching power converter, wherein the compensation network has a capacitance having a value depending on the switching frequency.
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: January 23, 2024
    Assignee: STMicroelectronics S.r.l.
    Inventors: Alessandro Nicolosi, Valeria Bottarel
  • Patent number: 11881762
    Abstract: An apparatus may include a regulated power converter, a control engine configured to control the regulated power converter based upon a regulation control parameter, and a parameter control system. The parameter control system may be configured to detect a transient event at an output of the regulated power converter. The parameter control system may be configured to modify, in response to the transient event, the regulation control parameter from a first value to a second value based upon a parameter modification profile. The parameter control system may be configured to modify, in response to modifying the regulation control parameter from the first value to the second value, the regulation control parameter according to a function of the parameter modification profile. The function may define a return of the regulation control parameter from the second value to the first value over a period of time.
    Type: Grant
    Filed: July 29, 2021
    Date of Patent: January 23, 2024
    Assignee: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Venkat Sreenivas, Bikiran Goswami, Benjamim Tang, Todd Bellefeuille
  • Patent number: 11863071
    Abstract: A power converter having a smooth transition control mechanism is provided. An oscillator circuit outputs a clock signal. A control circuit receives the clock signal from the oscillator circuit and outputs a control signal based on the clock signal. A driver circuit outputs a high-side conduction signal and a low-side conduction signal according to the control signal. A high-side switch is turned on or off according to the high-side conduction signal from the driver circuit. A low-side switch is turned on or off according to the low-side conduction signal from the driver circuit. The oscillator circuit receives the high-side conduction signal from the driver circuit. The oscillator circuit, according to the high-side conduction signal, determines whether or not the clock signal outputted to the control circuit needs to be adjusted.
    Type: Grant
    Filed: February 14, 2022
    Date of Patent: January 2, 2024
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventors: Chien-Nan Chen, Fu-Chuan Chen
  • Patent number: 11855526
    Abstract: An improved method for zero-voltage switching (ZVS) of a voltage-fed half-bridge using a variable dead band is provided. The duration of the dead band is determined dynamically and is precisely long enough to ensure the absence of shoot-through events while also minimizing or eliminating switching losses and reverse conduction losses. The method generally includes: (a) calculating the equivalent capacitance as seen by the current source charging the midpoint of the half-bridge; (b) calculating the ZVS charge requirement based on the link voltage and the equivalent capacitance; (c) calculating the charge delivered by the current source over time during a dead band vector, equating the result to the ZVS charge requirement, and solving for the ZVS time requirement at each commutation point over the switching cycle; and (d) updating the dead bands for each commutation of each half-bridge in the switched-mode power converter.
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: December 26, 2023
    Assignee: HELLA GmbH & Co. KGaA
    Inventors: Philip Michael Johnson, Alan Wayne Brown
  • Patent number: 11855522
    Abstract: A method is disclosed for operating a technical apparatus with an electronic converter controlled a control signal. A control signal profile is provided with which the electronic converter is to be operated. A predicted control signal profile is predicted based on the provided control signal profile. The predicted control signal profile is a predicted future profile of the control signal. A modified control signal profile of is obtained by modifying the provided control signal profile using a trainable, data-based control signal model. The control signal model is trained to determine the modified control signal profile based on the provided control signal profile and the predicted control signal profile. The electronic converter is operated using the modified control signal profile.
    Type: Grant
    Filed: August 13, 2021
    Date of Patent: December 26, 2023
    Assignee: Robert Bosch GmbH
    Inventors: Maja Rita Rudolph, Dennis Bura, Samuel Vasconcelos Araujo, Michael Jiptner
  • Patent number: 11855538
    Abstract: A control circuit includes a timeout circuit configured to receive a first control signal. The timeout circuit asserts a timeout output signal on a timeout circuit output responsive to an expiration of a time period following assertion of the first control signal. A counter circuit has an input coupled to the timeout circuit output and has a counter circuit output. Responsive to assertion of the first control signal, the counter circuit selectively increments an output count value on the counter circuit output responsive to the timeout output signal having a first logic state or decrements the output count value on the counter circuit output responsive to the timeout output signal having a second logic state. A comparator circuit has a control input coupled to the counter circuit output. The comparator circuit adjusts a magnitude of a reference signal responsive to the output count value from the counter circuit.
    Type: Grant
    Filed: December 28, 2021
    Date of Patent: December 26, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Liang Zhang
  • Patent number: 11855615
    Abstract: An improved circuit or method generates first and second initial pulses that do not overlap. First and second drive pulses are generated based on the first and second initial pulses, respectively. A first transistor is turned on with the first drive pulses. A second transistor is turned on with the second drive pulses. A current flows in response to an on-time state of the first transistor overlapping with an on-time state of the second transistor. A delay of the second drive pulses is decreased based on a time of the current flow overlapping with one of the first initial pulses; and the delay of the second drive pulses is increased based on the time of the current flow overlapping with one of the second initial pulses.
    Type: Grant
    Filed: February 9, 2023
    Date of Patent: December 26, 2023
    Assignee: Silanna Asia Pte Ltd
    Inventors: Joseph H. Colles, Steven E. Rosenbaum, Stuart B. Molin
  • Patent number: 11848608
    Abstract: A control circuit for controlling a switching regulator includes a timer, a comparator, a driver circuit and a controller. The timer generates an input signal indicative of whether a predetermined amount of time has elapsed since an activation of a drive signal. The comparator is configured to compare a feedback voltage with a reference voltage to generate a comparison signal. The driver circuit is controlled by a control signal to generate the drive signal according to one of the input signal and the comparison signal. The control signal indicates whether a mode is enabled. When the mode is enabled, the driver circuit is configured to generate the drive signal according to the input signal. The controller is configured to, in response to an activation of the input signal, generate the control signal according to a result of a comparison of the feedback voltage with another reference voltage higher than the reference voltage.
    Type: Grant
    Filed: March 23, 2022
    Date of Patent: December 19, 2023
    Assignee: ALPHA AND OMEGA SEMICONDUCTOR INTERNATIONAL LP
    Inventors: Chi-Kuang Chang, Cheng-Hsiung Tsai
  • Patent number: 11849518
    Abstract: A load control device is configured to generate a control signal having a desired magnitude for controlling a load regulation device adapted to control the power delivered to an electrical load. The load control device may comprise a control terminal arranged to provide the control signal to the load regulation device, a communication circuit for generating the control signal, and a control circuit configured to generate an output signal that is provided to the communication circuit. The communication circuit may be characterized by non-linear operation. The control circuit may adjust the magnitude of the output signal in response to the difference between the magnitude of the control signal and the desired magnitude to adjust the magnitude of the control signal towards the desired magnitude. The control circuit may also be configured to determine if an incompatible load regulation device is coupled to the load control device.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: December 19, 2023
    Assignee: Lutron Technology Company LLC
    Inventors: James P. Steiner, Daniel G. Cooper, Ryan S. Bedell
  • Patent number: 11837959
    Abstract: An apparatus includes a controller. The controller controls a main power supply to produce an output signal to power multiple dynamic loads such as disposed in series or other suitable configuration. The controller detects a transient power consumption condition associated with a first dynamic load of the multiple dynamic loads. The controller then adjusts control of the main power supply and generation of the output signal based on the detected transient power consumption condition.
    Type: Grant
    Filed: July 19, 2021
    Date of Patent: December 5, 2023
    Assignee: Infineon Technologies Austria AG
    Inventors: Darryl Tschirhart, Kushal Kshirsagar, Danny Clavette, Prasan Kasturi
  • Patent number: 11837958
    Abstract: A multiphase power converter comprises a regulator, a value-supply system arranged for collecting at least one operating point of the power converter, and a predictor for determining updated phase statuses, for activating or deactivating each of the phases (111, 112, 113, . . . ) during a further operation of the power converter. The updated phase statuses are determined using a process based on the at least one collected operating point and predictor parameters obtained from a machine-learning process.
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: December 5, 2023
    Assignee: Infineon Technologies Austria AG
    Inventors: Benjamin L. Schwabe, Jens A. Ejury, Sandro Cerato
  • Patent number: 11829172
    Abstract: An aspect of the disclosure relates to an apparatus including: an integrated circuit (IC) including one or more cores, and a current limit detection circuit; a voltage regulator; an inductor coupled between the voltage regulator and the one or more cores of the IC; and a current sensing circuit including inputs coupled across the inductor and an output coupled to the current limit detection circuit of the IC.
    Type: Grant
    Filed: February 24, 2022
    Date of Patent: November 28, 2023
    Assignee: QUALCOMM INCORPORATED
    Inventors: Vijayakumar Ashok Dibbad, Fredrick Bontemps, Matthew Severson, Timothy Zoley
  • Patent number: 11829170
    Abstract: Systems and methods are disclosed related to low-power dynamic offset calibration of an error amplifier. An analog linear voltage regulator circuit tracks changes between a reference voltage and a regulated voltage to keep the regulated voltage as close as possible to the reference voltage. The analog linear voltage regulator includes an error amplifier that measures the error between the reference and regulated voltages and feedback circuitry. The error amplifier and feedback circuitry should be calibrated to correct for any offset within the circuits. The described offset calibration technique not only compensates for the offset in the error amplifier but also cancels any mismatch in the feedback network. During operation, conditions such as temperature and supply voltage may vary causing the offset to change. The technique is low power and dynamically cancels the offset even when the linear regulator is operating to supply the desired voltage.
    Type: Grant
    Filed: November 10, 2021
    Date of Patent: November 28, 2023
    Assignee: NVIDIA Corporation
    Inventors: John W. Poulton, Sudhir Shrikantha Kudva, John Michael Wilson
  • Patent number: 11824443
    Abstract: This disclosure discloses a single-inductor multiple-output DC-DC buck converter, which includes a power conversion unit and i charge controllers, as well as a phase-locked loop, a logic unit, a driving unit, and an input trunk duty ratio generation unit. The charge controllers are connected to the driving unit through the logic unit. The logic unit is further connected to the phase-locked loop and the phase-locked loop is connected to the driving unit through the input trunk duty ratio generation unit. The driving unit is connected to the power conversion unit. The disclosure applies charge control to every output branch path, and adopts a phase-locked loop as the cycle control, which effectively suppresses the cross modulation effect of every branch path, and does not require the last branch path to have a sufficiently heavy load, which broadens the load range, while taking into account other performance requirements concurrently.
    Type: Grant
    Filed: August 19, 2019
    Date of Patent: November 21, 2023
    Assignee: SOUTH CHINA UNIVERSITY OF TECHNOLOGY
    Inventors: Yuyang Liu, Bin Li, Yanqi Zheng, Zhaohui Wu
  • Patent number: 11824464
    Abstract: The present invention is directed to provide a semiconductor device capable of protecting a switching element even though having a capacitor connected to a control signal input terminal of the switching element. Semiconductor device includes an IGBT including a gate configured to be input a gate signal and a current detection terminal used to detect at least one of overcurrent or short-circuit current, a gate capacitor arranged between the gate and a reference potential terminal, the gate capacitor being disconnected from the gate as needed, and a disconnection unit configured to disconnect a connection between the gate capacitor and the gate when a detection current being a current output from the current detection terminal is equal to or larger than a first current set on a basis of a minimum current causing oscillation in a loop circuit formed by including the IGBT and the gate capacitor.
    Type: Grant
    Filed: July 23, 2021
    Date of Patent: November 21, 2023
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Yuki Kumazawa
  • Patent number: 11824546
    Abstract: Disclosed are an apparatuses and methods for minimum energy tracking loop that includes an oscillator to imitate a threshold path of a load system and automatically adjust a clock frequency as a supply voltage to the load system is changed, a voltage regulator configured to supply a power, an energy sensing unit which is connected to the oscillator and the voltage regulator and calculates a proportional energy proportional to a total energy consumed by the load system at a specific supply voltage, a minimum energy finder to find a minimum energy point of the load system by monitoring the calculated proportional energy proportional to the total energy at a plurality of supply voltages, a buck converter to supply a power to the load system with a supply voltage at which the load system operates with a minimum energy when the minimum energy point is found in the minimum energy finder.
    Type: Grant
    Filed: January 13, 2022
    Date of Patent: November 21, 2023
    Assignee: Research & Business Foundation Sungkyunkwan University
    Inventors: Bai Sun Kong, Jong Woo Kim
  • Patent number: 11817785
    Abstract: DAC control logic for controlling a DAC for supplying a target voltage VTARGET to a switching converter is disclosed. The DAC logic comprises control logic which is configured, in response to DAC ramp-down, to decrement DAC input code supplied to the DAC in a series of steps. The DAC control logic is configured, for at least some of the steps during ramp down, to wait until at least one switching cycle has occurred in the switching converter before decrementing the DAC input code from a current value to a new value.
    Type: Grant
    Filed: October 29, 2020
    Date of Patent: November 14, 2023
    Assignee: Renesas Electronics America Inc.
    Inventors: Vipul Raithatha, Rob Cox, Allan Warrington, Vinod Aravindakshan Lalithambika, Michael Jason Houston
  • Patent number: 11811317
    Abstract: A controller for controlling a DC-DC converter in a discontinuous conduction mode (DCM) includes an output module configured to provide a switch control signal to the DC-DC converter having an on-time and a switching frequency. The controller includes an on-time-control-module configured to receive a first compensation signal based on the output voltage of the DC-DC converter; and set the on-time of the switch control signal based on the first compensation signal. The controller also includes a frequency-control-module configured to receive a second compensation signal, wherein the second compensation signal is based on the output voltage of the DC-DC converter, and regulate the second compensation signal to a target range by setting the switching frequency of the switch control signal to one of a plurality of pre-defined discrete switching frequencies.
    Type: Grant
    Filed: May 20, 2021
    Date of Patent: November 7, 2023
    Assignee: NXP B.V.
    Inventors: Ravichandra Karadi, Matthias Rose, Hendrik Johannes Bergveld, Marcel Dijkstra
  • Patent number: 11811326
    Abstract: An example circuit includes a loop controller having current phase inputs, a feedback input, a control loop output and a transient event output. The feedback input is adapted to be coupled to an output terminal of a multi-phase power stage. A PWM circuit has a blanking input, a control input and a PWM output, the control input coupled to the control loop output. A phase management circuit has a transient detect input, a PWM input, a blanking output and phase outputs. The transient detect input is coupled to the transient event output. The PWM input is coupled to the PWM output and the blanking output is coupled to the blanking input. Each of the phase outputs is adapted to be coupled to a respective phase of the multi-phase power stage. The phase management circuit is configured to provide a blanking control signal representative of a variable blanking time.
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: November 7, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Naman Bafna, Cheng Wei Chen, Preetam Charan Anand Tadeparthy, Sreelakshmi Suresh, Ammineni Balaji
  • Patent number: 11812234
    Abstract: A method is applied in a controller within a driving circuit comprising a driving sub-circuit configured to drive a load. The method comprises steps of: performing a table learning operation on a table at least at a first rate during a learning period; and performing the table learning operation on the table at a second rate lower than the first rate after the learning period; wherein the table is stored in a memory within the controller. The table learning operation comprises steps of: receiving a first feedback signal from the load corresponding to a first cycle; obtaining a control code from the table according to the first feedback signal; generating a control signal according to the control code; receiving a second feedback signal from the load corresponding to the second cycle; and updating the control code and saving the updated control code back to the table in the memory.
    Type: Grant
    Filed: July 21, 2023
    Date of Patent: November 7, 2023
    Assignee: xMEMS Labs, Inc.
    Inventors: Jemm Yue Liang, Hung-Chi Huang, Chieh-Yao Chang
  • Patent number: 11803202
    Abstract: A voltage regulator receives an input voltage and produces a regulated output voltage. A first feedback network compares a feedback signal to a reference signal to assert/de-assert a first pulsed control signal when the reference signal is higher/lower than the feedback signal. A second feedback network compares the output voltage to a threshold signal to assert/de-assert a second control signal when the threshold signal is higher/lower than the output voltage. A charge pump is enabled if the second control signal is de-asserted and is clocked by the first pulsed control signal to produce a supply voltage higher than the input voltage. A first pass element is enabled when the second control signal is asserted and is selectively activated when the first pulsed control signal is asserted. A second pass element is selectively activated when the second control signal is de-asserted.
    Type: Grant
    Filed: September 21, 2022
    Date of Patent: October 31, 2023
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Marco Ruta, Antonio Conte, Michelangelo Pisasale, Agatino Massimo Maccarrone, Francesco Tomaiuolo
  • Patent number: 11798978
    Abstract: A single integrated circuit may include a signal path configured to generate an output signal from an input signal, wherein the signal path includes an amplifier configured to drive the output signal, a direct-current-to-direct-current (DC-DC) power converter having a power inductor integrated in the single integrated circuit and configured to generate a supply voltage to the amplifier from a source voltage to the DC-DC power converter, and control circuitry for controlling operation of converter switches of the DC-DC power converter in order that the supply voltage tracks at least one among the input signal and the output signal.
    Type: Grant
    Filed: September 14, 2020
    Date of Patent: October 24, 2023
    Assignee: Cirrus Logic Inc.
    Inventors: John L. Melanson, Lei Zhu, Wai-Shun Shum, Xiaofan Fei, Johann G. Gaboriau
  • Patent number: 11791705
    Abstract: A multi-phase voltage converter has a plurality of integrated circuits (ICs), and a controller. Each IC has a power switch, a monitoring pin and a current sense pin. The power switch is controlled to convert an input voltage to an output voltage. The current sense pin is capable of providing a current sense signal representative of a current flowing through the power switch. The controller is capable of providing a clock signal via the monitoring pin, and provides a plurality of data signals via the current sense pin of the plurality of ICs. Each of the plurality of ICs is assigned an identification code based on the clock signal and one of the plurality of data signals.
    Type: Grant
    Filed: June 14, 2022
    Date of Patent: October 17, 2023
    Assignee: Monolithic Power Systems, Inc.
    Inventors: Chiahsin Chang, Chao Liu, James Nguyen, Francis Yu, Huichun Dai, Fangyu Zhang
  • Patent number: 11784564
    Abstract: A switched-mode power supply includes a voltage ramp generation circuit that generates a voltage ramp signal. The voltage ramp generation circuit includes, selectively connected in parallel, at least three capacitors. The selective connection of the capacitors is made according to a value of an internal power supply voltage of the switched-mode power supply.
    Type: Grant
    Filed: July 20, 2020
    Date of Patent: October 10, 2023
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Michel Cuenca, Sebastien Ortet
  • Patent number: 11784571
    Abstract: An electrical network including a power source, a flyback converter, a microcontroller, a PID controller, a voltage boost converter, a pulse width modulator integrated circuit, and a battery. The power source produces a charge with a voltage ranging from about 0.1V to about 0.8V and a power ranging from about 0.3 mW to about 100 mW. The flyback converter functions in discontinuous current mode. The microcontroller monitors the power source voltage, calculates a voltage response, and outputs a control signal for the voltage. The PID controller is a digital PID controller, an analog PID controller, or a combination thereof. The voltage boost converter utilizes the power source voltage and power to provide higher voltage power to the electrical network. The pulse width modulator integrated circuit sets a duty cycle and frequency for the flyback converter. The battery stores excess charge produced by the power source.
    Type: Grant
    Filed: July 29, 2021
    Date of Patent: October 10, 2023
    Assignee: United States of America as represented by the Secretary of the Navy
    Inventors: Maxwell Mayekawa Kerber, Lewis Hsu, Joseph F. Schnecker, Jr., Alex G. Phipps
  • Patent number: 11784565
    Abstract: Control circuitry for controlling a current through an inductor of a power converter, the control circuitry comprising: comparison circuitry configured to compare a measurement signal, indicative of a current through the inductor during a charging phase of the power converter, to a signal indicative of a target average current through the inductor for the charging phase and to output a comparison signal based on said comparison; detection circuitry configured to detect, based on the comparison signal, a crossing time indicative of a time at which the current through the inductor during the charging phase is equal to the target average current for the charging phase; and current control circuitry configured to control a current through the inductor during a subsequent charging phase based on the crossing time.
    Type: Grant
    Filed: April 30, 2021
    Date of Patent: October 10, 2023
    Assignee: Cirrus Logic Inc.
    Inventor: Malcolm Blyth
  • Patent number: 11770064
    Abstract: A system for controlling a current in a power converter configured to generate an output voltage may include a control loop having a plurality of comparators, each comparator having a respective reference voltage to which the output voltage is compared, a digital controller configured to calculate one or more pre-seeded control parameters for the current, and an analog state machine configured to, based on outputs of the plurality of comparators, select control parameters for controlling the current. The control parameters may be selected from the pre-seeded control parameters, control parameters for controlling the current to have a magnitude of zero, and control parameters for controlling the current to have a maximum magnitude.
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: September 26, 2023
    Assignee: Cirrus Logic Inc.
    Inventors: Jason W. Lawrence, Eric J. King, Graeme G. MacKay
  • Patent number: 11764674
    Abstract: An on-board power supply device includes: a voltage conversion unit; a first voltage detection unit that detects a value of a first voltage that is applied to a second conduction path; and a second voltage detection unit that detects a value of a second voltage that is applied to a load-side conduction path. Furthermore, the on-board power supply device includes: a target voltage setting unit that sets a target voltage value based on the value of the second voltage detected by the second voltage detection unit; and a control unit. The control unit repeatedly performs feedback calculation for updating a duty ratio of a control signal based on the value of the first voltage detected by the first voltage detection unit so as to bring the value of the first voltage applied to the second conduction path closer to the target voltage value.
    Type: Grant
    Filed: January 27, 2020
    Date of Patent: September 19, 2023
    Assignees: AutoNetworks Technologies, Ltd., Sumitomo Wiring Systems, Ltd., Sumitomo Electric Industries, Ltd.
    Inventor: Takeshi Hasegawa
  • Patent number: 11764694
    Abstract: A configurable control loop arrangement for forming a control loop of a DC-DC converter that is configured to generate a control signal to control the DC-DC converter, the configurable control loop arrangement comprising: a digital-to-analog converter; a comparator; a timer configured to provide a timing-signal for controlling one or more of: the comparator in the determination of the comparison signal; the application of the comparison signal to a configurable-event-generation-logic-module; and the operation of the configurable-event-generation-logic-module; wherein the configurable-event-generation-logic-module comprises a flip-flop circuit, and wherein the configurable-event-generation-logic-module, when implemented in the control loop, is configured to provide for generation of the control signal based on the comparison signal, the timing-signal and a selected mode of the flip-flop circuit, and wherein the control signal is for application to one or more switches of the DC-DC converter.
    Type: Grant
    Filed: December 9, 2021
    Date of Patent: September 19, 2023
    Assignee: NXP USA, Inc.
    Inventors: Lingling Wang, Kai-Wen Cheng, Chongli Wu, Xiaoxiang Geng, Xuwei Zhou
  • Patent number: 11740684
    Abstract: A sensor device includes an image sensing array, a frame buffer, a first read line, a second read line and an energy accumulator. The image sensing array is configured to sense reflected light from a working surface and includes a plurality of sensing pixels and a plurality of self-powered pixels. The sensing pixels respectively output image data according to the sensed reflected light. The self-powered pixels respectively output photocurrent according to the sensed reflected light. The first read line is coupled between the sensing pixels and the frame buffer. The second read line is coupled between the self-powered pixels and the frame buffer. The energy accumulator stores electrical energy of the photocurrent via a charge path between the self-powered pixels and the energy accumulator.
    Type: Grant
    Filed: July 20, 2021
    Date of Patent: August 29, 2023
    Assignee: PIXART IMAGING INC.
    Inventor: Guo-Zhen Wang
  • Patent number: 11742741
    Abstract: Described herein is a switching regulator that can provide a high current while operating with low noise and low spur. The switching regulator may operate with a varying switching frequency. Spurs at the varying switching frequency may be reduced by compensating an error amplifier, which controls the switching frequency.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: August 29, 2023
    Assignee: Analog Devices International Unlimited Company
    Inventor: Jingwen Mao