Abstract: A power converter having a feedback voltage adjusting mechanism for a negative voltage is provided. Input terminals of an operational amplifier are respectively connected to a zero voltage and a first terminal of a first resistor. A second terminal of the first resistor is connected to a second terminal of a low-side switch. A first current source is connected to an output terminal of the operational amplifier and a first terminal of a second resistor. A second terminal of the second resistor is connected to the first terminal of the first resistor. The first current source outputs a first current according to a signal output by the operational amplifier. A second current source outputs a second current being m times the first current and is connected to a first terminal of a third resistor. A voltage of the first terminal of the third resistor is a feedback voltage.

Abstract: At a switch terminal of a flyback converter in a discontinuous conduction mode in a power meter, an apparatus determines a resonant frequency of the flyback converter. The apparatus determines whether the resonant frequency satisfies a condition. Through a controller, the apparatus triggers an event responsive to determining that the resonant frequency satisfies the condition.

Abstract: A power converter that properly copes with the wiring defects on a feedback path is shown. According to a control signal, a power driver couples an input voltage to an energy storage element to provide an output voltage that is down-converted from the input voltage. The output voltage is further converted into a feedback voltage by a feedback circuit, and is entered to an error amplifier with a reference voltage for generation of an amplified error. A control signal generator generates the control signal of the power driver according to the amplified error. The power converter specifically has a comparator, which is enabled in a soft-start stage till the output voltage reaches a stable status. The comparator compares the amplified error with a critical value. When the amplified error exceeds the critical value, the input voltage is disconnected from the energy storage element.

Abstract: A computational current sensor, that enhances traditional Kalman filter based current observer techniques, with transient tracking enhancements and an online parasitic parameter identification that enhances overall accuracy during steady state and transient events while guaranteeing convergence. During transient operation (e.g., a voltage droop), a main filter is bypassed with estimated values calculated from a charge balance principle to enhance accuracy while tracking transient current surges of the DC-DC converter. To address the issue of dependency on a precise model parameter information and further improve accuracy, an online identification algorithm is included to track the equivalent parasitic resistance at run-time.

Abstract: Systems and methods related to efficient system on chip (SoC) power delivery with adaptive voltage headroom control are described. A method for adaptively controlling voltage headroom for a system includes, in response to either a detection of a headroom violation by a per core voltage regulator headroom monitor or a detection of a voltage droop by a per core droop detector, independently throttle operating frequency of a respective core clock signal. The method further includes, in response to meeting a predetermined criterion: (1) lowering the operating frequency of the respective core clock signal, (2) monitoring headroom violation events and droop events at the lowered operating frequency, and (3) if monitored headroom violation events or monitored droop events continue to meet the predetermined criterion, changing the voltage set point associated with the motherboard voltage regulator to a second voltage set point corresponding to a higher voltage.

Abstract: An inductor current reconstruction circuit of a power converter can include: a switching current sampling circuit configured to acquire at least one of a current flowing through a main power transistor and a current flowing through a rectifier transistor to generate a switching current sampling signal; an inductor current generating circuit configured to generate a reconstruction signal representing an inductor current in one complete switching cycle; and where the reconstruction signal comprises the switching current sampling signal and a current analog signal generated according to the switching current sampling signal and an inductor voltage signal representing a voltage across an inductor in the power converter.

Abstract: A circuit breaker device protects an electric low-voltage current circuit. A level of a voltage of a low-voltage current circuit is ascertained such that ascertained voltage values are provided. A differential voltage is ascertained from the ascertained voltage values and an expected value of the voltage such that differential voltage values are provided incrementally. Each differential voltage value is compared with a first threshold, and if at least two successive differential voltage values exceed the threshold, an interruption of the low-voltage current circuit is initiated by semiconductor-based switching elements, which are set to a high-ohmic state, in order to protect the low-voltage current circuit from a short-circuit.

Abstract: System and method for detecting a power. For example, a system for detecting a power includes: a first signal converter configured to receive a first signal and generate a pulse-width-modulation signal based at least in part on the first signal; a second signal converter configured to receive a second signal and generate a voltage signal based at least in part on the second signal; and a low-pass filter configured to receive the pulse-width-modulation signal and the voltage signal and generate a power detection signal based at least in part on the pulse-width-modulation signal and the voltage signal; wherein: the first signal is either an input current or an input voltage; the second signal is either the input current or the input voltage; and the first signal and the second signal are different.

Abstract: A power management circuit for computer systems includes a power converter circuit that generates different voltage levels at different time periods. Multiple voltage regulator circuits are coupled to the output of the power converter circuit and to respective local power supply nodes. Switch devices are used to bypass the voltage regulator circuits during corresponding ones of the different time periods.

Abstract: A mode-transition architecture for USB controllers is described herein. In an example embodiment, an integrated circuit (IC) controller includes a controller coupled to a slope compensation circuit, the controller to detect a transition of a buck-boost converter from a first mode having a first duty cycle to a second mode having a second duty cycle that is less or more than the first duty cycle. The controller controls the slope compensation circuit to nullify an error in an output caused by the transition. The controller can cause the slope compensation circuit to apply a charge stored in a capacitor during a first cycle to start a second cycle with a higher voltage than the first cycle.

Abstract: A control circuit operates to control a switching stage of an electronic converter. The control circuit includes: first terminals providing drive signals to electronic switches of the switching stage; a second terminal receiving from a feedback circuit a first feedback signal proportional to a converter output voltage; and a third terminal configured to receive from a current sensor a second feedback signal proportional to an inductor current. A driver circuit provides the drive signals as a function of a PWM signal generated by a generator circuit as a function of the first and second feedback signals, a reference voltage and a slope compensation signal. A mode selection signal is generated as a function of a comparison between the input voltage and the output voltage. A feed-forward compensation circuit is configured to source and/or sink a compensation current as a function of a variation in the mode selection signal.

Abstract: A system for generating a plurality of switch control signals of a multiphase power converter may include a plurality of inputs, each input of the plurality of inputs configured to receive a respective control signal for controlling a respective phase of the multiphase power converter, and a plurality of control paths comprising a control path for each respective control signal, each control path configured to, for its respective control signal, control a switching period of the respective control signal for such control path based on a measure of alignment among the respective control signal for such control path and the other respective control signals of the other control paths.

Abstract: The present application relates to a bidirectional digital switching power amplifier based on a magnetic suspension drive platform and its multi-step current predictive control method. The control method includes the following steps: establishing a prediction model of a bidirectional digital switching power amplifier; introducing a feedback correction term for a closed loop prediction; calculating an optimal modulation duty cycle through a value function; generating, according to the obtained modulation duty cycle, four PWM drive signals by a pulse width modulation module to control four switch tubes respectively to achieve current prediction control. The present application effectively improves the system control accuracy with small steady-state error, small on-line computation amount, simple algorithm, easy digital realization, and good practical value and application prospect.

Abstract: A power converter includes a controller for driving a corresponding power switch in the power converter. The controller may have a current sense terminal adapted to sense/receive a current sense signal indicative of a current flowing through the corresponding power switch and a current limit terminal adapted to receive a reference current sense signal indicative of a current flowing through another power switch in the power converter. The controller may turn off the corresponding power switch once the current sense signal reaches a peak value of the reference current sense signal.

Abstract: A feedback loop circuit of a voltage regulator includes a loadline and a compensation circuit. The loadline generates a feedback signal according to a sensed current signal that provides information of an inductor current of the voltage regulator, and outputs the feedback signal to a controller circuit of the voltage regulator for regulating an output voltage of the voltage regulator. The compensation circuit generates a compensation signal to compensate for a deviation of the output voltage, wherein the feedback signal generated from the loadline is affected by the compensation signal.

Abstract: A portable device including a secondary battery, a plurality of driving components driven by charged power of the secondary battery, a charging unit configured to charge the secondary battery by an input of outside power supplied from outside of the portable device, a plurality of transformation units each configured to output the charged power of the secondary battery at a driving voltage of a corresponding one of the plurality of driving components, a detection unit configured to detect the input of the outside power to the charging unit, and a switching controller configured to switch a state of one of the plurality of transformation units from an operation state to a stopped state responsive to detecting the input of the outside power to the charging unit causing only the corresponding one of the plurality of driving components to stop operation during charging of the secondary battery.

Abstract: A controller for controlling a multi-phase power conversion system includes a pulse width modulation (PWM) comparator configured to generate a PWM signal based on a ramp signal, a voltage reference signal and a feedback voltage from the power conversion system. A circuit may be configured to generate, based on the PWM signal, PWM signals by delaying the PWM signal with different delay times, and feed the PWM signals to respective switching power converters of the multi-phase power conversion system, to regulate an output voltage of the power conversion system. Each switching power converter may include a control circuit configured to adjust a pulse width of a received PWM signal based on a reference current and an output current of a corresponding switching power converter, to generate an adjusted PWM signal, based on which, an output voltage of the corresponding switching power converter is regulated.

Abstract: A DC-DC power converter with closed loop error compensation may operate in both pulse width modulation (PWM) mode and pulse frequency modulation (PFM) mode. The DC-DC power converter includes type III compensation, and is operable in PWM mode and PFM mode. Use of a bypass switch for an output inductor of the power converter may increase stability of a loop including type III compensation.

Abstract: The present disclosure relates to a device comprising an inductive element and a first capacitive element series connected between a first node and a second node, a first MOS transistor connected between the first node and a third node configured to receive a reference potential, the second node being coupled directly or via a second MOS transistor to the third node, a second capacitive element connected between a fourth node and an interconnection node between the first capacitive element and the inductive element, a current generator configured to provide an AC current to the fourth node, and a switch connected between the fourth node and the third node.

Abstract: Embodiments are generally directed to an emergency driver (10) and an intelligent module (20) for the emergency driver (10). An embodiment of the emergency driver (10) may include a digital communication interface (12), a DC power supply (14) and a controller (16). The digital communication interface (12) may be configured to receive an input signal (41) via a control bus (18). The DC power supply (14) may be configured to provide a DC output (45) to the control bus (18). The controller (16) may be coupled to the digital communication interface (12) and the DC power supply (14) and may be configured to control the emergency driver (10) to operate in a first operation mode. The input signal (41) received at the digital communication interface (12) may be a digital input signal when the emergency driver is operating in a first operation mode.

Abstract: The present disclosure provides a fast charging driver. The fast charging driver is configured to charge a battery of an electronic device. The fast charging driver includes a fast charging circuit and a charging controller. The fast charging circuit includes a first depletion-type GaN transistor, a first enhancement-type field effect transistor, a second depletion-type GaN transistor and a second enhancement-type field effect transistor. The charging controller is configured to control the fast charging circuit to operate in a constant current mode or a constant voltage mode according to a battery level of the battery. By utilizing the first depletion-type GaN transistor and the second depletion-type GaN transistor with a characteristic of a relatively low switching loss, the power consumption during charging the battery by the fast charging driver is decreased to improve the charge speed.

Abstract: A multi-phase power system configured to add and remove phases according to a plurality of states can increase the efficiency of the power system, which can increase a battery life in mobile applications. After phases are shed, a load may quickly change requiring all phases to be activated before an over current protection triggers a shutdown. The response of the power system to these load transients may be improved through the use of multiple triggers, which can provide an early warning of the changing load requirements more accurately and consistently than a single trigger.

Abstract: An apparatus configured to measure a load current provided to a load of a switching converter includes a pulse generation circuit configured to generate a control pulse based on a power switch driving signal of the switching converter, a reference current generation circuit configured to generate a reference current based on the control pulse, a clock generation circuit configured to generate a clock signal based on the control pulse and the reference current, and a clock counter configured to count the number of cycles of the clock signal during a switching period of the switching converter. The reference current generation circuit is configured to adjust the reference current to compensate for a leakage current generated in the clock generation circuit during the switching period.

Abstract: A method for controlling a multiphase DC-DC converter with two or more phase circuits, each with a switch arranged to control an inductor current through an inductor, the phase circuit is arranged to generate a phase current contributing to a total current to be delivered to an output side of the multiphase DC-DC converter. The method includes switching two or more of the phase circuits in Boundary Conduction Mode to generate interleaved phase current pulses, with a period length and a nominal turn-on time period of the switch; and, in at least one of the two or more of the phase circuits being switched, and for successive phases, repeatedly adapting the turn-on time period for controlling the length of the pulses of the inductor current to minimise a difference from the period length.

Abstract: Embodiments disclosed herein relate to clock gating. An example integrated circuit includes an oscillator that outputs a clock signal to a clock gating system that generates and provides a gated clock signal to a data storage circuit. The clock gating system includes a first digital logic circuit having an input coupled to the oscillator to receive the clock signal, an active-low latch that includes an input coupled to an output of the first digital logic circuit and an input coupled to receive an enable signal, a second digital logic circuit that includes an input coupled to the oscillator and an input coupled to the output of the active-low latch, and an active-high latch that includes an input coupled to the output of the second digital logic circuit, an input coupled to receive the enable signal, and an output configured to provide a gated clock signal to the data storage circuit.

Abstract: In an analog-to-digital converter circuit, a sum output unit calculates the sum of an n-bit data value outputted from a first output unit and an (n+1)-bit data value outputted from a second output unit to accordingly obtain the calculated sum as a digital data value. A second calculator of the second output unit calculates the sum of a sign bit of a third digital data value as a most significant bit thereof and a second significant bit of the third digital data value. The combines a bit selected from the calculated sum with the third digital data value from which the sign bit has been eliminated to accordingly generate, as the (n+1)-bit data value, a new digital data value whose most significant bit is the bit selected from the calculated sum.

Abstract: A signal transmission device includes a capacitor having a first capacitor element and a second capacitor element connected in parallel such that electrodes of different polarities are connected together between them, and transmits an analog signal in a form converted into a pulse signal by use of a triangular-wave signal generated through charging and discharging of the capacitor.

Abstract: Presented are average current mode control systems and methods for driving a load with a constant current. In embodiments, this is accomplished when, in response to a zero-current detection circuit detecting a zero current condition in the load current, a compensation circuit is disconnected from a first error amplifier to enable that error amplifier to provide a first voltage to a second error amplifier. The second error amplifier increases a charging current in a capacitor to reduce a dead time in the load current. Similarly, in response to an overcurrent detection circuit detecting an overcurrent condition in the load current, the compensation circuit is disconnected from the first error amplifier to enable the first error amplifier to provide a second voltage to the second error amplifier to decrease the charging current and reduce an overshoot condition.

Abstract: An apparatus includes a PWM ramp generator coupled between a switching node of a power converter and a first input of a comparator, the PWM ramp generator including a first resistor and a first capacitor connected in series between the switching node and the first input of the comparator, and a second resistor and a second capacitor connected in parallel between the first input of the comparator and a feedback node, and a PFM control circuit including an error amplifier and a current zero crossing detection comparator, wherein the error amplifier is coupled between a second input of the comparator and a reference node, and the PFM control circuit is configured to generate gate drive signal for the power converter when the power converter is configured to operate in a PFM mode.

Abstract: In an example, a system includes a switching voltage converter including a first field effect transistor (FET) and a second FET, the switching voltage converter configured to receive an input voltage and provide an output voltage. The system also includes a voltage to current converter coupled to the switching voltage converter and an oscillator, the voltage to current converter configured to receive an error voltage of the output voltage and provide an oscillator current to the oscillator. The system includes a comparator coupled to the oscillator and configured to compare the oscillator current to a reference current, where an output of the comparator is configured to skip a pulse of an oscillator output responsive to the oscillator current being less than the reference current.

Abstract: A sensor device includes an image sensing array, a frame buffer, a first read line, a second read line and an energy accumulator. The image sensing array is configured to sense reflected light from a working surface and includes a plurality of sensing pixels and a plurality of self-powered pixels. The sensing pixels respectively output image data according to the sensed reflected light. The self-powered pixels respectively output photocurrent according to the sensed reflected light. The first read line is coupled between the sensing pixels and the frame buffer. The second read line is coupled between the self-powered pixels and the frame buffer. The energy accumulator stores electrical energy of the photocurrent via a charge path between the self-powered pixels and the energy accumulator.

Abstract: A multi-level converter comprises one or more flying capacitors configured to operate at balanced voltages. The multi-level converter comprises a plurality of switching groups comprising pairs of switches operable to transfer energy to and from an inductor and the one or more flying capacitors for inverting an input voltage to an inverted output voltage. The multi-level converter comprises the inductor configured to operate according to an inductor frequency greater than a switching frequency used to control the plurality of switching groups.

Abstract: This disclosure describes, in part, techniques for reducing pulsating currents of internal power sources, such as batteries. For example, a device may include a power source, a load, and a control device located between the power source and the load. The control device may include a power converter that is configured to maintain a constant input current from the power source and output a pulsating current to the load. While regulating the power, the control device may determine whether an average output power is different than a reference power. If the average output power is equal to the reference power, then the control device may cause the power converter to maintain the constant input current. However, if the average output power is different than the reference power, then the control device may cause the power converter to alter (e.g., decrease/increase) the input current being received from the power source.

Abstract: A time based boost DC-DC converter generates an output voltage using an inductor. A voltage error between the output voltage and a reference voltage is determined and processed in a) an integral control branch which converts the voltage error into an integral control current signal used to control a current controlled oscillator, and b) a proportional branch which converts the voltage error into a proportional control current signal used to control signal a delay line. Current flowing in the inductor is sensed, attenuated and used to apply adjustment to the integral and proportional control current signals. The output from the current controlled oscillator is passed through the delay line and phase detected in order to generate pulse width modulation (PWM) control signaling driving switch operation in the converter.

Abstract: An apparatus and method for processing signals in the analog domain. A signal is derived from analog circuit properties that is shift and scale invariant. Although the circuit properties are not quantized as in traditional digital signal processing, the signal is immune from effects of the properties, such as common mode noise, absolute voltage or current level, finite settling time, etc., as a digital signal would be. The shift and scale invariance allows for mathematical operations of addition, subtraction, multiplication and division of signals. By combining these operations, various circuits may be constructed, including a voltage controlled amplifier, a time gain amplifier, and an analog-to-digital converter. The circuits are constructed using almost no non-linear, active devices, and will thus use less power for a given speed than comparable digital devices, and will often be faster as there are no delay elements and no need to wait for the circuit properties to settle.

Abstract: A drive controller is used in a control system of a power factor correction (PFC) circuit. The control system further includes the PFC circuit. The PFC circuit includes a first bridge arm, a second bridge arm, a first switching transistor, and a second switching transistor. The driving controller includes a sampling circuit and a driving circuit. The sampling circuit is configured to obtain a target current value between the first switching transistor and the second switching transistor. The drive circuit is configured to turn off gate inputs of the first switching transistor and the second switching transistor when the target current value is greater than a current threshold, to turn off the first switching transistor and the second switching transistor and protect the control system.

Abstract: Methods and devices for sensing current through a power converter circuit are presented. According to one aspect, currents through high-/low-side transistors are sensed via respective reduced size replica transistors. According to another aspect, the sensed currents are used to generate bridging currents that are combined with the sensed currents to generate a continuous current sense signal. According to another aspect, the bridging currents include slopes that are generated from slopes of the sensed currents. According to another aspect, the sensed currents are combined and filtered to generate a continuous sense signal. According to another aspect, the continuous current sense signal is a voltage that is compared to a reference voltage to generate a current limit status flag used to control operation of the power converter circuit. According to other aspects, the current sense voltage is used to control ON/OFF duty cycle of the power converter circuit.

Abstract: System and method for charging or discharging one or more batteries. For example, a battery management system for charging or discharging one or more batteries includes: a first transistor including a first transistor terminal, a second transistor terminal, and a third transistor terminal, the second transistor terminal being configured to receive a first drive signal; a second transistor including a fourth transistor terminal, a fifth transistor terminal, and a sixth transistor terminal, the fifth transistor terminal being configured to receive a second drive signal; a burst mode detector configured to receive the first drive signal and generate a burst-mode detection signal based at least in part on the first drive signal; and a drive signal generator configured to receive the burst-mode detection signal and generate the first drive signal and the second drive signal based at least in part on the burst-mode detection signal.

Abstract: An embodiment circuit comprises first and second output nodes with an inductor arranged therebetween, and first and second switches coupled to opposing ends of the inductor. The switches are switchable between non-conductive and conductive states to control current flow through the inductor and produce first and second output voltages. The current intensity through the inductor is compared with at least one reference value. Switching control circuitry is coupled with the first and second switches, the first and second output nodes, and current sensing circuitry, which is configured to control the switching frequency of the first and second switches as a function of the output voltages and a comparison at the current sensing circuitry. The switching control circuitry is configured to apply FLL-FFWD processing to produce the reference values as a function of a timing signal, targeting maintaining a constant target value for the converter switching frequency.

Abstract: A feedback loop circuit of a voltage regulator includes a voltage extraction circuit and a loop filter circuit. The voltage extraction circuit receives an error voltage signal that is indicative of difference between an output voltage signal and a reference voltage of the voltage regulator, and generates a voltage extraction signal by extracting one representative voltage for one switching cycle of the voltage regulator according to the error voltage signal. The loop filter circuit applies filtering to the voltage extraction signal to set a feedback signal, and output the feedback signal to a controller circuit of the voltage regulator for regulating the output voltage signal.

Abstract: A control circuit for a multiphase buck converter includes a regulator circuit and a plurality of phase control circuits. The regulator circuit generates a regulation signal based on a feedback signal and a reference signal, and each phase control circuit receives a current sense signal and generates a respective PWM signal based on the respective current sense signal and the regulation signal. The control circuit includes a first selector circuit and a second selector circuit configured to receive a selection signal and selectively connect each phase control circuit of a subset of the phase control circuits to a PWM signal for driving a respective stage of the multiphase buck converter, and to a current sense signal provided by the respective stage of the multiphase buck converter. A selection control circuit generates the selection signal in order to connect the phase control circuits to different stages of the multiphase buck converter.

Abstract: A current detection circuit includes: a detection resistor provided between an output of a driver circuit and a load; a power supply circuit configured to operate between a first power supply and a virtual ground potential, and generate a second power supply having a predetermined voltage difference from the virtual ground potential; and a signal processing circuit configured to operate between the second power supply and the virtual ground potential, and generate a detection signal corresponding to a voltage generated at the detection resistor. A virtual ground line for supplying the virtual ground potential is connected between the output of the driver circuit and the detection resistor.

Abstract: A power converter includes a voltage control unit, a current control unit and a hysteresis control unit. The voltage control unit generates a first current command. The hysteresis control unit couples the voltage control unit with the current control unit and is configured to: in the first mode, decouple the voltage control unit and the current control unit and generate a second current command to be transmitted to the current control unit when the detection current reaches the first threshold value, and couple the voltage control unit with the current control unit and transmit the first current command generated by the voltage control unit to the current control unit when the first current command reaches a second threshold value for switching to a second mode from the first mode. The current control unit outputs a mode control signal according to the first current command and the second current command.

Abstract: A multi-rail power converter assembly includes first and second interleaved power converters configured to output first and second rail currents. A control driver circuit includes first and second control outputs configured to output first and second control signals configured to control power conversion in the first and second power converters to generate the first and second rail currents. A first PWM generator receives a compensator control signal and generates the first control signal based on the compensator control signal. A second PWM generator receives a first modified compensator control signal and generates the second control signal based on the first modified compensator control signal. The control driver circuit is configured to generate the first modified compensator control signal based on an average of the first rail current and the second rail current.

Abstract: Methods, systems, and devices for varying a time average for feedback of a memory system are described. An apparatus may include a voltage supply, a memory array, and a regulator coupled with the voltage supply and memory array and configured to supply a first voltage received from the voltage supply to the memory array. The apparatus may also include a voltage sensor configured to measure a second voltage of the memory array and a digital feedback circuit coupled with the memory array and regulator and configured to generate feedback comprising information averaged over a duration based at least in part on the second voltage measured by the voltage sensor and to transmit an analog signal to the regulator based at least in part on the feedback.

Abstract: An embodiment voltage converter includes a first transistor connected between a first node of the converter and a second node configured to receive a power supply voltage, a second transistor connected between the first node and a third node configured to receive a reference potential, a first circuit configured to control the first and second transistors, and a comparator including first and second inputs. The first input is configured to receive, during a first phase, a first voltage ramp and, during a second phase, a set point voltage. The second input is configured to receive, during the first phase, the set point voltage and, during the second phase, a second voltage ramp.

Abstract: A method to operate a DC-DC power converter in a low power burst mode, the method including sampling an output voltage of the DC-DC power converter with a sampling frequency to determine when to initiate a burst for the low power burst mode; and adapting the sampling frequency based on the output voltage.

Abstract: In described examples, a controller includes a converter. The converter generates a first signal responsive to an input signal. A summing block is coupled to the converter. The summing block receives the first signal and generates a second signal. A limiter is coupled to the summing block and generates a third signal responsive to the second signal and a code signal. A logic block generates a target signal responsive to the third signal. The third signal transitions to an intermediate level at a first slew rate and the third signal transitions from the intermediate level to the target signal at a second slew rate.

Abstract: Power management in a computing device. A driver is registered with an operating system (OS) executing on the computing device to receive information about a position of a user interface control. If the user interface control is moved, the driver receives a notification of the user interface control position and determines a power management intervention based on the position The driver transmits the power management intervention to power control circuitry which sets a power setting of the computing device based on the intervention.

Abstract: A controller for controlling a light source module including a first LED array and a second LED array includes a first driving terminal and a second driving terminal. The controller is operable for turning on a switch between a power converter and the first LED array by the first driving terminal to deliver electric power from the power converter to the first LED array in a first sequence of discrete time slots, and for turning on a second switch between the power converter and the second LED array by the second driving terminal to deliver electric power from the power converter to the second LED array in a second sequence of discrete time slots, where the first sequence of discrete time slots and the second sequence of discrete time slots are mutually exclusive.