Abstract: Offset calibration technique to improve performance of band gap voltage reference. An example of a bandgap reference source includes an output resistor, a first and second transistors and a differential amplifier. A positive-input calibration phase switch is in communication with a positive amplifier input, a emitter of the first and second transistor and a negative-input calibration phase switch in communication with the negative amplifier input, the emitter of the first and second transistor. A positive-output calibration phase switch is in communication with the positive amplifier output, the first and second terminal of the output resistor and a negative-output calibration phase switch is in communication with the negative amplifier output, the first and second terminal of the output resistor. An adjustable resistance is in communication with the emitter of the first transistor, the emitter of the second transistor, and the second terminal of the output resistor.

Abstract: A voltage booster system for use, for example, in an electric vehicle places a switched capacitor voltage converter between a high voltage battery and the vehicle's electrical load, typically a traction power inverter for driving the vehicle's electric motor. The battery input to the converter is pulsed to couple a charging voltage to the converter while the converter is disconnected from the load. The converter is then coupled to the load during the period that the pulse input is disconnected.

Abstract: A load driving device has a switch N1, a driver that performs on/off control of the switch in accordance with SWON, a comparator that compares Vdet1 with Vth, and based on a result of the comparison, generates IPEAKDET, an ADC that converts Vdet1 into ADCOUT, a DAC that converts IPEAKSET into Vth, and a logic portion that, upon receiving inputs of IPEAKDET and ADCOUT, outputs SWON and IPEAKSET. The logic portion includes a computation circuit that calculates Y1 by using a computation equation expressed by Y1=AVE×?+?×Ton/2 (where Y1: a signal value of IPEAKSET; AVE: an average current set value of an output current; ?: an adjustment coefficient for AVE; Ton: an on period; ?: a change rate of AVCOUT). The computation circuit determines a in accordance with computation mode setting signals ISO and PFC.

Abstract: A power supply circuit includes: a depression mode transistor that includes a field plate; an enhancement mode transistor to which a source electrode and a drain electrode of the depression mode transistor are coupled; and a constant current source that is coupled to a connection node between the depression mode transistor and the enhancement mode transistor.

Abstract: A circuit for an electronic device translates logic-low and logic-high voltage levels into other voltage levels suitable for digital intercommunication between the host electronic device and external devices, and between different external devices. The circuit comprises a power supply, a processing module, a communicating module, and a voltage converting module. The power supply provides a first voltage, a second voltage, and a pulse voltage with a predetermined duty cycle. The voltage level converting module converts incoming or outgoing logic voltage levels between a first mode and a second or more modes.

Abstract: A timing control circuit for an electronic device is disclosed. The timing control circuit includes a first power supply voltage input, a second power supply voltage input, a third power supply voltage input, a first output, a second output, a switch circuit and a control circuit. The control circuit is connected with the switch circuit and configured to turn the switch circuit on/off. The switch circuit is connected between the first power supply voltage input and the first output and responds to the control circuit to delay, by means of adjustable (different capacitance values) capacitors, the power connections when the electronic device is turned on but to immediately disconnect the power connections when the electronic device is shut down, thereby controlling the sequence of power applications and avoiding the need for expensive chips or circuits.

Abstract: A capacitive load drive circuit includes a modulation circuit adapted to pulse-modulate a drive waveform signal to thereby generate a modulation signal, two switching elements (transistors) constituting a push-pull circuit and adapted to generate a power-amplified modulation signal, a low-side driver and a high-side driver adapted to switch ON/OFF of the respective switching elements, a bootstrap circuit, a power supply adapted to supply the low-side driver and the high-side driver with a predetermined electrical potential, and a first resistor disposed in a supply channel from the power supply to the bootstrap circuit.

Abstract: Disclosed herein are a switching mode converter and a method for controlling thereof. The switching mode converter includes a switching element, a bootstrap capacitor, and a control unit. The switching element is connected between one side of a first semiconductor device, another side of the first semiconductor device is connected to a ground, and an input power. The bootstrap capacitor is configured such that one side of the bootstrap capacitor is connected to the one side of the first semiconductor device. The control unit controls the output current or output voltage of a common charge pump provided to the switching element and the bootstrap capacitor in order to control the charging state of the bootstrap capacitor and the gate voltage of the switching element.

Abstract: A circuit includes a current source intended to be series-connected with a load between two terminals of application of a first D.C. voltage. An element limits the voltage across the load and a circuit controls the value of the current in the current source with the current flowing in the element.

Abstract: An integrated circuit for digital controlling switching noise spurs in a receiver by shifting a switching frequency (fs) to a clock frequency (fs+?f) to move a Kth harmonic of the switching frequency (fs) is provided. The integrated circuit includes a spur controlled clock that operates the clock frequency (fs+?f), and a DC-DC converter circuitry that includes a first power switch, and a second power switch. The first power switch and the second power switch are driven by the clock frequency (fs+?f). ?f ranges from ( f RF - Kf s ) + BW K ? ? to ? ? ( f RF - ( K - 1 ) ? f s ) - BW K - 1 , and fRF is center frequency of a received channel. None of the harmonics of the clock frequency (fs+?f) is present in a channel of interest. The switching frequency is larger than the channel bandwidth 2BW.

Abstract: A high efficiency DC/DC converter with high conversion ratio is provided. The DC/DC converter includes a power switch for selectively switching an electrical connection between one side of a power supply and anodes of a first diode and a second diode, a first capacitive element whose one side is connected to a cathode of the first diode, a second capacitive element whose one side is connected to a cathode of the second diode, a first-first switch for selectively switching an electrical connection between the other side of the first capacitive element and the other side of the power supply, and a second-first switch for selectively switching an electrical connection between the other side of the first capacitive element and one side of the second capacitive element.

Abstract: An inductor array chip includes a magnetic laminated body and a plurality of inductors. The magnetic laminated body includes a plurality of stacked magnetic layers. The plurality of inductors are arranged inside the magnetic laminated body. The inductance of a first inductor differs from the inductance of a second inductor. The inductors include a plurality of coil-shaped conductors and via-hole conductors. The plurality of coil-shaped conductors are arranged between the magnetic layers. The via-hole conductors electrically connect the plurality of coil-shaped conductors. The inductors include a plurality of inductors in which the section sizes of the coil-shaped conductors differ from one another.

Abstract: A display device including a voltage generator is disclosed. The voltage generator includes an analog driving voltage generator to convert a source voltage from an external source to an analog driving voltage and to output the analog driving voltage through an output terminal, a capacitor connected between the output terminal and a ground voltage node, and a discharge circuit connected between the output terminal and the ground voltage node to discharge a current at the output terminal in response to a blank synchronization signal.

Abstract: A regulator device includes: a power input terminal; a power output terminal; a plurality of regulators each including an operating FET and a monitoring FET to be driven together with the operating FET, the plurality of regulators being arranged in parallel between the power input terminal and the power output terminal; and a controller configured to drive the operating FET and the monitoring FET included in one of the regulators, when the controller determines whether the monitoring FET included in the one of the regulators have degraded, the controller configured to stop driving the operating FET and the monitoring FET included in the one of the regulators and configured to drive the operating FET and the monitoring FET included in another of the regulators.

Abstract: A method is disclosed to operate a voltage conversion circuit such as a buck regulator circuit that has a plurality of switches coupled to a voltage source; a slab inductor having a length, a width and a thickness, where the slab inductor is coupled between the plurality of switches and a load and carries a load current during operation of the plurality of switches; and a means to reduce or cancel the detrimental effect of other wires on same chip, such as a power grid, potentially conducting return current and thereby degrading the functionality of this slab inductor. In one embodiment the wires can be moved further away from the slab inductor and in another embodiment magnetic materials can be used to shield the slab inductor from at least one such interfering conductor.

Abstract: In general, in one aspect, a direct-current to direct-current (DC-DC) converter that receive one or more of input voltages and generates one or more of output voltages. The DC-DC converter is capable of operating at one of a plurality of voltage conversion ratios and selection of the one of a plurality of voltage conversion ratios is based on an input voltage received, the DC-DC converter may include a plurality of capacitors, a plurality of inductors, and a plurality of switches which create a plurality of switched cells connected in cascade, in a stack, or in cascade and in a stack, wherein each switched cell is capable of operating in one of a plurality of modes.

Abstract: A semiconductor integrated circuit that includes: a capacitive element that has a first end connected to a first node and a second end connected to a second node of higher electrical potential than the first node; and a semiconductor element that has a source electrode, a drain electrode and a gate electrode respectively formed in a second conducting region, the second conducting region being formed with a different conducting type to a first conducting region, and the first conducting region formed on a substrate, with the source electrode and the second conducting region connected to the first node, and the first conducting region connected to the second node.

Abstract: A regulator for providing a low dropout voltage at an output node of the regulator is provided. An amplifier has a non-inverting input terminal for receiving an input voltage, an inverting input terminal and an output terminal. A first resistor is coupled between a ground and the inverting input terminal of the amplifier. A second resistor is coupled to the inverting input terminal of the amplifier. A first transistor is coupled between a voltage source and the second resistor. A current source coupled between the voltage source and a gate of the first transistor provides a bias current. A second transistor coupled between the first transistor and a current mirror has a gate coupled to the output terminal of the amplifier. The first and second transistors are different type MOS transistors. The replica unit generates the low dropout voltage according to a voltage of the output terminal of the amplifier.

Abstract: A converter comprises a high side switch, a low side switch connected in series with the high switch, a gate drive circuit comprising a first drive port coupled to a gate of the high side switch, a second drive port coupled to a gate of the low side switch, an SRE input port and a PWM input port coupled to a PWM controller, wherein the PWM controller is selected from the group consisting of a first PWM controller having two complementary PWM outputs, a second PWM controller having a tri-state PWM output and a third PWM controller having a single PWM output.

Abstract: The present invention realized miniaturization of a power supply device using a multiphase system. The power supply device includes, for example, a common control unit, a plurality of PWM-equipped drive units, and a plurality of inductors. The common control unit outputs clock signals respectively different in phase to the PWM-equipped drive units. The clock signals are controllable in voltage state individually respectively. For example, the clock signal can be brought to a high impedance state. In this case, the PWM-equipped drive unit detects this high impedance state and stops its own operation. It is thus possible to set the number of phases in multiphase arbitrarily without using another enable signal or the like.

Abstract: A voltage regulator circuit includes a plurality of transistors and a control circuit. Each transistor has two source/drain terminal and a gate terminal. One source/drain terminal of each transistor is electrically coupled to a source voltage, and the other source/drain terminals of the transistors are electrically coupled to each other and corporately referred to as an output terminal of the voltage regulator circuit. The control circuit is electrically coupled to the gate terminals of the transistors and configured to determine the number of the transistors to be turned on according to the difference between the voltage at the output terminal and a predetermined reference voltage.

Abstract: A pre-driver circuit generates a driver bias signal based on a swing command, a driver impedance characteristic, and an input signal. A driver receives the driver bias signal and generates, in response, a driver signal having a swing and having an output impedance corresponding to the bias signal. Optionally, the driver receives power from a switchable one of multiple supply rails, according to the swing. Optionally, the driver has voltage controlled resistor elements and the driver bias signal is generated based on the swing command and a replica of the driver voltage controlled resistor elements.

Abstract: A voltage generator includes a DC/DC converter and first to third transistors. The DC/DC converter outputs a first voltage during a first period of a frame period and does not output the first voltage during other periods of the frame. The first transistor is coupled between the DC/DC converter and an output terminal, and is to be turned on during the first period. The second transistor is coupled between the output terminal and a third voltage source that supplies a third voltage lower than the first voltage, and is to be turned on during a second period of the frame period. The third transistor is coupled between the output terminal and a second voltage source that supplies a second voltage identical to or lower than the first voltage, and is to be turned on during a third period of the frame period.

Abstract: A power management and distribution (PMAD) system includes a main DC bus, an auxiliary DC bus, a power converter, one or more hybrid solid-state circuit breakers, and a controller. The power converter converts power from the main DC bus to provide a regulated output to the auxiliary bus. Each hybrid SSCB includes a main switch connected between the main DC bus and a load and an auxiliary switch connected between the auxiliary DC bus and the load. The controller selectively turns the main switch and the auxiliary switch On/Off to selectively supply power from the main DC bus and/or the auxiliary DC bus to the load, and to selectively regulate the voltage on the auxiliary DC bus.

Abstract: A power converter includes a first transistor operable to source current to a load when switched on, a second transistor operable to freewheel inductor current or sink current from the load when switched on, and a driver circuit. The driver circuit is operable to switch the first transistor on and the second transistor off during a first period, switch the first transistor off and the second transistor on during a third period after the first period, and connect a gate of the first transistor to a gate of the second transistor during a second period between the first and third periods when the gates of both transistors are floating.

Abstract: A circuit includes a switching device comprising a control terminal and first and second power terminals, and an inductive element having a first terminal electrically connected to the second power terminal of the switching device. The electronic circuit is configured such that in a first mode of operation, the control terminal of the switching device is biased off, current flows through the inductive element, and the switching device blocks a first voltage. In a second mode of operation, the control terminal of the switching device is biased off, and voltage blocked by the switching device decreases from the first voltage to a second voltage. In a third mode of operation, the control terminal of the switching device is biased on and the current flowing through the inductive element flows through the switching device.

Abstract: One embodiment provides A DC-DC converter system that includes a high side switch and a low side switch coupled to a power supply, each switch is configured to transition from an on state to an off state and from an off state to an on state to deliver current to an inductor and a load. This embodiment also includes low side driver circuitry configured to control the conduction state of the low side switch and configured to drive the low side switch with a first gate driving signal during a first mode of operation and with a second gate driving signal during a second mode of operation. The first gate driving voltage is stronger than the second gate driving signal and the second gate driving signal is configured to cause a slower switch transition of the low side switch compared to the first gate drive control signal.

Abstract: A power supply apparatus includes a first constant-power power supply that switches and supplies powers of j types (where j is a natural number of two or more), a second constant-power power supply that switches and supplies powers of k types (where k is a natural number of two or more), and a switching controller that selects and switches on the first and second variable-power power supplies, excluding power transition periods thereof, to supply a load with a constant power.

Abstract: A voltage stabilizing circuit including an input port, an output port, a transistor, a diode, a three-terminal voltage regulating reference source, a first resistor, and a second resistor. The transistor has a collector terminal and an emitter terminal connected to the input port and the output port, respectively. The diode has an anode connected to the input port and a base terminal of the transistor. The three-terminal voltage regulating reference source has an anode connected to ground, a cathode connected to the input port and a cathode of the diode, and a reference terminal The first resistor is connected between the cathode of the diode and the reference terminal of the three-terminal voltage regulating reference source. The second resistor is connected between ground and the reference terminal of the three-terminal voltage regulating reference source.

Abstract: A partial power converter includes a converter leg including an upper portion comprising at least one diode connected to a positive output node of an output terminal of the partial power converter and a lower portion comprising at least two switches connected in series with each other and with the at least one diode and to a negative output node of the output terminal of the partial power The partial power converter also includes at least one flying capacitor connected between the at least two switches at a first end and to either of the upper portion of the converter leg or the positive output node of the partial power converter at a second end.

Abstract: The present invention relates to a cascode circuit using MOS transistors. In one embodiment, an adaptive cascode circuit can include: (i) a main MOS transistor; (ii) n adaptive MOS transistors coupled in series to the drain of the main MOS transistor, where n can be an integer greater than one; (iii) a shutdown clamping circuit connected to the gates of the n adaptive MOS transistors, where the shutdown clamping circuit may have (n+1) shutdown clamping voltages no larger than rated gate-drain voltages of the main MOS transistor and n adaptive MOS transistors; and (iv) n conduction clamping circuits coupled correspondingly to the gates of the adaptive MOS transistors, where the n conduction clamping circuits may have n conduction clamping voltages no larger than the conduction threshold voltages of the adaptive MOS transistors.

Abstract: There is provided a multi-level converter capable of a multi-level converter capable of outputting power having various voltage levels by using a simple circuit with respect to a single input power supply, an inverter having the same, and a solar power supply apparatus having the same. The present invention provides a multi-level converter including a first buck-boost unit having a single power switch switching an input power supply and outputting a first power having a voltage level varied according to the switching of the power switch, a bypass unit outputting a second power having a voltage level of the input power supply, and a second buck-boost unit sharing the power switch with the first buck-boost unit and outputting a third power having a voltage level varied according to the switching of the power switch; an inverter having the same; and a solar power supply apparatus having the same.

Abstract: Described is an apparatus which comprises: a low-side switch coupled to an output node for providing regulated voltage supply; and a first driver operable to cause the low-side switch to turn off when the output node rises above a first transistor threshold voltage. Described is also a voltage regulator which comprises: a signal generator to generate a pulse-width modulated (PWM) signal; a bridge having a low-side switch coupled to an output node for providing regulated voltage supply according to the PWM signal; a first driver operable to cause the low-side switch to turn off when the output node rises above a first transistor threshold voltage; and a bridge controller to provide control signals to the first driver. The voltage regulator may operate without diode clamps and its operation is self-timed. The voltage regulator also provides tolerance against process variation.

Abstract: A voltage regulator circuitry (50) adapted to operate in a high-temperature environment of a turbine engine is provided. The voltage regulator may include a constant current source (52) including a first semiconductor switch (54) and a first resistor (56) connected between a gate terminal (G) and a source terminal (S) of the first semiconductor switch. A second resistor (58) is connected to the gate terminal of the first semiconductor switch (54) and to an electrical ground (64). The constant current source is coupled to generate a voltage reference across the second resistor 58. A source follower output stage 66 may include a second semiconductor switch (68) and a third resistor (58) connected between the electrical ground and a source terminal of the second semiconductor switch. The generated voltage reference is applied to a gating terminal of the second semiconductor switch (58).

Abstract: A DC-DC converter (100) includes a switching transistor (M0) connecting an input power terminal (VIN) to an inductor (114) that is also connected to an output power terminal (VOUT), a synchronous rectification transistor (M1) connected to a junction node (113) between the inductor (114) and the switching transistor (M0), and a synchronous rectifier control circuit (200) with an integration capacitor (226) having a voltage that is charged and discharged by first and second current sources (210, 220) to track the charging and discharging of the inductor current, thereby generating a synchronous rectifier control signal (SR) that is applied to the synchronous rectification transistor to discharge the inductor current to zero.

Abstract: In accordance with an embodiment, a method includes activating a first semiconductor switch having a first switch node coupled to a first input of a bootstrap circuit, a second switch node, and a control node coupled to a first end of a capacitor of the bootstrap circuit. A first end of the capacitor is coupled to the first input of the bootstrap circuit and a second end of the capacitor is set to a first voltage. Next, the first end of the capacitor is decoupled from the first input of the bootstrap circuit, and the second end of the capacitor is set to a second voltage. The control node is boosted to a first activation voltage that turns on the first semiconductor switch.

Abstract: Power extracted from an antenna inductively coupled to an alternating magnetic field is regulated to provide voltage supplies. In some implementations, a first voltage supply (e.g., 3.8 volts) provides regulated voltage to analog circuits and a second, lower, voltage supply (e.g., 1.4 volts) provides regulated voltage to digital circuits. The first voltage supply is regulated, using shunt regulation, by a first voltage regulator circuit. The second voltage supply is regulated, using a series regulation, by a second voltage regulator circuit. The second voltage regulator circuit is supplied by the shunted current from the first voltage regulator. Excess shunt current provided by the first regulator circuit can be bypassed (e.g., bypassed to ground). The second voltage regulator circuit can use a timer circuit to control the amount of charge transferred to a second voltage supply rail. The timer circuit can compensate for different currents from the first voltage regulator circuit.

Abstract: Disclosed is a bias circuit which includes a bias voltage generating part configured to generate a bias voltage using a reference current and a variable current; a reference current source part configured to provide the reference current to the bias voltage generating part; and a current adjusting part configured to provide the variable current to the bias voltage generating part and to adjust the amount of the variable current according to voltage levels of at least two input signals. The bias circuit prevents an increase in power consumption and improves a slew rate at the same time.

Abstract: A method of operating an electronic circuit including: a master converter including a master controller and a switch, a slave converter including a slave controller and a switch, designed to step up an input voltage of the electronic circuit to an output voltage, each converter operating in a quasi-resonant mode by zero-voltage switching of their respective switch, wherein: the master controller sends, when the master converter switch is turned on and when a preset phase-shift criterion is met, a control signal to the slave controller which turns off the slave converter switch, the master and slave controllers turn on the switch of their respective converter as soon as a zero voltage is detected across the terminals of the switch, wherein the electric current magnitude in the master converter switch is measured, and the preset phase-shift criterion is met when the measured magnitude reaches a preset value.

Abstract: The present invention discloses a buck switching regulator and a control circuit thereof, wherein the buck switching regulator converts an input voltage to an output voltage. The buck switching regulator includes: a power stage including an upper-gate switch, a lower-gate switch and an inductor, which are coupled to a switching node, wherein the upper-gate switch is electrically connected to the input voltage; a transistor electrically connected between the inductor and the output voltage; and a driver circuit, which controls the upper-gate switch and the lower-gate switch at least according to a current flowing through the transistor.

Abstract: A sub-module for a modular multi-stage converter has an energy store and a power semiconductor series circuit connected in parallel to the energy store. In the semiconductor series circuit, two power semiconductor switches that can be activated and deactivated and have the same forward direction are connected in series. A free-wheeling diode is connected in parallel and in the opposite direction to each power semiconductor switch. A first connection terminal is connected to the energy store. A second connection terminal is connected to a potential point between the power semiconductor switches and to the free-wheeling diodes thereof. A bridging switch is disposed between the connection terminals for bridging the sub-module. The power semiconductors thereof are not destroyed upon closing the bridging switch and at least one connection terminal and/or a bridging branch that connects the two connection terminals to each other has an inductive component.

Abstract: A supply arrangement, a supply unit and a method in which a switching element is connected in series to an operating voltage and an electrical load, wherein a supply unit supplies an electronic unit with power independently of the switching state of the switching element.

Abstract: One example embodiment may include a power supply system. The power supply system may include a main capacitor and a boost converter. The main capacitor is used to generate an electrical pulse. The boost converter is configured to be coupled to the main capacitor. Additionally, the boost converter includes a compensator supply including an energy storage capacitor that can store electrical energy. The boost converter also includes and a compensator inductor that receives the electrical energy from the compensator supply and is configured to supply electrical energy to the main capacitor when the main capacitor is generating the electrical pulse.

Abstract: A transistor device includes a high electron mobility field effect transistor (HEMT) and a protection device. The HEMT has a source, a drain and a gate. The HEMT switches on and conducts current from the source to the drain when a voltage applied to the gate exceeds a threshold voltage of the HEMT. The protection device is monolithically integrated with the HEMT so that the protection device shares the source and the drain with the HEMT and further includes a gate electrically connected to the source. The protection device conducts current from the drain to the source when the HEMT is switched off and a reverse voltage between the source and the drain exceeds a threshold voltage of the protection device. The protection device has a lower threshold voltage than the difference of the threshold voltage of the HEMT and a gate voltage used to turn off the HEMT.

Abstract: A DC/DC converter configurable for operating as a multiphase DC/DC. A controller produces a master drive signal for controlling a primary power switch to produce the output DC signal at a desired level. Multiple secondary power stages are coupled between the input and the output nodes for producing an output DC signal. Each of the multiple secondary power stages has at least one secondary power switch responsive to the input DC signal for producing the output DC signal. An expander system configures the DC/DC converter for operation in a multiphase DC/DC conversion mode. The expander system is responsive to the master drive signal for producing multiple slave drive signals respectively supplied to the multiple secondary power stages for controlling secondary power switches. The slave drive signals have phases shifted with respect to the master drive signal and with respect to each other.

Abstract: A voltage generating circuit includes first and second step-up circuits, each having first and second input terminals and an output terminal and configured to increase a voltage level of an input signal supplied through the first input terminal and output the signal with the increased voltage level through the output terminal. The second input terminal of the first step-up circuit is connected to the output terminal of the second step-up circuit and the second input terminal of the second step-up circuit is connected to the output terminal of the first step-up circuit. The voltage generating circuit may also include third and fourth step-up circuits and fifth and sixth step-up circuits having similar configurations.

Abstract: Devices, systems and methods are provided for a switched-mode voltage converter system with energy recovery. The device may include a first voltage converter circuit including a boost voltage node and an output voltage port coupled to a load. The first voltage converter circuit configured to deliver energy from the boost voltage node to the load in a first mode, and to deliver energy from the load to the boost voltage node in a second mode. The device may also include a second voltage converter circuit coupled to an energy source and to the boost voltage node, the second voltage converter circuit configured to convert a first voltage associated with the energy source to a second voltage associated with the boost voltage node.

Abstract: A self-biased reference circuit device (100) includes a first cascode current mirror (116), a second cascode current mirror (118), and a startup circuit (108). The first cascode current mirror (116) is capable to generate a first bias voltage (136) and a second bias voltage (140) in response to a first current and to generate a second current in response to the first and second bias voltages. The second cascode current mirror (118) is capable to generate a third bias voltage (164) in response to the second current, to generate a fourth bias voltage (168) in response to a third current, and to generate the first current in response to the third and fourth bias voltages. The startup circuit includes a first switch (188) and a second switch (196). The first switch (188) is capable to connect the first bias voltage (136) and fourth bias voltage (168) during startup.

Abstract: Dual frequency control of first and second pairs of switches of a buck-boost regulator with pass through band is disclosed. In buck and boost modes respectively a first pair of the switches is operated at high frequency and a second pair of the switches is operated at low frequency. In pass through mode, both pairs of switches are operated at low frequency. Dual frequency control and operation of the pairs of switches enables current sharing between positive and negative power leads in buck, boost and pass-through modes.

Abstract: A low power DC-DC converter includes a converter stage coupled to an input node, and having a low side switch and a rectifier switch. A peak current detector senses a current at the low side switch and a zero current detector senses a current at the rectifier switch. It is configured to set the low side switch to a non-conductive state and the rectifier switch to a conductive state if the peak current detector detects a predetermined peak current. It is configured to set the rectifier switch to a non-conductive state if the zero current detector detects zero current at the rectifier switch. A time interval between subsequent current peaks is triggered by a charge comparator receiving an average current fed to the low side and rectifier switches from the input node and a reference current coupled to the charge comparator by a reference current source.