With Amplifier Connected To Or Between Current Paths Patents (Class 323/316)
  • Patent number: 8547081
    Abstract: A reference voltage supply circuit is provided. The reference voltage supply circuit includes a first amplifier for amplifying a first input voltage and a fed back first reference voltage, a second amplifier for amplifying a second input voltage and a fed back second reference voltage, a reference voltage generator for generating the first reference voltage and the second reference voltage according to output signals of the first and second amplifiers and feeding the first and second reference voltages back to the first and second amplifiers, and a glitch remover turned on/off according to an input pulse signal to conduct or cut off current flowing between a power supply terminal and the ground.
    Type: Grant
    Filed: July 9, 2010
    Date of Patent: October 1, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Young Deuk Jeon, Young Kyun Cho, Jae Won Nam, Jong Kee Kwon
  • Patent number: 8536854
    Abstract: An electronic reference-signal generation system includes a supply invariant bandgap reference system that generates one or more bandgap reference signals that are substantially unaffected by bulk error currents. In at least one embodiment, the bandgap reference generates a substantially invariant bandgap reference signals for a range of direct current (DC) supply voltages. Additionally, in at least one embodiment, the bandgap reference system provides substantially invariant bandgap reference signals when the supply voltage varies due to alternating current (AC) voltages. In at least one embodiment, the bandgap reference system generates a bandgap reference voltage VBG, a “proportional to absolute temperature” (PTAT) current (“iPTAT”) and a “zero dependency on absolute temperature” (ZTAT) current (“iZTAT”) that are substantially unaffected by variations in the supply voltage and unaffected by a bulk error current.
    Type: Grant
    Filed: September 30, 2010
    Date of Patent: September 17, 2013
    Assignee: Cirrus Logic, Inc.
    Inventors: John L. Melanson, Prashanth Drakshapalli, Larry L. Harris
  • Patent number: 8536853
    Abstract: An integrated circuit device has a primary voltage regulator and an ultra-low power secondary voltage regulator. The ultra-low power secondary voltage regulator supplies voltage to certain circuits used for providing data retention and dynamic operation, e.g., a real time clock and calendar (RTCC) when the integrated circuit device is in a low power sleep mode. The primary voltage regulator provides power to these same certain circuits when the integrated circuit is in an operational mode.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: September 17, 2013
    Assignee: Microchip Technology Incorporated
    Inventor: D.C. Sessions
  • Patent number: 8531237
    Abstract: A low-pass filter that filters an input signal input to a filter input terminal to output a filtered output signal to a filter output terminal includes a capacitor, a first field-effect transistor, a first resistor, and a first current source. The capacitor is connected between the filter output terminal and ground. The first field-effect transistor has a gate terminal, a first conduction terminal connected to the filter input terminal, and a second conduction terminal connected to the filter output terminal. The first resistor is connected between the gate and first conduction terminals of the first transistor. The first current source is connected to the first resistor to supply a first current to the first resistor. The first resistor generates a first voltage thereacross based on the supplied first current for electrically biasing the gate terminal of the first transistor.
    Type: Grant
    Filed: July 13, 2010
    Date of Patent: September 10, 2013
    Assignee: Ricoh Company, Ltd.
    Inventor: Katsuhiko Aisu
  • Patent number: 8531171
    Abstract: A circuit including a first circuit, a second circuit, and a calibration circuit. The first circuit is configured to generate a first reference voltage potential. The second circuit is configured to generate a second reference voltage potential based on a calibration signal. The calibration circuit is configured to generate the calibration signal, to adjust the second reference voltage potential, based on the first reference voltage potential and the second reference voltage potential. The calibration circuit includes a comparing circuit configured to compare the first reference voltage potential and the second reference voltage potential, and a counter configured to increment a counter value based on the comparison of the first reference voltage potential and the second reference voltage potential and generate the calibration signal based on the counter value.
    Type: Grant
    Filed: September 26, 2011
    Date of Patent: September 10, 2013
    Assignee: Marvell International Ltd.
    Inventors: Sehat Sutardja, Jiancheng Zhang
  • Patent number: 8525542
    Abstract: A short circuit detection device is provided to check a circuit layout. The circuit layout includes electronic components connected in parallel. Any of the electronic components includes two contacts on the circuit layout. The short circuit detection device includes a determination circuit configured to determine whether a short circuit has occurred in the circuit layout, and a detection circuit configured to determine the specific electronic component or components responsible for the short circuit. The determination circuit connects with one contact of any of the electronic components. The detection circuit connects with two contacts of any of the electronic components.
    Type: Grant
    Filed: October 20, 2010
    Date of Patent: September 3, 2013
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventor: Jin-Liang Xiong
  • Patent number: 8519695
    Abstract: One of the objects of the present invention is to suppress variations in the frequency response of a feedback circuit due to variations in the value of a passive element in an error amplifier. One of the embodiments of the present invention provides a configuration allowing the frequency response of a feedback circuit in an error amplifier to be determined by not only the value of a passive element but the gain of an active element. This error amplifier includes a voltage-to-current converter which is an active element. In addition, a first terminal, a second terminal, an operational amplifier, a first resistor, a second resistor, first to fifth transistors, a first current source, and a second current source can be built into an integrated circuit, and a capacitor can be externally provided.
    Type: Grant
    Filed: October 25, 2010
    Date of Patent: August 27, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yoshiaki Ito
  • Patent number: 8513938
    Abstract: A reference voltage circuit includes a first amplifier, a first load device and a first PN junction device, second and third load devices and a second PN junction device, an offset voltage reduction circuit, a coupling node potential takeout circuit, and an area adjustment circuit. The offset voltage reduction circuit is configured to reduce an offset voltage between the first and second input terminals at the first amplifier, and the coupling node potential takeout circuit is configured to take out potentials of the first and second coupling nodes. The area adjustment circuit is configured to adjust an area of the second PN junction device in accordance with the potentials of the first and second coupling nodes which are taken out by the coupling node potential takeout circuit.
    Type: Grant
    Filed: December 11, 2011
    Date of Patent: August 20, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Suguru Tachibana, Hiroyuki Matsunami, Yukinobu Tanida
  • Patent number: 8508200
    Abstract: A power supply circuit comprises a power transistor, a differential amplifier, an I/V converter circuit, and an inverting amplifier, wherein the differential amplifier comprises a first current path in which a first resistor element, a first current mirror transistor, and a first control transistor are connected in series, and a second current path in which a second resistor element, a second current mirror transistor, and a second control transistor are connected in series, and the power supply circuit comprises a phase compensating capacitor element connected in parallel with the inverting amplifier, and a ripple removal rate improving capacitor element which is connected between ground and a connection point between the first resistor element and the first current mirror transistor, or between the ground and a connection point between the second resistor element and the second current mirror transistor.
    Type: Grant
    Filed: May 12, 2010
    Date of Patent: August 13, 2013
    Assignees: Semiconductor Components Industries, LLC, Sanyo Semiconductor Co., Ltd.
    Inventors: Ryuji Yamamoto, Yuichi Inakawa
  • Patent number: 8497671
    Abstract: The load driving device disclosed in the specification includes a controller to generate a first control signal based on an input signal, a first output transistor to supply an output current to a load according to the first control signal, a first dividing circuit to output a first divided voltage by dividing a voltage across a first primary electrode and a second primary electrode of the first output transistor by a first transistor and a second transistor connected in serial, a first voltage generating circuit to output a first reference voltage, and a first comparator to supply a first over current detection signal to the controller based on the first reference voltage and the first divided voltage.
    Type: Grant
    Filed: June 7, 2011
    Date of Patent: July 30, 2013
    Assignee: Rohm Co., Ltd.
    Inventor: Ryosuke Kanemitsu
  • Patent number: 8493051
    Abstract: A voltage follower circuit including an input stage for generating a difference between the input signal and the output signal. An output circuit receiving the first signal and producing the output signal. A slew boost circuit includes a first transistor having a control electrode for receiving the input signal, a first electrode coupled to a first current source, and a second electrode coupled to a first supply voltage, a second transistor having a control electrode coupled to the first electrode of the first transistor, a first electrode coupled to the first signal, and a second electrode coupled to the first supply voltage, and a third transistor having a control electrode coupled to the first electrode of the first transistor, a first electrode coupled to the first signal, and a second electrode coupled to a second supply voltage.
    Type: Grant
    Filed: October 3, 2011
    Date of Patent: July 23, 2013
    Assignee: Texas Instruments Incorporated
    Inventors: Vadim V. Ivanov, Harish Venkataraman, Susan A. Curtis
  • Patent number: 8482342
    Abstract: An embodiment of a circuit includes first and second branches, an amplifier, a compensation circuit, and a bias unit. The first and second branches are respectively operable to generate first and second currents. The amplifier has a first amplifier input node coupled to the first branch, a second amplifier input node coupled to the second branch, an amplifier output node coupled to the first and second branches, and a first compensation node. The compensation unit is operable to provide a first offset-compensation signal to the first compensation node. And the first bias unit is operable to provide first and second bias signals to the first and second input nodes, respectively, such that the amplifier is operable to cause the first current to approximately equal the second current.
    Type: Grant
    Filed: October 27, 2010
    Date of Patent: July 9, 2013
    Assignee: STMicroelectronics S.r.l.
    Inventors: Antonino Conte, Mario Micciche, Maria Giaquinta, Rosario Roberto Grasso
  • Patent number: 8476967
    Abstract: Provided is a constant current circuit and a reference voltage circuit with improved line regulation without needing a start-up circuit. The constant current circuit includes: a constant current generation circuit including NMOS transistors and a resistor; a current mirror circuit including a pair of depletion mode NMOS transistors, for allowing a current of the constant current generation circuit to flow; and a feedback circuit for maintaining constant voltages of source terminals of the pair of depletion mode NMOS transistors.
    Type: Grant
    Filed: November 9, 2011
    Date of Patent: July 2, 2013
    Assignee: Seiko Instruments Inc.
    Inventors: Yuji Kobayashi, Takashi Imura, Masakazu Sugiura, Atsushi Igarashi
  • Patent number: 8427129
    Abstract: A high current drive bandgap based voltage regulator for providing a reference voltage at a an output voltage at a designed output voltage value. The high current drive bandgap based voltage regulator includes a high current drive output transistor, a feedback network, an output terminal and an operational amplifier. The feedback network is coupled between the output of the transistor and the input of the transistor. The operational amplifier is in the feedback network and has at least two operational amplifier input terminals and an operational amplifier output terminal. The operational amplifier output terminal is coupled to the transistor input terminal, and the operational input terminals are coupled to the transistor output terminal. The output terminal of the high current drive bandgap based voltage regulator is coupled to the output of the high current drive transistor.
    Type: Grant
    Filed: June 13, 2008
    Date of Patent: April 23, 2013
    Inventor: Scott Lawrence Howe
  • Patent number: 8427130
    Abstract: Soft start circuits for a switching power converter include an amplifier configured to operate from a common bias node and amplify a difference between a positive input and a negative input to generate an amplifier output. A soft start bias circuit supplies a soft start bias current during a soft start process for the switching power converter. An operational bias circuit supplies an operational bias current after the soft start process. In some embodiments, a capacitor is operably coupled to the amplifier output and is configured to provide a frequency compensation for the switching power converter and a charging ramp for the soft start process. In some embodiments, the soft start circuit is configured such that the soft start bias current is at least an order of magnitude smaller than the operational bias current and limits a current that the amplifier can during the soft start process.
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: April 23, 2013
    Assignee: Integrated Device Technology, Inc.
    Inventor: A. Paul Brokaw
  • Patent number: 8421426
    Abstract: An embodiment of a driving device is proposed for supplying at least one regulated global output current to a load. The driving device includes programming means for programming a value of the global output current within a global current range. Reference means are provided for supplying a reference voltage, which has a value corresponding to the value of the global output current. Conversion means are then used for converting the reference voltage into the global output current. In the driving device according to an embodiment of the disclosure, the conversion means include a plurality of conversion units for corresponding partial current ranges, which partition the global current range. Each conversion unit is adapted to convert the reference voltage into a partial output current that contributes to the global output current, with the partial output current that is within the corresponding partial current range.
    Type: Grant
    Filed: March 31, 2010
    Date of Patent: April 16, 2013
    Assignee: STMicroelectronics S.r.l.
    Inventors: Roberto La Rosa, Massimo Michele Antonio Sorbera
  • Patent number: 8421434
    Abstract: A temperature corrected voltage bandgap circuit is provided. The circuit includes first and second diode connected transistors. A first switched current source is coupled to the one transistor to inject or remove a first current into or from the emitter of that transistor. The first current is selected to correct for curvature in the output voltage of the bandgap circuit at one of hotter or colder temperatures.
    Type: Grant
    Filed: June 10, 2011
    Date of Patent: April 16, 2013
    Assignee: Dolpan Audio, LLC
    Inventor: David Cave
  • Publication number: 20130082676
    Abstract: A voltage follower circuit including an input stage for generating a difference between the input signal and the output signal. An output circuit receiving the first signal and producing the output signal. A slew boost circuit includes a first transistor having a control electrode for receiving the input signal, a first electrode coupled to a first current source, and a second electrode coupled to a first supply voltage, a second transistor having a control electrode coupled to the first electrode of the first transistor, a first electrode coupled to the first signal, and a second electrode coupled to the first supply voltage, and a third transistor having a control electrode coupled to the first electrode of the first transistor, a first electrode coupled to the first signal, and a second electrode coupled to a second supply voltage.
    Type: Application
    Filed: October 3, 2011
    Publication date: April 4, 2013
    Inventors: Vadim V. Ivanov, Harish Venkataraman, Susan A. Curtis
  • Patent number: 8390491
    Abstract: Embodiments of the present invention may provide an integrated circuit that may comprise a first transistor to receive an input voltage signal at its gate and generate an output voltage signal at its drain. Further, the integrated circuit may comprise a second transistor to form an active load of the first transistor, the second transistor may have its drain and gate coupled to the drain of the first transistor. In addition, the integrated circuit may comprise a third transistor to form a current mirror with the second transistor, a fourth transistor to form an active load of the third transistor, and a fifth transistor to form a current mirror with the fourth transistor. The fifth transistor may be connected to the drain of the second transistor. The integrated circuit may form an amplifier and Gm stage of a reference buffer.
    Type: Grant
    Filed: January 14, 2011
    Date of Patent: March 5, 2013
    Assignee: Analog Devices, Inc.
    Inventor: Tsutomu Wakimoto
  • Patent number: 8384370
    Abstract: Provided is a voltage regulator in which a maximum output current and a short-circuit output current may be accurately set. As a circuit for determining respective current values of a maximum output current (Im) and a short-circuit output current (Is) of an overcurrent protection circuit, the voltage regulator includes a current mirror circuit for mirroring a current in accordance with an output current so as to be capable of current control, without employing a resistor for converting a current into a voltage. Therefore, the maximum output current (Im) and the short-circuit output current (Is) may be accurately set with respect to an output current (Iout).
    Type: Grant
    Filed: February 22, 2010
    Date of Patent: February 26, 2013
    Assignee: Seiko Instruments Inc.
    Inventor: Takao Nakashimo
  • Patent number: 8373491
    Abstract: A current mirror circuit exhibits improved current matching by applying a switching signal to ground path switches in series with transistors in both a reference path and an output path of the current mirror. The switching signal may comprise a high-frequency signal, which may be phase modulated. A plurality of matched, parallel-connected output transistors may be selectively enabled by qualifying the switching signal applied to each corresponding series-connected ground path switches by decoded digital modulation data. In one embodiment, the modulation data is decoded to thermometer-coded representation. In one embodiment, the switching signal path is identical to the reference and output circuits.
    Type: Grant
    Filed: March 14, 2011
    Date of Patent: February 12, 2013
    Assignee: ST-Ericsson SA
    Inventors: Norbert Van Den Bos, Roeland Heijna, Hendrik Visser
  • Patent number: 8351885
    Abstract: A Radio Frequency Receiver on a Single Integrated Circuit (“RFSIC”) is described. The RFSIC may include a mixer, a phase-locked loop (“PLL”) in signal communication with the mixer, and an on-chip auto-tuned RF filter in signal communication with both the mixer and PPL, such that the same PLL simultaneously tunes the frequency of the VCO and the frequency response of the auto-tuned RF filter.
    Type: Grant
    Filed: October 28, 2011
    Date of Patent: January 8, 2013
    Assignee: CSR Technology Inc.
    Inventors: Noshir Dubash, Jeffrey E. Koeller, Daniel Babitch
  • Patent number: 8350555
    Abstract: A method and apparatus for generating a low reference voltage having low power consumption characteristics is provided. A reference voltage generating apparatus includes a constant current source circuit which generates a reference current. A load circuit is connected to the constant current source circuit and generates a voltage which is proportional to the reference current. A current branch circuit removes a portion of temperature-invariant current components included in the reference current from a connection terminal of the constant current source circuit and the load circuit to a ground terminal through a current branch which is different from a current branch of the load circuit.
    Type: Grant
    Filed: March 6, 2012
    Date of Patent: January 8, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyoung-Rae Kim, Hyo-Sun Kim
  • Patent number: 8344720
    Abstract: A reference voltage generator includes a proportional to absolute temperature (PTAT) current source and a voltage divider. The PTAT current source is capable of providing a first current that is proportional to a temperature. The voltage divider is capable of receiving a second current that is proportional to the first current. The voltage divider is capable of outputting a reference voltage. The reference voltage is substantially independent from a change of the temperature.
    Type: Grant
    Filed: April 29, 2010
    Date of Patent: January 1, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Dipankar Nag, Chewn-Pu Jou
  • Patent number: 8330445
    Abstract: Provided herein are circuits and methods to generate a voltage proportional to absolute temperature (VPTAT) and/or a bandgap voltage output (VGO) with low 1/f noise. A first base-emitter voltage branch is used to produce a first base-emitter voltage (VBE1). A second base-emitter voltage branch is used to produce a second base-emitter voltage (VBE2). The circuit also includes a first current preconditioning branch and/or a second current preconditioning branch. The VPTAT is produced based on VBE1 and VBE2. A CTAT branch can be used to generate a voltage complimentary to absolute temperature (VCTAT), which can be added to VPTAT to produce VGO. Which transistors are in the first base-emitter voltage branch, the second base-emitter voltage branch, the first current preconditioning branch, the second current pre-conditioning branch, and the CTAT branch changes over time.
    Type: Grant
    Filed: August 23, 2010
    Date of Patent: December 11, 2012
    Assignee: Intersil Americas Inc.
    Inventor: Steven G. Herbst
  • Patent number: 8330529
    Abstract: Embodiments of a method, apparatus and circuit for voltage regulation are disclosed. One embodiment of a circuit includes a first field effect transistor (FET) having a gate, a drain and a source. A current source is connected to the drain of the FET. A second FET has a source connected to the source of the first FET by a node. The second FET also has a gate. A low-pass filter circuit has an input connected to the gate of the first FET and an output connected to the gate of the second FET.
    Type: Grant
    Filed: January 28, 2010
    Date of Patent: December 11, 2012
    Assignee: Xilinx, Inc.
    Inventors: Wenfeng Zhang, Qi Zhang
  • Patent number: 8299774
    Abstract: Power efficient power supply regulator circuits are disclosed. The circuits are configured to modify their overhead current according to current load. This is particularly advantageous for use in display devices with widely varying current loads. Such displays include bi-stable displays, such as interferometric modulation displays, LCD displays, and DMD displays.
    Type: Grant
    Filed: June 20, 2011
    Date of Patent: October 30, 2012
    Assignee: Qualcomm Mems Technologies, Inc.
    Inventor: Sameer Wadhwa
  • Patent number: 8294449
    Abstract: In accordance with a bandgap circuit and a method of starting the bandgap circuit, a start signal is continuously supplied to a differential amplifier circuit to start up the differential amplifier circuit that controls a bandgap core circuit until the differential amplifier circuit has started up, and then the supply of the start signal to the differential amplifier circuit is discontinued after the differential amplifier circuit has started up.
    Type: Grant
    Filed: August 25, 2009
    Date of Patent: October 23, 2012
    Assignee: Elpida Memory, Inc.
    Inventor: Akira Ide
  • Patent number: 8294450
    Abstract: An integrated circuit structure includes a bandgap reference circuit and a start-up circuit. The bandgap reference circuit includes a positive power supply node and a PMOS transistor including a source coupled to the positive power supply node. The start-up circuit is configured to be turned on during a start-up stage of the bandgap reference circuit, and to be turned off after the start-up stage. The start-up circuit includes a switch configured to interconnect a gate and a drain of the PMOS transistor during the start-up stage, and to disconnect the gate of the PMOS transistor from the drain of the PMOS transistor after the start-up stage.
    Type: Grant
    Filed: December 28, 2009
    Date of Patent: October 23, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Fu Lee, Gu-Huan Li
  • Patent number: 8264214
    Abstract: A low-voltage reference circuit may have a pair of semiconductor devices. Each semiconductor device may have an n-type semiconductor region, an n+ region in the n-type semiconductor region, a metal gate, and a gate insulator interposed between the metal gate and the n-type semiconductor region through which carriers tunnel. The metal gate may have a work function matching that of p-type polysilicon. The gate insulator may have a thickness of less than about 25 angstroms. The metal gate may form a first terminal for the semiconductor device and the n+ region and n-type semiconductor region may form a second terminal for the semiconductor device. The second terminals may be coupled to ground. A biasing circuit may use the first terminals to supply different currents to the semiconductor devices and may provide a corresponding reference output voltage at a value that is less than one volt.
    Type: Grant
    Filed: March 18, 2011
    Date of Patent: September 11, 2012
    Assignee: Altera Corporation
    Inventors: Albert Ratnakumar, Qi Xiang, Simardeep Maangat, Jun Liu
  • Patent number: 8258852
    Abstract: A motor driver circuit for driving the gate node of a high-side driver transistor to a boosted voltage from a charge pump draws little or no static current from the charge pump. The gate node is pulled to the boosted voltage by a p-channel pullup-control transistor that is driven by p-channel transistors that are pumped by capacitors that cut off current flow to ground from the charge pump. An n-channel output-shorting transistor shorts the gate node to the output when the high-side driver is turned off. A coupling capacitor initializes the shorting transistor for each output transition. A p-channel output-sensing transistor generates a feedback to a second stage that drives the coupling capacitor. P-channel diode transistors and an n-channel equalizing transistor control the voltage on the coupling capacitor.
    Type: Grant
    Filed: November 18, 2010
    Date of Patent: September 4, 2012
    Assignee: Hong Kong Applied Science and Technology Research Institute Co., Ltd.
    Inventors: Lap Chi David Leung, Yat Tung Lai, Chun Fai Wong, Kam Hung Chan, Kwok Kuen David Kwong
  • Publication number: 20120217951
    Abstract: A current reference generator including a current network, a bias network, and a loop amplifier. The current network includes first and second transistors of a first conductivity type and third, fourth and fifth transistors of a second conductivity type. The first, third and fifth transistors are series-coupled between voltage supply lines forming a first current path, and the second and fourth transistors are series-coupled between the supply lines forming a second current path. The control terminals of the first and second transistors are coupled together and the control terminals of the third and fourth transistors are coupled together. The bias network biases the fifth transistor. The loop amplifier is coupled to the current network and is operative to maintain constant current level through the first and second current paths independent of voltage variations of the supply lines and at very low supply voltage.
    Type: Application
    Filed: February 24, 2011
    Publication date: August 30, 2012
    Applicant: TOUCHSTONE SEMICONDUCTOR, INC.
    Inventor: M. Jeroen Fonderie
  • Patent number: 8248054
    Abstract: An ON/OFF detection circuit for detecting an electronic device includes a switch circuit, a current sampling circuit, an amplifying circuit, and a control circuit. The switch circuit includes an input terminal connected to a constant voltage source, an output terminal coupled to the electronic device, and a control terminal. The current sampling circuit is connected between the input terminal and the output terminal of the switch circuit, and is configured for sampling current flowing to the electronic device and converting sampled current into sampled voltage. The amplifying circuit is configured for filtering and amplifying the sampled voltage. The control circuit controls the ON and OFF of the electronic device and compares the sampled voltages with a comparison voltage to judge the electronic device is qualify or disqualify.
    Type: Grant
    Filed: June 7, 2010
    Date of Patent: August 21, 2012
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventor: Song-Lin Tong
  • Publication number: 20120200283
    Abstract: Provided is a voltage regulator including a ripple rejection ratio improving circuit that requires no readjustment such as trimming for each output voltage. An output of the ripple rejection ratio improving circuit is connected to a back gate of a MOS transistor forming a current mirror section or a back gate of an input stage MOS transistor of an error amplifier circuit. With this construction, a ripple at a power supply terminal or a ground terminal and a ripple at an output terminal can be canceled with each other, thereby being capable of improving the ripple rejection ratio.
    Type: Application
    Filed: January 30, 2012
    Publication date: August 9, 2012
    Inventor: Heng Socheat
  • Patent number: 8232781
    Abstract: A device for measuring the current flowing through a power transistor of a voltage regulator, the voltage regulator having an input voltage and providing a regulated output voltage and the power transistor coupled between the input and output voltages. The measuring device includes a further transistor adapted to mirror a portion of the current flowing through the power transistor, the further transistor and the power transistor have a first non-drivable terminal in common that is coupled to the input voltage. The measuring device also includes a circuit block to connect the second non-drivable terminals of the power and the further transistor and to provide an output current equal to the portion of the current flowing through the first transistor; the measuring device further including a circuit adapted to detect the output current of said circuit block.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: July 31, 2012
    Assignee: STMicroelectronics S.r.l.
    Inventors: Filippo Marino, Marco Minieri, Gaetano Petrina
  • Patent number: 8217708
    Abstract: A temperature sensor performs more precise temperature measurement, even when manufacturing fluctuations are present in semiconductor elements forming a circuit for generating a temperature-dependent current.
    Type: Grant
    Filed: November 10, 2009
    Date of Patent: July 10, 2012
    Assignee: Seiko Instruments Inc.
    Inventor: Kiyoshi Yoshikawa
  • Patent number: 8207787
    Abstract: According to a preferred embodiment of the present invention, a low-voltage operation constant-voltage circuit includes a band-gap reference voltage circuit including a resistor-diode series circuit as a main component. A resistor and a diode-connected bipolar transistor are connected in series to create a constant current. It also includes an output circuit connected in parallel to the resistor-diode series circuit and formed so that the same constant current as the current flowing through the resistor-diode series circuit flows. The output circuit includes a diode-connected MOS transistor, and is configured to cancel the positive temperature coefficient of the current flowing through the output circuit by the MOS transistor. With this, a stable output low-voltage of, e.g., about 0.6 V, excellent in temperature characteristics can be obtained regardless of the ambient temperature changes.
    Type: Grant
    Filed: August 13, 2009
    Date of Patent: June 26, 2012
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Kazuo Hasegawa, Hirohisa Suzuki
  • Patent number: 8188725
    Abstract: A voltage regulator (10) comprises a first transistor (13) which couples an input terminal (11) of the voltage regulator (10) to an output terminal (12) of the voltage regulator (10) and a second transistor (16). The first and the second transistors (13, 16) form a current mirror structure. Further on, the voltage regulator (10) comprises a control node (17) which is coupled to the input terminal (11) of the voltage regulator (10) via the second transistor (16) and which is coupled to the output terminal (12) of the voltage regulator (10) via a feedback circuit (28). Furthermore, the voltage regulator (10) comprises an amplifier (22) with an input terminal (23) which is coupled to the control node (17) and an output terminal (24) which is coupled to a control terminal (21) of the second transistor (16).
    Type: Grant
    Filed: August 25, 2008
    Date of Patent: May 29, 2012
    Assignee: austriamicrosystems AG
    Inventors: Paolo Draghi, Andrea Pierin
  • Patent number: 8183914
    Abstract: Structures and methods for providing a temperature independent constant current reference are provided. A constant Gm circuit is disclosed with embodiments including a voltage controlled resistor providing a current into a current mirror, the current mirror sinking a reference current at its output. By providing a feedback loop that controls the voltage controlled resistor, a temperature compensated circuit may be obtained. The temperature dependence of the voltage controlled resistor is positive and the feedback circuitry maintains this resistor at a value that compensates for the negative temperature dependence of the current mirror circuit. The reference current is thus obtained at a predetermined level independent of temperature.
    Type: Grant
    Filed: November 12, 2009
    Date of Patent: May 22, 2012
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsung-Hsien Tsai, Chien-Hung Chen, Min-Shueh Yuan
  • Patent number: 8179115
    Abstract: A bandgap circuit is provided, which includes a current source, a voltage boost circuit, a voltage input circuit, a voltage equalizer circuit, and a voltage output circuit. The current source provides a first current, a second current, and a third current, which are equal to one another. The voltage boost circuit provides a boost voltage by a single current path. The voltage input circuit receives the first and the second currents, and provides a first input voltage and a second input voltage based on the boost voltage. The voltage equalizer circuit receives the first and the second input voltages and equalize the two input voltages. The voltage output circuit provides a bandgap reference voltage according to the third current.
    Type: Grant
    Filed: July 15, 2009
    Date of Patent: May 15, 2012
    Assignee: Aicestar Technology (SuZhou) Corporation
    Inventor: Ling Wang
  • Patent number: 8169224
    Abstract: A power circuit includes a power transistor for feeding a load current to a load, a measuring transistor for coupling out a measurement current dependent on the load current, at least two coupling transistors for dividing the measurement current into an internal measurement current and into an external measurement current, wherein the external measurement current can be fed to an external evaluation circuit, and the internal measurement current is fed to an internal evaluation circuit for evaluation. A third coupling transistor can be coupled to the measuring transistor if a measuring device determines a non-coupled state, and the third coupling transistor can be decoupled from the measuring transistor if the measuring device determines a coupled state. The measuring device determines the coupled state if the external evaluation device is coupled to the power circuit, and the measuring device determines a non-coupled state if the external evaluation device is not coupled to the power circuit.
    Type: Grant
    Filed: July 8, 2009
    Date of Patent: May 1, 2012
    Assignee: Infineon Technologies Austria AG
    Inventors: Rainald Sander, Steffen Thiele, Markus Winkler
  • Patent number: 8159207
    Abstract: An LDO regulator (10) produces an output voltage (Vout) by applying the output voltage to a feedback input (6) of a differential input stage (10A) and applying an output (3) of the differential input stage to a gate of a first follower transistor (MP4) having a source coupled to an input (8) of a class AB output stage (10C) which generates the output voltage. Demanded load current is supplied by the output voltage during a dip in its value to a gate of a second follower transistor (MP5) having a gate coupled to the output of the input stage to decrease current in a current mirror (MN5,6) having an output coupled to a current source (I1) and a gate of an amplifying transistor (MN7). This causes the current source to rapidly turn on the amplifying transistor to cause it to rapidly turn on a cascode transistor (MN3), causing it to turn on a pass transistor (MP3) of the output stage.
    Type: Grant
    Filed: November 2, 2009
    Date of Patent: April 17, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Vadim V. Ivanov, Keith E. Kunz
  • Patent number: 8154272
    Abstract: A method and apparatus for generating a low reference voltage having low power consumption characteristics is provided. A reference voltage generating apparatus includes a constant current source circuit which generates a reference current. A load circuit is connected to the constant current source circuit and generates a voltage which is proportional to the reference current. A current branch circuit removes a portion of temperature-invariant current components included in the reference current from a connection terminal of the constant current source circuit and the load circuit to a ground terminal through a current branch which is different from a current branch of the load circuit.
    Type: Grant
    Filed: June 4, 2009
    Date of Patent: April 10, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyoung-Rae Kim, Hyo-Sun Kim
  • Patent number: 8138743
    Abstract: A band-gap reference voltage source circuit is constituted of a diode-pair circuit connected to a reference voltage output terminal, a first differential amplifier including a first transistor and a first operational amplifier, and a second differential amplifier including a second transistor and a second operational amplifier. The second differential amplifier operates based on a bias voltage, which is lower than a predetermined voltage, so as to forcedly pull up the level of the reference voltage output terminal via the second transistor before the first differential amplifier starts to pull up the level of the reference voltage output terminal up to the predetermined voltage via the first transistor.
    Type: Grant
    Filed: January 22, 2009
    Date of Patent: March 20, 2012
    Assignee: Elpida Memory, Inc.
    Inventor: Akira Ide
  • Patent number: 8120971
    Abstract: An internal source voltage generating circuit includes a comparison voltage generator which receives reference and internal source voltages, outputs to a second node a comparison voltage differentially amplified responsive to a voltage of a first node according to a difference between the reference and internal source voltages, and allows a driving current to flow from a third node to a fourth node. An internal voltage driver transfers an external source voltage to an output node responsive to the comparison voltage. A driving current generator increases the driving current flowing from the third node to the fourth node responsive to the voltage of the first node which rises when the internal source voltage abruptly drops. The internal source voltage generating circuit is insensitive to variation of an external source voltage, exhibits improved response time when an internal source voltage abruptly drops, and stably generates an internal source voltage.
    Type: Grant
    Filed: October 19, 2009
    Date of Patent: February 21, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ki-Seok Oh, Young-Sun Min
  • Patent number: 8102157
    Abstract: A multi-output power supply device of low noise is disclosed that converts a first input voltage to plural different voltages. The multi-output power supply device includes a first power supply circuit for generating a constant voltage from the first input voltage, and outputs the constant voltage through a first output terminal; and one or more second power supply circuits each including a charge pump circuit for generating a constant voltage from the output voltage from the first power supply circuit. Each of the second power supply circuits changes a period of a charging and discharging cycle for charging and discharging a flying capacitor according to an electric current output from the second output terminal.
    Type: Grant
    Filed: May 16, 2008
    Date of Patent: January 24, 2012
    Assignee: Ricoh Company, Ltd.
    Inventor: Hirohisa Abe
  • Patent number: 8098058
    Abstract: One aspect is a circuit arrangement having a load current path with a load transistor having a first and a second load path terminal and a control terminal. A first measurement current path includes a measuring transistor having a first and a second load path terminal and a control terminal. The control terminals and first load path terminals of the load transistor and the measuring transistor are coupled. A first regulating circuit has a controllable resistor and is designed to drive the resistor depending on electrical potentials at the second load path terminals of the load transistor and of the measuring transistor. A current mirror circuit is coupled between the first measurement current path and a second measurement current path. A deactivation circuit is designed to deactivate the first regulating circuit depending on a current flowing through the measuring transistor.
    Type: Grant
    Filed: December 1, 2009
    Date of Patent: January 17, 2012
    Assignee: Infineon Technologies AG
    Inventors: Aron Theil, Steffen Thiele
  • Patent number: 8093881
    Abstract: A first resistance element is coupled between a first rectifying element and an output node at which a reference voltage is generated. Second and third resistance elements are coupled in series between a second rectifying element and the output node. A differential amplifier outputs a control voltage corresponding to a difference between a first voltage generated at a connection point of the first rectifying element and the first resistance element and a second voltage generated at a connection point of the second resistance element and the third resistance element. A control circuit supplies a control current corresponding to the control voltage from the differential amplifier. A start-up circuit causes, by supplying a start-up current to the output node in response to supply of a power supply voltage, transition from a first stable state to a second stable state.
    Type: Grant
    Filed: March 4, 2011
    Date of Patent: January 10, 2012
    Assignee: Panasonic Corporation
    Inventor: Hirokuni Fujiyama
  • Patent number: 8080984
    Abstract: A voltage regulator is provided having high accuracy, low PSRR, and no headroom limitation. Generally, the regulator includes: an operational amplifier (OPAMP) having a non-inverting input coupled to a reference voltage; an output source follower coupled to and controlled by an output of the OPAMP, the output source follower including a drain coupled to a voltage source and a source coupled to an output-node of the regulator; a replica source follower coupled to and controlled by the OPAMP, the replica source follower including a drain coupled to the voltage source and a source coupled to circuit ground through a resistor network; and a feedback circuit extending from the output-node through a feedback resistor to the source of the replica source follower and through at least a first resistor of the resistor network to an inverting input of the OPAMP to couple a feedback voltage thereto. Other embodiments are also provided.
    Type: Grant
    Filed: May 21, 2008
    Date of Patent: December 20, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventor: Lionel Geynet
  • Patent number: 8080989
    Abstract: A bandgap reference voltage generating circuit, includes: at least two bipolar transistors; an operational amplifier; a first PMOS transistor; and a second PMOS transistor whose source is connected to the upper limit power supply voltage and which supplies the reference current to the bipolar transistors. Further, the bandgap reference voltage generating circuit includes a third PMOS transistor whose source is connected to the upper limit power supply voltage; a fourth PMOS transistor whose source is connected to the upper limit power supply voltage and gate is connected to a drain of the third PMOS transistor; a first NMOS transistor whose source is connected to the lower limit power supply voltage and drain is connected to a drain of the fourth PMOS transistor; and a second NMOS transistor whose drain is connected to the operational amplifier and gate is connected to the drain of the first NMOS transistor.
    Type: Grant
    Filed: December 26, 2008
    Date of Patent: December 20, 2011
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Eun-Sang Jo