With Amplifier Connected To Or Between Current Paths Patents (Class 323/316)
  • Patent number: 8073414
    Abstract: A Radio Frequency Receiver on a Single Integrated Circuit (“RFSIC”) is described. The RFSIC may include a mixer, a phase-locked loop (“PLL”) in signal communication with the mixer, and an on-chip auto-tuned RF filter in signal communication with both the mixer and PPL, such that the same PLL simultaneously tunes the frequency of the VCO and the frequency response of the auto-tuned RF filter.
    Type: Grant
    Filed: December 22, 2008
    Date of Patent: December 6, 2011
    Assignee: SiRF Technology Inc.
    Inventors: Noshir Dubash, Jeffrey E. Koeller, Daniel Babitch
  • Patent number: 8058924
    Abstract: A method and apparatus to reduce the degradation in performance of semiconductor-based devices due to process, voltage, and temperature (PVT) and/or other causes of variation. Adaptive feedback mechanisms are employed to sense and correct performance degradation, while simultaneously facilitating configurability within integrated circuits (ICs) such as programmable logic devices (PLDs). A voltage-feedback mechanism is employed to detect PVT variation and mirrored current references are adaptively adjusted to track and substantially eliminate the PVT variation. More than one voltage-feedback mechanism may instead be utilized to detect PVT-based variations within a differential device, whereby a first voltage-feedback mechanism is utilized to detect common-mode voltage variation and a second voltage-feedback mechanism produces mirrored reference currents to substantially remove the common-mode voltage variation and facilitate symmetrical operation of the differential device.
    Type: Grant
    Filed: January 29, 2009
    Date of Patent: November 15, 2011
    Assignee: Xilinx, Inc.
    Inventors: Guo Jun Ren, Prasad Rau, Jian Tan, Qi Zhang
  • Patent number: 8058863
    Abstract: A band-gap reference voltage generator is provided. N-channel metal oxide semiconductor (NMOS) transistors are respectively connected to bipolar transistors in parallel. A Complementary To Absolute Temperature (CTAT) voltage that is inversely proportional to absolute temperature is reduced by a threshold voltage of the NMOS transistor. A weight for a temperature coefficient of a Proportional To Absolute Temperature (PTAT) voltage that is directly proportional to absolute temperature is reduced and a resistance ratio for a temperature coefficient of 0 is reduced by about ½, thereby miniaturizing the band-gap reference voltage generator. A reference voltage lower than or equal to 1 V can be provided by resistors respectively connected to the bipolar transistors in parallel.
    Type: Grant
    Filed: April 22, 2009
    Date of Patent: November 15, 2011
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Young Kyun Cho, Young Deuk Jeon, Jae Won Nam, JongKee Kwon
  • Patent number: 8040123
    Abstract: A reference voltage circuit that obtains a precisely constant voltage by compensating a temperature variation of a reference voltage circuit using band gap voltage. A p-type MOS transistor (PNP) outputs a reference voltage according to a control voltage, and provides respective PNPs having diode connections with currents corresponding to the reference voltage. A temperature compensation unit adds compensation currents proportional to the second power of absolute current to currents flowing in the respective PNPs, so that both voltages generated corresponding to the currents flowing in the respective PNPs become the same in the case where the band gap unit has temperature characteristics including a peak value. The band gap unit has a differential amplifier for outputting the control voltage. In the case where the band gap unit has a bottom value, the compensation unit subtracts the above compensation currents from the currents flowing in the respective PNPs.
    Type: Grant
    Filed: July 18, 2008
    Date of Patent: October 18, 2011
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Kenji Yanagawa
  • Publication number: 20110234198
    Abstract: A differential reference voltage generator generates a first differential reference voltage and a second differential reference voltage. The differential reference voltage generator includes a first operational amplifier, a first transistor, a first resistor, and a second resistor. The first operational amplifier has a negative terminal adapted to receive a reference voltage. The first transistor has a source receiving a power supply voltage and has a gate electrically connected to an output terminal of the first operational amplifier. The first resistor has a first terminal electrically connected to a drain of the first transistor, and has a second terminal electrically connected to a positive terminal of the first operation amplifier. The second resistor has a first terminal electrically connected to the second terminal of the first resistor, and a second terminal electrically connect to a current mirror.
    Type: Application
    Filed: March 23, 2010
    Publication date: September 29, 2011
    Applicant: HIMAX TECHNOLOGIES LIMITED
    Inventor: Wen-Sheng Lin
  • Patent number: 8026710
    Abstract: A system includes a device configured to operate in a first mode and a second mode. The device includes a first circuit configured to receive a first band gap voltage potential from a first band gap circuit when the device is operating in the first mode, and a second circuit configured to receive a second band gap voltage potential from a second band gap circuit when the device is operating in the second mode. The device is configured to generate a mode select signal to selectively turn on and off the first band gap circuit and the second band gap circuit. A calibration circuit is configured to compare the second band gap voltage potential to the first band gap voltage potential, output a calibration signal to the second band gap circuit to adjust the second band gap voltage potential based on the comparison, and turn off the first band gap circuit in response to the second band gap voltage potential being within a predetermined range of the first band gap voltage potential.
    Type: Grant
    Filed: September 10, 2010
    Date of Patent: September 27, 2011
    Assignee: Marvell International Ltd.
    Inventors: Sehat Sutardja, Jiancheng Zhang
  • Patent number: 8013588
    Abstract: Provided is a reference voltage circuit capable of generating a temperature-independent reference voltage more stably. Each of N-type metal oxide semiconductor (NMOS) transistors (1) and (2) has a source and a back gate that are short-circuited, and hence threshold voltages (Vth1) and (Vth2) of the NMOS transistors (1) and (2) respectively depend only on process fluctuations in the NMOS transistors (1) and (2) and not on process fluctuations in other elements. As a result, a temperature-independent reference voltage (Vref) may be generated more stably.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: September 6, 2011
    Assignee: Seiko Instruments Inc.
    Inventor: Takashi Imura
  • Patent number: 8004349
    Abstract: High-accuracy overcurrent detection is performed, while a loss resulting from the current detection is significantly reduced. A switch section outputs the voltage between the both terminals of a current detection resistor using an AND signal between an output signal from a hysteresis comparator and an output signal from a pre-driver. The voltage is filtered by an electrostatic capacitor element and a resistor, and inputted to a comparator. The comparator makes a comparison between the signals inputted to the two input terminals thereof, and outputs the result of the comparison to a digital filter. When an overcurrent begins to flow in a power supply unit, the levels of the voltages inputted to the two input terminals of the comparator are inverted so that the comparator outputs an inversion signal to the digital filter. The digital filter outputs a detection signal to an overcurrent detection circuit when an arbitrary time has elapsed.
    Type: Grant
    Filed: November 19, 2010
    Date of Patent: August 23, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Osamu Yamashita, Yasuhiko Kokami, Masahiro Ishihara, Toshiyuki Tsunoda
  • Patent number: 7999529
    Abstract: Methods and apparatus are described that develop a reference voltage that is based on a difference between a threshold voltage of a first transistor and a threshold voltage of a second transistor, and further based on a difference between a gate overdrive voltage of the first transistor and a gate overdrive voltage of the second transistor.
    Type: Grant
    Filed: February 27, 2009
    Date of Patent: August 16, 2011
    Assignee: SanDisk 3D LLC
    Inventor: Tyler Thorp
  • Patent number: 7994846
    Abstract: A feedback mechanism to reduce current variation observed in a current reference branch circuit by using body voltage control to compensate process, temperature and supply voltage variations. The current reference output voltage, which is proportional to the reference current, is sampled into a feedback loop, which controls the field effect transistor body voltage. The method and mechanism uses Corner Robust Current Reference in order to keep the design simple and diminish variation between Process Voltage Temperature (PVT) corners. This method exhibits small variation in the reference current magnitude.
    Type: Grant
    Filed: May 14, 2009
    Date of Patent: August 9, 2011
    Assignee: International Business Machines Corporation
    Inventors: Oded Katz, Israel A. Wagner
  • Patent number: 7986188
    Abstract: A circuit includes a differential amplifier unit that receives an input signal at a non-inverting input thereof, a constant current source, a load circuit, an output transistor that receives an output of the differential amplifier unit as an input and drives a load circuit, a phase compensation circuit including a variable resistor and a capacitor connected in series between the input of the output transistor and a feedback path, an output current monitor circuit that detects an output current flowing through the output transistor, and a bias voltage generation circuit that varies a resistance value of the variable resistor in accordance with a result of the detection of the output current by the output current monitor circuit. A signal obtained by voltage dividing an output of the output transistor by resistors is supplied to an inverting input of the differential amplifier unit.
    Type: Grant
    Filed: April 2, 2010
    Date of Patent: July 26, 2011
    Assignee: Elpida Memory, Inc.
    Inventor: Atsushi Fujiwara
  • Patent number: 7977931
    Abstract: Power efficient power supply regulator circuits are disclosed. The circuits are configured to modify their overhead current according to current load. This is particularly advantageous for use in display devices with widely varying current loads. Such displays include bi-stable displays, such as interferometric modulation displays, LCD displays, and DMD displays.
    Type: Grant
    Filed: March 18, 2008
    Date of Patent: July 12, 2011
    Assignee: QUALCOMM MEMS Technologies, Inc.
    Inventor: Sameer Wadhwa
  • Publication number: 20110156822
    Abstract: A disclosed current source circuit includes a current mirror circuit having two enhancement-type MOS transistors, a depletion-type MOS transistor configured to be connected to a drain of one of the two enhancement-type MOS transistors and to function as a constant current source, and a resistor configured to have a negative temperature property and be connected to a source of the one of the two enhancement-type MOS transistors.
    Type: Application
    Filed: December 8, 2010
    Publication date: June 30, 2011
    Inventors: YOICHI TAKANO, Koichi Yamaguchi, Koichi Kuwahara
  • Patent number: 7965066
    Abstract: One aspect of the invention relates to a voltage regulation process as well as to a voltage regulation system. A first voltage, present at an input of the voltage regulating system, is changed into a second voltage, which can be tapped at an output of the voltage regulation system, with a first device for generating an essentially constant voltage from the first voltage, or a voltage derived from it. A further device is provided for generating a further voltage from the first voltage or a voltage derived from it, in particular a voltage which can be higher than the voltage generated by the first device.
    Type: Grant
    Filed: November 23, 2004
    Date of Patent: June 21, 2011
    Assignee: Qimonda AG
    Inventor: Martin Brox
  • Patent number: 7960959
    Abstract: An arrangement having a first converting element configured to convert an input current linearly into an auxiliary current, a second converting element configured to convert the auxiliary current into an output voltage, and a separating element configured to separate slow changes of the auxiliary current from fast changes of the auxiliary current, wherein the first, second, and separating elements are arranged as a dynamic control loop regulating the input current with the slow changes.
    Type: Grant
    Filed: March 12, 2007
    Date of Patent: June 14, 2011
    Assignees: Infineon Technologies Austria AG, Technische Universitaet Graz
    Inventors: Albert Missoni, Christian Klapf
  • Patent number: 7944195
    Abstract: Embodiments relate to a start-up circuit for a reference voltage generation circuit. According to embodiments, a start-up circuit may include a start-up start unit allowing current to flow in the reference voltage generation circuit to initiate a start-up process in response to a start-up start signal, a reference current generation unit decreasing a variable voltage depending on whether the reference voltage generation circuit is started up and generating start-up reference current corresponding to the variable voltage, and a start-up controller detecting current flowing in the reference voltage generation circuit, comparing the detected result with the start-up reference current, and outputting the compared result as a start-up start signal. Current consumption may be decreased after start-up. A BRG circuit may be stably started up. If a high supply voltage is used, current consumption may decrease, and if a low supply voltage is used, a BGR circuit may be stably started up.
    Type: Grant
    Filed: December 14, 2008
    Date of Patent: May 17, 2011
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Byung-Tak Jang
  • Patent number: 7944381
    Abstract: This disclosure relates to a compensating for nonlinearity resulting from a capacitance feedback in current cells of a single ended digital to analog circuit.
    Type: Grant
    Filed: February 15, 2010
    Date of Patent: May 17, 2011
    Assignee: Infineon Technologies AG
    Inventor: Franz Kuttner
  • Patent number: 7944194
    Abstract: A reference current generator circuit suitable for low-voltage applications is provided. The generator circuit is fabricated in a chip for generating a precise reference current based on a precise reference voltage and a precise external resistor. The generator circuit provides an equivalent resistance coupled in parallel with the external resistor to provide resistance compensation and reduce the impedance of seeing into the chip from a chip pad. In addition to the resistance compensation, only moderate capacitance compensation is required to enhance the phase margin of the generator circuit, so as to achieve a stable loop. Therefore, chip area and cost can be reduced in low-voltage applications. In addition, the generator circuit reproduces the reference current generated by the external resistor by utilizing current mirrors, so as to eliminate the effect on currents caused by parallel coupling of the equivalent resistance and the external resistor.
    Type: Grant
    Filed: December 1, 2008
    Date of Patent: May 17, 2011
    Assignee: Faraday Technology Corp.
    Inventors: Ting-Chun Huang, Kuan-Yu Chen, Yuan-Hsun Chang
  • Patent number: 7940036
    Abstract: A disclosed voltage comparison circuit for detecting a voltage difference of two input signals includes one or more differential amplifier circuits, each of which has a differential pair of first and second input transistors each having an electrode to which a corresponding one of the input signals is input, a constant current circuit configured to generate constant current according to a control signal and supply the constant current to the first and second input transistors, and a first resistor connected between the constant current circuit and the first input transistor; and a current control circuit configured to control a value of the first constant current. The current control circuit controls the value so that a voltage difference between both ends of the first resistor becomes equal to a predetermined value.
    Type: Grant
    Filed: February 9, 2009
    Date of Patent: May 10, 2011
    Assignee: Ricoh Company, Ltd.
    Inventor: Tomohiko Kamatani
  • Patent number: 7940037
    Abstract: An electronic device is provided comprising a driver for light emitting semiconductor devices. The driver includes a first MOS transistor (MN1) coupled with a channel to the light emitting semiconductor device at an output node. The first MOS transistor (MN1) is configured to determine a current through the light emitting semiconductor device (LED). A control loop is provided so as to control the first MOS transistor to maintain the magnitude of the current through the light emitting semiconductor device at a target value when a voltage drop across the first MOS transistor (MN1) changes. A second MOS transistor is coupled to the output node and biased so as to supply an auxiliary current to the output node, when the voltage drop across the first MOS transistor drops below a minimum voltage level and a feedback loop is provided to reduce the current through the light emitting semiconductor device by an amount proportional to the auxiliary current.
    Type: Grant
    Filed: October 7, 2008
    Date of Patent: May 10, 2011
    Assignee: Texas Instruments Deutschland GmbH
    Inventor: Franz Prexl
  • Patent number: 7936161
    Abstract: In a conventional bias circuit, as a power supply voltage increases, a current supplied to a bandgap reference becomes unstable due to a fluctuation of the power supply voltage, which makes it impossible for the bias circuit to perform stable bias operations in some cases. A bias circuit of the present invention has a bandgap reference, and includes a first current path supplying a drive current to the bandgap reference, and a second current path supplying a current to the bandgap reference for a predetermined period of time after power-on.
    Type: Grant
    Filed: June 9, 2008
    Date of Patent: May 3, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Kurao Nakagawa
  • Patent number: 7906993
    Abstract: A high linearity voltage-current converter able to compensate for mobility degradation comprises a first constant current source circuit, a first current mirror unit, a second constant current source circuit, a second current mirror unit, a seventh MOS transistor and an eighth MOS transistor. The first current mirror unit is coupled to the first constant current source circuit, and the second current mirror unit is coupled to the second constant current source circuit. The seventh MOS transistor, the first current mirror unit and the second current mirror unit are coupled to each other at a third joint point of a first conducting wire. The eighth MOS transistor is coupled to the seventh MOS transistor. Thereby, the electronic components used in the present invention can operate more efficiently.
    Type: Grant
    Filed: November 5, 2009
    Date of Patent: March 15, 2011
    Assignee: National Yunlin University of Science and Technology
    Inventors: Chun-Wei Lin, You-Cheng Huang, Chi-Fu Wang
  • Patent number: 7906954
    Abstract: A control circuit U1 comprises four PMOS transistors MP1-MP4 and receives a voltage Vn and a voltage Vss. MP1 and MP3, and, MP2 and MP4 are respectively connected in series between power supply Vdd and a fixed voltage Vss. Gate terminal of MP2 is connected to Vss. Reference current and its copy current F1 respectively flow through NMOS transistors M1 and M2, of which respective source terminals are connected to Vss. Gate width of M2 is a quarter of that of M1. Drain terminal is connected to the gate terminals of MP1 and MP2. Node between source terminal of MP2 and drain terminal of MP3 is connected to gate terminal of MP1, and node between source terminal of MP2 and drain terminal of MP4 is connected to gate terminal of MP2. The control circuit U1 controls gate terminal voltage of M1 to make an overdrive voltage of M1 becomes Vn.
    Type: Grant
    Filed: March 28, 2008
    Date of Patent: March 15, 2011
    Assignee: Fujitsu Limited
    Inventor: Masahiro Kudo
  • Patent number: 7907072
    Abstract: A DAC unit, connected to a current supply transistor, includes first control transistors connected in parallel to each other, with each being connected in series to the current supply transistor. The first control transistors drive currents at different current values in response to a bias voltage. The DAC unit also includes second control transistors connected in parallel to each other, with each being connected in series to the current supply transistor. Each second control transistor drives the current having the same current value as one of the first control transistors in response to the single bias voltage. The first and second control transistors driving the currents having the same current value operate in a complementary manner based on part of a digital code. The DAC unit generates an output current by selectively combining at least one of the currents driven by the first control transistors.
    Type: Grant
    Filed: September 2, 2009
    Date of Patent: March 15, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Hiroyuki Kimura
  • Patent number: 7903011
    Abstract: A differential current-mode sigma-delta digital-to-analog converter (SD DAC) and a method for generating positive and negative reference voltages in a sigma-delta digital analog converter are described. The SD DAC includes a low pass filter (LPF) having a first and second input. The SD DAC further includes a first resistance and a second resistance coupled together at a common node. The first resistance may be coupled to the first input of the LPF and the second resistance may be coupled to the second input of the LPF. Additionally, the SD DAC includes a current supply and a switching network for supplying current from the current supply to the first and second resistances. The current supply and the resistances operate to generate a first voltage and a second voltage at the first and second inputs of the LPF.
    Type: Grant
    Filed: September 12, 2007
    Date of Patent: March 8, 2011
    Assignee: Honeywell International Inc.
    Inventor: Paul M. Werking
  • Patent number: 7884594
    Abstract: Inventive embodiments described here provide for accurately distributing a voltage reference to multiple cores of an integrated circuit (IC). A quasi-differential interface is used to transmit the voltage reference, and a virtual ground is established at a receiver located at each core location on the integrated circuit. In one embodiment, the receiver is an operational transconductance amplifier (OTA) that converts a virtual-ground-referenced voltage input to a current. In one embodiment, the OTA converts the virtual-ground-referenced voltage into three currents via three driving current sources operating relative to the virtual ground and the local ground of the core. Negative feedback controls the accuracy of this conversion and provides a way to cancel the effects of the distribution resistance. The current is sourced across the voltage domains between the virtual ground and the VSS, which is the IC ground. An I*R drop across a resistor converts the current to a voltage referenced to VSS at the output.
    Type: Grant
    Filed: July 31, 2008
    Date of Patent: February 8, 2011
    Assignee: International Business Machines Corporation
    Inventor: Todd M. Rasmus
  • Patent number: 7880534
    Abstract: A reference circuit for providing a precision voltage and a precision current includes a bandgap voltage reference circuit, a positive temperature coefficient calibrating circuit, a threshold voltage superposing circuit and precision current generator interconnected in cascade. From the bandgap voltage reference circuit, a bandgap voltage is outputted as the precision voltage, and a PTAT current is outputted to the positive temperature coefficient calibrating circuit along with the bandgap voltage for generating a PTAT voltage. In response to the PTAT voltage from the positive temperature coefficient calibrating circuit, the threshold voltage superposing circuit generates a first voltage which is equal to the PTAT voltage plus a threshold voltage. Then the precision current generator outputs a reference current as the precision current in response to the first voltage.
    Type: Grant
    Filed: May 8, 2009
    Date of Patent: February 1, 2011
    Assignee: Faraday Technology Corp.
    Inventors: Din-Jiun Huang, Kuan-Yu Chen, Yuan-Hsun Chang
  • Patent number: 7863884
    Abstract: Circuits, methods, and apparatus that provide voltage references having a temperature independent output voltage that is less then the bandgap of silicon. The temperature coefficient and absolute voltage can be independently adjusted. One example generates two voltages, the first of which is proportional-to-absolute temperature and the second of which is complementary-to-absolute temperature. These voltages are placed across a first resistor. The first resistor is further connected to a second resistor to form a resistor divider. The resistor divider provides a reduced voltage that is below that bandgap of silicon. The temperature coefficient of the reference voltage provided by the resistor divider can be set by adjusting the first resistor. The absolute voltage provided can be set by adjusting the second resistor.
    Type: Grant
    Filed: January 8, 2009
    Date of Patent: January 4, 2011
    Assignee: Intersil Americas Inc.
    Inventor: Scott Douglas Carper
  • Patent number: 7859324
    Abstract: High-accuracy overcurrent detection is performed, while a loss resulting from the current detection is significantly reduced. A switch section outputs the voltage between the both terminals of a current detection resistor using an AND signal between an output signal from a hysteresis comparator and an output signal from a pre-driver. The voltage is filtered by an electrostatic capacitor element and a resistor, and inputted to a comparator. The comparator makes a comparison between the signals inputted to the two input terminals thereof, and outputs the result of the comparison to a digital filter. When an overcurrent begins to flow in a power supply unit, the levels of the voltages inputted to the two input terminals of the comparator are inverted so that the comparator outputs an inversion signal to the digital filter. The digital filter outputs a detection signal to an overcurrent detection circuit when an arbitrary time has elapsed.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: December 28, 2010
    Assignee: Renesas Electronics Corporation
    Inventors: Osamu Yamashita, Yasuhiko Kokami, Masahiro Ishihara, Toshiyuki Tsunoda
  • Patent number: 7855542
    Abstract: A voltage regulator circuit comprises an amplifier, bias network and startup circuit. The bias network is configured to generate a bias voltage for setting a bias current in the amplifier. The startup circuit is configured to mirror the amplifier bias current and to assist the bias network in setting the amplifier bias current based on the mirrored amplifier bias current until the bias voltage approximates a desired level.
    Type: Grant
    Filed: July 17, 2007
    Date of Patent: December 21, 2010
    Assignee: Qimonda AG
    Inventor: Benjamin Heilmann
  • Patent number: 7852062
    Abstract: A reference current generating apparatus is provided which is capable of generating a reference current having no temperature dependency, without increasing a layout area. The reference current generating apparatus includes a constant current generating circuit having a differential amplifier, a constant current generating circuit connected to the constant current generating circuit and having a differential amplifier, and an output circuit connected to the constant current generating circuit for outputting first and second reference voltages. The constant current generating circuit generates a reference current by enabling selection of a mirror ratio of a transistor that conducts summing of a constant current proportional to a thermal voltage, and by enabling switching of a dividing voltage from a resistor to an input of the differential amplifier, to generate a constant current proportional to a diode voltage via a high impedance MOS gate.
    Type: Grant
    Filed: June 9, 2008
    Date of Patent: December 14, 2010
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Naoaki Sugimura
  • Patent number: 7847534
    Abstract: Provided is a reference current circuit able to reduce temperature dependence of the reference current even in a case of using a resistor with extremely low temperature-dependent resistance. The reference current circuit comprises a non-inverting amplifier circuit 110 receiving a temperature-compensated reference voltage VBG and generating a voltage Vout1 at an output point; a current source circuit 120 composed of a transistor Q1 connected to the output point via a resistor and a transistor Q2 receiving a voltage equal to a voltage VBE1 generated across terminals of Q1 and generating a corresponding current. The circuit 110 (i) includes a third transistor Q3, a voltage VBE3 generated across terminals of which has the same temperature characteristic as the voltage VBE1, and (ii) is configured such that Vout1 is a sum of (a) a temperature-compensated voltage component based on VBG and (b) a voltage component equal-to-the voltage VBE3.
    Type: Grant
    Filed: March 26, 2008
    Date of Patent: December 7, 2010
    Assignee: Panasonic Corporation
    Inventors: Atsuo Inoue, Noriaki Matsuno
  • Patent number: 7839206
    Abstract: A design structure that includes at least one tunneling device voltage reference circuit for use in low voltage applications is disclosed. The tunneling device voltage reference circuit includes a pair of voltage dividing device stacks, one having a linear voltage output and the other having a non-linear voltage output. A feedback circuit supplies a regulated voltage to each of the voltage dividing stacks so that the output voltages of the two device stacks equalize. Once the feedback circuit has locked, any one of the device stack output voltages and the regulated voltage may be used as a voltage reference.
    Type: Grant
    Filed: September 6, 2007
    Date of Patent: November 23, 2010
    Assignee: International Business Machines Corporation
    Inventors: Wagdi W. Abadeer, Albert M. Chu
  • Patent number: 7834791
    Abstract: A digital-to-analog converter is coupled to a first voltage source and used for converting a digital input into an analog output. The DAC includes a voltage booster providing a first gate-source voltage and a second gate-source voltage to generate a voltage of a first level according to the first voltage source and the first gate-source voltage, and to generate a voltage of a second level according to the voltage of the first level and the second gate-source voltage; and a current-guiding circuit selectively receiving the voltage of the first level or the second level according to the digital input to generate the analog output. The first level and the second level vary with the first voltage source.
    Type: Grant
    Filed: February 12, 2009
    Date of Patent: November 16, 2010
    Assignee: Faraday Technology Corp.
    Inventors: San-Yueh Huang, Yung-Cheng Chu
  • Patent number: 7834610
    Abstract: A bandgap reference circuit includes a reference current generator for respectively generating a first reference current on a first current path and a second reference current on a second current path, a current mirror for generating a third reference current on a third current path based on the first and second reference currents, an operation amplifier for rendering the first reference current substantially identical to the second reference current and a feedback circuit for rendering a node voltage on the first current path substantially identical to another node voltage on the third current path, so as to eliminate possible errors caused by a channel length modulation effect in the current mirror.
    Type: Grant
    Filed: June 1, 2007
    Date of Patent: November 16, 2010
    Assignee: Faraday Technology Corp.
    Inventors: Yan-Hua Peng, Uei-Shan Uang, Mei-Show Chen
  • Patent number: 7830200
    Abstract: A circuit (200) can include a bias protection circuit (204) and a reference circuit (202). A bias protection circuit (204) can generate an internal power supply voltage (Vsuppi) from a higher device power supply (Vcch) with low voltage transistors and no resistors. A lower internal power supply voltage (Vsuppi) can be provided by buffer transistors (M5 and M6) that are biased according to limit section (206) that generates a bias voltage (biasn2) based on a threshold voltage drop and a feedback bias voltage (biasn1) from reference circuit (202).
    Type: Grant
    Filed: January 16, 2007
    Date of Patent: November 9, 2010
    Assignee: Cypress Semiconductor Corporation
    Inventors: T. V. Chanakya Rao, Badrinarayanan Kothandaraman
  • Patent number: 7821245
    Abstract: A voltage transformation circuit comprising a first input, a second input, a first output, first and second impedances and a current mirror having master and slave terminals, wherein the first impedance is connected between the first input and the master terminal of the current mirror, the second impedance is connected between the second input and the slave terminal of the current mirror, and the first output is connected to the slave terminal of the current mirror.
    Type: Grant
    Filed: August 6, 2007
    Date of Patent: October 26, 2010
    Assignee: Analog Devices, Inc.
    Inventor: Peter James Tonge
  • Patent number: 7816897
    Abstract: An electronic circuit. The electronic circuit includes a pass transistor having a channel coupled between an input node and an output node. An error circuit is coupled thereto and configured to control the amount of current flowing through the pass transistor. The electronic circuit may further include a feedback node. A current limiting circuit is coupled to both the feedback node and the error circuit. The current limiting circuit is configured to limit an amount of current provided to the pass transistor by the error circuit based on a on a feedback voltage present on the feedback node and a current through a current mirror circuit, and therefore limits the output current provided by the electronic circuit.
    Type: Grant
    Filed: March 10, 2006
    Date of Patent: October 19, 2010
    Assignee: Standard Microsystems Corporation
    Inventor: Paul F. Illegems
  • Patent number: 7812663
    Abstract: A bandgap voltage reference circuit includes an operational amplifier, a first transistor, a second transistor, a third transistor, a first resistor, a second resistor, a first diode, a second diode, and a divider. The first transistor, the second transistor, and the third transistor form current mirrors. The reference current of the current mirrors is generated according to the first diode, the second diode, and the first resistor. The reference voltage of the voltage reference circuit is output from the first end of the second resistor. The divider is coupled to the second end of the second resistor so that the reference voltage of the voltage reference circuit can be reduced.
    Type: Grant
    Filed: November 30, 2008
    Date of Patent: October 12, 2010
    Assignee: Ralink Technology Corp.
    Inventors: Tzuen-Hwan Lee, Ching-Chuan Lin
  • Patent number: 7804354
    Abstract: A system and method for extending the operating life of a device susceptible to defects caused by total ionizing dose radiation and/or bias dependent degradation are described. The device is replicated at least once and at least one switching mechanism is used to cycle between the devices such that only one device is operating normally. While the first device is operating normally, the other devices are biased. The bias condition may slow, eliminate, or even reverse device shifts that occur due to total ionizing dose radiation or bias effects.
    Type: Grant
    Filed: October 24, 2007
    Date of Patent: September 28, 2010
    Assignee: Honeywell International Inc.
    Inventor: David O. Erstad
  • Patent number: 7804286
    Abstract: An amplifier/comparator includes a multitude of output stages all sharing the same input stage. One or more of the output stages are amplification stages and have compensated output signals. A number of other output stages are not compensated and provide comparison signals. Each uncompensated output stage is adapted to switch to a first state if it detects a first input signal as being greater than a second signal, and further to switch to a second state if it detects the first input signal as being smaller than the second signal. By varying the channel-width (W) to channel-length (L) ratio (W/L) of the transistors disposed in the output stages, the trip points of the comparators and/or the electrical characteristics of the amplifiers are selectively varied.
    Type: Grant
    Filed: September 5, 2007
    Date of Patent: September 28, 2010
    Assignee: Linear Technology Corporation
    Inventor: Damon Lee
  • Patent number: 7795857
    Abstract: A band gap voltage reference circuit includes a first band gap circuit configured to generate a first band gap voltage potential. A second band gap circuit includes a variable resistance. The second band gap circuit is configured to output a second band gap voltage potential based on a value of the variable resistance. A calibration circuit is configured to adjust the variable resistance of the second band gap circuit based on the first band gap voltage potential and the second band gap voltage potential. The first band gap circuit is shut down in response to the second band gap voltage potential being within a predetermined range of the first band gap voltage potential.
    Type: Grant
    Filed: August 24, 2009
    Date of Patent: September 14, 2010
    Assignee: Marvell International Ltd.
    Inventors: Sehat Sutardja, Jiancheng Zhang
  • Patent number: 7777475
    Abstract: A method and apparatus for generating a voltage that is proportional to an absolute temperature (PTAT voltage). A current generator for generating a current that is proportional to absolute temperature (PTAT current) has an internal resistance and two diodes. The PTAT current is proportional to the resistance, and the temperature coefficient of the PTAT current is defined by the ratio of diode current densities. A feedback circuit has a source follower that is connected to the current generator for driving the output node with a regulated PTAT current wherein the PTAT current is mirrored accurately, providing a constant Vref.
    Type: Grant
    Filed: January 29, 2008
    Date of Patent: August 17, 2010
    Assignee: International Business Machines Corporation
    Inventors: Michael A. Sperling, Paul D. Muench, George E. Smith, III
  • Patent number: 7768339
    Abstract: Provided is a voltage regulator for limiting a rush current from an output stage transistor. The voltage regulator includes an output current limiting circuit having a low detection current value and an output current limiting circuit having a high detection current value, and is structured so as to enable operation of the output current limiting circuit having a low detection current value during a time period from a state in which an overheat protection circuit detects overheat and an output current is stopped to a state in which an overheat protection is canceled and a predetermined time passes. Accordingly, after the overheat protection is cancelled, an excessive rush current can be limited.
    Type: Grant
    Filed: January 16, 2009
    Date of Patent: August 3, 2010
    Assignee: Seiko Instruments Inc.
    Inventor: Teruo Suzuki
  • Patent number: 7764059
    Abstract: In one embodiment, a voltage reference circuit is configured to use two differentially coupled transistors to form a delta Vbe for the voltage reference circuit.
    Type: Grant
    Filed: December 20, 2006
    Date of Patent: July 27, 2010
    Assignee: Semiconductor Components Industries L.L.C.
    Inventor: Paolo Migliavacca
  • Patent number: 7755382
    Abstract: A current limited voltage supply including a transistor and a capacitor is provided for powering digital logic cells of an integrated circuit. The transistor is connected in a current mirror configuration, such that a constant reference current is mirrored through the transistor to create a first supply current. The transistor is coupled to the digital logic cells and the capacitor. The first supply current is used to charge the capacitor while the digital logic cells are not switching. While the digital logic cells are switching, the capacitor discharges to the digital logic cells, thereby providing the digital logic cells with sufficient energy to implement high-speed switching. The capacitor minimizes voltage fluctuations within in the current limited voltage supply, such that analog circuitry can be reliably powered from a different branch of the same current mirror circuit.
    Type: Grant
    Filed: August 22, 2008
    Date of Patent: July 13, 2010
    Assignee: Semiconductor Components Industries, L.L.C.
    Inventors: Iulian Dumitru, Liviu-Mihai Radoias, Marilena Mancioiu
  • Patent number: 7746164
    Abstract: Disclosed is a voltage generating circuit which steps down a voltage to output a stepped down voltage. The voltage generating circuit includes first and second transistors. The drains of the first and second transistors are connected to a higher voltage power supply. The gate of the first transistor is connected to the gate of the second transistor. The voltage of the gate of the first transistor is controlled by a control circuit such that a voltage of the source of the first transistor can reach a predetermined voltage. A stepped down voltage is outputted from the source of the second transistor.
    Type: Grant
    Filed: February 7, 2008
    Date of Patent: June 29, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Ryu Ogiwara, Daisaburo Takashima
  • Publication number: 20100156389
    Abstract: A current mirroring circuit is provided. The circuit generally comprises a current source; a first drain extended (DE) MOS transistor, a second DE MOS transistor, a current mirror, and differential amplifier. The current source is generally coupled to the current source at its drain, while the current mirror that is coupled to the sources of the first and second DE MOS transistors and to the current source. The differential amplifier generally has a first input that is coupled to the source of the first DE MOS transistor, a second input that is coupled to the source of the second DE MOS transistor, a first output that is coupled to the gate of the second DE MOS transistor, and a second output that is coupled to the gate of the first DE MOS transistor.
    Type: Application
    Filed: November 23, 2009
    Publication date: June 24, 2010
    Applicant: Texas Instruments Incorporated
    Inventors: Sandeep Oswal, Neetin Agrawal
  • Patent number: 7737675
    Abstract: A reference current generator for outputting a current proportional to absolute temperature includes a fixed current source transistor, a variable current source transistor and an output transistor which are connected to a drain voltage line. The fixed current source transistor is connected to a source voltage via a series of resistor and first diode. The variable current source transistor is connected to the source voltage via a second diode. A first node between the variable current source transistor and the resistor is connected with a noninverting input of an operational amplifier, and a second node between the variable current source transistor and the second diode is connected with an inverting input of the operational amplifier. The operational amplifier has its output connected to the gate electrode of both the fixed current source transistor and the output transistor, which outputs a PTAT current depending upon the gate voltage.
    Type: Grant
    Filed: September 11, 2007
    Date of Patent: June 15, 2010
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Yuko Murase
  • Patent number: RE42116
    Abstract: A low-dropout regulator comprises a high-gain error amplifier having a differential input stage and a single-ended output, a high-swing high-positive-gain second stage with input connecting to the output of the error amplifier and a single-ended output, a p-type MOS transistor with gate terminal connecting to the output of the second stage, source terminal connecting to the supply voltage, and drain terminal to the output of the low-dropout regulator. A first-order high-pass feedback network connects the output of the low-dropout regulator and the positive input of the error amplifier, and a damping-factor-control means comprising a negative gain stage with a feedback capacitor connects the input and output of this gain stage. A capacitor is connected between the output of the error amplifier and the output of the low-dropout regulator, while a voltage reference connects to the negative input of the error amplifier.
    Type: Grant
    Filed: April 16, 2009
    Date of Patent: February 8, 2011
    Assignee: The Hong Kong University of Science and Technology
    Inventors: Ka Nang Leung, Kwok Tai Philip Mok