Abstract: The present disclosure relates to a panel detection circuit and a display panel. The panel detection circuit comprises a source detection unit comprising a source testing line and several source switching units, a gate detection unit comprising a gate control line, a gate testing line and several gate switching unit, wherein the source switching unit and the gate switching unit each comprise at least two switching elements to keep the source switching unit and the gate switching unit disenabled after the panel detection is completed.

Abstract: The present disclosure relates to a peripheral test circuit of a display array substrate, and a liquid crystal display panel. The peripheral test circuit of a display array substrate includes: multiple groups of test signal lines, each group consisting of a first and a second test signal lines spaced from each other; a plurality of test pad leads, each being arranged in an interval formed between the first and the second test signal lines of a respective group, and connected with the first and the second test signal lines but not overlapped with the first and the second test signal lines of other groups; and a plurality of test pads, each being arranged on a respective test pad lead. According to the peripheral test circuit of the present disclosure, the problem existing in the current peripheral test circuit, i.e.

Abstract: A panel inspection apparatus and a display panel are provided in the present invention. The panel inspection apparatus includes a data line detecting circuit and a scan line detecting circuit. The data line detecting circuit includes a data line detection switch, a control line of the data line detection switch, and a data line of the data line detection switch. The scan line detecting circuit includes a scan line detection switch, a control line of the scan line detection switch, and a data line of the scan line detection switch. The present invention further provides a display panel. The panel inspection apparatus does not need to be removed after detection of the panel in accordance with the panel inspection apparatus and the display panel of the present invention. Therefore, production costs of the display panel are reduced, and productivity of the display panel is improved.

Abstract: A fast testing switch device arranged on a TFT-LCD array substrate is disclosed. The fast testing switch device switches the testing signals for testing a display area of the TFT-LCD array substrate. The fast testing switch device includes at least a first switch TFT. The gate of the first switch TFT connects to one control chip and a testing block for receiving the switch control signals from the testing block or the turn-off control signals from the control chip. The source of the first switch TFT connects to one data testing line or one gate testing line, and the drain of the first switch TFT connects to the corresponding data line or gate line of the display area. In addition, a corresponding TFT-LCD array substrate is also disclosed. The above configuration not only can achieve the narrow-bezel design but also can enhance the yield rate of the TFT-LCD array substrate.

Abstract: A display panel for display devices which enables precisely determining whether or not adjacent signal lines are shorted or opened and a method for detecting defects of the signal lines are disclosed. The display panel includes a substrate on which a plurality of signal lines to transmit various signals required by pixels is formed, and one of any two adjacent signal lines is connected to at least one of main signal transmission lines and the other one of the two adjacent signal lines is maintained in a floating state.

Abstract: A display panel includes a first substrate in which a display region and a circuit component mounting region are defined and a second substrate, an end of which is cut to expose the circuit component mounting region. The first substrate includes a plurality of first source wirings formed from the display region to the circuit component mounting region and a wiring protection pattern formed in a region corresponding to the cut end of the second substrate between any adjacent first source wirings. In a cross sectional view, an upper end of the wiring protection pattern is located above an upper end of the first source wirings.

Abstract: Disclosed are a liquid crystal display device and a testing method thereof. The liquid crystal display device includes a plurality of scan lines, and a plurality of data line sets crossing the scan lines, where each data line set includes a first data line, a second data line, and a third data line. The device also includes a shorting bar for the data lines, a first data switch control line and a second data switch control line. Through holes are not used to connect the data lines and the shorting bar, thus disadvantages of display devices caused by defects in through holes is eliminated. Additionally, the area for testing structures is decreased, so that a small-sized liquid crystal display devices can be produced.

Abstract: The present invention provides a testing device and a testing method. The testing method comprises: providing a testing device; bonding at least one connecting terminal of the testing device to signal lines of the display panel; and inputting test signals to the signal lines of the display panel through at least one test contact of the testing device. In the present invention, it is not required to arrange shorting bars on the display panel.

Abstract: A thin film transistor substrate, includes: pixels disposed in a display area of the thin film transistor substrate and connected to gate lines and data lines; gate pad parts connected to first ends of the gate lines; first test transistors each being connected to a second end of a corresponding gate line of the gate lines; data pad parts connected to first ends of the data lines; and second test transistors each being connected to a second end of a corresponding data line of the data lines. The gate pad parts, the data pad parts, the first test transistors, and the second test transistors are disposed in a non-display area of the thin film transistor substrate. The first test transistors are configured to be switched to receive a first inspection signal and the second test transistors are configured to be switched to receive a second inspection signal.

Abstract: This disclosure provides systems, methods and apparatus for a display apparatus including dummy display elements that can be switched between being coupled to a test bus and a drive bus. When connected to the drive bus, the circuit components, including thin-film transistors, of the dummy display element experience exposure to typical operating signals. When connected to the test bus, the display apparatus can test the operating parameters of the dummy display element circuit components.

Abstract: A slit-shaped repair hole (27S) for repairing a short circuit defect of adjacent pixel electrodes (27) is provided straddling a storage capacitance wiring line (22CsL) at at least one intersection of the edges of the pixel electrode (27) and the storage capacitance wiring line (22CsL).

Abstract: A method for designing a power distribution network of a circuit system includes the following steps: determining positions of a plurality of power source nodes; estimating a current distribution condition of the circuit system; and creating a first part of the power distribution network according to at least the positions of the power source nodes.

Abstract: A transmittance testing apparatus includes a frame bearing rod for support, and a light emitter carriage, a DUT carriage and a light receiver carriage supported by the frame bearing rod from bottom up; the light emitter carriage is used for placing a light emitter capable of emitting light, the DUT carriage is used for mounting a touch sensor, a light receiver carriage is used for placing a light receiver facing the DUT carriage. Positions of the light emitter, the touch sensor and the light receiver in the apparatus are fixed with respect to each other Thus, stable and accurate measurement of transmittance can be obtained.

Abstract: The present invention provides an array substrate and a display device, to solve the problem of low testing precision due to significant difference between characteristics of TFTs in the detecting region and TFTs in the display region in the prior art. The array substrate comprises a display region and a dummy pixel region provided in the periphery of the display region, wherein, at least one detecting unit is provided in the dummy pixel region, each detecting unit comprises one second pixel unit, one thin film transistor is provided correspondingly to each second pixel unit, and respective electrodes of each thin film transistor provided correspondingly to the second pixel unit are connected to an external test device through test lines, respectively.

Abstract: A display panel and a testing method are provided. The display panel has a display region and a peripheral circuit region, and includes an active device array substrate, an opposite substrate and a display medium located between the above two substrates. The active device array substrate includes scan lines, data lines, pixel units, a common electrode layer and testing lines. The scan lines and the data lines are intersected to define a plurality of pixel regions in the display region. The pixel units are disposed in the display region respectively, and each pixel unit is electrically connected to the corresponding scan line and the data line. The common electrode layer covers the data lines at least. The testing lines are disposed in the display region, and each testing line which is located between the common electrode layer and the data lines is at least overlapped to the data lines.

Abstract: A gate driver that comprises n shift registers, wherein n is an integer equal to or larger than 1, each of the n shift registers includes; a start stage which outputs a gate signal and starts its operation in response to a start signal, and a plurality of subsequent stages which are connected to each other in sequence, and which sequentially output a plurality of gate signals in response to a signal output from the start stage, wherein at least one stage of the plurality of subsequent stages is reset by the start signal.

Abstract: Provided is an organic light emitting display device including: a display unit including a plurality of pixels, each pixel of the pixels including an organic light emitting diode; and a test circuit configured to apply a first signal and a second signal to the display unit and to receive a third signal from the display unit. The test circuit is configured to determine whether or not the display unit is in a normal state based on a voltage level of the third signal when the first and second signals have a first level.

Abstract: A detecting circuit for pixel electrode voltage of a flat panel display device, the flat panel display device having a plurality of scanning lines and a plurality of data lines crossing with the plurality of scanning lines, the plurality of scanning lines and data lines define a plurality of pixel units, and each of the pixel units including a pixel switching element and a pixel electrode. The detecting circuit for pixel electrode voltage includes at least one detecting sub-circuit for pixel electrode voltage. The detecting sub-circuit for pixel electrode voltage includes: a signal amplifying unit connected with the pixel electrode in the pixel unit, for amplifying a voltage signal of the pixel electrode; and a signal detecting unit connected with the signal amplifying unit, for detecting the voltage signal of the pixel electrode that has been amplified by the signal amplifying unit, and outputting a variation in the voltage signal of the pixel electrode with time.

Abstract: An electro-optic device includes pixel electrodes; a data line block for providing an image signal to a first pixel electrode group and a second pixel electrode group in one column of pixel electrodes arrayed in a line in a first direction, the data line block being configured by data line pairs in which a pair of a first data line and a second data line extending in the first direction is arranged for each column; an image signal supplying unit for sequentially providing an image signal in time-series to each of the data line pairs configuring the data line block from one end of each of the data line pairs; and an inspection voltage supplying unit for supplying an inspection voltage from another end of each of the data line pairs each to the data line block and separately to each of the first data line and the second data line.

Abstract: Photo-field-effect transistor devices and associated methods are disclosed in which a photogate, consisting of a quantum dot sensitizing layer, transfers photoelectrons to a semiconductor channel across a charge-separating (type-II) heterointerface, producing a sustained primary and secondary flow of carriers between source and drain electrodes. The light-absorbing photogate thus modulates the flow of current along the channel, forming a photo-field effect transistor.

Abstract: A circuit structure of a test-key and a test method thereof are provided. The circuit structure comprises a plurality of transistors, a first conductive contact, a plurality of second conductive contacts and a plurality of third conductive contacts. The transistors are arranged in a matrix. The first conductive contact is electrically connected to one source/drain of each transistor in each column of the matrix. Each second conductive contact is electrically connected to the other source/drain of each transistor in a corresponding column of the matrix. Each third conductive contact is electrically connected to the gate of each transistor in a corresponding row of the matrix. In the method, a plurality of driving pulses are provided to the third conductive contacts in sequence, and a plurality of output signals are read from the second conductive contacts to perform an element-character analyzing operation when a row of the transistors is turned on.

Abstract: A liquid crystal display and a method for testing the liquid crystal display are disclosed. The liquid crystal display includes a TFT substrate including M scan lines and N data lines, a drive power line, and a switch unit adapted to connect the drive power line to the M scan lines under control of a control signal during a detection of a source of Mura of the liquid crystal display. The testing method includes: applying the control signal to the switch unit; applying a data signal to the N data lines; determining the source of the Mura of the liquid crystal display according to a current brightness of the liquid crystal display; and stopping applying the control signal to the switch unit.

Abstract: A method of testing a flat panel display including an array of pixels and a peripheral circuit configured to provide signals to the pixels is disclosed. The method includes applying at least one test signal to the peripheral circuit, acquiring one or more voltage images of the peripheral circuit, and detecting a defect in the peripheral circuit based on the acquired voltage images.

Abstract: A TFT-LCD array substrate includes a display area, a peripheral area located at a periphery of the display area, and a connecting device. Wherein, the display area includes a plurality of data lines and gate lines. The peripheral area provides with a first test short bar provided with a plurality of data test lines for transmitting a test signal for the data lines, and a second test short bar provided with a gate test line for transmitting a test signal for the gate lines. The connecting device includes a first connection layer and a second connection layer. The connecting device is disposed at a connection location between one of the data test lines and one of the data lines, or between the gate test line and one of the gate lines. A test method for testing the TFT-LCD array substrate is also provided.

Abstract: An active matrix substrate including: gate lines; source lines arranged in a direction orthogonal to each of the gate lines; a gate short-circuit line to short-circuit the gate lines; a source short-circuit line to short-circuit the source lines; gate line thin film transistors each having a drain electrode being connected to the corresponding one of the gate lines, and a source electrode being connected to the gate short-circuit line; and source line thin film transistors each having a drain electrode being connected to the corresponding one of the source lines, and a source electrode being connected to the source short-circuit line, in which the gate line thin film transistors and the source line thin film transistors are of depletion-mode, and the gate electrode of each of the source line thin film transistors is connected to the gate short-circuit line.

Abstract: A probing device for a TFT-LCD substrate, which includes a device body, a device body, a circuit board mounted on the device body, a plurality of motors mounted on the device body, and a plurality of probe pins respectively mounted to the motors. The motors and the probe pins are arranged in a one-to-one corresponding manner. The circuit board includes a programmable logic controller and a man-machine interface terminal electrically connected to the programmable logic controller. The plurality of motors and the plurality of probe pins are electrically connected to the programmable logic controller. The plurality of probe pins is set at locations corresponding to locations of panel inspection signal input pads of TFT substrates of various sizes. The programmable logic controller uses the motors to control the elevation and lowering of the probe pins.

Abstract: A test structure includes a terminal pattern, a first extending part, a second extending part and a measuring part. The terminal pattern includes a first terminal part, a second terminal part, a third terminal part and a fourth terminal part sequentially disposed and spaced apart from each other in a first direction. The first extending part is connected to the first terminal part and the second terminal part. The first extending part extends in a second direction crossing the first direction. The second extending part is connected to the third terminal part and the fourth terminal part. The second extending part extends in the second direction. The measuring part partially overlaps the first extending part and the second extending part.

Abstract: A liquid crystal panel, the testing circuit and the testing method thereof are disclosed. The testing circuit includes shorting bars, bonding pads, and switches. The switches are arranged between the shorting bars and the bonding pads. In the testing process, the switches are turn on upon receiving the testing signals so as to transmit the testing signals from the shorting bars to the bonding pads. When the testing process ends, the switches are turn off to prevent the liquid crystal panel from being affected by the signals of the bonding pads during the normal screen display of the liquid crystal panel. In this way, the manufacturing cost is reduced.

Abstract: A line detecting apparatus and a line detecting method for an array substrate relates to the field of line detecting technology. The detecting method comprises: arranging an input terminal sensor (30) at a signal input terminal of a wire to be detected, arranging one output terminal sensor (40, 41, 42, 43) at a signal output terminal of the wire to be detected, and arranging other output terminal sensor (40, 41, 42, 43) at a signal output terminal of another wire adjacent to the wire to be detected; measuring an output voltage of the wire to be detected by a voltage detector; and determining the line conduction condition of the wire to be detected according to the output voltage as measured. When the sensors perform line scan, the coordinate of the specific location where the short-circuit or open-circuit occurs can be found directly without performing scan by PDS or AOI, thus simplifying the technical processes, shortening the time for detecting, and saving the production cost.

Abstract: A method for testing an array for a pixel circuit of an organic light emitting diode display, which includes a first transistor that transmits a driving current corresponding to a data signal to an organic light emitting diode according to a scan signal and at least one capacitor, uses an array test device having a control device and a driver. The method includes performing a first irradiation of electron beams to an exposed portion of a first electrode of the at least one capacitor before manufacturing of the organic light emitting diode is completed, calibrating the control device of the array test device based on secondary electrons output by the at least one capacitor, performing a second irradiation of electron beams to an anode of the pixel circuit, and detecting whether the first transistor is normally operated based on an output amount of secondary electrons output by the anode.

Abstract: An object is to provide a measuring method with high reproducibility in a bias-temperature stress test of a transistor in which an oxide semiconductor is used for a semiconductor layer. Provided is a measuring method of a transistor, which includes the steps of disposing a transistor in which an oxide semiconductor is used for a semiconductor layer in a measurement room having a light-blocking property, introducing dry air, nitrogen, or argon into the measurement room, and applying a predetermined voltage to a gate electrode of the transistor in the measurement room kept under an atmosphere where the dew point is greater than or equal to ?110° C. and less than or equal to ?60° C., whereby the amount of change in threshold voltage over time is measured.

Abstract: A device for monitoring a liquid crystal display includes: a substrate including a display region and a non-display region disposed at an edge of the display region. The display region includes: a thin film transistor disposed on the substrate, a pixel electrode disposed on the substrate and connected to the thin film transistor, a first sacrificial layer disposed on the pixel electrode, and a roof layer disposed on the sacrificial layer. The non-display region includes: a second sacrificial layer disposed on the substrate, and the roof layer disposed on the second sacrificial layer. The first sacrificial layer has a first longitudinal dimension and a first cross-sectional area, and the second sacrificial layer has a second longitudinal dimension and a second cross-sectional area. The first cross-sectional area is the same as the second cross-sectional area. The second longitudinal dimension is greater than the first longitudinal dimension.

Abstract: A method for testing trap density in a gate dielectric layer of a semiconductor device having no substrate contact is provided in the invention. A source and a drain of the device are bilateral symmetric, and probes and cables of a test instrument connecting to the source and the drain are bilateral symmetric. Firstly, bias settings at the gate, the source and the drain are controlled so that the device is under an initial state that an inversion layer is not formed and traps in the gate dielectric layer impose no confining effects on charges.

Abstract: A voltage test device used in liquid crystal display (LCD) panels, including test solder pads and test lines, is proposed. The test solder pads are connected to an LCD panel through the test lines. Each of the test lines includes a switch test line and a signal-inputting test line. The voltage test device further includes a first connector. The switch test line includes a first portion of the switch test line and a second portion of the switch test line. The first portion of the switch test line is connected to the second portion of the switch test line through the first connector. The first connector is used for preventing the electric current in excess of a predetermined threshold from flowing inside the LCD panel. Meanwhile, a voltage testing system used in LCD panels is proposed.

Abstract: A built-in self-test (BIST) circuit for a liquid crystal display (LCD) source driver includes at least one digital-to-analog converter (DAC) and at least one buffer coupled to the respective DAC, wherein the buffer is reconfigurable as a comparator. A first input signal and a second input signal are coupled to the comparator. The first input signal is a predetermined reference voltage level. The second input signal is a test offset voltage in a test range.

Abstract: A thin film transistor substrate, includes: pixels disposed in a display area of the thin film transistor substrate and connected to gate lines and data lines; gate pad parts connected to first ends of the gate lines; first test transistors each being connected to a second end of a corresponding gate line of the gate lines; data pad parts connected to first ends of the data lines; and second test transistors each being connected to a second end of a corresponding data line of the data lines. The gate pad parts, the data pad parts, the first test transistors, and the second test transistors are disposed in a non-display area of the thin film transistor substrate. The first test transistors are configured to be switched to receive a first inspection signal and the second test transistors are configured to be switched to receive a second inspection signal.

Abstract: Disclosed is a test method an apparatus in which an area for test and an area for analysis are specified based on the design information of the display device having a non-rectangular display area. To carry out testing, parasitic capacitances are found using the design information, and operations for weighting are performed on test data or threshold values based on which a decision on pass/fail is to be made.

Abstract: A display device and a method of testing the display device. The display device includes a substrate including both a display region on which pixel cells are located and a peripheral region; test pads, main pins connected to the pixel cells, and dummy pins that are respectively connected to the test pads, the test pads, the main pins, and the dummy pins being on the peripheral region of the substrate, and visual test lines on the peripheral region of the substrate. The visual test lines include a first portion connected to the main pins and a second portion connected to the test pads, and the first and second portions are disconnected from each other.

Abstract: A display panel and a testing method of the display panel are provided. The display panel has a display region and a non-display region and includes a first substrate, a second substrate, and a display medium. The display panel further includes scan lines, data lines, pixel units, at least one testing line, and at least one testing pad. The scan lines and the data lines are located on the first substrate within the display region. The pixel units are located on the first substrate within the display region. Each pixel unit electrically connects one of the scan lines and one of the data lines. The testing line is located on the first substrate within the non-display region, crosses over the scan lines, and is insulated from the scan lines. The testing pad is located on the first substrate within the non-display region and electrically connected to the testing line.

Abstract: A detecting device for detecting a liquid crystal panel is provided. The detecting device includes a first detecting unit connected to data lines on the liquid crystal panel, a second detecting unit connected to scanning lines on the liquid crystal panel, and a signal generator connected to the first detecting unit and the second detecting unit; both the first detecting unit and the second detecting unit comprise a line area and connecting ports arranged on one side of the line area and connected to the signal generator; a plurality of lines are arranged on the line area, the lines having the same properties are connected together with one ends thereof respectively connected to the connecting ports and the other ends thereof connected to the corresponding signal lines arranged on the liquid crystal panel.

Abstract: The present invention discloses a TFT-LCD array substrate comprising a display area comprising a plurality of data lines and a plurality of gate lines; a peripheral area located at a periphery of the display area and provided with a first test short bar provided with a plurality of data test lines for transmitting a test signal for the data lines in the display area, and a second test short bar provided with a gate test line for transmitting a test signal for the gate lines in the display area; and a connecting device comprising a first connection layer and a second connection and provided at a connection location between one of the data test lines in the first test short bar and one of the data lines in the display area, or provided at a connection location between the gate test line in the second test short bar and one of the gate lines in the display area. The present invention also provides a corresponding test method. The present invention can achieve testing the TFT-LCD array substrate twice.

Abstract: An embodiment of the present disclosure provides a method of manufacturing an array substrate, comprising at least a step of forming a TFT pattern in a pixel region and correspondingly forming a TFT testing pattern in a testing region, wherein before forming a passivation layer to cover the pixel region and the testing region, a step of removing a gate insulation layer thin film above a testing line lead in the TFT testing pattern.

Abstract: A mother substrate including a plurality of organic light emitting display panels that include pixel circuits having a simple structure, is designed so that a sheet unit test may be performed while preventing or reducing brightness variation during sheet unit test, and a sheet unit test method for the mother substrate. The mother substrate also includes first and second wiring line groups and a compensating unit. The compensating unit is coupled to a coupling line for coupling a wiring line from among the first and second wiring line groups for transmitting a sheet unit test signal to the panels. The compensating unit is also for subtracting a voltage corresponding to a threshold voltage of a driving transistor included in a pixel of the panels from the sheet unit test signal before transmitting the sheet unit test signal to the panels.

Abstract: The present invention discloses a switch control unit, a test apparatus and method for a liquid crystal cell. The switch control unit controls a signal input to the liquid crystal display driver and controls the output of the signal from the liquid crystal display driver accordingly, and includes a control signal generator and a switch module. The test apparatus for the liquid crystal cell comprises: a switch control unit connected with a gate driver, for controlling ON and OFF of a signal input to the gate driver and controlling ON and OFF of a gate scan signal accordingly. The test method for the liquid crystal cell comprises: inputting a test signal; controlling ON and OFF of a gate scan signal by controlling ON and OFF of a signal input to a gate driver so as to determine the badness positions on a screen.

Abstract: A method for checking alignment accuracy of a thin film transistor includes providing a substrate, forming a first conductive layer on the substrate, performing a first patterning process to form a gate electrode of a thin film transistor and a first terminal and a second terminal of a testing device, forming a first insulating layer covering the first terminal, the second terminal and the gate electrode on the substrate, forming a contact hole substantially corresponding to the first terminal and the second terminal in the first insulating layer, forming a pixel electrode and a connecting electrode of the testing device in the first contact hole, and performing a close/open circuit test. When the first terminal, the connecting electrode and the second terminal construct a close circuit, alignment accuracy is confirmed. When the first terminal, the connecting electrode and the second terminal construct an open circuit, alignment inaccuracy is confirmed.

Abstract: A method for detecting a foreign particle trapped between substrates of a liquid crystal display panel, by which a potential short caused by the particle can be made into a short with reliability, and thus it is possible to make a display defect manifest itself that is caused by the particle. The method is for detecting the presence of a foreign particle trapped between flexible substrates (21, 26) of a liquid crystal display panel (20), between the substrates liquid crystals filled, and the method includes making the panel pass between supporting rollers (3) arranged to support one surface of the panel, and a pressing roller (4) disposed at a position opposed to a space between the supporting units and arranged to press the other surface of the panel, bending the panel, and displacing the substrates with respect to each other in their surface directions.

Abstract: An inspection circuit for inspecting an electro-optic device that includes a data line, a scanning line, a pixel portion, a driving circuit, and a first terminal portion through which a first power supply voltage is supplied to the driving circuit. The inspection circuit includes an inspection line electrically connected to an inspection unit inspecting the pixel portion, a connection circuit electrically connecting the inspection line to the data line, and a supply circuit supplying a control signal for controlling conduction between the data line and the inspection line to the connection circuit. The supply circuit is driven using a second power supply voltage supplied through a second terminal portion.

Abstract: An electronic test system to evaluate the pixel and array properties of active-matrix displays that use charge or current sensitive circuits attached to the array data lines is described. Leakage-current, charging time, and other metrics can be measured for all pixels in the array without electrical or optical connection to the interior of the array. Charge or current sensitive amplifiers and selected voltage drivers may be used in conjunction with variable timing and voltages to determine individual transistor properties over an entire array in just a few seconds. Signals to be measured may be injected in several ways. Ultimately, an output signal for each pixel is measured. Thus, based on the output signal, the charging time or current, the leakage time or current, and other pixel or transistor parameters may be characterized for the entire array.

Abstract: The present invention discloses a detection circuit in the assembly process of an LCD panel. Through the testing pad collection and the switch collection, the signal line of each of the panel units connects to the corresponding testing signal pad of the testing pad collection respectively through the input terminal and the output terminal of the control switch of the switch collection, and the control terminal of the control switch electrically connects to the control signal pad in order to selectively apply an individual testing to one of the panel units. The present invention also provides a manufacturing method for an LCD panel. Accordingly, the present invention can simplify the detection circuit and reduce the load of the detection circuit.

Abstract: A dark spot defect of an EL element is detected based on an emission brightness or a current flowing through the EL element when an element driving transistor which controls a drive current to be supplied to the EL element is operated in its linear operating region and the EL element is set to an emission level. A dim spot defect caused can be detected based on a current flowing through the EL element when the element driving transistor is operated in its saturation operating region and the EL element is set to the emission level. When an abnormal display pixel is detected based on an emission brightness, a pixel which is determined as an abnormal display pixel and which is not determined as a dark spot defect is determined, and the pixel is detected as a dim spot defect caused by the characteristic variation of the element driving transistor.