Abstract: An optical communication apparatus includes a variable resistor unit, a measurement unit, and a control unit. The variable resistor unit is arranged at a pre-stage of an electrical/optical conversion unit, which converts an electrical signal obtained by converting an input packet to an optical signal having a waveform corresponding to a potential difference between a positive phase component and a negative phase component of the electrical signal by using the potential difference. The variable resistor unit provides a resistor that varies a midpoint of potential of the positive phase component or the negative phase component. The measurement unit measures a ratio of a presence period, which is a period where the input packet is present, to a sum of the presence period and a non-presence period. The control unit controls a value of the resistor provided to the positive phase component or the negative phase component based on the ratio.

Abstract: A phase locked loop (PLL) system generates an oscillator signal by providing a fixed control voltage to a programmable voltage to current converter having switch selection inputs and a variable current output. Logic values are provided to the switch selection inputs to adjust a control current at the variable current output and a frequency of the oscillator signal is adjusted based on the control current. The logic values are fixed when a first condition is reached, which is based on the frequency of the oscillator signal, a division factor, and an input reference signal frequency. The fixed control voltage provided to the programmable voltage to current converter is then replaced with a charge pump control voltage based on an error signal. The error signal is based on a comparison of the input reference signal frequency and a fraction of the oscillating frequency.

Abstract: A dB-linear voltage-to-current (V/I) converter that is amenable to implementation in CMOS technology. In a representative embodiment, the dB-linear V/I converter has a voltage scaler, a current multiplier, and an exponential current converter serially connected to one another. The voltage scaler supplies an input current to the current multiplier based on an input voltage. The current multiplier multiplies the input current and a current proportional to absolute temperature and supplies the resulting current to the exponential current converter. The exponential current converter has a differential MOSFET pair operating in a sub-threshold mode and generating an output current that is proportional to a temperature-independent, exponential function of the input voltage.

Abstract: An apparatus for converting current to voltage includes a pair of current inputs, a differential voltage output connected to the pair of current inputs, a current summing node connected to the pair of current inputs through a first resistor branch, a common mode feedback node connected to the pair of current inputs through a second resistor branch, an amplifier operable to generate a current control signal based at least in part on a voltage at the common mode feedback node, and a current controller operable to control a current through the current summing node based at least in part on the current control signal.

Abstract: Disclosed is a voltage obtaining apparatus. The voltage obtaining apparatus includes a plurality of conversion units, which are connected to each other in parallel and respectively convert charge packets into voltages, and a control unit that controls a timing when the charge packets are respectively input to the plurality of conversion units. The control unit is configured to control the timing so that a corresponding charge packet is input to an nth conversion unit (where n denotes number of the conversion units) at a timing when an operation of an (n?1)th conversion unit is ended.

Abstract: A current-to-voltage converter which is used to receive an input current and to generate an output voltage accordingly comprises a current tracking bias circuit, a current-to-voltage unit, and a voltage clamp bias circuit. The current tracking bias circuit generates a first bias according to the input current. The current-to-voltage unit receives the first bias and the input current, and generates the output voltage according to the input current, wherein the first bias determines a range of the input current, the current-to-voltage unit has a first current control device, and the first current control device changes a current conduction level thereof in response to the first bias, such that a rising or falling speed of the output voltage is enhanced. The voltage clamp bias circuit clamps voltage levels of two ends where the voltage clamp bias circuit is connected to the current-to-voltage unit.

Abstract: A key press detecting circuit and method detect the status of multiple keys through a single pin. In an embodiment, a constant current is provided to apply to a key module through a single pin, to generate a voltage at the single pin that is related to the equivalent resistance of the key module observed from the single pin, and the voltage of the single pin is compared with a set of reference values to identify the status of the plurality of keys. In another embodiment, a variable current is provided to apply to a key module through a single pin in such a way that the variable current is adjusted to maintain a constant voltage at the single pin, and the variable current is compared with a set of reference values to identify the status of the plurality of keys.

Abstract: A mixer includes an input stage to convert an RF input signal to an output signal, and a mixer core to mix the output signal from the input stage with a local oscillator signal. The input stage may include an input cell having a first differential pair of cross-connected transistors, and a linearizer coupled to the input cell. The linearizer may include a second differential pair of transistors having first and second inputs coupled to the input terminals and first and second outputs coupled to the output terminals.

Abstract: A voltage controlled oscillator includes a voltage-to-current converter and a current controlled oscillator, where the voltage-to-current converter is used for converting an input voltage to generate an output current, and the current controlled oscillator is used for generating an output frequency signal according to the output current. In addition, the voltage-to-current converter includes an input terminal, a resistor, a current mirror and a current generating circuit, where the input terminal is for receiving the input voltage; the resistor is coupled to the input terminal; the current mirror is coupled to the resistor, and is used for mirroring a reference current to generate a mirrored current, where the reference current is formed according to at least a current flowing through the resistor; and the current generating circuit is coupled to the current mirror, and is used for generating the output current according to at least the mirrored current.

Abstract: A communication circuit apparatus includes: multiple level shift circuits, each of which receives an input signal corresponding to a respective communication bus; an activation comparator for generating an activation signal when the input signal is input into one of the level shift circuits, and a level of the input signal exceeds a predetermined threshold; multiple input current voltage conversion circuits, each of which is arranged together with a respective level shift circuit, converts the input signal to a voltage signal, and outputs the voltage signal as an identification signal; and an identification circuit for identifying one of the communication busses based on the identification signal, which is output from one of the input current voltage conversion circuits. The one of the communication busses corresponds to the one of the level shift circuits, in which the input signal is input.

Abstract: An IV converter includes a first operational amplifier connected to the capacitive component, a second operational amplifier connected to the first operational amplifier, and an impedance element connected to the second operational amplifier. The first operational amplifier includes a first input terminal connected to the capacitive component, a second input terminal connected to a reference potential, and first and second output terminals. The first output terminal is connected to the first input terminal to constitute a feedback loop. The second operational amplifier includes a third input terminal connected to the second output terminal, a fourth input terminal connected to a reference potential, and a third output terminal connected to the third input terminal via the impedance element to constitute a feedback loop. The phases of the currents output by the first and second output terminals of the first operational amplifier are substantially identical to each other.

Abstract: A charge distributor comprises a charge generator configured to output a charge, a current conveyor, and a plurality of output stages. The current conveyor is configured to receive the charge from the charge generator as an input and to couple this charge to a plurality of output stages. A first output stage, of the plurality of output stages, comprises a plurality of current mirrors. The plurality of current mirrors is configured to mirror and scale the charge received from the current conveyor into a scaled mirrored charge. The first output stage is configured to provide the scaled mirrored charge as an output.

Abstract: The sampling mixer circuit comprises: a clock generating circuit that outputs four-phase control signals the periods of which are in accordance with the carrier frequency of an input signal and the phases of which are different from one another; a voltage-to-current converting circuit that converts a voltage signal based on the input signal to a current signal; four-system charge sharing circuits in which the current signal as converted is input to a plurality of capacitors in accordance with the different phases based on the four-phase control signals and in which charges are exchanged among the plurality of capacitors; and a phase-to-phase capacitor that is selectively connected, on the basis of the four-phase control signals, to the respective ones of nodes, which are other than the input nodes of the current signal, in the four-system charge sharing circuits.

Abstract: A current-to-voltage converter which is used to receive an input current and to generate an output voltage accordingly comprises a current tracking bias circuit, a current-to-voltage unit, and a voltage clamp bias circuit. The current tracking bias circuit generates a first bias according to the input current. The current-to-voltage unit receives the first bias and the input current, and generates the output voltage according to the input current, wherein the first bias determines a range of the input current, the current-to-voltage unit has a first current control device, and the first current control device changes a current conduction level thereof in response to the first bias, such that a rising or falling speed of the output voltage is enhanced. The voltage clamp bias circuit clamps voltage levels of two ends where the voltage clamp bias circuit is connected to the current-to-voltage unit.

Abstract: A current-to-voltage converter comprises a gain circuit, a flip circuit, and a chopper circuit. The gain circuit receives an input current, and amplifies the input current to generate an amplified current. The flip circuit receives the amplified current, and uses the amplified current to charge or discharge a capacitor thereof according to a charge signal and a discharge signal, so as to generate an output voltage, wherein before using the amplified current to charge or discharge the capacitor, the flip circuit resets the output voltage respectively to a charge reset voltage and a discharge reset voltage according to a charge reset signal and a discharge reset signal. When the capacitor is charged, the chopper circuit samples and holds the output voltage to generate a recovered voltage. When the capacitor is discharged, the chopper circuit samples, holds, and flips the output voltage to generate the recovered voltage.

Abstract: A voltage to current converter is provided for use with a current measuring device, said current measuring device being operable to provide an output voltage which is an analogue of a current to be measured. The converter is arranged to provide an output current which is an analogue of the current to be measured. The converter comprises an electronic controller, a switching amplifier and means for measuring the output current as an analogue voltage and providing a measure of said analogue voltage to the electronic controller.

Abstract: The invention provides a voltage to current converter that contains an diode-connected NMOS transistor, a diode-connected PMOS transistor, and a voltage-controlled signal input circuit. The source of the NMOS transistor and the drain of the PMOS transistor are connected together and connected to the voltage-controlled signal input circuit in series. The invention is implemented and tested in the integrated circuit. When an input voltage signal is inputted, a current of the PMOS transistor is substantially linearly proportional to the input voltage signal.

Abstract: An electronic device to simply and efficiently measure energy of incident photons in a very short time and with a very high count rate and high precision, starting from current pulses from an ionizing electromagnetic radiation detector, the electronic device including an analog delay line with switched capacitors with controlled loss at an output from a charge preamplifier.

Abstract: In a semiconductor integrated circuit apparatus and a radio-frequency power amplifier module, a log detection portion including multiple-stage amplifier circuits, multiple level detection circuits, adder circuits, and a linear detection portion including a level detection circuit are provided. Output current from the log detection portion and output current from the linear detection portion are multiplied by different coefficients and the results of the multiplication are added to each other to realize the multiple detection methods. For example, current resulting from multiplication of the output current from the log detection portion by ×6/5 is added to the output current from the linear detection portion to realize a log detection method and, current resulting from multiplication of the output current from the log detection portion by ×? is added to current resulting from multiplication of the output current from the linear detection portion by ×3 to realize a log-linear detection method.

Abstract: An improved reference current generator for use in an integrated circuit. A voltage difference generator generates two voltages that are separated by a relatively small electrical potential. The two closely separated voltages are applied across a resistive element with relatively large impedance value resulting in a small and stable reference current. The stable reference current is mirrored and, if desired, amplified for use on the integrated circuit. A driver selectively drives state information off chip for assisting in post-silicon correction of unwanted sensitivities. A configuration memory stores values used to adjust effective device widths and lengths for correcting unwanted sensitivities.

Abstract: In an embodiment, a circuit is disclosed that includes a current mirror including a first transistor pair and a second transistor pair. The first transistor pair includes a first transistor and a second transistor. The second transistor pair includes cascode transistors. The circuit also includes an operational amplifier having an output coupled to both the first transistor and the second transistor.

Abstract: The invention provides a voltage to current converter that contains an diode-connected NMOS transistor, a diode-connected PMOS transistor, and a voltage-controlled signal input circuit. The source of the NMOS transistor and the drain of the PMOS transistor are connected together and connected to the voltage-controlled signal input circuit in series. The invention is implemented and tested in the integrated circuit. When an input voltage signal is inputted, a current of the PMOS transistor is substantially linearly proportional to the input voltage signal.

Abstract: Embodiments of delay lines may include a plurality of delay stages coupled to each other in series from a first stage to a last stage. Each delay stage may include an input transistor receiving a signal being delayed by the delay line. The delay line may include a compensating circuit configured to compensate for a change in a transconductance of the input transistor resulting from various factors. One such compensating circuit may be configured to provide a bias signal at an output node having a magnitude that is a function of a transconductance of a transistor in the compensating circuit. The bias signal may be used by each of the delay stages to maintain the gain of the respective delay stage substantially constant, such as a gain of substantially unity, despite changes in a transconductance of the respective input transistor in each of the delay stages.

Abstract: Embodiments of the present invention are related to circuits and methods for generating a reference current (Idc). In an embodiment, a voltage-to-current converter circuit is used to generate the reference current (Idc) in dependence on a reference voltage (Vref) and a precision resistor (R0), wherein Idc=Vref/R0. A capacitor (C0) is used to shunt noise that couples into the voltage-to-current converter. A frequency dependent feedback network is used to compensate for instabilities introduced by the capacitor (C0). The capacitor (C0) can be used to shunt noise that couples into the voltage-to-current converter by connecting the capacitor (C0) in parallel with the precision resistor (R0). The frequency dependent feedback network can be used to compensate for instabilities introduced by the capacitor (C0) by connecting the frequency dependent feedback network between a feedback terminal of an amplifier of the voltage-to-current converter circuit and a terminal of the capacitor (C0).

Abstract: An embodiment of a variable-gain mixer for down-converting a modulated input signal into a modulated output signal in a wireless receiver is proposed. The mixer includes means for selecting a mixer gain according to a power level of the input signal, amplifying means for amplifying the input signal into a modulated intermediate current (IRF+,IRF?) in response to a control signal indicative of the selected mixer gain, the intermediate current having an intermediate component, consisting of a direct current, varying according to the selected mixer gain, means for generating the output signal from the intermediate current, the output signal having an output component, consisting of a direct current or voltage, depending on the intermediate component; in an embodiment, the mixer further includes means for setting a compensation current in response to the control signal for compensating the variation of the intermediate component, and means for adding the compensation current to the intermediate current.

Abstract: A line driver includes a transconductance stage that senses a differential voltage present at differential output nodes. The transconductance stage replicates a fraction of the differential voltage and generates a differential output current corresponding to the replicated differential voltage. The differential output current flows through a current mirror stage that mirrors the differential output current to the differential output nodes. The line driver thereby decouples the transconductance stage from the differential output nodes. A lower line driver voltage supply (e.g., 1.8 V) may therefore supply the differential output nodes. A transconductance stage voltage supply separate from the line driver voltage supply may provide the supply voltage for the transconductance stage.

Abstract: A circuit comprising a transconductor amplifier, and a load connected to the transconductor amplifier, wherein the load comprises a load transistor that is passively biased.

Abstract: A circuit includes an oscillation generation circuit, a distribution circuit, and a transceiver circuit. The oscillation generation circuit is configured to generate a first oscillation signal having a first frequency. The distribution circuit includes a voltage to current stage, a transmission portion and a current to voltage stage. The voltage to current stage is configured to receive the first oscillation signal, and convert the first oscillation signal into a current form. The transmission portion is configured to transmit the first oscillation signal in the current form. The current to voltage stage is configured to receive the first oscillation signal in the current form and generate a second oscillation signal having a sub-harmonic frequency of the first frequency, such as half of the first frequency. The transceiver circuit is configured to operate in a frequency band responsive to the second oscillation signal.

Abstract: Embodiments of delay lines may include a plurality of delay stages coupled to each other in series from a first stage to a last stage. Each delay stage may include an input transistor receiving a signal being delayed by the delay line. The delay line may include a compensating circuit configured to compensate for a change in a transconductance of the input transistor resulting from various factors. One such compensating circuit may be configured to provide a bias signal at an output node having a magnitude that is a function of a transconductance of a transistor in the compensating circuit. The bias signal may be used by each of the delay stages to maintain the gain of the respective delay stage substantially constant, such as a gain of substantially unity, despite changes in a transconductance of the respective input transistor in each of the delay stages.

Abstract: A voltage controlled oscillator includes a voltage-to-current converter and a current controlled oscillator, where the voltage-to-current converter is used for converting an input voltage to generate an output current, and the current controlled oscillator is used for generating an output frequency signal according to the output current. In addition, the voltage-to-current converter includes an input terminal, a resistor, a current mirror and a current generating circuit, where the input terminal is for receiving the input voltage; the resistor is coupled to the input terminal; the current mirror is coupled to the resistor, and is used for mirroring a reference current to generate a mirrored current, where the reference current is formed according to at least a current flowing through the resistor; and the current generating circuit is coupled to the current mirror, and is used for generating the output current according to at least the mirrored current.

Abstract: A digital-to-analog conversion apparatus and a current-mode interpolation buffer thereof are provided. The current-mode interpolation buffer comprises a current source, a first differential transistor pair, a second differential transistor pair and an output stage. The current source outputs a first current and draws a second current. Wherein, the amperages of the first current and the second current are dependent on a digital code. First differential transistor pair generates a first differential current according a first rough voltage, an analog voltage and the first current. Second differential transistor pair generates a second differential current according a second rough voltage, the analog voltage and the second current. Output stage generates the analog voltage according to the first differential current and the second differential current, where the analog voltage belongs to a rough range from the first rough voltage to the second rough voltage.

Abstract: The present invention relates to a readout circuit for a touch sensor which can increase touch sensing sensitivity regardless of a process variation and a driving voltage of the touch sensor. The readout circuit includes a comparative circuit for setting an input range of a readout signal from the readout line as well as scaling the readout signal to be a required driving range and forwarding the readout signal scaled thus as a touch sensing signal, and an analog to digital converter for converting the touch sensing signal from the comparative circuit as a digital sensing signal and forwarding the digital sensing signal.

Abstract: The present document relates to a method and system for determining the voltage level of an input signal compared to a reference voltage, providing a plurality of level indications regarding an input voltage with respect to a reference voltage. The multi-level comparator comprises an input stage converting the input voltage into a first current and converting the reference voltage into a second current; and a plurality of comparator stages, each comprising a first current amplification unit amplifying the first current with a first gain, a second current amplification unit amplifying the second current with a second gain, and an output port providing an indication whether the first comparator current is smaller or larger than the second comparator current; wherein respective ratios of the first gain and the second gain of the plurality of comparator stages are different.

Abstract: A method for operating an output module having an output circuit by which a voltage resulting in a current is connected to a load connected to an output, wherein a first driver module is operated and activated via a first control input to connect a voltage to the output, a second driver module is operated in parallel with the first driver module and activated via a second control input to also connect a voltage to the output, at a start time a control circuit receives a switching command for switching the voltage to the output, and wherein the control circuit initially starts by reciprocally activating the first and second control inputs respectively for a first time period, and wherein during this reciprocal activation, the first and second driver modules conduct the current for each respective duration of first and second activation periods.

Abstract: This invention provides a current control semiconductor element in which dependence of a sense ratio on a temperature distribution is eliminated and the accuracy of current detection using a sense MOSFET can be improved, and to provide a control device using the current control semiconductor element. The current control semiconductor element 1 includes a main MOSFET 7 that drives a current and a sense MOSFET 8 that is connected to the main MOSFET in parallel and detects a current shunted from a current of the main MOSFET. The main MOSFET is formed using a multi-finger MOSFET that has a plurality of channels and is arranged in a row. When a distance between the center of the multi-finger MOSFET 7 and a channel located farthest from the center of the multi-finger MOSFET 7 is indicated by L, a channel that is located closest to a position distant by a distance of (L/(?3)) from the center of the multi-finger MOSFET is used as a channel for the sense MOSFET 8.

Abstract: A current driving circuit may include a reference voltage input terminal; a resistor connection terminal; an output terminal via which the light emitting element is connected; a reference voltage generating unit; a transistor arranged such that one terminal thereof is connected to the resistor connection terminal; and an operational amplifier including first and second non-inverting input terminals and a single inverting input terminal, and arranged such that the output terminal thereof is connected to a control terminal of the transistor, the internal reference voltage is input to the first non-inverting input terminal, the external reference voltage is input to the second non-inverting input terminal, and the inverting input terminal thereof is connected to the resistor connection terminal. When the external resistor is connected between the resistor connection terminal and a ground terminal, a driving current is output via the output terminal.

Abstract: A voltage-to-current converter circuit has a differential input unit, and is provided with an input offset voltage, wherein the temperature characteristics of the differential input unit and input offset voltage are substantially flat. A current is supplied wherein a second fixed current having positive temperature characteristics is added to a first fixed current having flat characteristics as a bias current to the differential input unit, to balance the temperature characteristics of the differential input unit and the temperature characteristics of the bias current, thus causing the differential input unit transconductance temperature characteristics to be substantially zero (e.g., substantially flat).

Abstract: A reference current generating circuit with high current mirror accuracy is provided by low power supply voltage operation. The reference current generating circuit includes a cascode current mirror circuit 1 outputting mirror currents I1 and I2, and a reference current Iref, a current-voltage converter circuit 2 converting the mirror current I1 into a voltage V1, a current-voltage converter circuit 3 converting the mirror current I2 into a voltage V2, a differential amplifier 4 in which the voltage V1 is input to a first input terminal and the voltage V2 is input to a second input terminal, a voltage-current converter circuit 5 converting a voltage V3 output from the differential amplifier 4 into currents I3 and I4, and a current-voltage converter circuit 6 converting the current I3 into a voltage V4 which is output to a gate of a transistor in the cascode current mirror circuit.

Abstract: In a semiconductor integrated circuit apparatus and a radio-frequency power amplifier module, a log detection portion including multiple-stage amplifier circuits, multiple level detection circuits, adder circuits, and a linear detection portion including a level detection circuit are provided. Output current from the log detection portion and output current from the linear detection portion are multiplied by different coefficients and the results of the multiplication are added to each other to realize the multiple detection methods. For example, current resulting from multiplication of the output current from the log detection portion by ×6/5 is added to the output current from the linear detection portion to realize a log detection method and, current resulting from multiplication of the output current from the log detection portion by ×1/5 is added to current resulting from multiplication of the output current from the linear detection portion by ×3 to realize a log-linear detection method.

Abstract: An exemplary embodiment of an analog multiplier may include a voltage controlled resistance circuit, a first transistor and a second transistor, where the resistance of the voltage controlled resistance circuit is based upon a first input voltage. The current passing through the voltage controlled resistance circuit is based upon a second input voltage. The first transistor and the second transistor form a current mirror to mirror the current passing through the voltage controlled resistance circuit to provide a power supply control current to a wideband code division multiple access radio frequency power amplifier.

Abstract: An exemplary embodiment of an analog multiplier may include a voltage controlled resistance circuit, a first transistor and a second transistor, where the resistance of the voltage controlled resistance circuit is based upon a difference between a supply voltage and a first input voltage and a constant current supply. The current passing through the voltage controlled resistance circuit is based upon a difference between the voltage supply and a second input voltage. The first transistor may be configured to mirror the current passing through the voltage controlled resistance circuit.

Abstract: A differential current signal circuit is described which includes a voltage to differential current converter circuit that generates a differential pair of current output signals in response to receiving a voltage input signal, where the differential pair of current output signals are linearly proportional to the voltage input signal within a voltage operating range from a minimum operating voltage to a maximum operating voltage. The differential pair of current output signals are linear over a wide range of voltage input signals. A correction circuit is included which eliminates voltage offsets in the voltage operating range due to process and temperature variations. The correction circuit also provides the capability to adjust the minimum operating voltage, and eliminates variations in the minimum operating voltage due to process and temperature variations.

Abstract: A current-to-voltage converter for providing a voltage signal based on a current signal has a first active stage having an input and an output. The first active stage is configured to receive the current signal at its input and provide the voltage signal at its output. In addition, the current-to-voltage converter has a second active stage that is coupled between the output of the first active stage and the input of the first active stage. The second active stage is configured to provide the input of the first active stage with a feedback signal that frequency-selectively counteracts amplification, by the first active stage, of signal components of a current signal applied to the input of the first active stage that have a frequency outside of a prescribed useful frequency band.

Abstract: The present invention relates to a movement average filter based on charge sampling and a moving average filtering method using the same. The moving average filter includes a voltage-current converter and a first sampling unit. The voltage-current converter converts an input voltage signal into an input current signal and outputs the input current signal. The first sampling unit includes a first 1-unit sampler, an ?-unit sampler, and a second 1-unit sampler connected in parallel between an output terminal of the voltage-current converter and a filtered signal output terminal, wherein each of the first 1-unit sampler, the ?-unit sampler, and the second 1-unit sampler has a sampling capacitor bank for performing charge sampling. A ratio of sampling capacitances of sampling capacitor banks of the first 1-unit sampler, the ?-unit sampler, and the second 1-unit sampler is 1:?:1, wherein a is adjusted to have a value between 1 and 2.

Abstract: A key press detecting circuit and method detect the status of multiple keys through a single pin. In an embodiment, a constant current is provided to apply to a key module through a single pin, to generate a voltage at the single pin that is related to the equivalent resistance of the key module observed from the single pin, and the voltage of the single pin is compared with a set of reference values to identify the status of the plurality of keys. In another embodiment, a variable current is provided to apply to a key module through a single pin in such a way that the variable current is adjusted to maintain a constant voltage at the single pin, and the variable current is compared with a set of reference values to identify the status of the plurality of keys.

Abstract: A fly-back power converter has a current-estimating control loop that senses the primary output current in a transformer to control the secondary output. A primary-side control circuit switches primary current through the transformer on and off. A discharge time when a secondary current through an auxiliary winding of the transformer is flowing is generated by sampling a voltage divider on an auxiliary loop for a knee-point. A normalized duty cycle is calculated by multiplying the discharge time by a current that is proportional to the switching frequency and comparing to a sawtooth signal having the switching frequency. The peak of a primary-side voltage is sensed from the primary current loop and converted to a current and multiplied by the normalized duty cycle to generate an estimated current. An error amp compares the estimated current to a reference to adjust the oscillator frequency and peak current to control primary switching.

Abstract: Techniques are described to mirror currents and subtract currents accurately. In an implementation, a circuit includes a first current source coupled to a first node to provide a current IPD1 and a current mirror coupled to the first node through a first switch T1 to provide a current IREF1. In a closed configuration, the current IREF1 flows from the current mirror into the first node. A sigma delta modulator controls the switch T1 such that over a period of time an average current flowing from the current mirror into the first node is equal to the current IPD1 flowing out of the first node. The sigma delta modulator generates a digital output to control switch T2 to allow a current IREF2 into a second node, thus subtracting a portion of a current IPD2 at the second node over a period of time.

Abstract: A voltage and current reference generator includes: a temperature-insensitive voltage source for providing a first current with a positive temperature coefficient and a reference voltage with a substantially zero temperature coefficient according to a junction voltage difference with a negative temperature coefficient; a mirror unit for mirroring the first current to obtain a second current with the positive temperature coefficient and for generating a junction voltage with the negative temperature coefficient according to the second current; a voltage-to-current conversion unit for converting the junction voltage into a third current with the negative temperature coefficient; and a current integration unit for obtaining a fourth current and a fifth current, and integrating the fourth current and the fifth current into a reference current having a substantially zero temperature coefficient.

Abstract: A voltage-to-current converter is described. In one embodiment, the voltage-to-current converter includes an operational amplifier, where a first input of the operational amplifier is coupled to a first node and a second input of the operational amplifier is coupled to a reference voltage. The input voltage is connected to the first node through a resistor which generates the input current. The voltage-to-current converter also includes a first transistor coupled to a first node and to an output of the operational amplifier, where the input current flows through the first transistor. The voltage-to-current converter also includes a second transistor coupled to the first transistor, to the output of the operational amplifier, and to an output node, where an output current flows through the second transistor. The first and second transistors constitute a current mirror to provide additional current gain for the output current.

Abstract: A voltage to current converter comprising a composite amplifier arrangement having a common-base transistor for providing voltage to current conversion, the input current to common-base transistor is corrected to account for the temperature drift of the transistor and variations in the bias supply voltage.