Abstract: Disclosed is a system for arbitrary control of amplitude, phase and polarization characteristics of light in pulsed laser systems, allowing fast pulse-to-pulse modification of the above-mentioned parameters for single pulses or arbitrarily long and closely-spaced bursts of pulses. The control uses an electro-optic device, driving it by a specially designed high voltage driver. The operation of the driving electronics is based on the precise control of charging and discharging a Pockels cell inherent capacitance. This inherent capacitance is typically considered as parasitic. Therefore, prior voltage drivers operate in spite of the capacitance instead of using it. The present high voltage driver consists of a multitude of current-controlled stages capable of sinking and sourcing specific and adjustable currents into the capacitive load of the Pockels cell. The disclosed device and the corresponding control method allow for precise and energy-efficient shaping of Pockels cell control voltage.

Abstract: Circuits, apparatuses, and methods are disclosed for delay models. In one such example circuit, a first delay model circuit is configured to provide a first output signal by modeling a delay of a signal through a path. A second delay model circuit is configured to provide a second output signal by modeling the delay of the signal through the path. A compare circuit is coupled to the first and second delay model circuits. The compare circuit is configured to compare a third signal from the first delay model circuit and a fourth signal from the second delay model circuit, and, in response provide an adjustment signal to adjust the delay of the second delay model circuit.

Abstract: A variable-capacitance device includes a first capacitance element coupled between a first power supply terminal and an output terminal, a capacitance selection switch that is turned on and off in accordance with a capacitance switching signal, a second capacitance element coupled in parallel to the first capacitance element and in series to the capacitance selection switch, and an error correction circuit configured to operate such that in a state in which the capacitance selection switch is in an OFF state, in response to a charge reset signal that causes a voltage at the output terminal to be reset to a reset voltage, the error correction circuit substantially eliminates a difference between the voltage at the output terminal and a voltage at a capacitance switching node at which the second capacitance element is coupled to the capacitance selection switch.

Abstract: Circuits and circuit elements configured to generate a random delay, a monostable oscillator, circuits configured to broadcasting repetitive messages wireless systems, and methods for forming such circuits, devices, and systems are disclosed. The present invention advantageously provides relatively low cost delay generating circuitry based on TFT technology in wireless electronics applications, particularly in RFID applications. Such novel, technically simplified, low cost TFT-based delay generating circuitry enables novel wireless circuits, devices and systems, and methods for producing such circuits, devices and systems.

Abstract: Data signals transmitted over transmission media suffer from attenuation caused by the transmission media. Equalization circuitry may be provided to compensate for attenuation caused by the transmission media. Equalization circuitry may include multiple stages arranged in series to allow the frequency responses of the stages to aggregate together. Each stage may be programmable to insert a zero, which causes the frequency response of the stage to increase in magnitude by 20 dB/decade. The frequency location of the zero may also be programmable to allow each stage to contribute a certain amount of gain for a specific frequency. Each stage may also be programmable to determine the location of poles for reduction of high frequency noise and cross-talk cancellation.

Abstract: An analog delay circuit to impart a group delay to an analog input signal is described. The analog delay circuit may comprise a capacitor to impart at least a portion of the group delay to the analog output signal and a buffer circuit coupled between the capacitor and an input stage to substantially remove at least a portion of a capacitive load at the input stage.

Abstract: An interleaved delay line for use in phase locked and delay locked loops is comprised of a first portion providing a variable amount of delay substantially independently of process, temperature and voltage (PVT) variations while a second portion, in series with the first portion, provides a variable amount of delay that substantially tracks changes in process, temperature, and voltage variations. By combining, or interleaving, the two types of delay, single and dual locked loops constructed using the present invention achieve a desired jitter performance under PVT variations, dynamically track the delay variations of one coarse tap without a large number of delay taps, and provide for quick and tight locking. Methods of operating delay lines and locked loops are also disclosed.

Abstract: One illustrative embodiment of a voltage pulser circuit comprises a voltage source producing a first voltage, and a thyratron tube having an anode coupled to the output of the voltage source, a cathode connected to a reference potential and a grid responsive to a grid control voltage to electrically connect the anode to the cathode to thereby cause the first thyratron tube to switch the anode between the first voltage and the reference potential. A pulse-shaping circuit may be connected to the anode of the tube to effectuate desired rise and fall times of the voltage pulses produced by the voltage pulser circuit. Such a voltage pulser circuit is particularly suited for use in connection with the operation of pulsed spectrometer instruments, such as time-of-flight mass spectrometers and the like.

Abstract: A ring inhibiting charging and discharging circuit (100) for use with an amplification circuit (102) that drives a load (108) is responsive to an input (104) and is capable of generating an output (106) corresponding to the input (104). The ring inhibiting charging and discharging circuit (100) includes a charge element (120) that is responsive to the output (112) from the amplification circuit (102). The charge element (120) is capable of charging the load when the input voltage is greater than a preselected multiple of the output voltage. A discharge circuit (130) is responsive to the output (106) from the amplification circuit (102) and includes a feedback circuit (132) and a staging circuit (134). The feedback circuit (132) asserts a difference signal when the output voltage is less than the preselected multiple of the input voltage.

Abstract: A ring oscillator is formed by connecting three or more odd gate circuits in a ring. Each gate circuit includes a precharge dynamic gate. An output signal from the precharge dynamic gate of one gate circuit is used to precharge the precharge dynamic gates of all the remaining gate circuits. In measuring the gate delay time of the ring oscillator formed by connecting, in a ring, three or more odd gate circuits each including a precharge dynamic gate, the oscillation frequency of the ring oscillator is measured, and the reciprocal of the oscillation frequency is divided by the number of gate circuits constituting the ring oscillator.

Abstract: An apparatus and method for recharging a string of avalanche transistors within a pulse generator is disclosed. A plurality of amplification stages are connected in series. Each stage includes an avalanche transistor and a capacitor. A trigger signal, causes the apparatus to generate a very high voltage pulse of a very brief duration which discharges the capacitors. Charge resistors inject current into the string of avalanche transistors at various points, recharging the capacitors. The method of the present invention includes the steps of supplying current to charge resistors from a power supply; using the charge resistors to charge capacitors connected to a set of serially connected avalanche transistors; triggering the avalanche transistors; generating a high-voltage pulse from the charge stored in the capacitors; and recharging the capacitors through the charge resistors.

Abstract: A modulator for producing repetitive short high voltage pulses is provided. The modulator includes a high voltage power supply, a plurality of pulse forming networks each capable of being charged to a potential equal to twice the voltage of the high voltage power supply, and a plurality of switches interconnecting the pulse forming networks. The switches have a first state connecting the pulse forming networks in parallel with the high voltage power supply to charge the pulse forming networks, and a second state connecting the pulse forming networks in series to discharge the pulse forming networks into a load. The pulse forming networks are charged by use of a resonant charging technique. The modulator further includes an input configured to receive a triggering pulse, the triggering pulse causing the switches to change from the first state to the second state.