With Storage Diode Patents (Class 327/302)
  • Patent number: 6304144
    Abstract: DC components are removed by a first and a second capacitor from a normal signal and its inverted signal from a first and a second input terminal, and the signals are input to a DC level generating circuit. The DC level generating circuit newly adds a DC component to the respective signals from which the DC components are removed by the first and the second capacitors, and extracts only a DC voltage from a feedback voltage with a low-pass filter using the fist and the second capacitors. The circuit of the DC level generating circuit which includes the low-pass filter using the first and the second capacitors is configured so that a high-frequency cut-off frequency other than that included into a loop gain by the low-pass filter is not included. Consequently, only one high-frequency cut-off frequency exists in the loop gain, thereby preventing a feedback circuit from oscillating.
    Type: Grant
    Filed: July 9, 1999
    Date of Patent: October 16, 2001
    Assignee: Fujitsu Limited
    Inventors: Daisuke Yamazaki, Seiichi Ozawa