Abstract: A semiconductor unit is composed of an analog unit, a digital unit, a signal line through which a signal is transmitted from the analog unit to the digital unit, an electric source line Vdd1 through which a high voltage is applied to the analog unit, an electric source line Vdd2 through which the high voltage is applied to the digital unit, an electric source line Vss1 through which a low voltage is applied to the analog unit, an electric source line Vss2 through which the low voltage is applied to the digital unit, and a protective circuit arranged between the electric source lines Vss1 and Vss2. The protective circuit functions to electrically connect the electric source line Vss1 and the electric source line Vss2 in cases where an electric potential difference between the electric source lines Vss1 and Vss2 exceeds a prescribed value. Similar protection can be provided between the high voltage source lines Vdd1 and Vdd2 or between the signal line and the second source lines Vdd2 and Vss2.

Abstract: An apparatus for regulating a substrate voltage in a semiconductor device having a substrate voltage regulator for controlling generation of a substrate voltage so as to supply a pre-set substrate voltage to a substrate, including: a stack of a plurality of resistors being connected in series with each other and a plurality of switches being connected in parallel to corresponding resistors other than a resistor connected to a power supply voltage for decreasing an external voltage applied to one end thereof to a predetermined level; a first transistor having a first electrode connected to another end of the stack of the plurality of the resistors, a gate connected to ground and a second electrode connected to the substrate, for being controlled by a substrate voltage of the substrate; and a second transistor having a gate to which the inverse of a signal outputted from a connecting point between the other end of the stack of the plurality of the resistors and the first transistor is applied, and first and sec

Abstract: A low-noise, low-distortion clamping scheme includes a bootstrapped voltage clamp and an R.sub.gm current clamp that provide superior overdrive protection when used together in a Class-AB feedback amplifier. The bootstrapped voltage clamp includes a transistor that is connected to a circuit node to be clamped. The transistor's base is bootstrapped to the node to maintain a constant V.sub.be when not clamping, to reduce the adverse effects of the junction capacitance C.sub.je which would normally vary with the node voltage and distort the signal at the node. Two such clamps provide positive and negative voltage limiting. The R.sub.gm current clamp is used in the input stage of a Class-AB feedback amplifier to limit the current through the resistor R.sub.gm that interconnects the current inputs of two transconductance amplifiers whenever the voltage drop across R.sub.gm increases to an unacceptable level.

Abstract: The present invention is aimed at providing a method and a circuit for protecting the output stage of a power actuator against voltage transients of the surge type. In particular, it provides protection against voltage surge transients of the kind described by International Standard IEC 801-5, for a power transistor contained in the output stage of the actuator.The method of this invention provides for:the utilization of the power transistor (PW) intrinsic diode (DP) for dumping the transient energy to one of the supply generator terminals during a positive transient; andthe utilization of the power transistor (PW) restoration feature to the on state for dumping the energy thereinto during a negative transient, while simultaneously inhibiting the current limiting function.

Abstract: To a current mirror circuit or a voltage regulator are coupled a primary winding of a transformer (T.sub.3 or T.sub.4) or a choke coil (L.sub.2 or L.sub.3). Transistors (Q.sub.1 or Q.sub.2) making up a current mirror circuit or the voltage regulator are alternatingly bypassed by a bypass circuit constituted of a capacitor (C.sub.2) and other elements. A DC magnetization which may be otherwise caused in a core or a yoke of the transformer (T.sub.3) or the choke coil (L.sub.2) is canceled by allowing direct currents to flow in opposite directions to each other through the primary winding of the transformer (T.sub.4) or through the choke coil (L.sub.2). Alternatively, the DC magnetization which may be otherwise caused in the core or the yoke of the transformer (T.sub.4) or the choke coil (L.sub.3) is significantly suppressed by restricting the direct currents flowing through the primary winding of the transformer (T.sub.4) or the choke coil (L.sub.3).

Abstract: An injector control circuit for a motor vehicle electronic injection system utilizing current recirculation to control an injector actuation winding provided with a circuit configuration containing a constant current generator operable to eliminate the problems of instability and sensitivity to supply line interruptions to which prior art control circuits are subject.

Abstract: An output buffer circuit includes, a voltage-to-current conversion circuit for converting a voltage at an output terminal into a first current supplied from a first power supply terminal, a current-to-current conversion circuit for converting the first current into a second current flowing between the output terminal and a second power supply terminal, and a control circuit for turning ON and OFF said current-to-current circuit in accordance with an input voltage at an input terminal.

Abstract: The control path of the switch (I) comprises an input stage (T2, T1) having an input (H) coupled to the input (E) for the control signal and having its output coupled to the control electrode (G) of the switch (I). A protection circuit (D1, Z2) coupled between the load (C) and the control path includes a threshold effect component (Z2) and a decoupling element (D1). On being made conductive by the current that results from a surge generated in a circuit of the load (C), the protection circuit (D1, Z2) is coupled to the input (H) of said input stage (T2, T1) to act on said switch (I) in the same way as a control signal for the switch (I). In this manner, the control path prevents current in the load (C) from dropping off suddenly.

Abstract: An input circuit which prevents erroneous operation caused by noise. An input stage has a NMOS transistor N11 and a PMOS transistor P11. A NMOS transistor N12 is connected in series between a ground line and the source of the NMOS transistor N11. A PMOS transistor P12 coupled to a voltage supply line V.sub.cc acts as a current control element. NMOS transistors N13 and N14 are connected in series between the ground line and the drain of PMOS transistor P12. Inverters IV11 and IV12 delay the voltage of an intermediate output node S11 and supply it to the gate of NMOS transistor N13. The gate of NMOS transistor N12 is coupled to a node S13, the gate of NMOS transistor N14 is coupled to the input line for an input signal IN, and node S13 is formed to function as a voltage sensor with respect to the ground.

Abstract: The present invention concerns a method and apparatus that generally prevents an output glitch in a sense amplifier during a transition from a strong zero to a weak zero. When multiple cells are turned on, a virtual ground node is raised high due to the current flowing through the virtual ground device. A recover node is generally held close to the read product term line RPT. When a transition from a strong zero occurs, the recover node swings to VCC and provides conductance on the virtual ground node which generally eliminates the glitch.

Abstract: Briefly, in accordance with one embodiment of the invention, a device for use in a magnetic recording read channel adapted to be coupled to a magneto-resistive (MR) read head comprises: an integrated circuit adapted so as to introduce a controllable amount of second-order nonlinearity into the magnetic recording read channel signal path to at least partially offset nonlinearity associated with use of the MR read head. Briefly, in accordance with another embodiment of the invention, a method of reducing nonlinear signal effects in a magnetic recording read channel signal path associated with use of a magneto-resistive (MR) read head comprises the step of: introducing into the read channel signal path a scalable square of the read channel signal.

Abstract: Distortion control in a push-pull output stage of a speech amplifier of a telephone powered through the telephone line is more effectively and advantageously implemented by independently sensing an eventual state of saturation reached by any of the two output transistors of the amplifier, summing the current signals representative of the sensed state of saturation of either or both output transistors, integrating the resulting sum current signal to produce a DC signal and using the DC signal for activating an AGC loop. The DC signal indiscriminately accounts for any cause of saturation, though virtually representing the level of the amplified AC signal. Distortion may be controlled without penalizing output voltage swing and power consumption.

Abstract: An apparatus for suppressing voltage transients across a first transistor is described. The first transistor has a first terminal, a second terminal, and a gate terminal, and is characterized by an avalanche breakdown voltage rating between the first and second terminals. The cathode of a first diode is coupled to the first terminal, the first diode having a reverse breakdown voltage which is less than the avalanche breakdown voltage rating. Gate driver circuitry is provided by which the gate terminal of the first transistor is coupled to the anode of the first diode. The gate driver circuitry provides a drive signal to the gate terminal of the first transistor, and comprises a plurality of bipolar transistors. Each bipolar transistor has an anode terminal (i.e., base terminal), a p-n junction, and a cathode terminal (i.e., emitter terminal). The anode terminal of each bipolar transistor is coupled to the anode of the first diode.

Abstract: The dynamic range of operation of a differential transconductance input stage is reduced when the amplitude of the input signal decreases, thus reducing the level of the noise that is generated by the input stage. A DC signal representative of the sensed amplitude of the input signal is employed for either reducing the value of a common, emitter-degenerating resistance or of the bias current that is forced in the two branches of the differential input stage.

Abstract: An integrated circuit employing quantized feedback is capable of compensating for decay in capacitively-coupled digital signals. In an exemplary embodiment, the integrated circuit includes a quantized feedback receiver connected to a capacitively-coupled integrated circuit input. The capacitively-coupled input produces a decaying signal for corresponding intervals of an input digital signal that are substantially DC voltages. Longer sequences of consecutive data bits of the same logic state in the input signal are represented by a corresponding longer DC voltage signals resulting in a greater decay in the capacitively-coupled signal. The receiver operates by generating a complementary feedback signal which is combined with the capacitively-coupled signal. The feedback signal is generated with a magnitude rate of change that compensates for the decay in the capacitively-coupled signal such that the digital information in the combined signal can be detected substantially without error due to the decay.

Abstract: A circuit for providing parameter compensation to a drive transistor of logic circuit A. A regulating transistor circuit B is connected in series with the drive transistor in order to limit the current in the drive transistor. Bias circuitry C is also provided for supplying a bias voltage Vb to a gate of the regulating transistor circuit B, wherein the voltage is responsive to a predetermined parameter. The bias circuitry C comprises an element which is sensitive to the predetermined parameter.

Abstract: A method and circuit for preventing forward bias of a collector-substrate diode in an integrated circuit with a bipolar transistor where a load driven by the transistor may be offset from a reference voltage, such as circuit ground, by a varying voltage offset. The difference between the bipolar transistor collector voltage and the reference voltage is sensed, and the bipolar transistor base current is varied responsive to the sensed difference so that the base current is zero when the collector voltage is equal to the reference voltage, whereby the collector current will be less than .beta. times the base current when the emitter voltage is less than the reference voltage and the diode will not become forward biased.

Abstract: Circuits and methods are provided for increasing the turn-off switching speed of a high-speed integrated circuit, bipolar switching regulator. The regulator The circuit runs at megahertz frequencies, yet is efficient as previously available bipolar integrated circuit switching regulators operating at much lower frequencies. The increased speed switch turn-off circuitry prevents the switch from spending too much time in a high power state (which would slow the switch down), increases the stability of the switch as compared with previously known designs. In a preferred embodiment, the circuitry includes a PNP transistor and a diode-connected transistor with their base-emitter circuits coupled to form a loop with the base-emitter circuit of a NPN transistor and the base-collector circuit of the switch to limit the on state voltage of the switch and control its depth of saturation.

Abstract: A method and circuit for reducing the leading edge spike in a current sense signal. The current sense signal is a measure of the current through a switched power device controlled by a switching regulator controller. The slew rate of the current sense signal is limited to prevent the slew rate from exceeding a predetermined maximum. The limited slew rate signal is provided to the switching regulator controller. A transconductance amplifier may be used to limit the slew rate of the current sense signal. A capacitor at the output of the transconductance amplifier contributes to controlling the maximum slew rate of the amplifier. The capacitor is charged by the current output of the amplifier to provide a voltage signal for use in place of the original current sense signal. A switch may be provided for selecting between the slew rate limited current sense signal and the original current sense signal.

Abstract: A voltage overshoot limiter having a detector circuit that looks at the node at which the undesirable overshoot would occur and provides a signal that is proportional to the unipolar rate of change of voltage at the node. This output is fed back to the first stage of the control circuit, error amplifier, etc. in such a manner as to reduce the rate of change of the circuit's nodal voltages to less than their slewing rates. By modifying the value of the detector's output for a given detected slew rate at the node, it is possible to reduce both its overshoot significantly and to reduce its unipolar rate of voltage change. The invention is described as being unipolar, that is, responding to rates of change of voltages which are either positive or negative, though bipolar implementations may be realized.

Abstract: A diagnostic signal, indicative of the reaching of a predefined level, lower than a fixed maximum limit value, by the current flowing through a power transistor, is generated while employing a single comparator of a reference voltage with the voltage present across a sensing resistance, thus preventing problems arising from different offset characteristics of distinct comparators. By the use of current mirrors, the generation of a diagnostic signal when the current reaches a level that can be fixed very close to the maximum limit value, may be reliably triggered, irrespectively of the offset characteristic of the single comparator employed.

Abstract: A buffer circuit, such as for use with a low voltage hearing aid, is disclosed. The hearing aid comprises a microphone, a receiver and an amplifier. The amplifier is disposed between the microphone and the receiver. The buffer circuit has a MOS device including a well terminal and a gate terminal equipotentially coupled together to reduce the effective threshold voltage of the MOS device, thereby reducing the gate-to-source voltage of the MOS device. This permits a greater linear output signal range for the amplifier.

Abstract: A power supply for an integrated circuit has a piecewise linear operating characteristic for improved integrated circuit testing and screening. In an integrated circuit that receives an externally applied power signal, designated V.sub.CCX, and includes a power supply for generating an internal operating voltage, designated V.sub.CCR, an on-chip power supply circuit provides V.sub.CCR as a piecewise linear function of V.sub.CCX. In a first segment of such a function, V.sub.CCR approximates V.sub.CCX for efficient low voltage operations. In a second segment, used for normal operations of the integrated circuit, V.sub.CCR rises gradually with V.sub.CCX so that test results at the edges of the segment can be guaranteed with a margin for measurement tolerance, process variation, and derating. In a third segment, V.sub.CCR follows below V.sub.CCX at a predetermined constant offset. Transitions between segments are smooth due to nonlinear devices used in the power supply circuitry.

Abstract: A gate drive circuit which has an active voltage clamp is disclosed. The active voltage clamp protects the gate of a power transistor from an electrical over-stress condition. The active voltage clamp includes at least one zener diode connected in series with a current mirror.

Abstract: A preamplifier for use with currents developed by a photodetecting diode is disclosed wherein the currents are coupled to the base of an NPN transistor connected as a common emitter stage and a feedback resistor is connected by way of a buffer amplifier to the base to provide a standard transimpedance configuration. A control loop monitors the signal level by integrating the output of the buffer amplifier, and upon the detection of large signals the control loop causes a MOSFET in parallel with the feedback resistor to decrease the transimpedance and thereby increase the signal handling capability of the preamplifier. The control loop is also connected to a second MOSFET in parallel with the collector load resistor of said NPN transistor to decrease the effective collector load impedance for large signal levels.

Abstract: A noise shaper includes an incomplete integrator which conducts an addition of a present data and a last sampled data stored and a positive coefficient smaller than 1, a complete integrator which conducts an addition of a storage data before one sample delay and a present data, a three-value quantizing circuit which outputs 0, +1 or -1 signal as an output signal, and a feedback circuit which feeds-back the output signal from the three-value quantizing circuit to the incomplete integrator and the complete integrator. The noise shaper may further include a delay-data supply selection circuit which supplies the last sampled data stored and the positive coefficient to the incomplete integrator only when the output signal supplied from the three-value quantizing circuit through the feed-back circuit is zero. The output signal from the noise shaper can be made zero without deteriorating signal to noise (S/N) ratio when no input signal is inputted to the noise shaper.

Abstract: A feedback clamping circuit effects a clamping control by utilizing a digital information or noise detection. Even when a source is a VTR, disc or the like having a large noise amount, a stable clamping operation can be effected by controlling a gain or dead area width of a feedback loop in response to an identified result of a digital control code signal previously involved in an input signal or detected result of a noise amount contained in the input signal.

Abstract: A comparator circuit comprising a transconductance stage that senses a first and a second input voltage and a transresistance stage that senses the current output of the transconductance stage while limiting a voltage swing at the output of the transconductance stage. The transresistance stage generates an output voltage at an output node that indicates whether the first or the second input voltage has a greater magnitude.

Abstract: A base current-control circuit comprises a detector for detecting a load current of the output transistor and for enabling the circuit to generate a detected current proportional to the load current. A base current-control voltage generator generates a voltage as a function of the detected current, and a switch generates ON/OFF signals. A base current generator utilizes the voltage to generate a base current in response to the ON/OFF signals generated by the switch to drive the output transistor.

Abstract: A biasing device for actively biasing the base of an RF device operating in quasi-linear modes. The biasing device provides a source of low-impedance current and high current capability. The biasing device includes three transistors, each having a base, collector and emitter and one low turn-on diode. The first and second transistors are connected such that changes in the base-emitter voltage of the biased RF device can be detected. The third transistor is configured in a Darlington configuration with the first transistor in order to provide (1) increased sensitivity to voltage changes detected by the second transistor and (2) additional collector voltage for the second transistor to prevent it from operating in saturation. The low turn-on diode is a compensating diode which thermally tracks and compensates for operating changes in the second transistor due to temperature.

Abstract: A signal processing device for selectively producing as an output signal either a signal corresponding to an input signal r a signal which may be a fixed voltage level for muting purposes or a mixed signal. A current switch composed of pairs of differential transistors switches Among a plurality of current paths in accordance with a difference between the voltage levels of a pair of input signals varying in level in phase opposition to each other, or in accordance with a difference between the voltage levels of a reference voltage and a signal phase input signal. A load circuit composed of a plurality of resistors is connected in series with one of the current paths. A current bypass forming circuit which forms a current bypass of a constant current at a desired timing corresponding to a pulse signal with respect to the current path forming the load circuit effects the generation of an output signal not corresponding to the input signal, that is, a fixed voltage for muting the mixed signal.

Abstract: Positive feedback increases switching speeds and negative feedback prevents the voltage at the inputs from varying too far in a sense amplifier used to sense voltage differentials on bit lines or data lines of semiconductor memories, or elsewhere. Switching speeds improve without increased current consumption.

Abstract: In order to prevent a malfunction caused by an electrical noise and limit an excessive main current at a high speed while cutting off the same to a value close to zero, the main current is regulated by an IGBT (1) which is connected with a load. A part of this main current is shunted to another IGBT (2). The as-shunted current flows through a resistor (3), to be converted to a voltage across the resistor (3). When the main current is excessively increased by shorting of the load or the like, this voltage exceeds a prescribed value so that a transistor (5) and a thyristor (7) enter conducting states. Consequently, a voltage across a gate (G) and an emitter (E) of the IGBT (1) is so reduced as to cut off the main current. The transistor (5) prevents the main current from excessive increase since the same has a high speed of response, while the thyristor (7) cuts off the main current to zero since the same has lower resistance in conduction.

Abstract: An output buffer circuit has a pull-up output transistor controlled by a first node and a pull-down output transistor controlled by a second node. The first node is coupled to the second node through a switching stage controlled by feedback from the output terminal. When the output buffer circuit is switched between the high and low output states, the switching stage is initially on, switches off shortly after the potential of the output terminal begins to change, then switches on again when the output terminal reaches a certain intermediate potential.

Abstract: A constant-voltage circuit which can be driven by a low voltage (lower than 1 V) of a nickel-cadmium battery, etc., and which provides a temperature-compensated stable voltage output. The constant-voltage circuit comprises battery 1, band-gap-type current-mirror-type constant-current source circuit 3 which outputs collector current I.sub.C9 of transistor Q.sub.9 with a positive temperature coefficient, current source circuit 5 which outputs collector current I.sub.C8 of transistor Q.sub.8 having a negative temperature coefficient and defined by base-emitter voltage V.sub.BEQ7 of transistor Q.sub.7, and a load resistor element R.sub.0. At node N.sub.0, collector current I.sub.C9 and collector current I.sub.C8 are added. The temperature coefficients of these two currents cancel each other. Consequently, the current at node N.sub.0 does not have temperature dependence. Load resistor element R.sub.0 converts this current to a voltage as the output voltage V.sub.OUT.

Abstract: A method and apparatus is provided for resetting an electronic device in response to a voltage transient. The apparatus implements the method steps of detecting the transient at an input to, and receiving an output from, a voltage sensing circuit in response to the transient. The method also includes the step of providing an electronic device reset signal at the output of the voltage sensing device by clamping the input of the voltage sensing circuit to the output of the voltage sensing circuit through an interconnected positive feedback clamping capacitor. Timing capacitors are used to extend the duration of the reset pulse.

Abstract: Disclosed herein is a circuit for limiting the output current I.sub.O of a power MOSFET T.sub.1. A resistor R.sub.2 converts the current I.sub.O into a low voltage V.sub.0. The low voltage V.sub.O is detected by a low-voltage detecting circuit. When the low voltage V.sub.O is higher than a predetermined value V.sub.OL, the output current I.sub.O of the power MOSFET T.sub.1 is limited. The low-voltage detecting circuit comprises bipolar transistors Q.sub.1 to Q.sub.4. The base and collector of the transistor Q.sub.1 are connected to each other. The collector of the transistor Q.sub.2 is connected to the emitter of the transistor Q.sub.1. The base and emitter of the transistor Q.sub.3 are connected to the bases of the transistors Q.sub.1 and Q.sub.2, respectively. The base and collector of the transistor Q.sub.4 are connected to the emitters of the transistors Q.sub.1 and Q.sub.3, respectively. The low voltage V.sub.O is applied to the node between the emitters of the transistors Q.sub. 2 and Q.sub.4.

Abstract: An analog trim circuit enables and disables one or more serially connected passive elements for setting characteristics of the circuit. Each passive element has a transistor across its first and second conduction terminals operating in response to a control signal from a control circuit for enabling and disabling conduction through the associated passive element. The control circuits are responsive to a data signal for providing the control signals that enable and disable the conduction through the passive elements. The data signal allows a preview of the trimming results. The fuse in certain ones of the control circuits are blown to set the control signals to fixed values after removal of the data signal.